A method for preparing an LED chip with improved electrolytic failure and the LED chip

CN117239017BActive Publication Date: 2026-10-27JIANGXI ZHAO CHI SEMICON CO LTD
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Patent Information

Application Number
CN202311134171.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-09-05
Publication Date
2026-10-27
Estimated Expiration
2043-09-05

AI Technical Summary

Technical Problem

[0005]基于此,本发明的目的是提供一种改善电解失效的LED芯片制备方法及LED芯片,旨在解决现有技术中无法从LED芯片的根本上解决金属解离失效的问题

Benefits of technology

[0016]本发明通过在透明导电层上设置致密性的保护层,从而有效的减少芯片电极结构中活泼金属出现迁移的问题,有效降低显示屏中芯片金属解离失效的概率,并且Si3N4具有较好的气密防潮性能,可效解决吸潮问题,但是由于Si3N4脆性相对较大,将Si3N4与SiO2结合可以有效利用热膨胀系数的差异以及多层膜的效果,减少在形成过程中由于生长条件和应力的作用而形成的裂痕,保证保护层的稳定性,从芯片本身结构根本上解决金属解离失效的问题。解决了现有技术中无法从LED芯片的根本上解决金属解离失效的问题。

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Abstract

The application provides a preparation method of an LED chip for improving electrolytic failure, which comprises the following steps: providing a semi-finished LED chip with a transparent conductive layer; introducing source and carrier gases required for growth, and sequentially depositing Si3N4 and SiO2 on the surface of the semi-finished LED chip to form a protective layer on the semi-finished LED chip; making a mask pattern on the protective layer, and immersing the protective layer in an etching solution to remove the protective layer in some areas and then making electrodes. The application solves the problem that the metal dissociation failure cannot be fundamentally solved in the prior art.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor chip technology, and in particular to a method for preparing LED chips that improves electrolytic failure and an LED chip thereof. Background Technology

[0002] As the resolution of LED displays gradually increases and the number of pixels grows, the pixel pitch of each LED pixel becomes smaller. The number of chips required for each LED display reaches millions, even tens of millions, and the cost of each chip directly impacts the profit margin of the display product. To pursue higher resolution, the refresh rate of the power supply used in the display is gradually increasing, as is the electric field density. Under the influence of a strong electric field density, coupled with the potential infiltration of moisture into the package during encapsulation and use, LED chips are prone to metal dissociation, leading to LED failure.

[0003] With the continuous development of epitaxy, chip manufacturing processes, and packaging technologies, many previously common failure problems have been well resolved. However, chip dissociation under humidity has become one of the main challenges for display products. Therefore, improving the resistance of LED displays to metal dissociation is an urgent issue that needs to be addressed for high-resolution LED displays.

[0004] Currently, in the application environment of high-resolution LED displays, the main approach is to prevent moisture infiltration and contamination during the process through packaging and module protection. However, the optimization of the LED chip's own structural design and protection scheme is neglected to reduce chip metal dissociation failure, thus failing to fundamentally solve the problem of metal dissociation failure. Summary of the Invention

[0005] Based on this, the purpose of this invention is to provide an LED chip preparation method and LED chip that improves electrolytic failure, aiming to solve the problem of metal dissociation failure that cannot be fundamentally solved in the prior art.

[0006] The embodiments of the present invention are implemented as follows: On the one hand, the present invention proposes a method for preparing LED chips to improve electrolytic failure, the method comprising: Provide a semi-finished LED chip with a pre-fabricated transparent conductive layer; The source and carrier gas required for growth are introduced, and Si3N4 layer and SiO2 are sequentially deposited on the surface of the semi-finished LED chip to form a protective layer on the semi-finished LED chip. A mask pattern is fabricated on the protective layer, and the protective layer is immersed in an etching solution. After removing a portion of the protective layer, an electrode is fabricated.

[0007] Furthermore, in the above-mentioned LED chip fabrication method, in the step of introducing the source and carrier gas required for growth, and sequentially depositing Si3N4 layer and SiO2 on the surface of the semi-finished LED chip to form a protective layer on the semi-finished LED chip, the deposition temperature is 140℃-380℃.

[0008] Furthermore, in the above-mentioned LED chip fabrication method, in the step of introducing the source and carrier gas required for growth, and sequentially depositing Si3N4 layer and SiO2 on the surface of the semi-finished LED chip to form a protective layer on the semi-finished LED chip, the RF power of the deposition is 90 W-110 W.

[0009] Furthermore, in the above-mentioned LED chip fabrication method, in the step of introducing the source and carrier gas required for growth, and sequentially depositing Si3N4 layer and SiO2 on the surface of the semi-finished LED chip to form a protective layer on the semi-finished LED chip, the deposition pressure is 700 mtorr - 900 mtorr.

[0010] Furthermore, in the above-mentioned LED chip fabrication method, the source is N2O and SiH4, and the carrier gas is N2.

[0011] Furthermore, in the above-mentioned LED chip fabrication method, the flow rate of SiH4 is 50 sccm - 200 sccm, and the flow rate of N2O is 1500 sccm - 2000 sccm.

[0012] Furthermore, in the above-mentioned LED chip fabrication method, the flow rate of N2 is 400 sccm-600 sccm.

[0013] Furthermore, in the above-mentioned LED chip fabrication method, the thickness of the protective layer is 500Å~4000Å.

[0014] Furthermore, in the above-mentioned LED chip fabrication method, the step of providing a semi-finished LED chip with a fabricated epitaxial layer includes: Provide a substrate; An N-type semiconductor layer, a multiple quantum well layer, and a P-type semiconductor layer are sequentially grown on the substrate; The exposed areas of a partial N-type semiconductor layer are etched using photolithography, and then transparent conductive layers are deposited on the N-type semiconductor layer and the P-type semiconductor layer, respectively. A mask pattern for a transparent conductive layer is formed by photolithography, and then the transparent conductive layer on the surface of the non-semiconductor layer is removed by wet etching, ultimately forming a transparent conductive layer on the surface of the P-type semiconductor layer.

[0015] In another aspect, the present invention proposes an LED chip prepared by any of the above-described methods for improving electrolytic failure.

[0016] This invention effectively reduces the migration of active metals in the chip electrode structure by setting a dense protective layer on the transparent conductive layer, thus significantly lowering the probability of metal dissociation failure in the display chip. Furthermore, Si3N4 possesses good airtight and moisture-proof properties, effectively solving the moisture absorption problem. However, due to the relatively high brittleness of Si3N4, combining Si3N4 with SiO2 effectively utilizes the difference in thermal expansion coefficients and the effect of multilayer films to reduce cracks formed during the formation process due to growth conditions and stress, ensuring the stability of the protective layer. This fundamentally solves the problem of metal dissociation failure from the chip's structural perspective. It addresses the issue of metal dissociation failure that cannot be fundamentally resolved in existing technologies for LED chips. Attached Figure Description

[0017] Figure 1 This is a flowchart of an LED chip fabrication method for improving electrolytic failure according to an embodiment of the present invention; The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0018] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of the invention are illustrated in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0019] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0021] This invention addresses the problem of metal dissociation failure in existing technologies that do not fundamentally solve the issue from the perspective of the LED chip structure itself. It proposes an LED chip fabrication method and LED chip that improves electrolytic failure prevention, wherein: Please see Figure 1 The diagram shows a flowchart of an LED chip fabrication method for improving electrolytic failure proposed in an embodiment of the present invention. The LED chip fabrication method for improving electrolytic failure includes steps S10 to S12.

[0022] Step S10: Provide a semi-finished LED chip with a pre-fabricated transparent conductive layer.

[0023] In this invention, a protective layer is provided within the LED chip to effectively reduce the migration of active metals in the chip's electrode structure, thereby lowering the probability of chip failure due to metal electrode dissociation in the display screen. Specifically, the protective layer is disposed on a transparent conductive layer and covers the surface of the epitaxial wafer. Therefore, a semi-finished LED chip with a fabricated epitaxial wafer containing the transparent conductive layer is first required. Specifically, in this invention, the preparation of the semi-finished LED chip with the fabricated epitaxial layer can be carried out in the following manner: Provide a substrate; An N-type semiconductor layer, a multiple quantum well layer, and a P-type semiconductor layer are sequentially grown on the substrate; The exposed areas of a partial N-type semiconductor layer are etched using photolithography, and then transparent conductive layers are deposited on the N-type semiconductor layer and the P-type semiconductor layer, respectively. A mask pattern for a transparent conductive layer is formed by photolithography, and then the transparent conductive layer on the surface of the non-semiconductor layer is removed by wet etching, ultimately forming a transparent conductive layer on the surface of the P-type semiconductor layer.

[0024] First, an epitaxial layer containing a transparent conductive layer is prepared as the basis for the subsequent fabrication of a protective layer. Specifically, the epitaxial layer may include a substrate, an N-type semiconductor layer deposited on the substrate, a multiple quantum well layer, and a P-type semiconductor layer. In some optional embodiments of the present invention, the epitaxial wafer may also include other structures besides the above-mentioned structures.

[0025] Specifically, a sapphire substrate is used as the substrate, and the N-type semiconductor layer and P-type semiconductor layer are respectively an N-type GaN layer and a P-type GaN layer, an N-type GaN layer, a quantum well, and a P-type GaN layer; an N-mesa pattern is formed on the epitaxial wafer using a positive photoresist photolithography process, and part of the P-type GaN layer and quantum well are etched away by dry etching to expose the N-type GaN layer; the transparent conductive layer can be made of ITO.

[0026] Step S11: Introduce the source and carrier gas required for growth, and sequentially deposit Si3N4 layer and SiO2 on the surface of the semi-finished LED chip to form a protective layer on the semi-finished LED chip.

[0027] Specifically, a protective layer is prepared on the above-mentioned semi-finished chip using plasma chemical vapor deposition technology. More specifically, the above-mentioned semi-finished chip is placed in a PECVD chamber, the chamber is closed and the vacuum level is evacuated to a set pressure, a radio frequency power supply is used, and a set flow rate of source gas, carrier gas, and ammonia is introduced. After the gas pressure stabilizes, the radio frequency power supply is turned on, the power of the radio frequency power supply is set to a preset power level, and the deposition temperature is set to a preset temperature to obtain the protective layer.

[0028] The preset temperature is 140℃-380℃, the thickness of the protective layer is 500Å~4000Å, the set flow rate of SiH4 is 50sccm-200sccm, the set flow rate of N2O is 1500sccm-2000sccm, and the set flow rate of N2 is 400sccm-600sccm.

[0029] In one embodiment of the present invention, a protective layer is prepared on the wafer using plasma chemical vapor deposition (PECVD). The wafer is placed in a PECVD chamber, the chamber is closed and the vacuum level is evacuated to 850 mtorr, and a radio frequency power supply is used to introduce 113 sccm SiH4, 1880 sccm N2O, 590 sccm N2, and 120 sccm NH3. After the gas pressure stabilizes, the radio frequency power supply is turned on, the power is set to 100W, and the deposition temperature is set to 230°C to obtain the protective layer.

[0030] Understandably, optimizing the protective layer thickness, deposition conditions, and materials increases its stability and density, effectively reducing the migration of active metals in the chip electrode structure and lowering the probability of chip metal dissociation failure in the display screen. Furthermore, Si3N4 possesses good airtight and moisture-proof properties, effectively solving the moisture absorption problem. However, due to its relatively high brittleness, combining Si3N4 with SiO2 effectively utilizes the difference in thermal expansion coefficients and the effect of multilayer films, reducing cracks formed during the formation process due to growth conditions and stress, and ensuring the temperature stability of the protective layer.

[0031] Step S12: A mask pattern is made on the protective layer, and the protective layer is immersed in an etching solution to remove a portion of the protective layer before the electrode is made.

[0032] In this process, a mask pattern for the protective layer is created on the prepared protective layer using photolithography. Then, the protective layer is removed by immersion in BOE solution to facilitate the subsequent fabrication of the metal electrode.

[0033] Specifically, a mask pattern of metal electrodes is fabricated on the above-mentioned protective layer using photolithography, a metal layer is deposited on its surface using electron beam evaporation, and the positive and negative electrodes are obtained through a stripping process.

[0034] In addition, the substrate is thinned by grinding and polishing using conventional processes, and finally the chip device is fabricated by cutting and scratching.

[0035] On the other hand, the LED chip proposed in the embodiments of the present invention is prepared by the LED chip preparation method for improving electrolytic failure described in any of the above-mentioned methods.

[0036] In summary, the LED chip fabrication method and LED chip for improving electrolytic failure proposed in the above embodiments of the present invention effectively reduce the migration of active metals in the chip electrode structure by setting a dense protective layer on the transparent conductive layer, thereby effectively reducing the probability of metal dissociation failure in the display screen. Furthermore, Si3N4 has good airtight and moisture-proof properties, effectively solving the moisture absorption problem. However, due to the relatively high brittleness of Si3N4, combining Si3N4 with SiO2 can effectively utilize the difference in thermal expansion coefficients and the effect of multilayer films to reduce cracks formed during the formation process due to growth conditions and stress, ensuring the stability of the protective layer and fundamentally solving the problem of metal dissociation failure from the chip structure itself. This solves the problem of metal dissociation failure that cannot be fundamentally solved in the existing technology for LED chips.

[0037] In addition, LED chips obtained under different preparation conditions by the LED chip preparation method in the embodiments of the present invention and LED chips prepared in the prior art were subjected to high temperature and high humidity (85℃ / 85%) aging tests using a reverse bias voltage of -5V. The test results are shown in Table 1 below.

[0038] Table 1 As can be clearly seen from Table 1, by setting a dense protective layer on the transparent conductive layer, the problem of migration of active metals in the chip electrode structure is effectively reduced, and the probability of chip metal dissociation failure in the display screen is effectively reduced. In addition, Si3N4 has good airtight and moisture-proof performance, which can effectively solve the moisture absorption problem. However, since Si3N4 is relatively brittle, combining Si3N4 with SiO2 can effectively utilize the difference in thermal expansion coefficients and the effect of multilayer film to reduce cracks formed during the formation process due to growth conditions and stress, and ensure the stability of the protective layer.

[0039] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A method for fabricating an LED chip to improve electrolytic failure, characterized in that, The method includes; Provide a semi-finished LED chip with a pre-fabricated transparent conductive layer; The source and carrier gas required for growth are introduced, and Si3N4 layer and SiO2 are sequentially deposited on the surface of the semi-finished LED chip to form a protective layer on the semi-finished LED chip. A mask pattern is fabricated on the protective layer, and the protective layer is immersed in an etching solution to remove a portion of the protective layer before fabricating the electrode. The source is N2O and SiH4, and the carrier gas is N2O. 2, The influent flow rate of SiH4 is 50 sccm - 200 sccm, the influent flow rate of N2O is 1500 sccm - 2000 sccm, and the influent flow rate of N2 is 400 sccm - 600 sccm.

2. The method for preparing an LED chip to improve electrolytic failure according to claim 1, characterized in that, In the step of introducing the source and carrier gas required for growth, and sequentially depositing Si3N4 layer and SiO2 on the surface of the semi-finished LED chip to form a protective layer, the deposition temperature is 140℃-380℃.

3. The method for preparing an LED chip to improve electrolytic failure according to claim 1, characterized in that, In the step of introducing the source and carrier gas required for growth, and sequentially depositing Si3N4 layer and SiO2 on the surface of the semi-finished LED chip to form a protective layer, the RF power of the deposition is 90W-110W.

4. The method for preparing an LED chip to improve electrolytic failure according to claim 1, characterized in that, In the step of introducing the source and carrier gas required for growth, and sequentially depositing Si3N4 layer and SiO2 on the surface of the semi-finished LED chip to form a protective layer, the deposition pressure is 700 mtorr - 900 mtorr.

5. The method for preparing an LED chip to improve electrolytic failure according to claim 1, characterized in that, The thickness of the protective layer is 500 Å to 4000 Å.

6. The method for preparing an LED chip to improve electrolytic failure according to any one of claims 1 to 5, characterized in that, The step of providing a semi-finished LED chip with a pre-fabricated transparent conductive layer includes: Provide a substrate; An N-type semiconductor layer, a multiple quantum well layer, and a P-type semiconductor layer are sequentially grown on the substrate; The exposed areas of a partial N-type semiconductor layer are etched using photolithography, and then transparent conductive layers are deposited on the N-type semiconductor layer and the P-type semiconductor layer, respectively. A mask pattern for a transparent conductive layer is formed by photolithography, and then the transparent conductive layer on the surface of the non-semiconductor layer is removed by wet etching, ultimately forming a transparent conductive layer on the surface of the P-type semiconductor layer.

7. An LED chip, characterized in that, The LED chip is prepared by any one of the LED chip preparation methods for improving electrolytic failure as described in any one of claims 1 to 6.

Citation Information

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    CN115332419A

  • Supporting substrates for semiconductor light emitting device and high-performance vertical structured semiconductor light emitting devices using supporting substrates

    KR1020090125676A