A polar code encoding method and device, electronic equipment and storage medium
Patent Information
- Application Number
- CN202311167862.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-11
- Publication Date
- 2026-09-15
- Estimated Expiration
- 2043-09-11
AI Technical Summary
[0004]本申请提供一种极化码编码方法、装置、电子设备及存储介质,解决了放置奇偶校验位的位置可能不存在错误的编码,导致无法快速地找到该极化码编码序列中出现的错误,降低了极化码编码序列的校验效率的技术问题
[0017]The polar code encoding method, apparatus, electronic device, and storage medium provided in this application allow the electronic device to determine M bits from a first sequence to be encoded, and based on the positions of these M bits in the first sequence, add M parity check bits to obtain a second sequence to be encoded. Then, polar code encoding is performed on the second sequence to obtain a first encoded sequence. In this application, since the reliability of the M bits meets a preset condition, it indicates that the reliability of these M bits is lower than that of their adjacent bits. Therefore, the probability of errors occurring in these M bits is relatively high. In this case, the electronic device adds parity check bits at the positions of potentially erroneous bits, enabling rapid verification of errors in the first encoded sequence based on the positions of these parity check bits, thus improving the efficiency and accuracy of encoded sequence verification.
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Figure CN117240307B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of communication technologies, and in particular, to a polar code encoding method, apparatus, electronic device and storage medium. Background Art
[0002] At present, when a transmitting device performs polar code encoding, it adds a parity check bit to the encoding sequence, so that a receiving device checks the encoding sequence based on the parity check bit.
[0003] However, in the above method, the transmitting device generally adds parity check bits by means of equally spaced placement, and there may be no erroneous coding at the positions where the parity check bits are placed, which results in that errors occurring in the polar code coding sequence cannot be found quickly, and reduces the checking efficiency of the polar code coding sequence. Summary of the Invention
[0004] The present application provides a polar code encoding method, apparatus, electronic device and storage medium, which solves the technical problem that there may be no erroneous coding at the positions where parity check bits are placed, resulting in that errors occurring in the polar code coding sequence cannot be found quickly, and the checking efficiency of the polar code coding sequence is reduced.
[0005] In a first aspect, the present application provides a polar code encoding method, comprising: determining M bit positions from a first sequence to be encoded, wherein reliability of the M bit positions meets a preset condition, the first sequence to be encoded comprises L bit positions, M and L are integers greater than or equal to 1, and M<L; adding M parity check bits to the first sequence to be encoded based on positions of the M bit positions in the first sequence to be encoded, to obtain a second sequence to be encoded; and performing polar code encoding on the second sequence to be encoded to obtain a first encoded sequence.
[0006] Optionally, the determining M bit positions whose reliability meets a preset condition from the first sequence to be encoded may specifically comprise: in a case where a first reliability is lower than a second reliability, and the first reliability is lower than a third reliability, determining that the first reliability meets the preset condition, and determining a first bit position as one of the M bit positions, wherein the first reliability is reliability of the first bit position, the second reliability is reliability of a second bit position, the third reliability is reliability of a third bit position, the first bit position is a bit position included in the first sequence to be encoded except a first bit, and the second bit position and the third bit position are adjacent bit positions to the first bit position in the first sequence to be encoded.
[0007] Optionally, the number of bits whose reliability meets a preset condition in the first coding sequence is N, and the polar code coding method further includes: when M is less than N, determining M bits from the N bits in an order of reliability from low to high, wherein N is an integer greater than or equal to 1.
[0008] Optionally, the polar code coding method further includes: determining a polarization weight of each bit included in the first sequence to be coded; sorting the L bits in an order of polarization weight from large to small to obtain a first index sequence; determining the reliability level between two bits based on the position of each bit in the first index sequence.
[0009] Optionally, the polar code coding method further includes: when the bit error rate of the first coding sequence is greater than or equal to a bit error rate threshold, generating a second index sequence based on an improved Gaussian approximation algorithm and the first sequence to be coded; determining X bits from the first index sequence in an order of polarization weight from small to large, wherein X is an integer greater than or equal to 1; performing replacement processing on the sorting of the X bits in the first index sequence with the sorting of the X bits in the second index sequence to obtain a third index sequence; determining the reliability level between two bits based on the position of each bit in the third index sequence.
[0010] In a second aspect, the present application provides a polar code coding apparatus, including: a determination module and a processing module; the determination module is configured to determine M bits from a first sequence to be coded, wherein the reliability of the M bits meets a preset condition, the first sequence to be coded includes L bits, M and L are integers greater than or equal to 1, and M<L; the processing module is configured to add M parity check bits to the first sequence to be coded based on the positions of the M bits in the first sequence to be coded, so as to obtain a second sequence to be coded; the processing module is further configured to perform polar code coding on the second sequence to be coded to obtain a first coding sequence.
[0011] Optionally, the determination module is specifically configured to: when a first reliability is lower than a second reliability and the first reliability is lower than a third reliability, determine that the first reliability meets the preset condition, and determine a first bit as one of the M bits, wherein the first reliability is the reliability of the first bit, the second reliability is the reliability of a second bit, the third reliability is the reliability of a third bit, the first bit is a bit other than the first bit included in the first sequence to be coded, and the second bit and the third bit are adjacent bits of the first bit in the first sequence to be coded.
[0012] Optionally, the number of bits in the first encoded sequence that meet the preset reliability condition is N. The determining module is also used to determine M bits from the N bits in ascending order of reliability when M is less than N, where N is an integer greater than or equal to 1.
[0013] Optionally, the determining module is further configured to determine the polarization weight of each bit included in the first sequence to be encoded; the processing module is further configured to sort the L bits in descending order of polarization weight to obtain a first index sequence; the determining module is further configured to determine the reliability level between two bits based on the position of each bit in the first index sequence.
[0014] Optionally, the processing module is further configured to generate a second index sequence based on an improved Gaussian approximation algorithm and the first sequence to be encoded, provided that the bit error rate of the first encoded sequence is greater than or equal to a bit error rate threshold; the determining module is further configured to determine, based on the position of each bit in the first index sequence, X bits that can be determined from the first index sequence in ascending order of polarization weight, where X is an integer greater than or equal to 1; the processing module is further configured to replace the sorting of the X bits in the second index sequence with the sorting of the X bits in the first index sequence to obtain the third index sequence; the determining module is further configured to determine, based on the position of each bit in the first index sequence, the reliability level between the two bits, and based on the position of each bit in the third index sequence.
[0015] Thirdly, this application provides an electronic device, including: a processor and a memory configured to store processor-executable instructions; wherein the processor is configured to execute the instructions to implement any of the optional polar code encoding methods in the first aspect described above.
[0016] Fourthly, this application provides a computer-readable storage medium storing instructions that, when executed by an electronic device, enable the electronic device to perform any of the optional polar code encoding methods described in the first aspect above.
[0017] The polar code encoding method, apparatus, electronic device, and storage medium provided in this application allow the electronic device to determine M bits from a first sequence to be encoded, and based on the positions of these M bits in the first sequence, add M parity check bits to obtain a second sequence to be encoded. Then, polar code encoding is performed on the second sequence to obtain a first encoded sequence. In this application, since the reliability of the M bits meets a preset condition, it indicates that the reliability of these M bits is lower than that of their adjacent bits. Therefore, the probability of errors occurring in these M bits is relatively high. In this case, the electronic device adds parity check bits at the positions of potentially erroneous bits, enabling rapid verification of errors in the first encoded sequence based on the positions of these parity check bits, thus improving the efficiency and accuracy of encoded sequence verification. Attached Figure Description
[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below.
[0019] Figure 1 A schematic flowchart illustrating a polar code encoding method provided in an embodiment of this application;
[0020] Figure 2 This is a schematic diagram of a method for generating a second sequence to be encoded, provided in an embodiment of this application.
[0021] Figure 3 A schematic diagram illustrating another method for generating a second sequence to be encoded provided in an embodiment of this application;
[0022] Figure 4 A flowchart illustrating another polar code encoding method provided in an embodiment of this application;
[0023] Figure 5 A flowchart illustrating another polar code encoding method provided in an embodiment of this application;
[0024] Figure 6 A flowchart illustrating another polar code encoding method provided in an embodiment of this application;
[0025] Figure 7 A flowchart illustrating another polar code encoding method provided in an embodiment of this application;
[0026] Figure 8 This is a schematic diagram of the structure of a polar code encoding device provided in an embodiment of this application;
[0027] Figure 9 This is a schematic diagram of another polar code encoding device provided in an embodiment of this application. Detailed Implementation
[0028] The polar code encoding method, apparatus, electronic device, and storage medium provided in the embodiments of this application will now be described in detail with reference to the accompanying drawings.
[0029] The terms "first" and "second," etc., in the specification and drawings of this application are used to distinguish different objects, rather than to describe a specific order of objects. For example, "first sequence to be encoded" and "second sequence to be encoded," etc., are used to distinguish different sequences to be encoded, rather than to describe a specific order of sequences to be encoded.
[0030] Furthermore, the terms “comprising” and “having”, and any variations thereof, used in the description of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include other steps or units not listed, or may optionally include other steps or units inherent to such processes, methods, products, or apparatus.
[0031] It should be noted that in the embodiments of this application, the words "exemplary" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design scheme described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of the words "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.
[0032] The term "and / or" as used in this application includes using either one of two methods or using both methods simultaneously.
[0033] In the description of this application, unless otherwise stated, "a plurality of" means two or more.
[0034] The following explains some concepts involved in the polar code encoding method, apparatus, electronic device and storage medium provided in the embodiments of this application.
[0035] Gauss's construction principle:
[0036] First, the log-likelihood ratio of the information bits is:
[0037]
[0038] The reliability of determining the bit based on the mean of the log-likelihood ratio satisfies the following formula:
[0039]
[0040]
[0041] The expression for the Gaussian function is:
[0042]
[0043] It is a monotonically decreasing function, defined as the LLR function in the Gaussian approximation algorithm for the logarithmic field:
[0044]
[0045] To address the high iterative complexity of the LLR function in the improved gassian approximation (IGA) algorithm, Defined as:
[0046]
[0047] The expression for the approximate function ξ(γ) is given as follows:
[0048]
[0049] Where (a0,a1,a2)=(-0.002706-,0.476711,0.0)5, (a,b,c)=(-0.4537,0.0218,0.86), τ0,τ1,τ2=0.2,0.7,10, according to the given ξ(γ), the definition of the average LLR value can be rewritten as:
[0050]
[0051] corresponding The function can be represented as:
[0052]
[0053] Polar weight construction principle: The polar weight scheme does not depend on the transmission channel, can generate codebooks in advance, and has extremely low complexity. The disadvantage is that it cannot guarantee transmission quality under polar code encoding in medium and long code conditions.
[0054] The principle of polar code construction with added cyclic redundancy check (CRC): CRC check bits are added to the transmission block at the sending end, and the CRC check bits are generated according to the following generator polynomial:
[0055] 24-bit CRC:
[0056] g CRC24A (D)=[D 24 +D 23 +D 18 +D 17 +D14 +D 11 +D 10 +D 7 +D 6 +D 5 +D 4 +D 3 +D+1];
[0057] 24-bit CRC:
[0058] g CRC24B (D)=[D 24 +D 23 +D 6 +D 5 +D+1];
[0059] 24-bit CRC:
[0060] g CRC24C (D)=[D 24 +D 23 +D 21 +D 20 +D 17 +D 15 +D 13 +D 12 +D 8 +D 4 +D 2 +D+1];
[0061] 16-bit CRC:
[0062] g CRC16 (D)=[D 16 +D 12 +D 5 +D+1];
[0063] 8-bit CRC:
[0064] g CRC16 (D)=[D 8 +D 7 +D 4 +D 3 D+1].
[0065] Encoding and decoding construction based on parity bits:
[0066] Polar coordinates can be composed of three (N, N) k A) Determine that N represents the length of the codeword after polar coordinate encoding, satisfying N = 2. n N k These represent the input information bits of the polar coordinate encoder. A and A' cThese represent the sets of indices for the unfrozen bits and the frozen bits, respectively. Assuming the frozen bits are set to zero, the parity and CRC concatenated polarity code contains M parity bits and J CRC bits. Assume there exists a message vector u1 to be sent. K = (u1, u2, ..., u K First, the K bits are divided into M blocks by a parity check code. i This indicates the length of each information bit segment. Then, the K information bits are encoded using M-1 parity check functions to generate M-1 parity bits. Next, the K+M-1 bits after adding the parity bits are sent to the CRC encoder for CRC encoding. The encoded code block is then sent to the polar encoder, and the final output codeword is c1. N = (c1, c2, ..., c N ).
[0067] Index set Pid = {p1, p2, ..., p (M-1)} represents the positions of M-1 parity bits. The M-1 parity codes divide the information bits into M segments, with each of the first M segments containing only one parity bit. Each parity bit is only valid for the current information segment. For the first M segments, each segment checks only one parity bit. For a polar encoder, the input vector x contains N... k Unfrozen bits and NN k One frozen position.
[0068] Polar codes are linear block codes, therefore the encoding process can be represented as:
[0069]
[0070]
[0071] Among them, G N It is the generating matrix, B N This represents a bit-reversed permutation matrix. Represents the kernel matrix, N=2 n . It is x A and A mixed vector. It is the final output codeword of the polar coordinate encoder.
[0072] Decoding construction based on parity check bits:
[0073] Building upon CRC-based SCL decoding, the receiving device employs segmented SCL decoding: Given a list size L, the number of currently surviving decoding paths is LL. If the extended LL is less than or equal to L, all extended paths are retained; otherwise, the metrics of the LL paths are sorted, and the L paths with the largest metrics are selected. Then, the current number of paths is updated, setting LL = L. When decoding reaches the parity bit, the path that correctly passes the parity check is selected from the surviving paths.
[0074] As described in the background art, in related technologies, the positions where parity bits are placed may not contain erroneous encodings, making it impossible to quickly find errors in the polar code encoding sequence and reducing the verification efficiency of the polar code encoding sequence. Based on this, embodiments of this application provide a polar code encoding method, apparatus, electronic device, and storage medium. Since the reliability of the M bits meets a preset condition, it indicates that the reliability of the M bits is lower than that of their adjacent bits. In this case, the probability of errors occurring in the M bits is relatively high. Therefore, by adding parity bits at the positions of potentially erroneous bits, the electronic device can quickly detect errors in the first encoding sequence based on the position of the parity bits, improving the efficiency and accuracy of the encoding sequence verification.
[0075] The polar code encoding method, apparatus, electronic device, and storage medium provided in this application are applied in a polar code encoding scenario. After obtaining a first sequence to be encoded, the electronic device can determine M bits from the first sequence to be encoded, and then add M parity check bits to the first sequence to be encoded based on the positions of the M bits in the first sequence to be encoded to obtain a second sequence to be encoded; and then perform polar code encoding on the second sequence to be encoded to obtain a first encoded sequence.
[0076] like Figure 1 As shown, the polar code encoding method provided in this application embodiment may include S101-S103.
[0077] S101. The electronic device determines M bits from the first sequence to be encoded.
[0078] The reliability of the M bits meets a preset condition. The first sequence to be encoded includes L bits, where M and L are integers greater than or equal to 1. <L。
[0079] In this embodiment of the application, the first sequence to be encoded is a polar code encoding sequence. The electronic device can obtain the first sequence to be encoded and then determine M bits whose reliability meets preset conditions from the L bits included in the first sequence to be encoded.
[0080] It should be understood that if the reliability of a bit meets the preset conditions, it means that the reliability of that bit is lower than that of its adjacent bits. In this case, the bit may be an incorrect bit.
[0081] Optionally, the first sequence to be encoded can be a coding block (CB).
[0082] S102. The electronic device adds M parity bits to the first sequence to be encoded based on the positions of the M bits in the first sequence to be encoded, to obtain the second sequence to be encoded.
[0083] It should be understood that this parity bit is used to verify a coded sequence.
[0084] Understandably, a parity bit is 1 bit long.
[0085] In this embodiment of the application, the M parity check bits can divide the first sequence to be encoded into M+1 segments, and each segment contains only one parity check bit. Each parity check bit is only valid for the current encoding segment, and when performing parity check, each encoding segment checks only one parity check bit.
[0086] In one alternative implementation, the electronic device may record the position of each parity bit as a parity position sequence.
[0087] For example, the parity check position sequence P = {p1, p2, ..., p...} M} represents the positions of the M parity bits.
[0088] In one alternative implementation, the electronic device may insert a parity bit after each of the M bits, so that the electronic device performs parity checking on the first sequence to be encoded based on the positions of the M parity bits.
[0089] For example, such as Figure 2 As shown, assuming the length of the first sequence to be encoded is 16384 bits and M is 4, and the positions of the M bits are 1024, 2048, 4096, and 8192 respectively, the electronic device can insert a parity bit after the 1024, 2048, 4096, and 8192 bits respectively to obtain the second sequence to be encoded, the length of which is 16388 bits.
[0090] It should be noted that the first sequence to be encoded includes frozen bits and unfrozen bits. The unfrozen bits can also be understood as information bits. In this embodiment, the M bits are the information bits included in the first sequence to be encoded.
[0091] In an alternative implementation, the electronic device may also insert a CRC check bit at the end of the first sequence to be encoded, so that the electronic device performs CRC verification on the first sequence to be encoded.
[0092] For example, in combination Figure 2 ,like Figure 3 As shown, the length of the CRC check bit is 10 bits. After inserting the parity check bit into the first encoding sequence, the electronic device can insert the CRC check bit at the end of the first encoding sequence to obtain the second encoding sequence with a length of 16398.
[0093] S103. The electronic device performs polar code encoding on the second sequence to be encoded to obtain the first encoded sequence.
[0094] Specifically, the electronic device can perform polar code encoding based on the AWGN channel.
[0095] In one alternative implementation, after obtaining the first encoded sequence, the electronic device can verify the first encoded sequence based on the parity check bits included in the first encoded sequence.
[0096] In another alternative implementation, the electronic device may send the first encoded sequence to other receiving devices so that the receiving devices can verify the first encoded sequence based on the M parity bits.
[0097] Specifically, the electronic device or other receiving device can divide the first coding sequence into M+1 coding segments based on the M parity check bits, and then perform parity check on each coding segment based on the position of each parity check bit.
[0098] Optionally, if the first encoded sequence includes a CRC check bit, the electronic device or the other receiving device may also perform CRC check on the first encoded sequence.
[0099] In one alternative implementation, the electronic device may further decode the first encoded sequence to obtain the bit error rate of the first encoded sequence, and transmit the first encoded sequence to the other receiving device if the bit error rate of the first encoded sequence is less than or equal to the bit error rate threshold.
[0100] It should be understood that if the bit error rate of the first encoded sequence is less than or equal to the bit error rate threshold, it indicates that the first encoded sequence is relatively accurate. In this case, the electronic device can send the relatively accurate first encoded sequence to the receiving device.
[0101] Optionally, the bit error rate threshold can be 10⁻², 10⁻³, 10⁻⁴, etc.
[0102] The technical solution provided by the above embodiments can bring at least the following beneficial effects: As shown in S101-S103, the electronic device can determine M bits from the first sequence to be encoded, and based on the position of the M bits in the first sequence to be encoded, add M parity check bits to the first sequence to be encoded to obtain a second sequence to be encoded. Then, polar code encoding is performed on the second sequence to be encoded to obtain a first encoded sequence. In this embodiment, since the reliability of the M bits meets the preset condition, it indicates that the reliability of the M bits is lower than that of their adjacent bits. At this time, the possibility of errors occurring in the M bits is relatively high. In this case, the electronic device adds parity check bits at the positions of bits that may be sent incorrectly, which can quickly check the errors that occur in the first encoded sequence based on the position of the parity check bits, thereby improving the efficiency and accuracy of the encoded sequence verification.
[0103] Combination Figure 1 ,like Figure 4 As shown, the above-mentioned electronic device determines M bits whose polarization weight meets the preset conditions from the first sequence to be encoded, which can be specifically implemented through S1011.
[0104] S1011. If the first reliability is lower than the second reliability and the first reliability is lower than the third reliability, the electronic device determines that the first reliability meets the preset conditions and determines the first bit as one of the M bits.
[0105] Wherein, the first reliability is the reliability of the first bit, the second reliability is the reliability of the second bit, the third reliability is the reliability of the third bit, the first bit is the bit in the first sequence to be encoded excluding the first bit, and the second bit and the third bit are adjacent bits of the first bit in the first sequence to be encoded.
[0106] It is understandable that if the first reliability is lower than the second reliability and the first reliability is lower than the third reliability, it means that the first reliability is lower than the second reliability and the third reliability. The reliability of the coding segment (first bit, second bit and third bit) fluctuates more. The first bit may be at a critical point of fluctuation. The electronic device can determine that the first reliability meets the preset conditions and determine the first bit as one of the M bits.
[0107] In one alternative implementation, the electronic device can determine the reliability of each of the L bits in the first sequence to be encoded, and then determine the relative reliability of each bit compared to the reliability of its neighboring bits.
[0108] In an optional implementation, the electronic device may determine a reliability ranking among the L bits, and then determine the reliability level between each bit and its adjacent bits based on the arrangement order of the L bits.
[0109] Combined with the description of the foregoing embodiments, it should be understood that the M bits are information bits. In the embodiments of the present application, starting from the second bit among the L bits and ending at the L-1-th bit, the electronic device may sequentially determine the magnitude relationship between the reliability of each information bit and the reliability of its adjacent information bits, and then determine the M information bits.
[0110] Optionally, the electronic device may traverse the L bits, and then add the information bits whose reliability meets a preset condition to a parity check position sequence to obtain the positions of the M information bits.
[0111] In an implementation manner of the embodiment of the present application, the electronic device may use Wi to represent the reliability of the i-th information bit, use Wi-1 and Wi+1 to represent the reliability of adjacent information bits of the i-th information bit, and then add the information bit i to the parity check position sequence when Wi<Wi-1 and Wi<Wi+1.
[0112] For example, assuming that the first sequence to be encoded is (information bit 1, information bit 2, information bit 3, information bit 4), the reliability of information bit 1 is W1, the reliability of information bit 2 is W2, the reliability of information bit 3 is W3, and the reliability of information bit 4 is W4. The reliability of the first encoded sequence sorted in descending order is (W1, W3, W4, W2), then the electronic device can determine that W2<W1 and W2<W3, W2 meets the preset condition, and then add information bit 2 to the parity check position sequence; and the electronic device can determine that W3>W2 and W3>W4, so W3 does not meet the preset condition.
[0113] In an implementation manner of the embodiment of the present application, the number of bits whose reliability meets the preset condition in the first sequence to be encoded is N, combined with Figure 4 , such as Figure 5 shown, the polar code encoding method further includes S104.
[0114] S104. When M is less than N, the electronic device determines M bits from the N bits in ascending order of reliability.
[0115] It should be understood that N is the number of bits included in the parity check position sequence obtained after the electronic device traverses the reliability of each bit in the first sequence to be encoded.
[0116] It can be understood that M is a preset value, and the size of N may be different from that of M. When M<N, it indicates that there are a relatively large number of bits whose reliability meets the preset condition in the first sequence to be encoded. In this case, the electronic device may select M bits from the N bits.
[0117] Specifically, the electronic device may select bits with lower reliability, that is, after sorting the N bits in ascending order of reliability, select the first M bits.
[0118] In an alternative implementation, the electronic device may also re-determine bits whose reliability meets the preset condition from the bits included in the parity check position sequence based on the method of the foregoing S1011, until the number of bits whose reliability meets the preset condition is M.
[0119] Optionally, when the number of bits included in the parity check position sequence obtained in a certain time is less than M, M bits with lower reliability are determined from the bits included in the parity check position sequence obtained in the previous time.
[0120] In an alternative implementation, when M is greater than N, the electronic device may re-determine a value smaller than M (for example, Y), and then determine Y bits whose reliability meets the preset condition based on the foregoing method.
[0121] Optionally, in a case where parity check bits and CRC check bits are inserted into the first sequence to be encoded, the sum of the number of the parity check bits and the number of the CRC check bits may be a fixed value. When the electronic device re-determines a value smaller than M, the electronic device needs to re-determine the number of the CRC check bits.
[0122] With reference to Figure 4 , for example, Figure 6 as shown in the figure, the polar code encoding method may further include S105-S107.
[0123] S105: An electronic device determines a polarization weight of each bit included in a first sequence to be encoded.
[0124] It should be understood that the polarization weight of a bit is used to characterize the reliability of the bit. A larger polarization weight indicates a higher reliability of the bit, and a smaller polarization weight indicates a lower reliability of the bit.
[0125] Optionally, the electronic device determines that the polarization weight of the i-th bit in the first sequence to be encoded satisfies the following formula:
[0126]
[0127] Where represents the polarization weight of the i-th bit, n = log2L, and L is the number of bits in the first sequence to be encoded.
[0128] S106. The electronic device sorts the L bits in descending order of polarization weight to obtain the first index sequence.
[0129] It should be understood that this first index sequence is used to characterize the ordering among the polarization weights of the L bits.
[0130] Optionally, the first index sequence is an index sequence of length L and code rate K / L, where K is the number of 1s included in the first series to be encoded.
[0131] S107. The electronic device determines the reliability level between two bits based on the position of each bit in the first index sequence.
[0132] It should be understood that since the polarization weight of a bit is used to characterize the reliability of that bit, the earlier a bit is in the first index sequence, the higher its reliability.
[0133] It is understandable that when the reliability of a certain bit (e.g., the first bit) is higher than the reliability of another bit (e.g., the second bit), it means that the reliability of the first bit is higher than the reliability of the second bit. When the reliability of the first bit is lower than the reliability of the second bit, it means that the reliability of the first bit is lower than the reliability of the second bit.
[0134] Combination Figure 6 ,like Figure 7 As shown, in one implementation of this application embodiment, the polar code encoding method further includes S108-S111.
[0135] S108. If the bit error rate of the first encoded sequence is greater than or equal to the bit error rate threshold, the electronic device generates a second index sequence based on the improved Gaussian approximation algorithm and the first sequence to be encoded.
[0136] It is understandable that if the bit error rate of the first encoded sequence is greater than or equal to the bit error rate threshold, it indicates that the first encoded sequence may not be accurate enough. It is possible that the electronic device's method of determining the reliability of the L bits based on the polarization weight of each bit is not accurate enough. In this case, the electronic device can obtain the reliability of the L bits based on the IGA algorithm.
[0137] It should be understood that the second index sequence is used to characterize the reliability order of each bit in the L bits.
[0138] It should be noted that the Gaussian approximation scheme is a low-complexity, high-precision algorithm that obtains a highly reliable encoding structure by performing piecewise polynomial fitting on the maximum likelihood ratio of the Gaussian function.
[0139] S109. The electronic device determines X bits from the first index sequence in ascending order of polarization weight.
[0140] Alternatively, the electronic device may also determine the last X bits of the sorted sequence based on the sorting of each bit in the first index sequence.
[0141] S110. The electronic device replaces the sorting of X bits in the first index sequence based on the sorting of X bits in the second index sequence to obtain the third index sequence.
[0142] Alternatively, since the polarization weight of the frozen bit is low and its reliability is also low, the electronic device can also directly determine X frozen bits from L bits and then replace the X frozen bits with the sorting of the X frozen bits in the second index sequence.
[0143] For example, X can be 20.
[0144] S111. The electronic device determines the reliability level between two bits based on the position of each bit in the third index sequence.
[0145] Specifically, when the reliability of a certain bit (e.g., the first bit) is higher than the reliability of another bit (e.g., the second bit), it means that the reliability of the first bit is higher than the reliability of the second bit. When the reliability of the first bit is lower than the reliability of the second bit, it means that the reliability of the first bit is lower than the reliability of the second bit.
[0146] In this embodiment of the application, the electronic device can re-sort the reliability based on the third index sequence, determine M bits and add M parity bits, and then generate the first encoding sequence until the bit error rate of the first encoding sequence is less than or equal to the bit error rate threshold.
[0147] In this embodiment of the application, since the code generated by the improved Gaussian approximation algorithm has high reliability, the electronic device determines the reliability of each bit based on the third index sequence, and the position of the parity check bit determined based on the reliability is more accurate, which can improve the bit error rate of the first coding sequence.
[0148] This application embodiment can divide electronic devices and the like into functional modules according to the above method examples. For example, each function can be divided into its own functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. It should be noted that the module division in this application embodiment is illustrative and only represents one logical functional division; other division methods may be used in actual implementation.
[0149] When dividing each function into modules according to its corresponding function. Figure 8 A possible structural schematic diagram of the polar code encoding device involved in the above embodiments is shown, such as... Figure 8 As shown, the polar code encoding device 10 includes a determination module 101 and a processing module 102.
[0150] Determining module 101 is used to determine M bits from a first sequence to be encoded, wherein the reliability of the M bits meets a preset condition. The first sequence to be encoded includes L bits, where M and L are integers greater than or equal to 1. <L。
[0151] The processing module 102 is used to add M parity bits to the first sequence to be encoded based on the positions of the M bits in the first sequence to be encoded, so as to obtain the second sequence to be encoded.
[0152] The processing module 102 is also used to perform polar code encoding on the second sequence to be encoded to obtain the first encoded sequence.
[0153] Optionally, the determining module 101 is specifically configured to determine that the first reliability satisfies a preset condition when the first reliability is lower than the second reliability and the first reliability is lower than the third reliability, and to determine the first bit as one of the M bits, wherein the first reliability is the reliability of the first bit, the second reliability is the reliability of the second bit, the third reliability is the reliability of the third bit, the first bit is the bit included in the first sequence to be encoded except for the first bit, and the second bit and the third bit are adjacent bits of the first bit in the first sequence to be encoded.
[0154] Optionally, the number of bits in the first encoded sequence that meet the preset reliability conditions is N.
[0155] The determining module 101 is also used to determine M bits from the N bits in ascending order of reliability when M is less than N, where N is an integer greater than or equal to 1.
[0156] Optionally, the determining module 101 is also configured to determine the polarization weight of each bit included in the first sequence to be encoded.
[0157] The processing module 102 is also used to sort the L bits in descending order of polarization weight to obtain the first index sequence.
[0158] The determining module 101 is also used to determine the reliability level between two bits based on the position of each bit in the first index sequence.
[0159] Optionally, the processing module 102 is further configured to generate a second index sequence based on the improved Gaussian approximation algorithm and the first sequence to be encoded, if the bit error rate of the first encoded sequence is greater than or equal to the bit error rate threshold.
[0160] The determining module 101 is further configured to determine, based on the position of each bit in the first index sequence, X bits that can be determined from the first index sequence in ascending order of polarization weight, where X is an integer greater than or equal to 1.
[0161] The processing module 102 is further configured to replace the sorting of the X bits in the second index sequence with the sorting of the X bits in the first index sequence to obtain the third index sequence.
[0162] The determining module 101 is further configured to determine the reliability level between two bits based on the position of each bit in the first index sequence and based on the position of each bit in the third index sequence.
[0163] When using integrated units, Figure 9 A possible structural schematic diagram of the polar code encoding device involved in the above embodiments is shown. For example... Figure 9 As shown, the polar code encoding device 20 may include a processing module 201 and a communication module 202. The processing module 201 can be used to control and manage the operation of the polar code encoding device 20. The communication module 202 can be used to support communication between the polar code encoding device 20 and other entities. Optionally, as... Figure 9 As shown, the polar code encoding device 20 may further include a storage module 203 for storing the program code and data of the polar code encoding device 20.
[0164] The processing module 201 can be a processor or a controller. The communication module 202 can be a transceiver, transceiver circuit, or communication interface, etc. The storage module 203 can be a memory.
[0165] In this configuration, when the processing module 201 is a processor, the communication module 202 is a transceiver, and the storage module 203 is a memory, the processor, transceiver, and memory can be connected via a bus. The bus can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be categorized into address bus, data bus, control bus, etc.
[0166] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.
[0167] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0168] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.
[0169] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0170] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented using software programs, implementation can be, in whole or in part, in the form of a computer program product. This computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device containing one or more servers, data centers, etc., that can be integrated with the medium. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state drives (SSDs)).
[0171] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A polar code encoding method, characterized in that, include: M bits are determined from a first sequence to be encoded, wherein the reliability of the M bits meets a preset condition. The first sequence to be encoded includes L bits, where M and L are integers greater than or equal to 1. <L; The step of determining M bits whose polarization weight satisfies preset conditions from the first sequence to be encoded includes: Determine the polarization weight of each bit included in the first sequence to be encoded; The L bits are sorted in descending order of polarization weight to obtain the first index sequence; Based on the position of each bit in the first index sequence, the reliability level between two bits is determined. If the first reliability is lower than the second reliability and the first reliability is lower than the third reliability, it is determined that the first reliability meets the preset condition, and the first bit is determined to be one of the M bits. The first reliability is the reliability of the first bit, the second reliability is the reliability of the second bit, the third reliability is the reliability of the third bit, the first bit is the bit in the first sequence to be encoded except for the first and last bits, and the second bit and the third bit are adjacent bits of the first bit in the first sequence to be encoded. Based on the positions of the M bits in the first sequence to be encoded, M parity bits are added after each of the M bits in the first sequence to be encoded to obtain the second sequence to be encoded. The second sequence to be encoded is polarized to obtain the first encoded sequence.
2. The polar code encoding method according to claim 1, characterized in that, The number of bits in the first sequence to be encoded that meet the preset reliability condition is N, and the method further includes: When M is less than N, M bits are determined from the N bits in ascending order of reliability, where N is an integer greater than or equal to 1.
3. The polar code encoding method according to claim 1, characterized in that, The method further includes: If the bit error rate of the first encoded sequence is greater than or equal to the bit error rate threshold, a second index sequence is generated based on the improved Gaussian approximation algorithm and the first sequence to be encoded. X bits are determined from the first index sequence in ascending order of polarization weight, where X is an integer greater than or equal to 1; The sorting of the X bits in the second index sequence is used to replace the sorting of the X bits in the first index sequence to obtain the third index sequence; The reliability level between two bits is determined based on the position of each bit in the third index sequence.
4. A polar code encoding device, characterized in that, include: Determine the module and the processing module; The determining module is used to determine M bits from a first sequence to be encoded, wherein the reliability of the M bits meets a preset condition, and the first sequence to be encoded includes L bits, where M and L are integers greater than or equal to 1. <L; The determining module is further configured to determine the polarization weight of each bit included in the first sequence to be encoded; The processing module is further configured to sort the L bits in descending order of polarization weight to obtain a first index sequence; The determining module is also used to determine the reliability level between two bits based on the position of each bit in the first index sequence; The determining module is specifically used to determine that the first reliability satisfies a preset condition when the first reliability is lower than the second reliability and the first reliability is lower than the third reliability, and to determine the first bit as one of the M bits, wherein the first reliability is the reliability of the first bit, the second reliability is the reliability of the second bit, the third reliability is the reliability of the third bit, the first bit is the bit in the first sequence to be encoded except for the first and last bits, and the second bit and the third bit are adjacent bits of the first bit in the first sequence to be encoded; The processing module is used to add M parity bits after each of the M bits in the first sequence to be encoded, based on the position of the M bits in the first sequence to be encoded, to obtain a second sequence to be encoded. The processing module is further configured to perform polar code encoding on the second sequence to be encoded to obtain a first encoded sequence.
5. The polar code encoding device according to claim 4, characterized in that, The number of bits in the first sequence to be encoded that meet the preset reliability condition is N. The determining module is further configured to determine M bits from the N bits in ascending order of reliability when M is less than N, where N is an integer greater than or equal to 1.
6. The polar code encoding device according to claim 4, characterized in that, The processing module is further configured to generate a second index sequence based on an improved Gaussian approximation algorithm and the first sequence to be encoded, when the bit error rate of the first encoded sequence is greater than or equal to the bit error rate threshold. The processing module is further configured to determine X bits from the first index sequence in ascending order of polarization weight, where X is an integer greater than or equal to 1; The processing module is further configured to replace the sorting of the X bits in the first index sequence with the sorting of the X bits in the second index sequence to obtain a third index sequence; The determining module is also used to determine the reliability level between two bits based on the position of each bit in the third index sequence.
7. An electronic device, characterized in that, The electronic device includes: processor; A memory configured to store processor-executable instructions; The processor is configured to execute the instructions to implement the polar code encoding method as described in any one of claims 1-3.
8. A computer-readable storage medium storing instructions thereon, characterized in that, When the instructions in the computer-readable storage medium are executed by an electronic device, the electronic device is able to perform the polar code encoding method as described in any one of claims 1-3.
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