A power-on timing verification circuit and verification method for multiple power supply components

Abstract

This invention provides a power-on timing verification circuit and method for multi-power supply components. The method includes individually debugging and / or laboratory verifying the power-on timing of the component to be verified; a first programmable logic circuit outputs a preset first power-on timing control logic signal to individually debug the power-on timing of the component to be verified; a second programmable logic circuit outputs a second power-on timing control logic signal to laboratory verify the power-on timing of the component to be verified. The verification circuit includes a verification card UVC, a verification card VCM, and a switch switching circuit. The component to be verified is connected to the verification card UVC via a power supply circuit. The verification card UVC is equipped with the first programmable logic circuit and the power supply circuit, and the verification card VCM is equipped with the second programmable logic circuit. The above verification circuit and method can realize the switching of power-on timing verification modes, overcoming the limitations of traditional methods that require continuous modification of power-on timing logic and repeated programming to achieve power-on timing verification.

Description

Technical Field

[0001] This invention belongs to the field of processor verification design technology, and relates to a power-on timing verification circuit and method for multiple power supply components. Background Technology

[0002] With the rapid development of high-speed digital signals, there are increasing demands for power-on timing control modes of multi-power processors with integrated multi-core and high-speed interfaces. Currently, the power-on timing of multi-power processors is verified using programmable logic circuits. This verification method involves continuously modifying the power-on timing logic in the programmable logic circuits and repeatedly programming to achieve power-on timing verification. However, this verification method has limitations such as complex verification process, low efficiency, and low versatility.

[0003] Therefore, a more flexible power-on timing control switching and verification circuit design scheme is needed. Summary of the Invention

[0004] To address the limitations of existing technologies that use programmable logic circuits to verify the power-on timing of multi-power-supply components, such as complex verification processes, low efficiency, and low versatility, this invention discloses a power-on timing verification circuit and method for multi-power-supply components.

[0005] The technical solution to achieve the purpose of the invention is as follows:

[0006] One embodiment of the present invention provides a method for verifying the power-on timing of multiple power supply components, including individually debugging and / or laboratory verifying the power-on timing of the components to be verified;

[0007] The power-on timing of the device under test is individually debugged, including: controlling the first programmable logic circuit to output a preset first power-on timing control logic signal to the power supply circuit, and using the power supply circuit to debug the power-on timing of the device under test;

[0008] Laboratory verification of the power-on timing of the device under test includes: controlling a second programmable logic circuit to output a second power-on timing control logic signal to the power supply circuit, and using the power supply circuit to perform laboratory verification of the power-on timing of the device under test.

[0009] Furthermore, the individual debugging mode and the laboratory verification mode are switched using discrete signals of the working state.

[0010] Furthermore, the laboratory verification includes verification testing or verification experiment, and the second power-on timing control logic signal includes a preset second power-on timing control logic signal and a real-time edited second power-on timing control logic signal;

[0011] Verification testing of the power-on timing of the device under test includes: controlling the second programmable logic circuit to output the preset second power-on timing control logic signal to the power supply circuit, and using the power supply circuit to verify the power-on timing of the device under test;

[0012] The power-on timing verification test of the device under test includes: controlling the second programmable logic circuit to output the real-time edited second power-on timing control logic signal to the power supply circuit, and using the power supply circuit to perform the power-on timing verification test of the device under test.

[0013] Furthermore, the second power-on timing control logic signal of the edit is generated by the test equipment and output by the DSP main control circuit.

[0014] Furthermore, the verification test mode and the verification experiment mode are switched using discrete laboratory state signals.

[0015] Another embodiment of the present invention provides a power-on timing verification circuit for multiple power supply components, including a verification card UVC and a verification card VCM. The verification card UVC is provided with a switch switching circuit, the verification card UVC is provided with a first programmable logic circuit, and the verification card VCM is provided with a second programmable logic circuit. Both the first programmable logic circuit and the second programmable logic circuit are connected to the switch switching circuit.

[0016] The verification card UVC is equipped with a power supply circuit. The input terminal of the power supply circuit is connected to the switching circuit, and the output terminal is detachably connected to the device to be verified.

[0017] The output terminal of the power supply circuit is also connected to the first programmable logic circuit and the second programmable logic circuit. The power supply circuit is switched to power the first programmable logic circuit or the second programmable logic circuit via a discrete working state signal.

[0018] Furthermore, the verification card VCM is also equipped with a DSP main control circuit, which is bidirectionally connected to the second programmable logic circuit and the test equipment. The second programmable logic circuit selects to output a preset second power-on timing control logic signal or a real-time edited second power-on timing control logic signal to the power supply circuit via a discrete working state signal. The preset second power-on timing control logic signal is a preset logic within the second programmable logic circuit, and the real-time edited second power-on timing control logic signal is generated by the test equipment and output by the DSP main control circuit.

[0019] Furthermore, the device to be verified is detachably connected to the output terminal of the power supply circuit via an interface.

[0020] Compared with the prior art, the beneficial effects that at least one technical solution adopted in the embodiments of this specification can achieve include at least:

[0021] 1. The power-on timing verification method for multi-power supply components of the present invention integrates the discrete signal EXIST of the working state and the discrete signal GSE of the laboratory state, and verifies the working state of the UVC card through logic determination. This enables the hardware system to flexibly switch power-on timing control through multiple modes, overcoming the limitation of traditional verification methods that require continuous modification of the power-on timing logic in the programmable logic device and repeated programming to achieve power-on timing verification.

[0022] 2. The power-on timing verification circuit for multiple power supply components of the present invention can not only verify the power-on timing of multiple power supply components, but also enable the verification card UVC to operate independently without the control of the verification card VCM, and can also be combined with the verification card VCM to increase the application scenarios of the verification card UVC.

[0023] 3. The verification circuit of this invention has a simple design, can verify any combination of power-on timings, and can switch between debugging mode, verification test mode and verification experiment mode, so that the verification results are more complete, and has strong versatility and portability.

[0024] 4. The verification circuit and verification method of the present invention, by introducing the DSP main control circuit 6 and the test equipment 7 to control and realize the real-time setting of the power-on timing, can realize the real-time setting of arbitrary power-on timing logic, and overcome the limitations of constantly modifying the power-on timing logic in the programmable logic device and repeated programming. Attached Figure Description

[0025] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 This is a block diagram of the power-on timing verification circuit for multiple power supply components of the present invention.

[0027] The components include: 1. Switching circuit; 2. First programmable logic circuit; 3. Second programmable logic circuit; 4. Power supply circuit; 5. Device to be verified; 6. DSP main control circuit; and 7. Test equipment. Detailed Implementation

[0028] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0029] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. This application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, in the absence of conflict, the following embodiments and features of the embodiments can be combined with each other. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0030] One embodiment of the present invention provides a method for verifying the power-on timing of multiple power supply components, including individually debugging and / or laboratory verifying the power-on timing of the components to be verified;

[0031] The power-on timing of the device under test is individually debugged, including: controlling the first programmable logic circuit to output a preset first power-on timing control logic signal to the power supply circuit, and using the power supply circuit to debug the power-on timing of the device under test;

[0032] Laboratory verification of the power-on timing of the device under test includes: controlling a second programmable logic circuit to output a second power-on timing control logic signal to the power supply circuit, and using the power supply circuit to perform laboratory verification of the power-on timing of the device under test.

[0033] Furthermore, the individual debugging mode and the laboratory verification mode are switched using discrete signals of the working state.

[0034] Furthermore, the laboratory verification includes verification testing or verification experiment, and the second power-on timing control logic signal includes a preset second power-on timing control logic signal and a real-time edited second power-on timing control logic signal;

[0035] Verification testing of the power-on timing of the device under test includes: controlling the second programmable logic circuit to output the preset second power-on timing control logic signal to the power supply circuit, and using the power supply circuit to verify the power-on timing of the device under test;

[0036] The power-on timing verification test of the device under test includes: controlling the second programmable logic circuit to output the real-time edited second power-on timing control logic signal to the power supply circuit, and using the power supply circuit to perform the power-on timing verification test of the device under test.

[0037] Furthermore, the second power-on timing control logic signal of the edit is generated by the test equipment and output by the DSP main control circuit.

[0038] Furthermore, the verification test mode and the verification experiment mode are switched using discrete laboratory state signals.

[0039] Another embodiment of the present invention provides a power-on timing verification circuit for multiple power supply components. By designing a power-on timing verification circuit for multiple power supply components, the power-on timing of a multi-power supply processor, i.e., a device to be verified, can be verified using the method described in the above embodiment.

[0040] See Figure 1 As shown, the power-on timing verification circuit for multiple power supply components includes a verification card UVC (UnderValidationCard) and a verification card VCM (Validation Control Module). The verification card UVC has a switch switching circuit 1; however, it should be noted that the switch switching circuit 1 can also be located on the verification card VCM. The verification card UVC has a first programmable logic circuit 2, and the verification card VCM has a second programmable logic circuit 3. Both the first programmable logic circuit 2 and the second programmable logic circuit 3 are connected to the switch switching circuit 1. The verification card UVC has a power supply circuit 4. The input terminal of the power supply circuit 4 is connected to the switch switching circuit 1, and the output terminal is detachably connected to the device to be verified 5. Preferably, the device to be verified 5 is detachably connected to the output terminal of the power supply circuit 4 via an interface.

[0041] In embodiments of the present invention, the switching circuit 1 is used to control whether the power supply circuit is connected to the first programmable logic circuit 2 or the second programmable logic circuit 3. The output terminal of the power supply circuit 4 is also connected to both the first programmable logic circuit 2 and the second programmable logic circuit 3. The power supply circuit 4 is switched to be powered by either the first programmable logic circuit 2 or the second programmable logic circuit 3 via a discrete working state signal.

[0042] Specifically, see Figure 1 As shown, the individual debugging mode or laboratory verification mode of the power-on timing of the device under test 5 is switched by adjusting the level of the discrete signal EXIST. For example, when the verification card is inserted into the verification card VCM and the two are connected, the switch switching circuit 1 receives the discrete signal EXIST as a low level "0", enters the laboratory verification mode, and the second programmable logic circuit 3 on the verification card VCM outputs the RUN2 signal to the switch switching circuit 1, controlling the switch switching circuit 1 to output the signal (RUN) to the power supply circuit 4.

[0043] In standalone debugging mode, the first programmable logic circuit 2 is connected to the switch circuit 1. The power-on timing control logic signal RUN1 (i.e., the first power-on timing control logic signal) generated by the first programmable logic circuit 2 serves as the output signal RUN of the switch circuit 1. In laboratory verification mode, the second programmable logic circuit 3 is connected to the switch circuit 1. The power-on timing control logic signal RUN2 (i.e., the second power-on timing control logic signal, including a preset second power-on timing control logic signal and a real-time edited second power-on timing control logic signal) of the second programmable logic circuit 3 serves as the output signal RUN of the switch circuit 1. The output signal RUN controls the power-on timing output of the power supply circuit 4, thereby achieving power-on timing control for multi-power processors.

[0044] Further, see Figure 1 As shown, the verification card VCM is also equipped with a DSP main control circuit 6, which is bidirectionally connected to the second programmable logic circuit 3 and the test equipment 7. The second programmable logic circuit 3 outputs a preset second power-on timing control logic signal or a real-time edited second power-on timing control logic signal to the power supply circuit 4 via a discrete working state signal. The preset second power-on timing control logic signal is a preset logic within the second programmable logic circuit 3, and the real-time edited second power-on timing control logic signal is generated by the DSP main control circuit 6.

[0045] Specifically, see Figure 1 As shown, the working state discrete signal GSE is controlled by its level. For example, when the working state discrete signal GSE is low ("0"), it indicates that the system is in a verification test state. In this case, the power-on timing logic of the second programmable logic circuit 3 needs to wait for the DSP main control circuit 6 and the test equipment 7 to set the power-on timing. When the working state discrete signal GSE is high ("1"), it indicates that the system is in a verification test state. In this case, the power-on timing logic of the second programmable logic circuit 3 uses the preset power-on timing logic and no longer waits for the DSP main control circuit 6 and the test equipment 7 to set the timing. By controlling the switching of the power-on timing logic in the second programmable logic circuit 3, the system switches between the verification test mode and the verification test mode under the control of the verification card VCM for multiple power-supply processors. The system outputs the preset second power-on timing control logic signal RUN2 or the real-time edited second power-on timing control logic signal RUN2 to the switch switching circuit 1 as the output signal RUN of the switch switching circuit 1. The output signal RUN controls the output of the power-on timing of the power supply circuit 4, thereby achieving power-on timing control of the multiple power-supply processors.

[0046] The embodiments of the present invention achieve the following technical effects:

[0047] 1. The power-on timing verification method for multi-power supply components of the present invention integrates the discrete signals EXIST and GSE of the working state, and verifies the working state of the UVC card by logic determination. This enables the hardware system to flexibly switch power-on timing control through multiple modes, overcoming the limitation of traditional verification methods that require continuous modification of the power-on timing logic in the programmable logic device and repeated programming to achieve power-on timing verification.

[0048] 2. The power-on timing verification circuit for multiple power supply components of the present invention can not only verify the power-on timing of multiple power supply components, but also enable the verification card UVC to operate independently without the control of the verification card VCM, and can also be combined with the verification card VCM to increase the application scenarios of the verification card UVC.

[0049] 3. The verification circuit of this invention has a simple design, can verify any combination of power-on timings, and can switch between debugging mode, verification test mode and verification experiment mode, so that the verification results are more complete, and has strong versatility and portability.

[0050] 4. The verification circuit and verification method of the present invention, by introducing the DSP main control circuit 6 and the test equipment 7 to control and realize the real-time setting of the power-on timing, can realize the real-time setting of arbitrary power-on timing logic, and overcome the limitations of constantly modifying the power-on timing logic in the programmable logic device and repeated programming.

[0051] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, various modifications and variations can be made to the embodiments of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A power-on timing verification circuit for multiple power supply components, characterized in that, It includes a first verification card UVC and a second verification card VCM. The first verification card UVC is equipped with a switch switching circuit and a first programmable logic circuit. The second verification card VCM is equipped with a second programmable logic circuit and a DSP main control circuit. The first programmable logic circuit and the second programmable logic circuit are both connected to the switch switching circuit. The first verification card UVC is equipped with a power supply circuit. The input terminal of the power supply circuit is connected to the switching circuit, and the output terminal is detachably connected to the device to be verified. The output terminal of the power supply circuit is also connected to the first programmable logic circuit and the second programmable logic circuit. The power supply circuit is switched to power the first programmable logic circuit or the second programmable logic circuit via a discrete working state signal. The DSP main control circuit is bidirectionally connected to the second programmable logic circuit and the test equipment. The second programmable logic circuit selects to output a preset second power-on timing control logic signal or a real-time edited second power-on timing control logic signal to the power supply circuit via a discrete working state signal. The preset second power-on timing control logic signal is a preset logic within the second programmable logic circuit, and the real-time edited second power-on timing control logic signal is generated by the test equipment and output by the DSP main control circuit.

2. The power-on timing verification circuit for multiple power supply components according to claim 1, characterized in that, The device to be verified is detachably connected to the output terminal of the power supply circuit via an interface.

3. A method for verifying the power-on timing of multiple power supply components, characterized in that, The power-on timing verification circuit for multiple power supply components as described in claim 1 or 2 is used, including individual debugging and / or laboratory verification of the power-on timing of the device to be verified. The power-on timing of the device under test is individually debugged, including: controlling the first programmable logic circuit to output a preset first power-on timing control logic signal to the power supply circuit, and using the power supply circuit to debug the power-on timing of the device under test; Laboratory verification of the power-on timing of the device under test includes: controlling a second programmable logic circuit to output a second power-on timing control logic signal to the power supply circuit, and using the power supply circuit to perform laboratory verification of the power-on timing of the device under test.

4. The power-on timing verification method for multiple power supply components according to claim 3, characterized in that, The individual debugging mode and the laboratory verification mode are switched using discrete signals of the working state.

5. The power-on timing verification method for multiple power supply components according to claim 3, characterized in that, The laboratory verification includes verification testing or verification experiment, and the second power-on timing control logic signal includes a preset second power-on timing control logic signal and a real-time edited second power-on timing control logic signal; Verification testing of the power-on timing of the device under test includes: controlling the second programmable logic circuit to output the preset second power-on timing control logic signal to the power supply circuit, and using the power supply circuit to verify the power-on timing of the device under test; The power-on timing verification test of the device under test includes: controlling the second programmable logic circuit to output the real-time edited second power-on timing control logic signal to the power supply circuit, and using the power supply circuit to perform the power-on timing verification test of the device under test.

6. The power-on timing verification method for multiple power supply components according to claim 5, characterized in that, The second power-on timing control logic signal of the editor is generated by the test equipment and output by the DSP main control circuit.

7. The power-on timing verification method for multiple power supply components according to claim 5, characterized in that, The verification test mode and the verification experiment mode are switched using a discrete laboratory state signal.

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