Solid state disk-based slc cache allocation method and device and computer equipment
By pre-setting a user cache idle threshold in the solid-state drive (SSD), the usage status of the SLC user cache and SLC Wordline cache is dynamically adjusted, which solves the problem of SLC user data cache exhaustion and improves the read and write performance of the SSD.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SUZHOU UNIONMEMORY INFORMATION SYST LTD
- Filing Date
- 2023-08-29
- Publication Date
- 2026-07-31
AI Technical Summary
In traditional solutions, the SLC user data cache and SLC Wordline cache are used independently during QLC writes. This causes the SLC user data cache to run out and writes to stop, affecting the read and write performance of the solid-state drive.
By setting a preset user cache idle threshold, the usage status of SLC user cache and SLC Wordline cache is dynamically adjusted, and cache space is allocated reasonably, including cache write status, cache write critical status and direct write status, to ensure that SLC Wordline cache is reused for SLC user data cache and to increase the size of SLC user data cache.
It improves the read and write performance of the solid-state drive (SSD), increases the size of the SLC user data cache by reasonably allocating cache space, solves the problem of SLC user data cache exhaustion, and ensures the continuous write capability of the SSD.
Smart Images
Figure CN117251108B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of solid-state drive (SSD) technology, and in particular to an SLC cache allocation method, apparatus, computer device, and storage medium based on SSDs. Background Technology
[0002] Solid-state drives (SSDs) are widely used in various applications and have gradually replaced traditional HDDs (hard disk drives) in the PC market, providing users with a better experience in terms of reliability and performance. With the evolution of NAND technology, it has progressed from the early 1 bit / cell (SLC) to 2 bit / cell (MLC), 3 bit / cell (TLC), and 4 bit / cell (QLC), increasing the data storage capacity. However, the increased number of bits per cell leads to a more complex programming model. Typical NAND such as SLC / MLC / TLC only requires one programming to complete data storage, after which it can be read normally. QLC, due to its complex NAND cell voltage distribution, requires multiple programming steps to truly complete data storage for subsequent data retrieval. Furthermore, to eliminate the influence between adjacent wordlines, these multiple programming steps need to be interleaved among multiple wordlines, resulting in a larger number of wordlines in an unstable state. Since these wordlines cannot be read, their corresponding data needs to be cached in other, correctly readable locations. For consumer-grade SSDs with limited memory and power retention, SLC caching is generally used to cache this data, known as Wordline caching.
[0003] To improve read and write performance, a portion of the NAND flash memory is configured in SLC (Single Level Cell) mode for use as an SLC user data cache. In SLC mode, the NAND capacity is only one-quarter of that in QLC mode, but it offers significantly higher read and write performance. Specifically, SLC mode typically offers write performance more than 20 times that of QLC mode and read performance more than 3 times that of QLC mode.
[0004] In traditional solutions, the SLC Wordline cache used to temporarily store unstable data during QLC writes and the SLC user data cache used to accelerate user writes are two separate parts. Otherwise, when the SLC user data cache is exhausted, there will be no free SLC for the QLC write Wordline cache to temporarily store the data, causing the host to be unable to continue writing. Summary of the Invention
[0005] Therefore, it is necessary to provide a method, apparatus, computer device, and storage medium for SLC cache allocation based on solid-state drives to address the aforementioned technical problems.
[0006] A method for allocating SLC cache based on solid-state drives, the method comprising:
[0007] Preset user cache idle threshold;
[0008] When the host writes, it determines whether the free space of the SLC user cache is greater than the user cache free threshold.
[0009] If the free space of the SLC user cache is greater than the user cache free threshold, it enters the cache write state. When allocating write data space, the SLC Wordline cache area and the original SLC user cache area participate in the allocation together.
[0010] If the free space of the SLC user cache is greater than 0 and less than or equal to the user cache free threshold, then the cache write critical state is entered, and only the SLC user data cache area is allocated when allocating write data space.
[0011] In one embodiment, the method further includes:
[0012] If the free space of the SLC user cache is equal to 0, it enters the direct write state. When allocating the write data space, it allocates the QLC user area and writes the data to both the QLC user area and the SLC Wordline cache area at the same time.
[0013] In one embodiment, the method further includes:
[0014] If the cache is in a critical state, the Wordline cache content will be moved to the QLC area.
[0015] In one embodiment, the step of triggering the migration of Wordline cache content to the QLC area if the cache write threshold is reached further includes:
[0016] Traffic control is applied to host data writes to ensure that when the user data cache is exhausted, the Wordline cache has enough free blocks to cache unstable data during QLC writes.
[0017] A solid-state drive-based SLC cache allocation device, the device comprising:
[0018] The preset module is used to preset the user cache idle threshold.
[0019] The judgment module is used to determine whether the free space of the SLC user cache is greater than the user cache free threshold when the host writes;
[0020] The first state module is used to enter the cache write state if the free space of the SLC user cache is greater than the user cache free threshold. When allocating write data space, the SLC Wordline cache area and the original SLC user cache area participate in the allocation together.
[0021] The second state module is used to enter the cache write critical state if the free space of the SLC user cache is greater than 0 and less than or equal to the user cache free critical threshold, and to allocate only the SLC user data cache area when allocating write data space.
[0022] In one embodiment, the device further includes a third state module, the third state module being configured to:
[0023] If the free space of the SLC user cache is equal to 0, it enters the direct write state. When allocating the write data space, it allocates the QLC user area and writes the data to both the QLC user area and the SLC Wordline cache area at the same time.
[0024] In one embodiment, the second state module is further configured to:
[0025] If the cache is in a critical state, the Wordline cache content will be moved to the QLC area.
[0026] In one embodiment, the second state module is further configured to:
[0027] Traffic control is applied to host data writes to ensure that when the user data cache is exhausted, the Wordline cache has enough free blocks to cache unstable data during QLC writes.
[0028] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of any of the methods described above.
[0029] A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any of the above methods.
[0030] The aforementioned SLC cache allocation method, apparatus, computer device, and storage medium based on solid-state drives (SSDs) preset a user cache idle threshold. When the host writes data, it determines whether the free space of the SLC user cache is greater than the user cache idle threshold. If the free space of the SLC user cache is greater than the user cache idle threshold, it enters a cache write state, and the SLC Wordline cache area participates in the allocation along with the original SLC user cache area when allocating write data space. If the free space of the SLC user cache is greater than 0 and less than or equal to the user cache idle threshold, it enters a cache write critical state, and only the SLC user data cache area is allocated when allocating write data space. This invention can reuse the SLC Wordline cache for SLC user data cache use, increasing the size of the SLC user data cache and thus improving the read and write performance of the solid-state drive. Attached Figure Description
[0031] Figure 1 A schematic diagram of a traditional NAND allocation scheme for QLC NAND SSDs;
[0032] Figure 2 This is a flowchart illustrating an SLC cache allocation method based on a solid-state drive in one embodiment;
[0033] Figure 3 This is an inventive concept diagram of an SLC cache allocation method based on a solid-state drive in one embodiment;
[0034] Figure 4 This is a flowchart illustrating an SLC cache allocation method based on a solid-state drive in another embodiment;
[0035] Figure 5 This is a structural block diagram of an SLC cache allocation device based on a solid-state drive in one embodiment;
[0036] Figure 6 This is a structural block diagram of a solid-state drive-based SLC cache allocation device in another embodiment;
[0037] Figure 7 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation
[0038] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0039] like Figure 1The diagram illustrates a traditional NAND allocation scheme for an SSD using QLC NAND. Specifically, during host write operations, it checks if there is free space in the SLC user cache. If so, the SSD enters cache write mode, and host data is written to the SLC user data cache area. If there is no free space in the SLC user cache, the SSD enters direct write mode, and host data is written to both the QLC user area and the SLC Wordline cache area simultaneously. It is evident that in this traditional scheme, the SLC user data cache area and the SLC Wordline cache area are independent, used separately in cache write mode and direct write mode, respectively. The size of the high-performance read / write area depends on the size of the SLC user data cache area.
[0040] Based on this, the present invention proposes an SLC cache allocation method based on solid-state drives, which aims to increase the size of SLC user data cache and improve the read and write performance of solid-state drives.
[0041] In one embodiment, such as Figure 2 As shown, a method for allocating SLC cache based on solid-state drives is provided, the method including:
[0042] Step 202: Preset the user cache idle threshold;
[0043] Step 204: When the host writes, determine whether the free space of the SLC user cache is greater than the user cache free threshold.
[0044] Step 206: If the free space of the SLC user cache is greater than the user cache free threshold, then enter the cache write state. When allocating write data space, the SLC Wordline cache area and the original SLC user cache area participate in the allocation together.
[0045] Step 208: If the free space of the SLC user cache is greater than 0 and less than or equal to the user cache free threshold, then enter the cache write critical state, and only allocate the SLC user data cache area when allocating write data space.
[0046] This embodiment proposes an SLC cache allocation method based on solid-state drives. When a user performs a write operation, if the conditions for using the SLC user data cache are met, the method enters a cache write state. When allocating write data space, the SLC Wordline cache area participates in the allocation along with the existing SLC user cache area. If, during a user write operation, the threshold for disabling the SLC user data cache is approached, the method enters a cache write critical state, and when allocating write data space, only the SLC user data cache area is allocated.
[0047] Specifically, refer to Figure 3The diagram shows an invention concept of an SLC cache allocation method based on solid-state drives.
[0048] First, a preset user cache idle threshold is set. The value here can be customized, such as the size of one SLC data block.
[0049] Next, during host writing, the free space of the SLC user cache is checked. If it is greater than the user cache free threshold, the user cache is considered sufficient, and the cache writing state is entered. When allocating write data space, the SLC Wordline cache area and the original SLC user cache area participate in the allocation together.
[0050] When the host writes data, it checks the free space of the SLC user cache. If it is greater than 0 and less than or equal to the user cache free threshold, it is considered that the SLC user cache is close to being exhausted and enters the cache write critical state. When allocating write data space, only the SLC user data cache area is allocated.
[0051] In one embodiment, the method further includes: if the free space of the SLC user cache is equal to 0, then entering the direct write state, allocating the QLC user area when allocating write data space and writing the data to both the QLC user area and the SLCWordline cache area simultaneously.
[0052] Specifically, when the host writes, it checks the free space of the SLC user cache. If it is equal to 0, it is considered that the SLC user cache is exhausted and enters the direct write state. When allocating the write data space, it allocates the QLC user area and writes the data to both the QLC user area and the SLC Wordline cache area at the same time.
[0053] In the above embodiments, a preset user cache idle threshold is used. When the host writes, it is determined whether the free space of the SLC user cache is greater than the user cache idle threshold. If the free space of the SLC user cache is greater than the user cache idle threshold, the system enters the cache write state, and the SLC Wordline cache area participates in the allocation of write data space along with the original SLC user cache area. If the free space of the SLC user cache is greater than 0 and less than or equal to the user cache idle threshold, the system enters the cache write critical state, and only the SLC user data cache area is allocated when allocating write data space. This invention can reuse the SLC Wordline cache as an SLC user data cache, increasing the size of the SLC user data cache and thus improving the read and write performance of the solid-state drive.
[0054] In one embodiment, such as Figure 4 As shown, an SLC cache allocation method based on solid-state drives is provided, which further includes:
[0055] Step 402: If the cache write threshold is reached, the Wordline cache content is moved to the QLC area.
[0056] Step 404: Perform flow control on host data writing. The flow control is used to ensure that when the user data cache is exhausted, the Wordline cache has enough free blocks to cache unstable data during QLC writing.
[0057] In this embodiment, a solid-state drive-based SLC cache allocation method is proposed, the complete implementation steps of which include:
[0058] 4.1. Preset user cache idle threshold (the value can be customized, for example, the size of one SLC data block).
[0059] 4.2 When writing data to the host, the free space of the SLC user cache is checked. If it is greater than the user cache free threshold, the user cache is considered sufficient and the cache writing state is entered. When allocating the write data space, the SLC Wordline cache area and the original SLC user cache area are allocated together.
[0060] 4.3 When the host is writing, it checks the free space of the SLC user cache. If it is greater than 0 and less than or equal to the user cache free threshold, it is considered that the SLC user cache is close to being exhausted and enters the cache write critical state. When allocating write data space, only the SLC user data cache area is allocated.
[0061] 4.4 If the cache is in a critical write state, trigger the migration of Wordline cache content to the QLC area and implement flow control for host data writes. Flow control ensures that when the user data cache is exhausted, the Wordline cache has enough free blocks to cache unstable data during QLC writes.
[0062] 4.5 When the host is writing, it checks the free space of the SLC user cache. If it is equal to 0, it is considered that the SLC user cache is exhausted and enters the direct write state. When allocating the write data space, it allocates the QLC user area and writes the data to both the QLC user area and the SLC Wordline cache area at the same time.
[0063] In this embodiment, if the cache write is in a critical state, the Wordline cache content is moved to the QLC area, and flow control is performed on the host data write to ensure that when the user data cache is exhausted, the Wordline cache has enough free space to cache unstable data when the QLC write is performed.
[0064] It should be understood that, although Figures 1-4The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figures 1-4 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.
[0065] In one embodiment, such as Figure 5 As shown, a solid-state drive-based SLC cache allocation device 500 is provided, the device comprising:
[0066] Preset module 501, the preset module is used to preset the user cache idle threshold;
[0067] The judgment module 502 is used to determine whether the free space of the SLC user cache is greater than the user cache free threshold when the host writes;
[0068] First state module 503, the first state module is used to enter the cache write state if the free space of the SLC user cache is greater than the user cache free threshold. When allocating write data space, the SLC Wordline cache area and the original SLC user cache area participate in the allocation together.
[0069] The second state module 504 is used to enter the cache write critical state if the free space of the SLC user cache is greater than 0 and less than or equal to the user cache free critical threshold, and allocate only the SLC user data cache area when allocating write data space.
[0070] In one embodiment, such as Figure 6 As shown, a solid-state drive-based SLC cache allocation device 500 is provided. This device further includes a third state module 505, which is used for:
[0071] If the free space of the SLC user cache is equal to 0, it enters the direct write state. When allocating the write data space, it allocates the QLC user area and writes the data to both the QLC user area and the SLC Wordline cache area at the same time.
[0072] In one embodiment, the second state module 504 is further configured to:
[0073] If the cache is in a critical state, the Wordline cache content will be moved to the QLC area.
[0074] In one embodiment, the second state module 504 is further configured to:
[0075] Traffic control is applied to host data writes to ensure that when the user data cache is exhausted, the Wordline cache has enough free blocks to cache unstable data during QLC writes.
[0076] For specific limitations regarding SLC cache allocation devices based on solid-state drives, please refer to the limitations on SLC cache allocation methods based on solid-state drives mentioned above, which will not be repeated here.
[0077] In one embodiment, a computer device is provided, the internal structure of which can be shown as follows: Figure 7 As shown, the computer device includes a processor, memory, and a network interface connected via a device bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores operating devices, computer programs, and databases. The internal memory provides an environment for the operation of the operating devices and computer programs stored in the non-volatile storage media. The network interface is used for communication with external terminals via a network connection. When the computer program is executed by the processor, it implements a solid-state drive-based SLC cache allocation method.
[0078] Those skilled in the art will understand that Figure 7 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.
[0079] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps in the various method embodiments described above.
[0080] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the steps in the various method embodiments described above.
[0081] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM), etc.
[0082] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0083] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.
Claims
1. A method for allocating SLC cache based on a solid-state drive, the method comprising: Preset user cache idle threshold; When the host writes, it determines whether the free space of the SLC user cache is greater than the user cache free threshold. If the free space of the SLC user cache is greater than the user cache free threshold, it enters the cache write state. When allocating write data space, the SLC Wordline cache area and the original SLC user cache area participate in the allocation together. If the free space of the SLC user cache is greater than 0 and less than or equal to the user cache free threshold, then the cache write critical state is entered, and only the SLC user data cache area is allocated when allocating write data space. If the free space of the SLC user cache is equal to 0, it enters the direct write state. When allocating the write data space, it allocates the QLC user area and writes the data to both the QLC user area and the SLC Wordline cache area at the same time. If the cache is in a critical state, the Wordline cache content will be moved to the QLC user area.
2. The SLC cache allocation method based on solid-state drives according to claim 1, characterized in that, The step of triggering the migration of Wordline cache content to the QLC user area if the cache write threshold is reached also includes: Traffic control is applied to host data writes to ensure that when the user data cache is exhausted, the Wordline cache has enough free blocks to cache unstable data during QLC writes.
3. A solid-state drive-based SLC cache allocation device, characterized in that, The device includes: The preset module is used to preset the user cache idle threshold. The judgment module is used to determine whether the free space of the SLC user cache is greater than the user cache free threshold when the host writes; The first state module is used to enter the cache write state if the free space of the SLC user cache is greater than the user cache free threshold. When allocating write data space, the SLC Wordline cache area and the original SLC user cache area participate in the allocation together. The second state module is used to enter the cache write critical state if the free space of the SLC user cache is greater than 0 and less than or equal to the user cache free critical threshold, and only allocate the SLC user data cache area when allocating write data space. The third state module is used for: If the free space of the SLC user cache is equal to 0, it enters the direct write state. When allocating the write data space, it allocates the QLC user area and writes the data to both the QLC user area and the SLC Wordline cache area at the same time. The second state module is also used for: If the cache is in a critical state, the Wordline cache content will be moved to the QLC user area.
4. The SLC cache allocation device based on a solid-state drive according to claim 3, characterized in that, The second state module is also used for: Traffic control is applied to host data writes to ensure that when the user data cache is exhausted, the Wordline cache has enough free blocks to cache unstable data during QLC writes.
5. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 2.
6. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 2.