Crystalline silicon heterojunction bifacial solar cell with synergistic effect of chemical passivation and field effect passivation and preparation method thereof

Abstract

A kind of chemical passivation and field effect passivation synergistic effect's crystalline silicon heterojunction bifacial solar cell and preparation method thereof, n-type monocrystalline silicon or p-type monocrystalline silicon substrate, boron-doped hydrogenated nanosilicon film layer located on one side of substrate and as emitter layer or window layer, and by inside to outside sequentially arranged on substrate aluminum oxide thin layer, boron-doped hydrogenated nanosilicon film layer, transparent conductive layer and metal electrode, phosphorus-doped hydrogenated nanosilicon film layer located on the other side of substrate and as window layer or emitter layer, and by inside to outside sequentially arranged on substrate hydrogenated amorphous silicon oxynitride thin layer, phosphorus-doped hydrogenated nanosilicon film layer, transparent conductive layer and metal electrode.The present application plays the role of passivation layer and tunneling layer by adopting oxide thin layer with high fixed charge, from the field effect passivation of tunneling oxide layer, chemical passivation of tunneling oxide layer and nanosilicon film layer two dimensions, utilize composite passivation synergistic effect to enhance passivation effect while reducing the light absorption generated by passivation layer.

Description

Technical Field

[0001] This invention relates to a technology in the field of solar photovoltaic cells, specifically a crystalline silicon heterojunction bifacial solar cell with a synergistic effect of chemical passivation and field-effect passivation, and its preparation method. Background Technology

[0002] In existing crystalline silicon solar cells, passivation of the substrate surface generally employs two methods: chemical passivation, which reduces the surface state density through saturated interfacial dangling bonds, typically dominated by hydrogen and oxygen atoms; and field-effect passivation, which achieves passivation through fixed charges in the insulating layer or through its high charge concentration. Amorphous silicon / crystalline silicon heterojunction solar cells consist of intrinsic amorphous silicon thin films and doped amorphous silicon thin films deposited on both sides of the substrate. This structure combines the advantages of crystalline silicon cells and thin-film cells, possessing advantages such as simple structure, fewer processing steps, low processing temperature, and good temperature characteristics, making it one of the hot research directions for obtaining high-efficiency solar cells. Currently, industrialized amorphous silicon / crystalline silicon heterojunction solar cells use intrinsic hydrogenated amorphous silicon thin films as the passivation layer. Hydrogenated amorphous silicon has a relatively low surface state density (~3×10⁻⁶). 10 cm -2 While chemical passivation provides excellent passivation, it lacks fixed charge and field-effect passivation, and its thickness is typically above 5 nm, leading to parasitic absorption. Therefore, to achieve a synergistic effect of chemical and field-effect passivation in bifacial crystalline silicon heterojunction solar cells, dielectric passivation films with fixed charges of different polarities need to be deposited on the front and back sides of the crystalline silicon textured surface. Ideally, the dielectric passivation film should have a low surface state density but a high fixed charge density. Existing heterojunction solar cells using hydrogenated amorphous silicon oxynitride (SON) films as passivation layers generally use SON films on both sides, neglecting the field-effect passivation advantages brought by fixed charges. Furthermore, the thickness of the SON films used exceeds 2 nm, at which point carrier tunneling is almost nonexistent, with the focus solely on the chemical passivation characteristics of SON. Existing floating junction back-side passivated crystalline silicon cells have direct contact between the silicon substrate and the metal electrode, easily leading to carrier recombination. Summary of the Invention

[0003] To address the aforementioned shortcomings of existing technologies, this invention proposes a crystalline silicon heterojunction bifacial solar cell with a synergistic effect of chemical passivation and field-effect passivation, along with its fabrication method. By employing a thin oxide layer with a high fixed charge as both a passivation layer and a tunneling layer, the invention enhances the passivation effect through a composite passivation synergistic effect, addressing the problem of low photogenerated carrier collection efficiency in heterojunction cells. This improves the passivation effect while reducing light absorption generated by the passivation layer.

[0004] This invention is achieved through the following technical solution:

[0005] This invention relates to a bifacial crystalline silicon heterojunction solar cell with a synergistic effect of chemical passivation and field-effect passivation, comprising: an n-type or p-type monocrystalline silicon substrate, a boron-doped hydrogenated nano-silicon (nc-Si(p):H) thin film layer located on one side of the substrate and serving as an emitter layer or window layer, and aluminum oxide (Al₂O₃) sequentially disposed on the substrate from the inside out. x Thin film, boron-doped hydrogenated silicon nanofilm, transparent conductive layer and metal electrode, phosphorus-doped hydrogenated silicon nanofilm located on the other side of the substrate as a window layer or emitter layer, and hydrogenated amorphous silicon oxynitride (SiO2) sequentially disposed on the substrate from the inside out. x N y The structure consists of a thin film of phosphorus-doped hydrogenated nano-silicon (nc-Si(n):H), a transparent conductive layer, and a metal electrode.

[0006] The single-crystal silicon substrate is specifically an n-type or p-type Cz Czochralski single-crystal silicon wafer or a cast single-crystal silicon wafer, wherein the doping element of the n-type single-crystal silicon is P, As or Sb, and the doping element of the p-type single-crystal silicon is B, Al or Ga.

[0007] The alumina thin layer has a thickness of 0.5-2 nm and a negative charge density of -5 × 10⁻⁵. 12 cm -2 The product of electron and hole concentrations on the silicon surface is reduced by adjusting their values ​​and ratios, thereby widening the surface concentration difference between free electrons and holes and reducing surface carrier recombination. The carriers then tunnel through the alumina thin layer without being blocked.

[0008] The alumina thin layer is prepared by atomic layer deposition (ALD) with alternating introduction of trimethylaluminum (TMA) and water vapor (H2O), wherein the deposition cycle is 4-14 times, the process temperature is 100-400℃, and the chamber pressure is 0.1-10mbar.

[0009] The hydrogenated amorphous silicon oxynitride thin film has a thickness of 0.5-2 nm and a positive charge density of ~+8×10⁻⁶. 10 —~+1×10 12 cm -2 It also exhibits superior field-effect passivation, allowing charge carriers to tunnel through the hydrogenated amorphous silicon oxynitride thin layer without obstruction.

[0010] The hydrogenated amorphous silicon oxynitride thin layer is prepared by plasma-enhanced chemical vapor deposition (PECVD) with N2, N2O and SiH4 gases introduced, wherein the N2O flow rate is 10-50 sccm, the N2O:SiH4 gas flow rate ratio is 5:3-10:3, the process temperature is 200-400℃, and the chamber pressure is 0.1-5 mbar.

[0011] The thickness of both the boron-doped hydrogenated silicon nanofilm and the phosphorus-doped hydrogenated silicon nanofilm is 3-20 nm, and they are prepared by plate-type very high frequency (VHF)-PECVD deposition.

[0012] The thickness of the transparent conductive layer is 50-150 nm, and it is prepared by magnetron sputtering or ion reactive deposition (RPD) using indium tin oxide (ITO), indium tungsten oxide (IWO), SCOT conductive film (In2O3:ZrO2:TiO2:Ga2O3=98.5:0.5:0.5:0.5), or zinc aluminum oxide (AZO).

[0013] The metal electrode is a grid-shaped electrode, which is made of Ag, Au or Cu and is prepared by screen printing, vacuum evaporation or electroplating.

[0014] This invention relates to a method for preparing the above-mentioned crystalline silicon heterojunction bifacial solar cell, comprising the following steps:

[0015] Step 1: Using an n-type or p-type Cz Czochralski single crystal silicon wafer or a cast single crystal silicon wafer with a resistivity between 0.5-3 Ω·cm and a thickness of 100-180 μm as a substrate, remove the wire-cut damage layer on the surface of the silicon wafer with an alkaline solution.

[0016] Step 2: The silicon wafer obtained in Step 1 is etched with KOH or NaOH alkaline solution to form a pyramid structure on the front and back surfaces of the silicon wafer, which serves to trap light.

[0017] Step 3: Place the silicon wafer obtained in Step 2 into the ALD device and form a nano-thickness tunneling alumina layer on one side of the boron-doped hydrogenated nano-silicon thin film layer of the silicon wafer.

[0018] Step 4: Place the silicon wafer obtained in Step 3 into a plate-type VHF-PECVD, introduce silane and borane gases, and deposit a boron-doped hydrogenated nano-silicon thin film layer on the surface of the silicon wafer.

[0019] Step 5: Flip the silicon wafer obtained in Step 4 and place it into the PECVD equipment to form a nano-thickness tunneling silicon oxynitride layer on one side of the phosphorus-doped hydrogenated nano-silicon thin film layer of the silicon wafer.

[0020] Step 6: Place the silicon wafer obtained in Step 5 into a plate-type VHF-PECVD, introduce silane and phosphine gases, and deposit a phosphorus-doped hydrogenated nano-silicon thin film layer on the surface of the silicon wafer.

[0021] Step 7: Deposit transparent conductive layers on the front and back surfaces of the silicon wafer obtained in Step 6 by magnetron sputtering or ion reaction deposition.

[0022] Step 8: The silicon wafer obtained in Step 7 is used to form grid-shaped Ag, Au or Cu electrodes on the front and back surfaces of the silicon wafer, respectively, by screen printing, vacuum evaporation or electroplating. Technical effect

[0023] This invention uses both thin layers with fixed negative charges and thin layers with fixed positive charges, to achieve AlO with fixed negative charges. x Thin-layered SiO₂ repels electrons from charge carriers and tunnels through holes, carrying a fixed positive charge. x N y The thin H-layer repels holes in charge carriers, allowing electrons to tunnel through. This achieves both field-effect passivation by fixing the charge and chemical passivation by saturating the dangling bonds on the crystalline silicon substrate surface with oxygen and hydrogen atoms introduced during deposition. Compared to existing technologies, this invention is more advantageous for improving the open-circuit voltage of heterojunction solar cells. Hole tunneling occurs through AlO₂. x Thin layer, electron tunneling through SiO x N y The thin H layer, without being blocked by the thin layer, is beneficial to increasing the effective current of the heterojunction cell. Attached Figure Description

[0024] Figure 1 A schematic diagram of a texturized single-crystal silicon substrate;

[0025] Figure 2 This is a schematic diagram of a structure in which a tunneling oxide layer and a hydrogenated nano-silicon layer are deposited on the field side of the front surface of a substrate.

[0026] Figure 3 This is a schematic diagram of a substrate with a tunneling oxide layer and a hydrogenated nano-silicon layer deposited on the emitter side.

[0027] Figure 4 A schematic diagram of the structure in which transparent conductive layers are deposited on both sides of the battery;

[0028] Figure 5 To fabricate metal grid electrodes on both sides of the battery to form a bifacial heterojunction solar cell;

[0029] In the figure: 1. p-type or n-type single crystal silicon substrate, 2. tunneling oxide layer on the front surface field side, 3. hydrogenated nano-silicon layer on the front surface field side, 4. tunneling oxide layer on the emitter side, 5. hydrogenated nano-silicon layer on the emitter side, 6. transparent conductive layer, 7. metal electrode. Detailed Implementation Example 1

[0030] like Figure 5 As shown, this embodiment relates to a crystalline silicon heterojunction bifacial solar cell with a synergistic effect of chemical passivation and field-effect passivation, comprising: an n-type monocrystalline silicon substrate 1, a hydrogenated silicon oxynitride thin layer 2, a phosphorus-doped hydrogenated nano-silicon thin film layer 3, an AZO transparent conductive layer 6, and an Ag metal electrode 7, arranged sequentially from the inside to the outside on the back surface of the substrate; and an alumina thin layer 4, a boron-doped hydrogenated nano-silicon layer 5, an AZO transparent conductive layer 6, and an Ag metal electrode 7, arranged sequentially from the inside to the outside on the back surface of the substrate.

[0031] like Figures 1-4 As shown, the preparation method in this embodiment specifically includes:

[0032] Step 1: Use of single-crystal silicon substrate. An n-type Cz Czochralski single-crystal silicon with a crystal orientation of (100), a resistivity of 1 Ω·cm, and a thickness of 150 μm was used as the battery substrate. The wire-cut damage layer was removed using a 10%-20% KOH solution at a temperature of 75-100℃.

[0033] Step 2: Preparation of pyramidal textured surface on single-crystal silicon: The n-type silicon substrate obtained in Step 1 is texturized using a 1%-3% KOH solution supplemented with a 3%-10% isopropanol solution, followed by standard RCA cleaning to obtain a pretreated n-type silicon substrate 1 with pyramidal textured surfaces on both sides, as shown below. Figure 1 As shown.

[0034] Step 3: Preparation of the front surface silicon oxynitride thin layer: The silicon wafer obtained in Step 2 is placed in a PECVD equipment, and N2, N2O and SiH4 gases are introduced. SiO2 is deposited on the front surface of the silicon wafer through a chemical reaction. x N y Layer H2; wherein the N2O flow rate ranges from 10 to 50 sccm, the N2O:SiH4 gas flow rate ratio is 5:3 to 10:3, the process temperature is 200 to 500℃, and the chamber pressure is 0.1 to 5 mbar. Preferably, the N2O flow rate is 20 sccm, the N2O:SiH4 gas flow rate ratio is 25:9, the process temperature is 350℃, and the chamber pressure is 0.5 mbar, yielding SiO2. x N y :H thickness 1.0nm.

[0035] Step 4: Preparation of the front surface phosphorus-doped hydrogenated silicon nanolayer: The silicon wafer obtained in Step 3 is placed in the vacuum chamber of a plate-type VHF-PECVD system. At a silicon substrate temperature of 200°C, using H2, SiH4, and PH3 as reactant gases, a phosphorus-doped hydrogenated silicon nanolayer 3 is grown on the surface of the hydrogenated silicon oxynitride thin film 2 as a window layer. The preferred thickness is 10 nm. The resulting silicon wafer and film are shown below. Figure 2 As shown. The very high frequency radio frequency of the VHF-PECVD is 20-50MHz.

[0036] Step 5: Preparation of the back surface alumina thin layer: The silicon wafer obtained in Step 4 is flipped and placed in an ALD device. TMA and H2O vapor are alternately introduced to deposit the alumina thin layer 4. The TMA cycle number is 4-14 times, the process temperature is 100-400℃, and the chamber pressure is 0.1-10 mbar; preferably, 7 TMA cycles are performed at a process temperature of 250℃ and a chamber pressure of 1 mbar to obtain AlO2. x Thickness 1.0nm.

[0037] Step 6: Preparation of the boron-doped hydrogenated silicon nanolayer on the back surface: The silicon wafer obtained in Step 5 is placed in another vacuum chamber of the plate-type VHF-PECVD. Under the same conditions of 200°C, using H2, SiH4, and B2H6 as reactant gases, a boron-doped hydrogenated silicon nanolayer 5 is grown on the surface of the alumina thin layer 4 as the back surface emitter layer, with a preferred thickness of 15 nm. The VHF-PECVD operates at a very high frequency of 20-50 MHz. After steps 5 and 6, the resulting silicon wafer and film are as follows... Figure 3 As shown.

[0038] Step 7: Fabrication of the transparent conductive layer: The silicon wafer obtained in Step 6 is placed in the vacuum chamber of a magnetron sputtering apparatus. A transparent conductive AZO thin film layer 6 is deposited on the outer sides of both the phosphorus-doped hydrogenated silicon nanolayer on the front surface and the boron-doped hydrogenated silicon nanolayer on the back surface using magnetron sputtering. Figure 4 As shown. The preferred thickness of the AZO thin film layer is 80 nm.

[0039] Step 8: Fabrication of metal grid electrodes: On both sides of the silicon wafer obtained in Step 7, a layer of low-temperature conductive silver paste is printed using a screen printing method. Then, sintering is performed at a preferred low temperature of 250°C to form good ohmic contact, thus forming the front and back silver grid electrodes 7. Figure 5 As shown. Example 2

[0040] Compared with Example 1, this example uses p-type cast single crystal silicon as the substrate, replaces the AZO transparent conductive layer with the SCOT transparent conductive layer, and replaces the Ag metal electrode with the Cu metal electrode.

[0041] like Figures 1-4 As shown, the preparation method in this embodiment specifically includes:

[0042] Step 1: Use of single-crystal silicon substrate. A p-type cast single-crystal silicon substrate with a resistivity of 0.5 Ω·cm and a thickness of 160 μm was used as the battery substrate. The wire-cut damage layer was removed using a 10%-20% KOH solution at a temperature of 80°C.

[0043] Step 2: Preparation of pyramidal textured surface on single-crystal silicon: The p-type silicon substrate obtained in Step 1 is texturized using a 1%-3% KOH solution supplemented with a 3%-10% isopropanol solution, followed by standard RCA cleaning to obtain a pretreated p-type silicon substrate 1 with pyramidal textured surfaces on both the front and back sides, as shown below. Figure 1 As shown.

[0044] Step 3: Preparation of the front surface alumina thin layer: The silicon wafer obtained in Step 2 is placed in an ALD device, and TMA and H2O vapors are alternately introduced to deposit tunneled AlO2. x Layer 2, wherein the preferred number of TMA cycles is 10, the process temperature is 280℃, and the chamber pressure is 0.8 mbar, to obtain AlO. x Thickness 1.4nm.

[0045] Step 4: Preparation of the boron-doped hydrogenated silicon nanolayer on the front surface: The silicon wafer obtained in Step 3 is placed in a vacuum chamber of a plate-type VHF-PECVD system. Under the same conditions of 200°C, H2, SiH4, and B2H6 are used as reactant gases in AlO2... x A boron-doped hydrogenated nano-silicon layer 3 is grown on the surface of layer 2 as a window layer, preferably with a thickness of 10 nm. After steps 3 and 4, the resulting silicon wafer and film are as follows: Figure 2 As shown.

[0046] Step 5: Preparation of a thin layer of hydrogen nitride silicon oxide on the back surface: The silicon wafer obtained in Step 4 is flipped and placed in a PECVD apparatus, and N2, N2O and SiH4 gases are introduced. SiO2 is deposited on the back surface of the silicon wafer through a chemical reaction. x N y Layer 4; wherein the preferred N2O flow rate is 20 sccm, the preferred N2O:SiH4 gas flow rate ratio is 25:9, the process temperature is 300℃, and the chamber pressure is 0.8 mbar, to obtain SiO2. x N y :H thickness 1.5nm.

[0047] Step 6: Preparation of the back surface phosphorus-doped hydrogenated silicon nanolayer: The silicon wafer obtained in Step 5 is placed in the vacuum chamber of a plate-type VHF-PECVD. Under a silicon substrate temperature of 200℃, H2, SiH4, and PH3 are used as reactant gases to react with SiO2. x N y A phosphorus-doped hydrogenated nano-silicon layer 5 is grown on the surface of layer H4 as a back surface emitter layer, with a preferred thickness of 15 nm. The resulting silicon wafer and film are as follows: Figure 3 As shown. The very high frequency radio frequency of the VHF-PECVD is 20-50MHz.

[0048] Step 7: Fabrication of the transparent conductive layer: The silicon wafer obtained in Step 6 is placed in the vacuum chamber of a magnetron sputtering apparatus. A transparent conductive SCOT thin film layer 6 is deposited on the outer sides of both the boron-doped hydrogenated silicon nanolayer on the front side and the phosphorus-doped hydrogenated silicon nanolayer on the back side using magnetron sputtering. Figure 4 As shown. The preferred thickness of the SCOT thin film layer is 60 nm.

[0049] Step 8: Fabrication of metal gate electrodes: On both sides of the silicon wafer obtained in Step 7, a layer of low-temperature conductive copper paste gate electrode is deposited using vacuum evaporation combined with a mask. Then, sintering is performed at a preferred low temperature of 200°C to form good ohmic contact, forming the front and back copper gate electrodes 7. Figure 5 As shown.

[0050] The crystalline silicon heterojunction bifacial solar cell obtained through the above steps, exhibiting a synergistic effect of chemical passivation and field-effect passivation, uses a monocrystalline silicon wafer as the substrate and AlO₂ with a fixed negative charge. x Thin layer and fixed positive charge SiO x N y The H-layer is a fully passivation layer. Boron-doped hydrogenated silicon nanolayers and phosphorus-doped hydrogenated silicon nanolayers are used as contact layers with the transparent conductive layer. Oxygen and hydrogen atoms are introduced into the silicon wafer surface to saturate surface dangling bonds, which can simultaneously achieve excellent passivation performance, effective carrier transport, reduced parasitic light absorption and good contact, making it easy to obtain high-efficiency heterojunction bifacial solar cells.

[0051] The above-described specific implementations can be partially adjusted by those skilled in the art in different ways without departing from the principles and purpose of the present invention. The scope of protection of the present invention is defined by the claims and is not limited to the above-described specific implementations. All implementation schemes within the scope of the claims are bound by the present invention.

Claims

1. A crystalline silicon heterojunction bifacial solar cell with synergistic effects of chemical passivation and field-effect passivation, characterized in that, include: An n-type or p-type single-crystal silicon substrate, a boron-doped hydrogenated nano-silicon thin film layer nc-Si(p):H located on one side of the substrate and serving as an emitter layer or window layer, and an alumina thin film AlO sequentially disposed on the substrate from the inside out. x The substrate consists of a boron-doped hydrogenated silicon nanofilm, a transparent conductive layer and a metal electrode, a phosphorus-doped hydrogenated silicon nanofilm located on the other side of the substrate and serving as a window layer or emitter layer, and a hydrogenated amorphous silicon oxynitride thin film SiO2 layer sequentially disposed on the substrate from the inside out. x N y :H, phosphorus-doped hydrogenated nano-silicon thin film layer nc-Si(n); :H, transparent conductive layer and metal electrode; The alumina thin layer has a thickness of 0.5-2 nm and a negative charge density of -5 × 10⁻⁵. 12 cm -2 The product of electron and hole concentrations on the silicon surface is reduced by adjusting the values ​​and ratios of the electron and hole concentrations on the silicon surface, thereby widening the surface concentration difference between free electrons and holes, thus reducing surface carrier recombination. The carriers then tunnel through the alumina thin layer without being blocked. The alumina thin layer is prepared by atomic layer deposition, alternatingly introducing trimethylaluminum (TMA) and water vapor (H2O), wherein the deposition cycle is 4-14 times, the process temperature is 100-400 ℃, and the chamber pressure is 0.1-10 mbar. The hydrogenated amorphous silicon oxynitride thin film has a thickness of 0.5-2 nm and a positive charge density of ~+8×10⁻⁸. 10 —~+1×10 12 cm -2 On a scale of [number], charge carriers tunnel through the hydrogenated amorphous silicon oxynitride thin layer without being blocked. The hydrogenated amorphous silicon oxynitride thin layer is prepared by plasma-enhanced chemical vapor deposition (PECVD) with N2, N2O, and SiH4 gases introduced, wherein the N2O flow rate is 10-50 sccm, the N2O:SiH4 gas flow rate ratio is 5:3-10:3, the process temperature is 200-400 ℃, and the chamber pressure is 0.1-5 mbar.

2. The crystalline silicon heterojunction bifacial solar cell with synergistic effect of chemical passivation and field-effect passivation according to claim 1, characterized in that, The single-crystal silicon substrate is specifically an n-type or p-type Cz Czochralski single-crystal silicon wafer or a cast single-crystal silicon wafer, wherein the doping element of the n-type single-crystal silicon is P, As or Sb, and the doping element of the p-type single-crystal silicon is B, Al or Ga.

3. The crystalline silicon heterojunction bifacial solar cell with synergistic effect of chemical passivation and field-effect passivation according to claim 1, characterized in that, The thickness of both the boron-doped hydrogenated silicon nanofilm and the phosphorus-doped hydrogenated silicon nanofilm is 3-20 nm, and they are prepared by plate-type very high frequency PECVD deposition.

4. The crystalline silicon heterojunction bifacial solar cell with synergistic effect of chemical passivation and field-effect passivation according to claim 1, characterized in that, The thickness of the transparent conductive layer is 50-150 nm, and it is prepared by magnetron sputtering or ion reactive deposition using indium tin oxide, tungsten-doped indium oxide, SCOT conductive film (In2O3:ZrO2:TiO2:Ga2O3=98.5:0.5:0.5:0.5) or aluminum-doped zinc oxide.

5. The crystalline silicon heterojunction bifacial solar cell with synergistic effect of chemical passivation and field-effect passivation according to claim 1, characterized in that, The metal electrode is a grid-shaped electrode, which is made of Ag, Au or Cu and is prepared by screen printing, vacuum evaporation or electroplating.

6. The crystalline silicon heterojunction bifacial solar cell with synergistic effect of chemical passivation and field-effect passivation according to any one of claims 1 to 5, characterized in that, Specifically, the following steps are included: Step 1: Using an n-type or p-type Cz Czochralski single crystal silicon wafer or a cast single crystal silicon wafer with a resistivity between 0.5-3 Ω·cm and a thickness of 100-180 μm as a substrate, remove the wire cutting damage layer on the surface of the silicon wafer with an alkaline solution. Step 2: The silicon wafer obtained in Step 1 is etched with KOH or NaOH alkaline solution to form a pyramid structure on the front and back surfaces of the silicon wafer, which serves to trap light. Step 3: Place the silicon wafer obtained in Step 2 into the ALD device and form a nano-thickness tunneling alumina layer on one side of the boron-doped hydrogenated nano-silicon thin film layer of the silicon wafer. Step 4: Place the silicon wafer obtained in Step 3 into a plate-type VHF-PECVD, introduce silane and borane gases, and deposit a boron-doped hydrogenated nano-silicon thin film layer on the surface of the silicon wafer. Step 5: Flip the silicon wafer obtained in Step 4 and place it into the PECVD equipment to form a nano-thickness tunneling silicon oxynitride layer on one side of the phosphorus-doped hydrogenated nano-silicon thin film layer of the silicon wafer. Step 6: Place the silicon wafer obtained in Step 5 into a plate-type VHF-PECVD, introduce silane and phosphine gases, and deposit a phosphorus-doped hydrogenated nano-silicon thin film layer on the surface of the silicon wafer. Step 7: Deposit transparent conductive layers on the front and back surfaces of the silicon wafer obtained in Step 6 by magnetron sputtering or ion reaction deposition. Step 8: The silicon wafer obtained in Step 7 is used to form grid-shaped Ag, Au or Cu electrodes on the front and back surfaces of the silicon wafer, respectively, by screen printing, vacuum evaporation or electroplating.

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