Packaging structure and optical signal transmitter

CN117254343BActive Publication Date: 2026-09-25UNIMICRON TECH CORP
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Patent Information

Application Number
CN202210646329.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-06-09
Publication Date
2026-09-25
Estimated Expiration
2042-06-09

AI Technical Summary

Technical Problem

然而,以目前的增层封装基板(build-up package substrate)是无法满足上述的要求

Benefits of technology

[0015]基于上述,在本发明的封装结构的设计中,电子组件的专用集成电路组件、电子集成电路组件以及光子集成电路组件,分别配置于重配置线路结构层上,且通过重配置线路结构层与封装基板电性连接。相较于现有技术中以增层封装基板或硅穿孔中介基板而言,本发明的封装结构除了可满足人们对于高密度封装结构的期待及要求之外,亦具有较低的成本。

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Abstract

The present application provides a packaging structure and an optical signal transmitter. The packaging structure includes a circuit board, a packaging substrate, a reconfiguration circuit structure layer, electronic components, a heat dissipation component, and an optical fiber component. The packaging substrate is disposed on the circuit board and electrically connected to the circuit board. The reconfiguration circuit structure layer is disposed on the packaging substrate and electrically connected to the packaging substrate. The electronic components include application specific integrated circuit components, electronic integrated circuit components, and photonic integrated circuit components, which are respectively disposed on the reconfiguration circuit structure layer and electrically connected to the packaging substrate through the reconfiguration circuit structure layer. The heat dissipation component is disposed on the electronic components. The optical fiber component is disposed on the packaging substrate and electrically connected to the packaging substrate and optically connected to the photonic integrated circuit component. Compared with the prior art of increasing the packaging substrate or the through-silicon via intermediate substrate, the packaging structure of the present application not only meets people's expectations and requirements for high-density packaging structures, but also has lower cost.
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Description

Technical Field

[0001] This invention relates to a semiconductor structure, and more particularly to a packaging structure and an optical signal transmitter. Background Technology

[0002] In recent years, high-performance computing (HPC) has become increasingly popular and is widely used in advanced networking and server applications, particularly in artificial intelligence (AI) related products that require high data rates, increasing bandwidth, and decreasing latency. Expectations and requirements for high-density (HD) packaging substrates used in HPC packaging structures are also growing, such as increasingly finer linewidths and spacings in metal layers, and thinner dielectric layers for reconfiguration circuitry. However, current build-up package substrates cannot meet these requirements. Therefore, to address these needs, the industry has proposed using through-silicon via (TSV) interposers to replace build-up package substrates; however, TSV interposers are extremely expensive. Summary of the Invention

[0003] This invention relates to a packaging structure that solves the problems of the prior art and has a lower cost.

[0004] The present invention also relates to an optical signal transmitter with better optical efficiency.

[0005] According to embodiments of the present invention, the packaging structure includes a circuit board, a packaging substrate, a reconfiguration circuit structure layer, electronic components, a heat dissipation component, and an optical fiber component. The packaging substrate is disposed on and electrically connected to the circuit board. The reconfiguration circuit structure layer is disposed on and electrically connected to the packaging substrate. The electronic components include application-specific integrated circuit (ASIC) components, electronic integrated circuit (IC) components, and photonic integrated circuit (PIC) components, respectively disposed on the reconfiguration circuit structure layer and electrically connected to the packaging substrate through the reconfiguration circuit structure layer. The photonic integrated circuit component includes an optical signal transmitter, and the optical signal transmitter includes a substrate, a plurality of vertical-cavity surface-emitting laser (VCSEL) sources, and a plurality of solder bumps. The substrate includes a plurality of pads. An array of VCSEL sources is arranged on the substrate. Solder bumps are disposed between the substrate and the VCSEL sources, wherein the VCSEL sources are electrically connected to the pads of the substrate through the solder bumps. The heat dissipation component is disposed on the electronic components. The optical fiber component is disposed on the packaging substrate and electrically connected to the packaging substrate and optically connected to the photonic integrated circuit component.

[0006] In the packaging structure according to an embodiment of the present invention, the packaging structure further includes a plurality of first solder balls, a plurality of second solder balls, and a plurality of third solder balls. The first solder balls are disposed between the packaging substrate and the circuit board, wherein the packaging substrate is electrically connected to the circuit board via the first solder balls. The second solder balls are disposed between the reconfiguration circuit structure layer and the packaging substrate, wherein the reconfiguration circuit structure layer is electrically connected to the packaging substrate via the second solder balls. The third solder balls are disposed between the electronic component and the reconfiguration circuit structure layer, wherein the electronic component is electrically connected to the reconfiguration circuit structure layer via the third solder balls. The size of each third solder ball is smaller than the size of each second solder ball, and the size of each second solder ball is smaller than the size of each first solder ball.

[0007] In the packaging structure according to an embodiment of the present invention, the above-described packaging structure further includes a base adhesive disposed between the electronic component and the reconfiguration circuit structure layer, and covering a third solder ball.

[0008] In the packaging structure according to an embodiment of the present invention, the heat dissipation assembly includes a first heat sink, a second heat sink, and a thermoelectric cooler. The first heat sink is disposed on an application-specific integrated circuit (ASIC) assembly. The second heat sink is disposed on an electronic integrated circuit (IC) assembly. The thermoelectric cooler is disposed on the first and second heat sinks. The first heat sink is located between the thermoelectric cooler and the ASIC assembly, while the second heat sink is located between the thermoelectric cooler and the IC assembly.

[0009] In the packaging structure according to an embodiment of the present invention, the heat dissipation component includes a plurality of thermoelectric cooling pads and a plurality of heat sinks. The thermoelectric cooling pads are respectively disposed on an application-specific integrated circuit (ASIC) assembly, an electronic integrated circuit (IC) assembly, and a photonic integrated circuit (PIC) assembly. The heat sinks are respectively disposed on the thermoelectric cooling pads, wherein the thermoelectric cooling pads are respectively located between the heat sinks and the ASIC assembly, the IC assembly, and the PIC assembly.

[0010] In the packaging structure according to an embodiment of the present invention, the heat dissipation assembly further includes a plurality of first thermal interface materials and a plurality of second thermal interface materials. The first thermal interface materials are respectively disposed between the thermoelectric cooler and the application-specific integrated circuit (ASIC) assembly, the electronic integrated circuit (IC) assembly, and the photonic integrated circuit (PIC) assembly. The second thermal interface materials are respectively disposed between the heat sink and the thermoelectric cooler.

[0011] In the packaging structure according to an embodiment of the present invention, the above-described photonic integrated circuit assembly further includes a photodiode. The electronic integrated circuit assembly includes a transimpedance amplifier and a driver chip.

[0012] In the packaging structure according to an embodiment of the present invention, the above-described optical fiber assembly includes an optical fiber connector, a first optical coupler, a second optical coupler, a first optical fiber cable, and a second optical fiber cable. The optical fiber connector is disposed on the packaging substrate and electrically connected to the packaging substrate. The first optical fiber cable passes through the optical fiber connector and is electrically connected to the photodiode via the first optical coupler. The second optical fiber cable passes through the optical fiber connector and is electrically connected to the optical signal transmitter via the second optical coupler.

[0013] In the packaging structure according to an embodiment of the present invention, an optical signal enters from a first optical fiber cable to a photodiode, which converts the optical signal into an electrical signal. The electrical signal is then amplified by a transimpedance amplifier and transmitted to an application-specific integrated circuit (ASIC). The ASIC then transmits the electrical signal to an optical signal transmitter via a driver chip, converting the electrical signal into another optical signal and transmitting it outward to a second optical fiber cable for transmission to an external circuit.

[0014] According to an embodiment of the present invention, an optical signal transmitter includes a substrate, a plurality of vertical-cavity surface-emitting laser (VCSEL) sources, and a plurality of solder bumps. The substrate includes a plurality of pads. An array of VCSEL sources is arranged on the substrate. Solder bumps are disposed between the substrate and the VCSEL sources, wherein the VCSEL sources are electrically connected to the pads of the substrate via the solder bumps.

[0015] Based on the above, in the packaging structure design of the present invention, the application-specific integrated circuit (ASIC), electronic integrated circuit (IC), and photonic integrated circuit (PIC) components of the electronic components are respectively disposed on the reconfiguration circuit structure layer and electrically connected to the packaging substrate through the reconfiguration circuit structure layer. Compared with the prior art using layer-addition packaging substrates or silicon through-hole (STB) interposers, the packaging structure of the present invention not only meets people's expectations and requirements for high-density packaging structures but also has a lower cost. Attached Figure Description

[0016] Figure 1A This is a cross-sectional schematic diagram of a packaging structure according to an embodiment of the present invention;

[0017] Figure 1B yes Figure 1A A top view of the packaging structure;

[0018] Figure 1C yes Figure 1A A three-dimensional schematic diagram of the optical signal transmitter in the package structure;

[0019] Figure 1D yes Figure 1C A partial side view of the optical signal transmitter;

[0020] Figure 2This is a cross-sectional schematic diagram of a packaging structure according to another embodiment of the present invention.

[0021] Explanation of reference numerals in the attached figures

[0022] 10a, 10b: Packaging structure;

[0023] 100: Circuit board;

[0024] 200: Packaging substrate;

[0025] 300: Reconfiguration of the line structure layer;

[0026] 310: Patterned circuit layer;

[0027] 320: Dielectric layer;

[0028] 330: First pad;

[0029] 340: Second pad;

[0030] 350: Conductive blind via;

[0031] 360: Solder resist layer;

[0032] 400: Electronic components;

[0033] 410: Application-Specific Integrated Circuit (ASIC) Components;

[0034] 420: Electronic integrated circuit components;

[0035] 422: Driver chip;

[0036] 424: Impedance amplifier;

[0037] 430: Photonic integrated circuit components;

[0038] 432: Optical signal transmitter;

[0039] 433: Base;

[0040] 434: Photodiode;

[0041] 435: Vertical cavity surface-emitting laser source;

[0042] 437: Solder bump;

[0043] 500a, 500b: Heat dissipation components;

[0044] 510b: First radiator;

[0045] 512, 514, 516: Thermoelectric cooling elements;

[0046] 520b: Second heatsink;

[0047] 522, 524, 526: Radiators;

[0048] 530b: Thermoelectric cooler;

[0049] 532, 534, 536: First thermal interface material;

[0050] 542, 544, 546: Second thermal interface materials;

[0051] 600: Fiber optic assembly;

[0052] 610: Fiber optic connector;

[0053] 620: First optical coupler;

[0054] 630: Second optical coupler;

[0055] 640: First fiber optic cable;

[0056] 650: Second fiber optic cable;

[0057] 710: First solder ball;

[0058] 720: Second solder ball;

[0059] 730: Third solder ball;

[0060] 800: Base rubber;

[0061] E: Electrical signal;

[0062] L1: Optical signal;

[0063] L2: Another optical signal;

[0064] P: Connector. Detailed Implementation

[0065] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.

[0066] Figure 1A This is a cross-sectional schematic diagram of a packaging structure according to an embodiment of the present invention. Figure 1B yes Figure 1A A top view of the packaging structure. Figure 1C yes Figure 1A A three-dimensional schematic diagram of the optical signal transmitter in the package structure. Figure 1D yes Figure 1C A partial side view of the optical signal transmitter. For ease of explanation, Figure 1B Some components, such as heat dissipation assembly 500, are omitted from the diagram.

[0067] Please refer to this first. Figure 1A and Figure 1B In this embodiment, the packaging structure 10a includes a circuit board 100, a packaging substrate 200, a reconfiguration circuit structure layer 300, an electronic component 400, a heat dissipation component 500a, and an optical fiber component 600. The packaging substrate 200 is disposed on and electrically connected to the circuit board 100. The reconfiguration circuit structure layer 300 is disposed on and electrically connected to the packaging substrate 200, wherein the packaging substrate 200 is located between the reconfiguration circuit structure layer 300 and the circuit board 100. The electronic component 400 includes an application-specific integrated circuit (ASIC) component 410, an electronic integrated circuit (IC) component 420, and a photonic integrated circuit (PIC) component 430, wherein the reconfiguration circuit structure layer 300 is located between the electronic component 400 and the packaging substrate 200. The ASIC component 410, IC component 420, and PIC component 430 are respectively disposed on the reconfiguration circuit structure layer 300 and electrically connected to the packaging substrate 200 through the reconfiguration circuit structure layer 300. A heat dissipation component 500a is disposed on the electronic component 400 to dissipate heat from the electronic component 400. An optical fiber component 600 is disposed on the packaging substrate 200 and is electrically connected to the packaging substrate 200 and optically connected to the photonic integrated circuit component 430.

[0068] In other words, in this embodiment, the application-specific integrated circuit (ASIC) component 410, the electronic integrated circuit (IC) component 420, and the photonic integrated circuit (PIC) component 430 are respectively disposed on the reconfiguration circuit structure layer 300 and electrically connected to the packaging substrate 200 through the reconfiguration circuit structure layer 300. Compared with the layer-addition packaging substrate or silicon through-hole (STB) interposer substrate in the prior art, the packaging structure 10a of this embodiment not only meets people's expectations and requirements for high-density packaging structures, but also has a lower cost due to the lower cost of the reconfiguration circuit structure layer 300 compared to the STB interposer substrate in the prior art.

[0069] Please refer to this again. Figure 1AIn this embodiment, the reconfiguration circuit structure layer 300 includes multiple patterned circuit layers 310, multiple dielectric layers 320, multiple first pads 330, multiple second pads 340, multiple conductive blind vias 350, and a solder resist layer 360. The patterned circuit layers 310 and dielectric layers 320 are stacked alternately, wherein the linewidth and line spacing of the patterned circuit layers 310 are, for example, 2 micrometers, 5 micrometers, and 10 micrometers, meaning that the patterned circuit layers 310 are fine circuit layers. Preferably, the wiring density of the reconfiguration circuit structure layer 300 is greater than the wiring density of the packaging substrate 200, and the wiring density of the packaging substrate 200 is greater than the wiring density of the circuit board 100. The dielectric layer 320 may be made of, for example, organic materials, glass, or ceramic, but is not limited thereto. The surface of the first pads 330 is exposed and flush with the surface of the dielectric layer 320 of the nearest electronic component 400. The second pad 340 is directly electrically connected to the patterned circuit layer 310, wherein the surface of the second pad 340 is exposed and flush with the surface of the solder mask layer 360. The conductive blind via 350 passes through the dielectric layer 320 and is electrically connected between the patterned circuit layers 310 and between the patterned circuit layer 310 and the first pad 330, as well as between the patterned circuit layer 310 and the patterned circuit layer 310.

[0070] Furthermore, please refer to [the following]: Figure 1A The heat dissipation assembly 500a of this embodiment includes a plurality of thermoelectric coolers 512, 514, and 516 and a plurality of heat sinks 522, 524, and 526. Thermoelectric cooler 512 is disposed on an application-specific integrated circuit (ASIC) assembly 410, thermoelectric cooler 514 is disposed on an electronic integrated circuit (IC) assembly 420, and thermoelectric cooler 516 is disposed on a photonic integrated circuit (PIC) assembly 430. Heat sink 522 is disposed on thermoelectric cooler 512, wherein thermoelectric cooler 512 is located between heat sink 522 and ASIC assembly 410. Heat sink 524 is disposed on thermoelectric cooler 514, wherein thermoelectric cooler 514 is located between heat sink 524 and IC assembly 420. Heat sink 526 is disposed on thermoelectric cooler 516, wherein thermoelectric cooler 516 is located between heat sink 526 and photonic integrated circuit (PIC) assembly 430. Here, the thickness of thermoelectric coolers 512, 514, and 516 can be the same or different. The thickness of thermoelectric coolers 512, 514, and 516 can be changed according to requirements, and there are no restrictions on this.

[0071] Furthermore, the heat dissipation assembly 500a of this embodiment also includes a plurality of first thermal interface materials 532, 534, 536 and a plurality of second thermal interface materials 542, 544, 546, thereby fixing the thermoelectric coolers 512, 514, 516 and the heat sinks 522, 524, 526 to the electronic assembly 400. Specifically, the first thermal interface material 532 is disposed between the thermoelectric cooler 512 and the application-specific integrated circuit assembly 410, while the second thermal interface material 542 is disposed between the heat sink 522 and the thermoelectric cooler 512. The first thermal interface material 534 is disposed between the thermoelectric cooler 514 and the electronic integrated circuit assembly 420, while the second thermal interface material 544 is disposed between the heat sink 524 and the thermoelectric cooler 514. The first thermal interface material 536 is disposed between the thermoelectric cooler 516 and the photonic integrated circuit assembly 430, while the second thermal interface material 546 is disposed between the heat sink 526 and the thermoelectric cooler 516.

[0072] Furthermore, please refer to [the following]: Figure 1A The packaging structure 10a of this embodiment further includes a plurality of first solder balls 710, a plurality of second solder balls 720, and a plurality of third solder balls 730. The first solder balls 710 are disposed between the packaging substrate 200 and the circuit board 100, wherein the packaging substrate 200 is electrically connected to the circuit board 100 through the first solder balls 710. The second solder balls 720 are disposed between the reconfiguration circuit structure layer 300 and the packaging substrate 200, wherein the reconfiguration circuit structure layer 300 is electrically connected to the packaging substrate 200 through the second solder balls 720. The third solder balls 730 are disposed between the electronic component 400 and the reconfiguration circuit structure layer 300, wherein the electronic component 400 is electrically connected to the reconfiguration circuit structure layer 300 through the third solder balls 730. Here, the size of each third solder ball 730 is smaller than the size of each second solder ball, and the size of each second solder ball 720 is smaller than the size of each first solder ball 710. In other words, the first solder ball 710 has the largest size, while the third solder ball 730 has the smallest size, with the size of the third solder ball 730 being, for example, at the micrometer level. Furthermore, the packaging structure 10a of this embodiment also includes an adhesive base 800 disposed between the electronic component 400 and the reconfigured circuit structure layer 300, and covering the third solder ball 730.

[0073] Please refer to the following at the same time: Figure 1A and Figure 1BIn this embodiment, the electronic integrated circuit assembly 420 includes a driver chip 422 and a transimpedance amplifier 424. The photonic integrated circuit assembly 430 includes an optical signal transmitter 432 and a photodiode 434. The optical fiber assembly 600 includes an optical fiber connector 610, a first optical coupler 620, a second optical coupler 630, a first optical fiber cable 640, and a second optical fiber cable 650. The optical fiber connector 610 is disposed on and electrically connected to the packaging substrate 200. The first optical fiber cable 640 passes through the optical fiber connector 610 and is electrically connected to the photodiode 434 via the first optical coupler 620. The second optical fiber cable 650 passes through the optical fiber connector 610 and is electrically connected to the optical signal transmitter 432 via the second optical coupler 630. In other words, the packaging structure 10a of this embodiment integrates optical and electrical components (i.e., photonic integrated circuit component 430 and electronic integrated circuit component 420) heterogeneously onto the packaging substrate 200, and transmits signals through the optical fiber component 600 and the reconfigured circuit structure layer 300.

[0074] In detail, such as Figure 1B As shown, optical signal L1 enters photodiode 434 from the first optical fiber cable 640. Photodiode 434 converts optical signal L1 into electrical signal E, which is then transmitted to impedance amplifier 424 via reconfiguration line structure layer 300 for amplification. The amplified electrical signal is then transmitted to application-specific integrated circuit (ASIC) component 410 via reconfiguration line structure layer 300 and driver chip 422. ASIC component 410 then transmits electrical signal E to optical signal transmitter 432 via reconfiguration line structure layer 300 and driver chip 422. Optical signal transmitter 432 converts electrical signal E into another optical signal L2 and emits optical signal L2 in the form of a laser to the second optical fiber cable 650 for transmission to external circuitry (such as an interconnect).

[0075] More specifically, please also refer to Figure 1C as well as Figure 1D The optical signal transmitter 432 of this embodiment includes a substrate 433, a plurality of vertical-cavity surface-emitting laser (VCSEL) sources 435, and a plurality of solder bumps 437. The substrate 433 includes a plurality of pads P. The VCSEL sources 435 are arranged in an array on the substrate 433. The solder bumps 437 are disposed between the substrate 433 and the VCSEL sources 435, wherein the VCSEL sources 435 are electrically connected to the pads P of the substrate 433 via the solder bumps 437. Here, the optical signal transmitter 432 is specifically defined as a vertical-cavity surface-emitting laser (VCSEL).

[0076] Please refer to this again. Figure 1A In the fabrication process of package structure 10a, a reconfiguration circuit structure layer 300 is first provided. Next, electronic component 400 is bonded to the reconfiguration circuit structure layer 300 via third solder balls 730, and primer 800 is filled between electronic component 400 and the reconfiguration circuit structure layer 300 to cover the third solder balls 730. Next, a second solder ball 720 is formed on the side of the reconfiguration circuit structure layer 300 relatively away from the electronic component 400. Then, the above structure is individualized to cut into individual structures, which are then bonded to the package substrate 200 via the second solder balls 720, and assembled onto the circuit board 100 via the first solder balls 710 formed on the package substrate 200. Finally, a heat dissipation module 500a is formed on the electronic component 400, completing the fabrication of package structure 10a.

[0077] It must be noted that the following embodiments use the component reference numerals and some content from the foregoing embodiments, with the same reference numerals used to represent the same or similar components, and descriptions of the same technical content omitted. For explanations of the omitted parts, please refer to the foregoing embodiments; these will not be repeated in the following embodiments.

[0078] Figure 2 This is a cross-sectional schematic diagram of a packaging structure according to another embodiment of the present invention. Please also refer to... Figure 1A and Figure 2 The packaging structure 10b in this embodiment is... Figure 1A The packaging structure 10b is similar to that of the above-mentioned packaging structure 10a, but the difference lies in the fact that the heat dissipation component 500b of the packaging structure 10b in this embodiment is different from that described above. Figure 1A The heat dissipation assembly 500a has a packaging structure 10a. Specifically, in this embodiment, the heat dissipation assembly 500b includes a first heat sink 510b, a second heat sink 520b, and a thermoelectric cooler 530b. The first heat sink 510b is disposed on an application-specific integrated circuit (ASIC) assembly 410. The second heat sink 420b is disposed on an electronic integrated circuit (IC) assembly 420. The thermoelectric cooler 530b is disposed on the first heat sink 510b and the second heat sink 520b, wherein the first heat sink 510b is located between the thermoelectric cooler 530b and the ASIC assembly 410, and the second heat sink 520b is located between the thermoelectric cooler 530b and the IC assembly 420.

[0079] In other embodiments not shown, the heat dissipation component may also be disposed on the side of the reconfigured circuit structure layer relatively far from the electronic components, and at least corresponding to the application-specific integrated circuit (ASIC) component and the electronic integrated circuit (IC) component, thereby dissipating heat from the ASIC component and the IC component, and thus giving the package structure better heat dissipation performance. Furthermore, the heat dissipation component may also consist of only a heat sink or a thermoelectric cooler, whichever is chosen according to requirements, and this still falls within the scope of protection of this invention.

[0080] In summary, in the packaging structure design of this invention, the application-specific integrated circuit (ASIC), electronic integrated circuit (IC), and photonic integrated circuit (PIC) components of the electronic components are respectively disposed on the reconfiguration circuit structure layer and electrically connected to the packaging substrate through the reconfiguration circuit structure layer. Compared with the prior art using layer-addition packaging substrates or silicon through-hole (STB) interposers, the packaging structure of this invention not only meets people's expectations and requirements for high-density packaging structures but also has a lower cost.

[0081] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A packaging structure, characterized in that, include: Circuit board; A packaging substrate is disposed on the circuit board and electrically connected to the circuit board; A reconfigured circuit structure layer is disposed on the packaging substrate and electrically connected to the packaging substrate; Electronic components, including application-specific integrated circuit (ASIC) components, electronic integrated circuit (IC) components, and photonic integrated circuit (PIC) components, are respectively disposed on the reconfiguration circuit structure layer and electrically connected to the packaging substrate through the reconfiguration circuit structure layer. The photonic integrated circuit component includes an optical signal transmitter, and the optical signal transmitter includes: The base includes multiple pads; Multiple vertical-cavity surface-emitting laser sources are arranged in an array on the substrate; and Multiple solder bumps are disposed between the substrate and the multiple vertical cavity surface-emitting laser sources, wherein the multiple vertical cavity surface-emitting laser sources are electrically connected to the multiple pads of the substrate through the multiple solder bumps; A heat dissipation component is disposed on the electronic component; and An optical fiber assembly is disposed on the packaging substrate and is electrically connected to the packaging substrate and optically connected to the photonic integrated circuit assembly.

2. The packaging structure according to claim 1, characterized in that, Also includes: A plurality of first solder balls are disposed between the packaging substrate and the circuit board, wherein the packaging substrate is electrically connected to the circuit board through the plurality of first solder balls; A plurality of second solder balls are disposed between the reconfiguration circuit structure layer and the packaging substrate, wherein the reconfiguration circuit structure layer is electrically connected to the packaging substrate through the plurality of second solder balls; as well as A plurality of third solder balls are disposed between the electronic component and the reconfiguration circuit structure layer, wherein the electronic component is electrically connected to the reconfiguration circuit structure layer via the plurality of third solder balls, wherein the size of each of the plurality of third solder balls is smaller than the size of each of the plurality of second solder balls, and the size of each of the plurality of second solder balls is smaller than the size of each of the plurality of first solder balls.

3. The packaging structure according to claim 2, characterized in that, Also includes: The base adhesive is disposed between the electronic component and the reconfigured circuit structure layer, and covers the plurality of third solder balls.

4. The packaging structure according to claim 1, characterized in that, The heat dissipation component includes: A first heat sink is disposed on the dedicated integrated circuit assembly; A second heat sink is disposed on the electronic integrated circuit assembly; and A thermoelectric cooler is disposed on the first heat sink and the second heat sink, wherein the first heat sink is located between the thermoelectric cooler and the application-specific integrated circuit assembly, and the second heat sink is located between the thermoelectric cooler and the electronic integrated circuit assembly.

5. The packaging structure according to claim 1, characterized in that, The heat dissipation component includes: Multiple thermoelectric cooling elements are respectively disposed on the dedicated integrated circuit assembly, the electronic integrated circuit assembly, and the photonic integrated circuit assembly; and Multiple heat sinks are respectively disposed on the multiple thermoelectric cooling plates, wherein the multiple thermoelectric cooling plates are respectively located between the multiple heat sinks and the application-specific integrated circuit assembly, the electronic integrated circuit assembly and the photonic integrated circuit assembly.

6. The packaging structure according to claim 5, characterized in that, The heat dissipation component also includes: Multiple first thermal interface materials are respectively disposed between the multiple thermoelectric cooling elements and the dedicated integrated circuit assembly, the electronic integrated circuit assembly, and the photonic integrated circuit assembly; and Multiple second thermal interface materials are respectively disposed between the multiple heat sinks and the multiple thermoelectric cooling plates.

7. The packaging structure according to claim 1, characterized in that, The photonic integrated circuit assembly also includes a photodiode, while the electronic integrated circuit assembly includes a transimpedance amplifier and a driver chip.

8. The packaging structure according to claim 7, characterized in that, The optical fiber assembly includes an optical fiber connector, a first optical coupler, a second optical coupler, a first optical fiber cable, and a second optical fiber cable. The optical fiber connector is disposed on the packaging substrate and electrically connected to the packaging substrate. The first optical fiber cable passes through the optical fiber connector and is electrically connected to the photodiode through the first optical coupler. The second optical fiber cable passes through the optical fiber connector and is electrically connected to the optical signal transmitter through the second optical coupler.

9. The packaging structure according to claim 8, characterized in that, An optical signal enters the photodiode from the first optical fiber cable. The photodiode converts the optical signal into an electrical signal, which is then amplified by the impedance amplifier and transmitted to the application-specific integrated circuit (ASIC). The ASIC then transmits the electrical signal to the optical transmitter via the driver chip, converting the electrical signal into another optical signal and transmitting it outward to the second optical fiber cable for transmission to an external circuit.

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