Communication between an image forming apparatus and a replaceable supply article

Abstract

This application relates to communication between an image forming apparatus and a replaceable supply article. According to an exemplary embodiment, a toner container mountable in an image forming apparatus having a controller includes a housing having a reservoir for storing toner. A chip is positioned on the housing and configured to receive a first write command from the controller of the image forming apparatus. The chip is also configured to determine whether a transmission cycle bit of the first write command matches a transmission cycle bit of a second write command received by the chip from the controller of the image forming apparatus prior to the first write command. The chip is further configured to retransmit a response to the second write command to the controller of the image forming apparatus if the transmission cycle bit of the first write command matches the transmission cycle bit of the second write command.

Description

[0001] This application is a divisional application of the application filed on April 11, 2019, with application number 201980038968.4 and invention title "Communication between an image forming apparatus and a replaceable supply article". Technical Field

[0002] This disclosure relates generally to an image forming apparatus, and more specifically to communication between the image forming apparatus and a replaceable supply article. Background Technology

[0003] Electrophotographic image forming apparatuses typically include one or more consumer-replaceable supply items with a shorter lifespan than the image forming apparatus itself. For example, an image forming apparatus may include replaceable supply items that replenish the toner supply to the image forming apparatus and / or replace worn imaging components (e.g., photoconductor drums, color rollers, etc.). It is desirable for the image forming apparatus and the supply items to exchange information for proper operation. For example, it may be desirable to exchange information such as authentication or confirmation information, consumption or usage rates, replacement schedules, etc. Each supply item typically includes a chip configured to communicate with and respond to commands from a controller in the image forming apparatus. Effective communication between the controller of the image forming apparatus and the chip in the supply item is required. Summary of the Invention

[0004] According to an exemplary embodiment, a method for electrical communication between a slave node of an I2C communication bus located on a replaceable supply item mounted in an image forming apparatus and a controller of the image forming apparatus, which is the master node of the I2C communication bus, includes the slave node on the replaceable supply item receiving a first write command from the controller of the image forming apparatus. The slave node on the replaceable supply item compares the value of a transmission period bit contained in the header of the first write command with the value of a transmission period bit contained in the header of a second write command received by the slave node on the replaceable supply item from the controller of the image forming apparatus prior to the first write command. If the value of the transmission period bit contained in the header of the first write command is equal to the value of the transmission period bit contained in the header of the second write command, the slave node on the replaceable supply item sends a response to the second write command to the controller of the image forming apparatus without executing the first write command.

[0005] According to an exemplary embodiment, a method for processing commands from a controller of an image forming apparatus by means of a chip on a replaceable supply article installed in the image forming apparatus includes receiving a write command from the controller of the image forming apparatus by the chip on the replaceable supply article. The chip on the replaceable supply article determines whether a transmission cycle bit of the received write command matches a transmission cycle bit of a previous write command received by the chip on the replaceable supply article from the controller of the image forming apparatus. If the transmission cycle bit of the received write command matches the transmission cycle bit of the previous write command, then when the chip on the replaceable supply article receives a read command corresponding to the received write command from the controller of the image forming apparatus, the chip on the replaceable supply article retransmits the response to the previous write command to the controller of the image forming apparatus.

[0006] According to an exemplary embodiment, a method for facilitating electrical communication between a controller of an image forming apparatus and a chip for use on a replaceable supply article of the image forming apparatus includes configuring the chip to operate as a slave node on an I2C communication bus, wherein the controller of the image forming apparatus acts as a master node on the I2C communication bus. The chip is configured to: receive a first write command from the controller of the image forming apparatus; determine whether a transmission cycle bit of the first write command matches a transmission cycle bit of a second write command received by the chip from the controller of the image forming apparatus prior to the first write command; and if the transmission cycle bit of the first write command matches the transmission cycle bit of the second write command, retransmit a response to the second write command to the controller of the image forming apparatus.

[0007] According to an exemplary embodiment, a toner container that can be installed in an image forming apparatus having a controller includes a housing having a reservoir for storing toner. A chip is positioned on the housing and configured to receive a first write command from the controller of the image forming apparatus. The chip is also configured to determine whether a transmission cycle bit of the first write command matches a transmission cycle bit of a second write command received by the chip from the controller of the image forming apparatus prior to the first write command. The chip is further configured to retransmit a response to the second write command to the controller of the image forming apparatus if the transmission cycle bit of the first write command matches the transmission cycle bit of the second write command.

[0008] According to an exemplary embodiment, a chip configured to communicate with a controller of an image forming apparatus and mountable on a replaceable supply article for installation in the image forming apparatus includes a processor and a memory. The memory stores program instructions for execution by the processor, the program instructions including instructions to: receive a first write command from the controller of the image forming apparatus; compare the value of a transmission cycle bit contained in the header of the first write command with the value of a transmission cycle bit contained in the header of a second write command received by the processor from the controller of the image forming apparatus prior to the first write command; and if the value of the transmission cycle bit contained in the header of the first write command is equal to the value of the transmission cycle bit contained in the header of the second write command, send a response to the controller of the image forming apparatus for the second write command without executing the first write command.

[0009] According to an exemplary embodiment, a chip for use on a replaceable supply article of an image forming apparatus includes processing circuitry configured to communicate as a slave node of an I2C communication bus with a controller of the image forming apparatus, which is a master node of the I2C communication bus. The processing circuitry is configured to receive a write command from the controller of the image forming apparatus, determine whether the transmission cycle bit of the received write command matches the transmission cycle bit of a previous write command received by the processing circuitry from the controller of the image forming apparatus, and if the transmission cycle bit of the received write command matches the transmission cycle bit of the previous write command, then, upon receiving a read command corresponding to the received write command from the controller of the image forming apparatus, retransmit the response to the previous write command to the controller of the image forming apparatus.

[0010] This application provides the following:

[0011] 1) A toner container that can be installed in an image forming apparatus having a controller, the toner container comprising:

[0012] A housing having a reservoir for storing toner; and

[0013] A chip, positioned on the housing and configured to receive a first write command from the controller of the image forming apparatus, the chip being further configured to determine whether a transmission cycle bit of the first write command matches a transmission cycle bit of a second write command received by the chip from the controller of the image forming apparatus prior to the first write command, and the chip being further configured to resend a response to the second write command to the controller of the image forming apparatus if the transmission cycle bit of the first write command matches the transmission cycle bit of the second write command.

[0014] 2) The toner container according to 1) further includes the chip configured to perform the following operations: execute the first write command, and if the transmission cycle bit of the first write command does not match the transmission cycle bit of the second write command, send a response to the first write command to the controller of the image forming apparatus.

[0015] 3) The toner container according to 1) further includes the chip configured to perform the following operations: if the transmission cycle bit of the first write command matches the transmission cycle bit of the second write command, then determine whether the command ID of the first write command matches the command ID of the second write command; and if the command ID of the first write command matches the command ID of the second write command, then perform the retransmission of the response to the second write command to the controller of the image forming apparatus.

[0016] 4) The toner container according to 3) further includes the chip configured to perform the following operation: if the command ID of the first write command does not match the command ID of the second write command, then send an error message to the controller of the image forming apparatus.

[0017] 5) The toner container according to 3), wherein the chip configured to determine whether the command ID of the first write command matches the command ID of the second write command includes the chip configured to perform the following operations: determining whether the command ID of the first write command indicates that the first write command is from the controller of the image forming apparatus, and requesting the chip to send a response to the most recent write command received by the chip from the controller of the image forming apparatus before the chip indicates a busy status to the controller of the image forming apparatus.

[0018] 6) A chip configured to communicate with a controller of an image forming apparatus and capable of being mounted on a replaceable supply article for installation in the image forming apparatus, the chip including a processor and a memory; the memory storing program instructions for execution by the processor, the program instructions including instructions to: receive a first write command from the controller of the image forming apparatus; compare a value of a transmission cycle bit included in the header of the first write command with a value of a transmission cycle bit included in the header of a second write command received by the processor from the controller of the image forming apparatus prior to the first write command; and if the value of the transmission cycle bit included in the header of the first write command is equal to the value of the transmission cycle bit included in the header of the second write command, send a response to the controller of the image forming apparatus to the second write command without executing the first write command.

[0019] 7) The chip according to 6) further includes the memory having instructions to perform the following operations: execute the first write command, and send a response to the first write command to the controller of the image forming apparatus if the value of the transmission period bit contained in the header of the first write command is not equal to the value of the transmission period bit contained in the header of the second write command.

[0020] 8) The chip according to 6) further includes the memory having instructions to perform the following operations: if the value of the transmission cycle bit included in the header of the first write command is equal to the value of the transmission cycle bit included in the header of the second write command, then compare the value of the command ID of the first write command with the value of the command ID of the second write command; and if the value of the command ID of the first write command is equal to the value of the command ID of the second write command, then perform the action of sending a response to the second write command to the controller of the image forming apparatus without performing the first write command.

[0021] 9) The chip according to 8) further includes the memory having instructions to perform the following operation: if the value of the command ID of the first write command is not equal to the value of the command ID of the second write command, then send an error message to the controller of the image forming apparatus.

[0022] 10) The chip according to 8), wherein the instruction to compare the value of the command ID of the first write command with the value of the command ID of the second write command includes instructions to perform the following operations: determining whether the value of the command ID of the first write command indicates that the first write command is from the controller of the image forming apparatus, and requesting the processor to send a response to the most recent write command received by the processor from the controller of the image forming apparatus before the processor indicates a busy status to the controller of the image forming apparatus.

[0023] 11) A chip for use on a replaceable supply article of an image forming apparatus, the chip including processing circuitry configured to communicate as a slave node of an I2C communication bus with a controller of the image forming apparatus as a master node of the I2C communication bus, the processing circuitry being configured to receive a write command from the controller of the image forming apparatus, determine whether a transmission cycle bit of the received write command matches a transmission cycle bit of a previous write command received by the processing circuitry from the controller of the image forming apparatus, and if the transmission cycle bit of the received write command matches the transmission cycle bit of the previous write command, then, when the processing circuitry receives a read command corresponding to the received write command from the controller of the image forming apparatus, retransmit a response to the previous write command to the controller of the image forming apparatus.

[0024] 12) The chip according to 11) further includes the processing circuitry configured to perform the following operations: execute the received write command, and if the transmission period bit of the received write command does not match the transmission period bit of the previous write command, send a response to the received write command to the controller of the image forming apparatus when a read command corresponding to the received write command is received from the controller of the image forming apparatus.

[0025] 13) The chip according to 11) further includes the processing circuitry configured to perform the following operations: if the transmission cycle bit of the received write command matches the transmission cycle bit of the previous write command, then determine whether the command ID of the received write command matches the command ID of the previous write command; and if the command ID of the received write command matches the command ID of the previous write command, then when a read command corresponding to the received write command is received from the controller of the image forming apparatus, execute the retransmission of the response to the previous write command to the controller of the image forming apparatus.

[0026] 14) The chip according to 13) further includes the processing circuitry configured to perform the following operation: if the command ID of the received write command does not match the command ID of the previous write command, then when the controller of the image forming apparatus receives the read command corresponding to the received write command from the controller of the image forming apparatus, an error message is sent to the controller of the image forming apparatus.

[0027] 15) The chip according to 13), wherein the processing circuit configured to determine whether the command ID of the received write command matches the command ID of the previous write command includes the processing circuit configured to perform the following operations: determining whether the command ID of the received write command indicates that the received write command is from the controller of the image forming apparatus, and requesting the processing circuit to send a request for a response to the most recent write command received by the processing circuit from the controller of the image forming apparatus before the processing circuit indicates a busy status to the controller of the image forming apparatus. Attached Figure Description

[0028] The accompanying drawings, which are incorporated in and form part of the specification, illustrate several aspects of this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0029] Figure 1 This is a schematic diagram of an image forming apparatus having one or more replaceable supply items according to an exemplary embodiment.

[0030] Figure 2 The block diagram depicts an image forming apparatus including a communication bus according to an exemplary embodiment, the communication bus allowing communication between a controller of the image forming apparatus and one or more supply chips.

[0031] Figure 3 This is a flowchart illustrating a method for issuing commands from the controller of an image forming apparatus to a supply chip according to an exemplary embodiment.

[0032] Figure 4 This is a flowchart illustrating a method for processing and responding to commands received by a supply chip from a controller, according to an exemplary embodiment.

[0033] Figure 5 This is a flowchart illustrating a method for processing and responding to commands received from the controller by the supply chip when a busy state occurs, according to an exemplary embodiment. Detailed Implementation

[0034] In the following description, reference is made to the accompanying drawings, wherein similar numerals represent similar elements. Embodiments have been described in sufficient detail to enable those skilled in the art to implement this disclosure. It will be understood that other embodiments may be utilized, and process, electrical, and mechanical changes, etc., may be made without departing from the scope of this disclosure. Examples represent only possible variations. Parts and features of some embodiments may be included in or replace parts and features of other embodiments. Therefore, the following description should not be construed in a limiting sense, and the scope of this disclosure is limited only by the appended claims and their equivalents.

[0035] Now refer to the attached diagram, and especially refer to... Figure 1 This illustration shows a schematic depiction of an image forming apparatus 10 according to an exemplary embodiment. The image forming apparatus 10 may include, for example, an electrophotographic printer (commonly referred to as a laser printer), which may include scanning, copying, or faxing functions. One or more supply items 100 are detachably mounted in the image forming apparatus 10, allowing a user to replace or repair the supply items 100 as needed to continue printing. For example, Figure 1A service door 12 on the image forming apparatus 10 is shown, which opens to allow a user to install or remove a supply item 100 from the image forming apparatus 100. In the exemplary embodiment shown, each supply item 100 includes a reservoir 102 formed within a housing 104 of the supply item 100 for holding a supply of toner for use by the image forming apparatus 10 in printing operations. However, the supply item 100 may include any components that require periodic replacement by the user, such as the color roller of an electrophotographic printer, a waste toner container for storing unused toner removed from the photoconductor drum or intermediate transfer member of an electrophotographic printer, etc.

[0036] Each supply item 100 includes a supply chip 110 mounted on a housing 104 of the supply item 100. When the supply item 100 is installed in the image forming apparatus 10, the supply chip 110 is electrically connected to electrical contacts on the supply item 100 positioned to mate with corresponding electrical contacts in the image forming apparatus 10, thereby allowing communication between the supply chip 110 and the controller 20 of the image forming apparatus 10. For example, the supply chip 110 of the supply item 100 and the controller 20 of the image forming apparatus 10 may exchange authentication or confirmation information to ensure that the supply item 100 is authorized and suitable for use in the image forming apparatus 10. The supply chip 110 of the supply item 100 and the controller 20 of the image forming apparatus 10 may exchange operational or usage information, such as initial toner filling level, indication of the toner color contained in the reservoir 102, ongoing toner supply level, consumption or usage rate, replacement schedule, or other information useful for the operation of the supply item 100 in the image forming apparatus 10.

[0037] Figure 2 A communication bus 30 is shown for an image forming apparatus 10 according to an exemplary embodiment, which facilitates communication between a controller 20 and a supply chip 110. Figure 2A supply item 100 and its associated supply chip 110 are shown in solid lines, while an additional supply item 100n and its associated supply chip 110n are shown in dashed lines, indicating that the additional supply item 100 with the supply chip 110 can be used as needed. In the exemplary embodiment shown, the communication bus 30 utilizes an inter-integrated circuit (I2C) protocol; however, other communication protocols may be used as needed. The controller 20 is configured to act as the master node of the communication bus 30, and each supply chip 110 is configured to act as a corresponding slave node. In the exemplary embodiment shown, the system chip 22 acts as an additional slave node of the communication bus 30. In this embodiment, the controller 20 and the system chip 22 are combined to form a control unit 24 of the image forming apparatus 10, which controls communication with the supply chips 110. In one embodiment, the system chip 22 facilitates encrypted communication between the controller 20 and the supply chips 110, wherein the controller 20 and the supply chips 110 cannot directly interpret messages from each other for security purposes. For example, before sending an encryption command to the supply chip 110, the controller 20 can send the command to the system chip 22. The system chip 22 can decrypt and reencrypt the command according to a format understood by the supply chip 110, and return the reencrypted command to the controller 20 for transmission to the supply chip 110. Similarly, upon receiving an encryption response from the supply chip 110, the controller 20 can send the response to the system chip 22. The system chip 22 can decrypt and reencrypt the response according to a format understood by the controller 20, and return the reencrypted response to the controller 20. The system chip 22 can also assist the controller 20 in the authentication and confirmation of the supply chip 110.

[0038] In the exemplary embodiment shown, the communication bus 30 includes a bidirectional data line 32 and a clock line 34. The bidirectional data line 32 transmits data back and forth between the controller 20 and the slave nodes, and the clock line 34 transmits a clock signal from the controller 20 to the slave nodes. Each slave node includes a corresponding address on the communication bus 30, which allows the controller 20 to direct communication to a specific slave node.

[0039] Controller 20, system chip 22, and supply chip 110 may each include a printed circuit board assembly having one or more processors and associated memories. The processors may include one or more integrated circuits in the form of a microprocessor or microcontroller. The memory may be any suitable combination of volatile and non-volatile memory (e.g., random access memory (RAM), read-only memory (ROM), read-write memory, flash memory, EEPROM, and / or non-volatile RAM (NVRAM)). For example, controller 20 may include non-volatile memory storing program instructions for issuing commands to slave nodes and for receiving and processing responses from slave nodes. Similarly, system chip 22 and supply chip 110 may each include non-volatile memory storing program instructions for receiving and processing commands from controller 20 and for responding to commands received from controller 20. It will also be appreciated that various aspects of controller 20, system chip 22, and supply chip 110 may be implemented in dedicated hardware using one or more application-specific integrated circuits (ASICs), such that the functionality of controller 20, system chip 22, and supply chip 110 can be implemented by hardware, software, or a combination thereof.

[0040] The controller 20, acting as the master node, is programmed to issue various write and read commands to slave nodes via the communication bus 30. For example, the controller 20 may issue commands to request authentication or verification certificates from slave nodes, instruct slave nodes to perform authentication or verification tests, request toner capacity or usage information from the supply chip 110, or store toner usage information in the supply chip 110, and so on. In one embodiment, each write command issued by the controller 20 is followed by a corresponding read command from the controller 20. The controller 20 initiates write and read commands by sending a start condition on the data line 32 of the communication bus 30, which includes the address of the expected slave node and a read / write bit set to represent the value of the write or read command. After initializing the write command, the controller 20 sends a data packet associated with the write command to the receiving slave node. After initializing the read command, the controller 20 sends a clock pulse to the receiving slave node on the clock line 34. The slave node is programmed to receive and process write commands from the controller 20 and send a response to the controller 20 upon receiving a corresponding read command.

[0041] Commands and responses sent by the master and slave nodes via communication bus 30 follow a specific data packet format that allows the receiving master or slave node to understand the commands and responses. For example, in one embodiment, each data packet includes a header that includes an indication of the length of the data being transmitted, encryption bits indicating whether the command or response is encrypted, and transmission period bits toggled for each new write command sent by controller 20, as discussed in more detail below. Each write command transmitted by the master node also includes a command ID, and each response transmitted by the slave node includes a response ID that allows the receiving slave or master node to identify the specific command or response being transmitted. Each data packet also includes data transmitted in the body of the data packet. In one embodiment, each data packet also includes a Cyclic Redundancy Check (CRC) value, as known in the art, that allows the receiving master or slave node to check the accuracy of the transmitted data.

[0042] Figure 3A method 300 for issuing a command from a controller 20, acting as a master node, to a supply chip 110, acting as a slave node, according to an exemplary embodiment, is shown. In step 301, the controller 20 sends a write command to the supply chip 110 via data line 32 of the communication bus 30 with a transmission cycle bit (tc) as the initial value (tc0). In step 302, the controller 20 sends a read command to the supply chip 110 via data line 32 of the communication bus 30 and receives a response from the supply chip 110 via data line 32 of the communication bus 30. In step 303, the controller 20 determines whether the response from the supply chip 110 indicates that the supply chip 110 has calculated a CRC error indicating an error occurred during the transmission of the write command from the controller 20 to the supply chip 110. If the response from supply chip 110 indicates that supply chip 110 has calculated a CRC error, then controller 20 resends the write command to supply chip 110 in step 301 with the transmission period bit (tc) as the initial value (tc0), and sends a read command to supply chip 110 and receives a response from supply chip 110 in step 302. Resending the write command to supply chip 110 with the transmission period bit (tc) as the initial value (tc0) signals to supply chip 110 that the received write command is a repetition of the previous write command and not a new write command. If the response from supply chip 110 indicates that supply chip 110 has not calculated a CRC error, then controller 20 determines in step 304 whether a CRC error indicating an error occurred in the transmission of the response from supply chip 110 to controller 20 exists in the response received from supply chip 110. If the controller 20 determines that a CRC error exists in the response, then in step 301, the controller 20 resends the write command to the supply chip 110 with the transmission cycle bit (tc) as the initial value (tc0), and in step 302, sends a read command to the supply chip 110 and receives a response from the supply chip 110. Again, resending the write command to the supply chip 110 with the transmission cycle bit (tc) as the initial value (tc0) signals to the supply chip 110 that the received write command is a repetition of the previous write command and not a new write command.

[0043] If controller 20 determines that no CRC error exists in the response, controller 20 determines in step 305 whether the response from supply chip 110 is encrypted. If the response from supply chip 110 is encrypted, controller 20 determines in step 306 that the command was successful and in step 307 switches the transmission cycle bit (tc) from the initial state (tc0) to the opposite state (tc1), that is, controller 20 switches the transmission cycle bit (tc) from binary zero state to binary one state, and vice versa. Switching the transmission cycle bit (tc) in step 307 allows the next write command sent by controller 20 to include a transmission cycle bit with an initial value opposite to the initial value (tc0) of the write command sent by controller 20 in step 301. In this way, whenever a new write command is signaled to supply chip 110 to notify that the received write command is a new write command to be executed, the transmission cycle bit (tc) switches back and forth between the binary zero state and the binary one state.

[0044] If the response from the supply chip 110 is not encrypted, the controller 20 determines in step 308 whether the response from the supply chip 110 indicates that the supply chip 110 is busy, indicating that the controller 20 sends a read command in step 302 before the supply chip 110 completes execution of sending the write command in step 301. If the response from the supply chip 110 indicates that the supply chip 110 is not busy, the controller 20 compares the command ID value of the write command sent in step 301 with the response ID value of the response received in step 302 in step 309. If the command ID value and the response ID value match, indicating that the response received by the controller 20 from the supply chip 110 is in response to the write command issued by the controller 20, the controller 20 determines that the command is successful in step 306, and switches the transmission cycle bit (tc) from the initial state (tc0) to the opposite state (tc1) in step 307. If the command ID value and the response ID value do not match, indicating that the response received by the controller 20 from the supply chip 110 is not responding to the write command issued by the controller 20, the controller 20 resets the supply chip 110 in step 310 in order to attempt to resolve the error.

[0045] In one embodiment, if the response from supply chip 110 in step 308 indicates that supply chip 110 is busy, controller 20 sends a "Get Response" command to supply chip 110 via data line 32 of communication bus 30 with a transmission cycle bit (tc) as the initial value (tc0). In the illustrated exemplary embodiment, the Get Response command is a dedicated command used only after a busy response is received from supply chip 110. The Get Response command instructs supply chip 110 to provide a response to the last write command received by supply chip 110 (not any previous Get Response command). This allows controller 20 to continuously poll supply chip 110 for a response as supply chip 110 continues to execute the write command in step 301, such that once supply chip 110 has finished executing the write command and is no longer busy, a response can be sent by supply chip 110. The Get Response command allows controller 20 to continuously request a response from supply chip 110 without having to resend the complete write command each time. The receive response command consists of a small data packet, and in this way, the receive response command is abbreviated relative to other write commands sent by controller 20 to supply chip 110. Therefore, sending the receive response command is generally more efficient than resending the original write command.

[0046] Figure 4 A method 400 is shown, according to an exemplary embodiment, for processing commands received by a supply chip 110, acting as a slave node, from a controller 20, acting as a master node, and for responding to those commands. In step 401, the supply chip 110 receives a write command from the controller 20 via data line 32 of the communication bus 30. n In step 402, the supply chip 110 determines whether a CRC error exists, indicating an error in the transmission of the write command from the controller 20 to the supply chip 110. If the supply chip 110 calculates a CRC error in step 402, then when it receives the write command corresponding to the one received in step 401 via the data line 32 of the communication bus 30... n When a read command is received in step 403, the supply chip 110 sends an error response to the controller 20 via the data line 32 of the communication bus 30, instructing the supply chip 110 to calculate a CRC error. If the supply chip 110 does not calculate a CRC error in step 402, then in step 404, the supply chip 110 determines the write command received in step 401. n The transmission period bits (tc) included in ) n The value of ) and the previous write command received by the supply chip 110 n-1 The transmission period bits (tc) included in ) n-1The values ​​of ) are the same. If the supply chip 110 determines the write command received in step 401, it will determine whether the values ​​are the same. n Transmission period bits (tc) n This is not equal to the previous write command received by the supply chip 110. n-1 Transmission period bits (tc) n-1 ), indicating the write command received in step 401. n If ) is a new write command to be executed, then in step 405, the chip 110 is supplied with the write command received in step 401 to execute. n In step 406, when a write command corresponding to the one received in step 401 is received... n When a read command is received in step 401, the supply chip 110 sends a response via the data line 32 of the communication bus 30, indicating the response to the write command received in step 401. n The completion of ).

[0047] On the other hand, if the supply chip 110 determines the write command received in step 401... n Transmission period bits (tc) n This is equivalent to the previous write command received by the supply chip 110. n-1 Transmission period bits (tc) n-1 If the chip 110 determines the write command received in step 401 in step 407, then the chip 110 will determine the write command received in step 401 in step 407. n The command ID value contained in the command is the same as the previous write command received by the supply chip 110. n-1 The command ID values ​​contained in the command are the same. In the exemplary embodiment shown, if the supply chip 110 determines that the write command received in step 401 is the same, the command ID value is the same. n The command ID is not equal to the previous command received by the supply chip 110. n-1 If the command ID is obtained, the chip will determine the write command received in step 401 in step 408. n Does the command ID value contained in the command indicate a write command? n The command to receive a response is sent by the controller 20 after the busy response from the supply chip 110, as discussed above. If the supply chip 110 determines that a write command (Command) is needed... n If a response command is received, the supply to chip 110 will continue. Figure 5Method 500 is shown until the busy state is resolved, as discussed in more detail below. If the supply chip 110 determines a write command... n If it is not a response command, then upon receiving the write command corresponding to the one received in step 401... n When the read command is received, the supply chip 110 sends an error response to the controller 20 through the data line 32 of the communication bus 30 in step 403 due to the inconsistency of the command ID.

[0048] If the supply chip 110 determines that the write command received in step 401 is... n The command ID is equal to the previous command received by the supply chip 110. n-1 If the command ID is not specified, then the chip 110 will not execute the write command received in step 401. n However, alternatively, when a write command corresponding to the one received in step 401 is received... n When a read command is received, the supply chip 110 simply transmits the previous write command (Command) via the data line 32 of the communication bus 30 in step 409. n-1 The response is resent to controller 20. In this way, the transmission cycle bit signals the supply chip 110 to notify it of the write command received in step 401. n Is it a new write command to be executed or a previous write command? n-1 The repetition of the write command received in step 401 is performed by the supply chip 110. n ) is the previous command (Command) n-1 The ability to identify duplicate write commands is achieved by allowing the supply chip 110 to easily resend the previous write command. n-1 The response does not execute the write command again. n This improves the efficiency of the supply chip 110. The supply chip 110 processes the write command received in step 401. n ) is the previous command (Command) n-1 The repeated identification also prevents the supply chip 110 from executing a write command. n-1,n If the error occurs twice instead of once as expected by controller 20, it may be a possible error.

[0049] If a write command is received in step 401 n At any time after that, once the supply chip 110 has completed processing the write command,n If, before or during the execution of steps 402, 404, 405, 407, or 408, the supply chip 110 receives a corresponding read command, then the supply chip 110 can send a busy response to the controller 20 via the data line 32 of the communication bus 30. As discussed above, receiving a busy response from the supply chip 110 can cause the controller 20 to send a receive response command to the supply chip 110.

[0050] Figure 5 A method 500 is illustrated, according to an exemplary embodiment, for processing and responding to commands received by the supply chip 110 (as a slave node) from the controller 20 (as a master node) after the supply chip 110 sends a busy response to the controller 20. In step 501, after previously sending a busy response to the controller 20, the supply chip 110 receives a get-response command from the controller 20 via data line 32 of the communication bus 30. If, when the supply chip 110 receives a read command corresponding to the get-response command from the controller 20 in step 502, it is still busy processing a recent write command (before receiving one or more get-response commands), the supply chip 110 again sends a busy response to the controller 20 via data line 32 of the communication bus 30 in step 503. The supply chip 110 may continue to receive additional get-response commands and send busy responses until the supply chip completes processing the recent write command from the controller 20. Once the supply chip 110 has completed processing the most recent write command in step 502, when a read command is received from the controller 20, the supply chip 110 sends a response to the most recent write command received from the controller 20. In this way, obtaining a response command explains the busy state of the supply chip 110, allowing the controller 20 to continuously request responses from the supply chip 110 without having to resend the complete write command each time.

[0051] Although the above is about Figure 3 The exemplary embodiments discussed include commands being issued from the controller 20, acting as the master node, to the supply chip 110, acting as the slave node, but in Figure 3 The commands discussed above can alternatively be issued by the controller 20, acting as the master node, to the system chip 22, acting as the slave node. Similarly, although the above... Figure 4 and Figure 5 The exemplary embodiments discussed include processing commands received by the supply chip 110, acting as a slave node, from the controller 20, acting as a master node, and responding to the commands, but in Figure 4 and Figure 5 The commands discussed herein can alternatively be received and processed by the system chip 22, which acts as a slave node, from the controller 20, which acts as a master node.

[0052] The exemplary embodiments discussed above include communication between the controller 20 of the electrophotographic image forming apparatus 10 and the supply chip 110 of the supply article 100 installed in the image forming apparatus 10. The electrophotographic printing process is well known in the art and is therefore briefly described herein. During printing operation, a charging roller charges the surface of a photoconductor drum. The charged surface of the photoconductor drum is then selectively exposed to a laser source to form an electrostatic latent image on the photoconductor drum corresponding to the image being printed. Charged toner from the toner reservoir is transferred by a developing roller to the latent image on the photoconductor drum, producing a toned image. The toned image is then transferred directly from the photoconductor drum to the printing medium, either directly or indirectly by an intermediate transfer member. A fixing unit fixes the toner onto the printing medium. After the toner has been transferred to the printing medium, a cleaning blade (or cleaning roller) removes any residual toner adhering to the photoconductor drum. The cleaned surface of the photoconductor drum is then ready to be recharged and exposed to a laser source to continue the printing cycle.

[0053] The foregoing description illustrates various aspects of this disclosure. It is not intended to be exhaustive. Rather, it is chosen to illustrate the principles of this disclosure and its practical application, enabling those skilled in the art to utilize it, including the various modifications that naturally accompany it. All modifications and variations are contemplated within the scope of this disclosure as defined by the appended claims. Relatively obvious modifications include combining one or more features of various embodiments with features of other embodiments.

[0054] Other embodiments

[0055] In the following sections, further embodiments of the invention will be described. In the first set of embodiments one through fifteen, a toner container that can be mounted in an image forming apparatus having a controller according to an example embodiment is described, comprising a housing having a reservoir for storing toner. A chip is positioned on the housing and configured to receive a first write command from the controller of the image forming apparatus. The chip is also configured to determine whether a transmission cycle bit of the first write command matches a transmission cycle bit of a second write command received by the chip from the controller of the image forming apparatus prior to the first write command. The chip is further configured to retransmit a response to the second write command to the controller of the image forming apparatus if the transmission cycle bit of the first write command matches the transmission cycle bit of the second write command.

[0056] In the second set of embodiments sixteen to twenty-three, a toner container mountable in an image forming apparatus having a controller according to an example embodiment includes a housing having a reservoir for storing toner. A chip is positioned on the housing and configured to receive a second write command from the controller of the image forming apparatus after sending a first busy response to the controller, the second write command being smaller than the first write command received from the controller of the image forming apparatus, and the second write command requesting the chip to send a response to the first write command. The chip is also configured to send a response to the first write command to the controller of the image forming apparatus if the chip has completed processing the first write command when a read command corresponding to the second write command is received. Methods relating thereto are also disclosed.

[0057] In a first embodiment, a method for electrical communication between a slave node of an I2C communication bus located on a replaceable supply item mounted in an image forming apparatus and a controller of the image forming apparatus acting as the master node of the I2C communication bus is disclosed. The method includes: the slave node on the replaceable supply item receiving a first write command from the controller of the image forming apparatus; comparing the value of a transmission period bit contained in the header of the first write command by the slave node on the replaceable supply item with the value of a transmission period bit contained in the header of a second write command received by the slave node on the replaceable supply item from the controller of the image forming apparatus prior to the first write command; and if the value of the transmission period bit contained in the header of the first write command is equal to the value of the transmission period bit contained in the header of the second write command, then the slave node on the replaceable supply item sending a response to the second write command to the controller of the image forming apparatus without executing the first write command.

[0058] A second embodiment employing the method of the first embodiment is disclosed, which further includes: if the value of the transmission period bit contained in the header of the first write command is not equal to the value of the transmission period bit contained in the header of the second write command, then the slave node on the replaceable supply item executes the first write command, and the slave node on the replaceable supply item sends a response to the first write command to the controller of the image forming apparatus.

[0059] A third embodiment of the method employing the first embodiment is disclosed, further comprising: if the value of the transmission period bit contained in the header of the first write command is equal to the value of the transmission period bit contained in the header of the second write command, then the slave node on the replaceable supply item compares the value of the command ID of the first write command with the value of the command ID of the second write command; and if the value of the command ID of the first write command is equal to the value of the command ID of the second write command, then the slave node on the replaceable supply item sends a response to the second write command to the controller of the image forming apparatus without executing the first command.

[0060] A fourth embodiment of the method employing the third embodiment is disclosed, which further includes sending an error message from the slave node on the replaceable supply item to the controller of the image forming apparatus if the value of the command ID of the first write command is not equal to the value of the command ID of the second write command.

[0061] A fifth embodiment of the method employing the third embodiment is disclosed, wherein comparing the value of the command ID of the first write command with the value of the command ID of the second write command by the slave node on the replaceable supply item includes: determining by the slave node on the replaceable supply item whether the value of the command ID of the first write command indicates that the first write command is a request from the controller of the image forming apparatus, the request being used to cause the slave node on the replaceable supply item to send a response to the most recent write command received by the slave node on the replaceable supply item from the controller of the image forming apparatus before the slave node on the replaceable supply item indicates a busy status to the controller of the image forming apparatus.

[0062] In a sixth embodiment, a method is disclosed for processing commands from a controller of an image forming apparatus via a chip on a replaceable supply item installed in the image forming apparatus. The method includes: receiving a write command from the controller of the image forming apparatus by the chip on the replaceable supply item; determining whether a transmission cycle bit of the received write command matches a transmission cycle bit of a previous write command received by the chip on the replaceable supply item from the controller of the image forming apparatus; and if the transmission cycle bit of the received write command matches the transmission cycle bit of the previous write command, then when the chip on the replaceable supply item receives a read command corresponding to the received write command from the controller of the image forming apparatus, retransmitting a response to the previous write command to the controller of the image forming apparatus.

[0063] A seventh embodiment of the method employing the sixth embodiment is disclosed, which further includes: if the transmission cycle bit of the received write command does not match the transmission cycle bit of the previous write command, the chip on the replaceable supply item executes the received write command; and when the chip on the replaceable supply item receives a read command corresponding to the received write command from the controller of the image forming apparatus, the chip on the replaceable supply item sends a response to the received write command to the controller of the image forming apparatus.

[0064] An eighth embodiment of the method employing the sixth embodiment is disclosed, further comprising: if the transmission cycle bit of the received write command matches the transmission cycle bit of the previous write command, then the chip on the replaceable supply item determines whether the command ID of the received write command matches the command ID of the previous write command; and if the command ID of the received write command matches the command ID of the previous write command, then when the chip on the replaceable supply item receives the read command corresponding to the received write command from the controller of the image forming apparatus, the chip on the replaceable supply item retransmits the response to the previous write command to the controller of the image forming apparatus.

[0065] A ninth embodiment of the method employing the eighth embodiment is disclosed, which further includes, if the command ID of the received write command does not match the command ID of the previous write command, then when the chip on the replaceable supply item receives the read command corresponding to the received write command from the controller of the image forming apparatus, an error message is sent by the chip on the replaceable supply item to the controller of the image forming apparatus.

[0066] A tenth embodiment of the method employing the eighth embodiment is disclosed, wherein determining whether the command ID of the received write command matches the command ID of the previous write command by the chip on the replaceable supply item includes: determining whether the command ID of the received write command indicates that the received write command is a request from the controller of the image forming apparatus, the request being used to cause the chip on the replaceable supply item to send a response to the most recent write command received by the chip on the replaceable supply item from the controller of the image forming apparatus before the chip on the replaceable supply item indicates a busy status to the controller of the image forming apparatus.

[0067] In an eleventh embodiment, a method is disclosed that facilitates electrical communication between a controller of an image forming apparatus and a chip for use on a replaceable supply article of the image forming apparatus. The method includes: configuring the chip to operate as a slave node on an I2C communication bus, wherein the controller of the image forming apparatus serves as a master node on the I2C communication bus; and configuring the chip to receive a first write command from the controller of the image forming apparatus, determining whether a transmission cycle bit of the first write command matches a transmission cycle bit of a second write command received by the chip from the controller of the image forming apparatus prior to the first write command, and if the transmission cycle bit of the first write command matches the transmission cycle bit of the second write command, retransmitting a response to the second write command to the controller of the image forming apparatus.

[0068] A twelfth embodiment of the method employing the eleventh embodiment is disclosed, which further includes configuring the chip to execute the first write command, and sending a response to the first write command to the controller of the image forming apparatus if the transmission cycle bit of the first write command does not match the transmission cycle bit of the second write command.

[0069] A thirteenth embodiment of the method employing the eleventh embodiment is disclosed, further comprising configuring the chip to: determine whether the command ID of the first write command matches the command ID of the second write command if the transmission cycle bit of the first write command matches the transmission cycle bit of the second write command, and execute the retransmission of the response to the second write command to the controller of the image forming apparatus if the command ID of the first write command matches the command ID of the second write command.

[0070] A fourteenth embodiment employing the method of the thirteenth embodiment is disclosed, which further includes configuring the chip to send an error message to the controller of the image forming apparatus if the command ID of the first write command does not match the command ID of the second write command.

[0071] A fifteenth embodiment of the method employing the thirteenth embodiment is disclosed, wherein configuring the chip to determine whether the command ID of the first write command matches the command ID of the second write command includes: configuring the chip to determine whether the command ID of the first write command indicates that the first write command is a request from the controller of the image forming apparatus, the request being used to cause the chip to send a response to the most recent write command received by the chip from the controller of the image forming apparatus before the chip indicates a busy status to the controller of the image forming apparatus.

[0072] In a sixteenth embodiment, a toner container that can be installed in an image forming apparatus having a controller is disclosed. The toner container includes: a housing having a reservoir for storing toner; and a chip positioned on the housing and configured to receive a first write command from the controller of the image forming apparatus. The chip is further configured to send a first busy response to the controller of the image forming apparatus upon receiving a first read command corresponding to the first write command while processing the first write command. The chip is also configured to receive a second write command from the controller of the image forming apparatus after sending the first busy response. The second write command is smaller than the first write command and requests the chip to send a response to the first write command. The chip is further configured to send a response to the first write command to the controller of the image forming apparatus if the chip has completed processing the first write command when receiving the second read command corresponding to the second write command. The chip is also configured to send a second busy response to the controller of the image forming apparatus if the chip has not completed processing the first write command when receiving the second read command.

[0073] In the seventeenth embodiment, a chip configured to communicate with a controller of an image forming apparatus and mountable on a replaceable supply article for installation in the image forming apparatus is disclosed. The chip includes a processor and a memory. The memory stores program instructions for execution by the processor, the program instructions including instructions to: receive a first write command from the controller of the image forming apparatus; upon receiving a first read command corresponding to the first write command while processing the first write command, send a first busy response to the controller of the image forming apparatus; after sending the first busy response, receive a second write command from the controller of the image forming apparatus, the second write command being smaller than the first write command, and the second write command requesting the chip to send a response to the first write command; if the processor has completed processing the first write command when receiving the second read command corresponding to the second write command, send a response to the first write command to the controller of the image forming apparatus; and if the processor has not completed processing the first write command when receiving the second read command, send a second busy response to the controller of the image forming apparatus.

[0074] In the eighteenth embodiment, a chip used on a replaceable supply article of an image forming apparatus is disclosed. The chip includes processing circuitry configured to communicate as a slave node of an I2C communication bus with a controller of the image forming apparatus as a master node of the I2C communication bus. The processing circuitry is configured to: after sending a first busy response to the controller of the image forming apparatus while processing a first write command received from the controller of the image forming apparatus, receive a second write command from the controller of the image forming apparatus, the second write command having less data than the first write command and requesting the chip on the replaceable supply article to send a response to the first write command. The processing circuitry is configured to send a response to the first write command to the controller of the image forming apparatus if the processing circuitry no longer processes the first write command when receiving a read command corresponding to the second write command.

[0075] A nineteenth embodiment employing the chip of the eighteenth embodiment is disclosed, which further includes a processing circuit configured to send a second busy response to the controller of the image forming apparatus if the processing circuit is still processing the first write command when a read command corresponding to the second write command is received.

[0076] In a twentieth embodiment, a method is disclosed for a chip mounted on a replaceable supply article in an image forming apparatus to process commands from a controller of the image forming apparatus. The method includes: after the chip on the replaceable supply article sends a first busy response to the controller of the image forming apparatus while processing a first write command received by the chip on the replaceable supply article from the controller of the image forming apparatus, the chip on the replaceable supply article receives a second write command from the controller of the image forming apparatus, the second write command having less data than the first write command and requesting the chip on the replaceable supply article to send a response to the first write command; and if the chip on the replaceable supply article no longer processes the first write command upon receiving a read command corresponding to the second write command, the chip on the replaceable supply article sends a response to the first write command to the controller of the imaging apparatus.

[0077] A twenty-first embodiment of the method employing the twenty-first embodiment is disclosed, which further includes: if the chip on the replaceable supply article is still processing the first write command when a read command corresponding to the second write command is received, the chip on the replaceable supply article sends a second busy response to the controller of the image forming apparatus.

[0078] In the twenty-second embodiment, a method for electrical communication between a slave node of an I2C communication bus positioned on a replaceable supply item installed in an image forming apparatus and a controller of the image forming apparatus, which is the master node of the I2C communication bus, is disclosed. The method includes: the slave node on the replaceable supply item receiving a first write command from the controller of the image forming apparatus; while processing the first write command, the slave node on the replaceable supply item receiving a first read command corresponding to the first write command from the controller of the image forming apparatus, and the slave node on the replaceable supply item sending a first busy response to the controller of the image forming apparatus; after sending the first busy response, the slave node on the replaceable supply item receiving a second write command from the controller of the image forming apparatus, the second write command being smaller than the first write command, and the second write command requesting the slave node on the replaceable supply item to send a response to the first write command; if the slave node on the replaceable supply item has completed processing the first write command when receiving the second read command corresponding to the second write command, the slave node on the replaceable supply item sending a response to the first write command to the controller of the image forming apparatus; otherwise, the slave node on the replaceable supply item sending a second busy response to the controller of the image forming apparatus.

[0079] In the twenty-third embodiment, a method for facilitating electrical communication between a controller of an image forming apparatus and a chip for use on a replaceable supply article of the image forming apparatus is disclosed. The method includes: configuring the chip to operate as a slave node on an I2C communication bus, wherein the controller of the image forming apparatus acts as a master node on the I2C communication bus; configuring the chip to receive a first write command from the controller of the image forming apparatus; sending a first busy response to the controller of the image forming apparatus when receiving a first read command corresponding to the first write command while processing the first write command; receiving a second write command from the controller of the image forming apparatus after sending the first busy response, the second write command being smaller than the first write command and requesting the chip to send a response to the first write command; sending a response to the first write command to the controller of the image forming apparatus if the chip has completed processing the first write command when receiving the second read command corresponding to the second write command; and sending a second busy response to the controller of the image forming apparatus if the chip has not completed processing the first write command when receiving the second read command.

Claims

1. A method for processing commands from a controller of an image forming apparatus via a chip on a replaceable supply article mounted in the image forming apparatus, the method comprising: The chip on the replaceable supply item receives a write command from the controller of the image forming apparatus. The chip on the replaceable supply item determines whether the transmission cycle bit of the received write command matches the transmission cycle bit of the previous write command received by the chip on the replaceable supply item from the controller of the image forming apparatus; and If the transmission cycle bit of the received write command matches the transmission cycle bit of the previous write command, then when the chip on the replaceable supply item receives a read command corresponding to the received write command from the controller of the image forming apparatus, the chip on the replaceable supply item resends the response to the previous write command to the controller of the image forming apparatus.

2. The method according to claim 1, further comprising: if the transmission cycle bit of the received write command does not match the transmission cycle bit of the previous write command, the chip on the replaceable supply item executes the received write command; and when the chip on the replaceable supply item receives a read command corresponding to the received write command from the controller of the image forming apparatus, the chip on the replaceable supply item sends a response to the received write command to the controller of the image forming apparatus.

3. The method according to claim 1, further comprising: If the transmission cycle bit of the received write command matches the transmission cycle bit of the previous write command, then the chip on the replaceable supply item determines whether the command ID of the received write command matches the command ID of the previous write command. as well as If the command ID of the received write command matches the command ID of the previous write command, then when the chip on the replaceable supply item receives the read command corresponding to the received write command from the controller of the image forming apparatus, the chip on the replaceable supply item retransmits the response to the previous write command to the controller of the image forming apparatus.

4. The method of claim 3, further comprising: if the command ID of the received write command does not match the command ID of the previous write command, then when the chip on the replaceable supply item receives the read command corresponding to the received write command from the controller of the image forming apparatus, the chip on the replaceable supply item sends an error message to the controller of the image forming apparatus.

5. The method according to claim 3, wherein, Determining whether the command ID of the received write command matches the command ID of the previous write command by the chip on the replaceable supply item includes: determining whether the command ID of the received write command indicates that the received write command is a request from the controller of the image forming apparatus, the request being used to cause the chip on the replaceable supply item to send a response to the most recent write command received by the chip on the replaceable supply item from the controller of the image forming apparatus before the chip on the replaceable supply item indicates a busy status to the controller of the image forming apparatus.

6. A method for facilitating electrical communication between a controller of an image forming apparatus and a chip for use on a replaceable supply article of the image forming apparatus by configuring a chip to execute processing commands according to claim 1, the method for facilitating electrical communication comprising: The chip is configured to operate as a slave node on an I2C communication bus, wherein the controller of the image forming apparatus serves as a master node on the I2C communication bus; and The chip is configured to receive a write command from the controller of the image forming apparatus, determine whether the transmission cycle bit of the received write command matches the transmission cycle bit of a previous write command received by the chip from the controller of the image forming apparatus prior to the received write command, and if the transmission cycle bit of the received write command matches the transmission cycle bit of the previous write command, then resend the response to the previous write command to the controller of the image forming apparatus.

7. The method of claim 6, further comprising configuring the chip to execute the received write command, and sending a response to the received write command to the controller of the image forming apparatus if the transmission cycle bit of the received write command does not match the transmission cycle bit of the previous write command.

8. The method of claim 6, further comprising configuring the chip to: if the transmission cycle bit of the received write command matches the transmission cycle bit of the previous write command, determine whether the command ID of the received write command matches the command ID of the previous write command; and if the command ID of the received write command matches the command ID of the previous write command, execute the retransmission of the response to the previous write command to the controller of the image forming apparatus.

9. The method of claim 8, further comprising configuring the chip to: send an error message to the controller of the image forming apparatus if the command ID of the received write command does not match the command ID of the previous write command.

10. The method according to claim 8, wherein, Configuring the chip to determine whether the command ID of the received write command matches the command ID of the previous write command includes: configuring the chip to determine whether the command ID of the received write command indicates that the received write command is a request from the controller of the image forming apparatus, the request being used to cause the chip to send a response to the most recent write command received by the chip from the controller of the image forming apparatus before the chip indicates a busy status to the controller of the image forming apparatus.

11. A method of electrical communication between a slave node of an I2C communication bus positioned on a replaceable supply article mounted in an image forming apparatus and a controller of the image forming apparatus acting as the master node of the I2C communication bus, wherein, The slave node is a chip on the replaceable supply item, and the method includes processing commands from the controller of the image forming apparatus via the chip on the replaceable supply item installed in the image forming apparatus, according to claim 1, wherein retransmitting the response to the previously written command includes: The slave node on the replaceable supply item sends a response to the controller of the image forming apparatus in response to the previous write command without executing the received write command.

12. The method of claim 11, further comprising: if the value of the transmission period bit contained in the header of the received write command is not equal to the value of the transmission period bit contained in the header of the previous write command, then the slave node on the replaceable supply item executes the received write command, and the slave node on the replaceable supply item sends a response to the received write command to the controller of the image forming apparatus.

13. The method of claim 11, further comprising: If the value of the transmission cycle bit in the header of the received write command is equal to the value of the transmission cycle bit in the header of the previous write command, then the slave node on the replaceable supply item compares the value of the command ID of the received write command with the value of the command ID of the previous write command. as well as If the value of the command ID of the received write command is equal to the value of the command ID of the previous write command, then the response to the previous write command sent by the slave node on the replaceable supply item to the controller of the image forming apparatus is executed without executing the received write command.

14. The method of claim 13, further comprising: if the value of the command ID of the received write command is not equal to the value of the command ID of the previous write command, then the slave node on the replaceable supply item sends an error message to the controller of the image forming apparatus.

15. The method according to claim 13, wherein, The comparison of the command ID value of the received write command by the slave node on the replaceable supply item with the command ID value of the previous write command includes: determining by the slave node on the replaceable supply item whether the command ID value of the received write command indicates that the received write command is a request from the controller of the image forming apparatus, the request being used to cause the slave node on the replaceable supply item to send a response to the most recent write command received by the slave node on the replaceable supply item from the controller of the image forming apparatus before the slave node on the replaceable supply item indicates a busy status to the controller of the image forming apparatus.

Images