Flexible cabling for low-temperature applications

Abstract

The subject matter of this disclosure can be embodied in an apparatus such as flexible wiring, comprising: a first flexible wiring including a first elongated flexible substrate having a first electromagnetic shielding fold region and a first plurality of conductive traces disposed on a first side of the first elongated flexible substrate, wherein the first electromagnetic shielding fold region provides electromagnetic shielding between the first conductive traces and second conductive traces of the first plurality of conductive traces; and a second flexible wiring including a second elongated flexible substrate having a second electromagnetic shielding fold region and a second plurality of conductive traces disposed on a first side of the second elongated flexible substrate, wherein the second electromagnetic shielding fold region provides electromagnetic shielding between the first conductive traces and second conductive traces of the second plurality of conductive traces, and wherein the first flexible wiring is incorporated into the second flexible wiring.

Description

[0001] This application is a divisional application of the patent application filed on September 7, 2017, with application number 201780089085.7 and invention title "Flexible wiring for low-temperature applications". Technical Field

[0002] This disclosure relates to flexible wiring for cryogenic applications, such as quantum processors using superconducting qubits. Background Technology

[0003] Quantum computing is a relatively new method of computation that utilizes quantum effects (such as the superposition of ground states and entanglement) to perform certain computations more efficiently than traditional digital computers. Unlike digital computers, which store and manipulate information in bits (e.g., "1" or "0"), quantum computing systems can manipulate information using qubits. A qubit can refer to a quantum device capable of realizing a superposition of multiple states (e.g., data in both "0" and "1" states) and / or a superposition of data itself in multiple states. In conventional terminology, the superposition of "0" and "1" states in a quantum system can be represented, for example, as α|0>+β|1>. The "0" and "1" states of a digital computer are analogous to the |0> and |1> ground states of a qubit, respectively. Value |α| 2 This represents the probability that a qubit is in the |0> state, while the value |β| represents the probability that the qubit is in the |0> state. 2 This represents the probability that the qubit is in the |1> ground state. Summary of the Invention

[0004] Generally, in some aspects, the subject matter of this disclosure can be embodied in devices such as flexible wiring, which include: an elongated flexible substrate; a plurality of conductive traces arranged in an array on a first side of the elongated flexible substrate; and an electromagnetic shielding layer on a second side of the elongated flexible substrate, the second side being opposite to the first side, wherein the elongated flexible substrate includes a folded region between the first conductive trace and the second conductive trace, such that the electromagnetic shielding layer provides electromagnetic shielding between the first conductive trace and the second conductive trace.

[0005] Embodiments of the device may include one or more of the following features. For example, in some embodiments, the folded region includes a raised strip in the flexible substrate, and the length of the elongated raised strip extends parallel to the lengths of the first conductive trace and the second conductive trace.

[0006] In some embodiments, the flexible substrate includes a first elongated groove in the folded region, and the length of the first elongated groove extends parallel to the length of the first conductive trace and the length of the second conductive trace.

[0007] The first elongated groove may extend into either the first or second side of the elongated flexible substrate. The flexible wiring may include a second elongated groove in the folded region, wherein the length of the second elongated groove extends parallel to the lengths of the first and second conductive traces, and wherein the first elongated groove is on the first side of the substrate, and the second elongated groove is on the second side of the substrate. The first elongated groove may extend into the electromagnetic shielding layer. The first elongated groove may extend into the elongated flexible substrate.

[0008] In some embodiments, at least one of the plurality of conductive traces comprises a double layer, the double layer comprising a superconducting layer and a metal layer on the superconducting layer. The superconducting layer may comprise niobium or NbTi. The metal layer may comprise copper or a copper alloy.

[0009] In some embodiments, the electromagnetic shielding layer comprises a double layer, the double layer comprising a superconducting layer and a metal layer on the superconducting layer. The superconducting layer may include niobium. The metal layer may include copper or a copper alloy.

[0010] In some embodiments, the electromagnetic shielding layer includes a plurality of microstrips, the length of which is orthogonal to the length of the plurality of conductive traces.

[0011] Generally, in some aspects, the subject matter of this disclosure can be embodied in devices such as flexible wiring, which include: a first elongated flexible layer; a second elongated flexible layer bonded to the first elongated flexible layer; a plurality of conductive traces arranged at the bonding interface between the first elongated flexible layer and the second elongated flexible layer; a first electromagnetic shielding layer on the main surface of the first elongated flexible layer; a second electromagnetic shielding layer on the main surface of the second elongated flexible layer; and a via extending through the first elongated flexible layer, wherein the via includes a superconducting via contact.

[0012] Implementations of the flexible wiring may include one or more of the following features. For example, in some implementations, the via includes an adhesive layer on which the superconducting via contact is formed.

[0013] In some embodiments, the via extends from the first electromagnetic shielding layer to at least one of the plurality of conductive traces, and the superconducting via contact is connected to the first electromagnetic shielding layer and the at least one conductive trace.

[0014] In some embodiments, the via extends from the first electromagnetic shielding layer to the second electromagnetic shielding layer, and the superconducting via contact is connected to the first electromagnetic shielding layer and the at least one conductive trace.

[0015] Generally, in other respects, the subject matter of this disclosure can be embodied in an apparatus comprising: a first flexible wiring comprising a first elongated flexible substrate, a first plurality of conductive traces arranged in an array on a first side of the first elongated flexible substrate, and a first electromagnetic shielding layer on a second side of the first elongated flexible substrate, the second side of the first elongated flexible substrate being opposite to the first side of the first elongated flexible substrate; and a second flexible wiring comprising a second elongated flexible substrate, a second plurality of conductive traces arranged in an array on a first side of the second elongated flexible substrate, and a second electromagnetic shielding layer on a second side of the second elongated flexible substrate, the second side of the second elongated flexible substrate being opposite to the first side of the second elongated flexible substrate, wherein the first flexible wiring is connected to the second flexible wiring via a mating connector.

[0016] Embodiments of the device may include one or more of the following features. In some embodiments, the mating connector includes wire bonding that connects a first conductive trace from the first plurality of conductive traces to a first conductive trace from the second plurality of conductive traces.

[0017] In some embodiments, the mating joint includes a solder bridge that connects a first conductive trace from the first plurality of conductive traces to a first conductive trace from the second plurality of conductive traces.

[0018] In some embodiments, the device includes a metal block fixed to and in thermal contact with the first electromagnetic shielding layer, and the metal block fixed to the second electromagnetic shielding layer.

[0019] Generally, in other respects, the subject matter of this disclosure can be embodied in an apparatus comprising: a first flexible wiring comprising a first elongated flexible substrate, a first plurality of conductive traces disposed at a bonding interface within the first elongated flexible substrate, a first electromagnetic shielding layer on a first main surface of the first elongated flexible substrate, and a second electromagnetic shielding layer on a second main surface of the first elongated flexible substrate; and a second flexible wiring comprising a second elongated flexible substrate, a second plurality of conductive traces disposed at a bonding interface within the second elongated flexible substrate, a third electromagnetic shielding layer on a first main surface of the second elongated flexible substrate, and a fourth electromagnetic shielding layer on a second main surface of the second elongated flexible substrate, wherein the first flexible wiring is electrically connected to the second flexible wiring via a mating connector.

[0020] Implementations of the device may include one or more of the following features. For example, in some embodiments, the first elongated flexible substrate includes a first cavity through which a first conductive trace of the first plurality of conductive traces is exposed, and the second elongated flexible substrate includes a second cavity through which a first conductive trace of the second plurality of conductive traces is exposed. The mating connector includes wire bonding that connects the exposed first conductive trace of the first plurality of conductive traces to the exposed first conductive trace of the second plurality of conductive traces.

[0021] In some embodiments, the mating joint includes a solder bridge that connects an exposed first conductive trace in one of the first plurality of conductive traces to an exposed first conductive trace in one of the second plurality of conductive traces.

[0022] In some embodiments, the device further includes a first metal block fixed to and in thermal contact with the first electromagnetic shielding layer, and the first metal block fixed to the third electromagnetic shielding layer. The device also includes a second metal block fixed to and in thermal contact with the second electromagnetic shielding layer, and the second metal block fixed to the fourth electromagnetic shielding layer.

[0023] Generally, in other respects, the subject matter of this disclosure can be embodied in a system comprising: a cryostat including a first stage configured to be maintained within a first temperature range; a quantum information processing system within the first stage; and flexible wiring connected in parallel to the quantum information processing system within the first stage, wherein the flexible wiring includes an elongated flexible substrate, a plurality of conductive traces arranged in an array on a first side of the elongated flexible substrate, and an electromagnetic shielding layer on a second side of the elongated flexible substrate opposite to the first side, wherein the elongated flexible substrate includes a folded region between the first and second conductive traces such that the electromagnetic shielding layer provides electromagnetic shielding between the first and second conductive traces.

[0024] Generally, in other respects, the subject matter of this disclosure can be embodied in a system comprising: a cryostat including a first stage configured to be maintained within a first temperature range; a quantum information processing system within the first stage; and flexible wiring connected in parallel to the quantum information processing system within the first stage, wherein the flexible wiring includes a first elongated flexible layer, a second elongated flexible layer bonded to the first elongated flexible layer; a plurality of conductive traces disposed at a bonding interface between the first elongated flexible layer and the second elongated flexible layer; a first electromagnetic shielding layer on a main surface of the first elongated flexible layer; a second electromagnetic shielding layer on a main surface of the second elongated flexible layer; and a through-hole extending through the first elongated flexible layer, wherein the through-hole includes a superconducting through-hole contact.

[0025] Specific embodiments of the subject matter described herein can achieve one or more of the following advantages. For example, in some embodiments, the folded regions of flexible wiring provide electromagnetic shielding between signal traces. Shielding can reduce crosstalk without forming vias within the substrate. In some embodiments, when vias are provided within the substrate, they can be filled with a superconducting material (e.g., niobium) that allows for improved signal integrity and reduced crosstalk. Furthermore, since superconducting materials do not exhibit direct current (DC) resistance, the via metal does not cause resistive heating. In some embodiments, flexible wiring allows for a significant increase in the number and density of wires that can be connected to devices contained within cryogenic systems (e.g., quantum information processing systems) compared to devices using coaxial cables. Additionally, by using flexible wiring instead of coaxial cables, space that would otherwise be required for coaxial cables can be freed up for purposes other than providing electrical connections. In some embodiments, flexible wiring uses materials such as copper, copper alloys (e.g., brass), or superconductors (e.g., NbTi), which provide relatively low thermal conductivity and therefore low heat load. Furthermore, in some embodiments, the manufacturing cost associated with flexible wiring can be lower per wire than with devices relying on coaxial cables. In some implementations, butt joints can be used instead of coaxial cable connectors to combine flexible wiring into other flexible wiring. By using butt joints instead of coaxial cable connectors, a large number of connections can be established. Additionally, using butt joints can free up space within the cryostat that was previously used by coaxial cable connectors. Furthermore, in some implementations, butt joints offer a lower manufacturing cost compared to soldering circuit boards together, especially when a large number of connections are required.

[0026] Details of one or more embodiments are set forth in the accompanying drawings and the following description. Other features and advantages will become apparent from the specification, drawings, and claims. Attached Figure Description

[0027] Figure 1This is a schematic diagram illustrating an example of a cooling system used to cool a quantum information processing system.

[0028] Figure 2 This is a schematic diagram illustrating an example of flexible wiring.

[0029] Figure 3 This is a schematic diagram illustrating an example of flexible wiring.

[0030] Figure 4 This is a schematic diagram illustrating an example of flexible wiring.

[0031] Figure 5 This is a schematic diagram illustrating an example of flexible wiring.

[0032] Figure 6 This is a schematic diagram illustrating an example of an improved mating connector for flexible cabling.

[0033] Figure 7A This is a schematic diagram illustrating an example of an improved mating connector for flexible cabling.

[0034] Figure 7B It shows Figure 7A The side view of the flexible wiring shown. Detailed Implementation

[0035] Quantum computing requires the coherent processing of quantum information stored in qubits within a quantum computer. Superconducting quantum computing is a promising implementation of solid-state quantum computing technology, in which the quantum information processing system is partially formed of superconducting materials. To operate a quantum information processing system employing solid-state quantum computing technology (e.g., superconducting qubits), the system is maintained at extremely low temperatures, for example, within tens of mK. This extreme cooling of the system keeps the superconducting material below its critical temperature and helps avoid unwanted state transitions. To maintain such low temperatures, the quantum information processing system can operate in a cryostat, such as a dilution refrigerator. In some implementations, the limited cooling capacity of such a cryostat necessitates generating control signals at higher temperatures where greater cooling capacity is available and dissipative circuitry is less likely to damage the qubits within the quantum information processing system. The control signals can be transmitted to the quantum information processing system using a shielded impedance-controlled GHz capable transmission line (e.g., a coaxial cable).

[0036] It is anticipated that the number of qubits used in quantum information processing systems will increase significantly in the near future (e.g., tens of thousands, hundreds of thousands, millions, or more). As the number of qubits increases, the number of transmission lines (e.g., control lines and data lines) required to drive the qubits and read the output from operations performed by the quantum information processing system will also likely increase substantially.

[0037] This disclosure relates to wiring for cryogenic applications, such as this superconducting quantum information processing system, wherein in some embodiments, the wiring allows for a significant increase in transmission line density while maintaining low crosstalk and low thermal load between transmission lines. Additionally, in some embodiments, the devices and methods disclosed herein can provide a low-cost alternative to bulky transmission lines such as coaxial cables.

[0038] Figure 1 This is a schematic diagram illustrating an example of a cooling system 100 for cooling a quantum information processing system. The exemplary cooling system 100 includes a cryostat 102, which may contain a quantum information processing system 110. The cryostat 102 cools the surrounding environment around the quantum information processing system 110 to a temperature suitable for operation of the system 110. For example, in an embodiment where the quantum information processing system 110 includes a quantum processor with superconducting qubits, the cryostat 102 can cool the surrounding environment around the quantum processor to a temperature below the critical temperature of the superconducting material, for example, to about 20 mK or about 10 mK. Examples of superconducting materials that can be used in superconducting quantum information processing systems include Al (Tc = 1.2 K), In (Tc = 3.4 K), and Nb (Tc = 9.3 K). The cryostat 102 can be cooled using liquid or gaseous refrigerants such as helium and nitrogen, or it can be cooled using helium via a closed-loop cryocooler. In some cases, the circuit elements of the quantum information processing system 110 operate at microwave frequencies (e.g., frequencies from approximately 300 MHz to approximately 100 GHz, such as frequencies from approximately 300 MHz to 10 GHz). Therefore, the cryostat 102 may include external and internal electromagnetic shielding to prevent interference with the quantum information processing system 110.

[0039] In some embodiments, the cryostat includes multiple thermally isolated stages (e.g., different stages of a dilution refrigerator) spanning a large temperature difference. For example, an exemplary cryostat 100 includes multiple stages 101, 103, and 105. A first stage 101 may be maintained in a first temperature range T1, while a second stage 103 may be maintained in a second temperature range T2 below the first temperature T1, and a third stage 105 may be maintained in a third temperature range T3 below the second temperature T2. For example, the third temperature range T3 may be equal to or lower than the critical temperature Tc of the superconducting material used in the quantum information processing system 110, e.g., T2 ≈ 10⁻²⁰ mK. Conversely, the second stage 103 may be maintained at a higher temperature than the third stage 105. For example, the second stage 103 may be maintained within a temperature range T2 less than 3 K and greater than 20 mK. The first stage 101 may be maintained in a temperature range higher than the second stage 103. For example, the first stage 101 may be maintained within a temperature range T1 less than 300 K and greater than 3 K. Although in Figure 1 The example shows only three stages, but a cryostat can include additional stages at different temperature levels. For example, in some cases, a cryostat may include a fourth and a fifth stage, respectively maintained within a fourth temperature range T4 and a fifth temperature range T5. Each temperature stage of a cryostat typically spans, for example, a few centimeters in length to the next temperature stage.

[0040] Each stage within the cryostat 100 can be separated by boundaries 104, 106. Boundaries 104, 106 may include heat sinks for maintaining a constant temperature. Each stage of the cryostat 102 operates in a vacuum environment. For example, the first stage 101, the second stage 103, and the third stage 105 can be approximately 1 × 10⁻⁶. -7 The quantum information processing system 110 operates under a vacuum base pressure of Torr or less. The quantum information processing system 110 may include a substrate (e.g., a dielectric substrate such as silicon or sapphire) on which quantum information processing devices, such as qubits, are formed. The qubits may be coupled to each other, such that during operation of the system 110, the qubits perform useful computations. In addition to the qubits, the quantum information processing system 110 may include other components such as measurement readout devices, coupler devices for coupling the qubits, and control devices for driving and tuning the qubits. The quantum information processing system 110 may be positioned and / or secured to a sample holder 112 within a third stage 105.

[0041] To control the quantum information processing system 110 and read data from it, the quantum information processing system 110 can be connected to a control electronics device 150 located outside the cryostat 102. Figure 1In the example shown, control electronics 150 is connected to quantum information processing system 110 within cryostat 102 using flexible wiring 114, 116. Signals generated by control electronics 150 or quantum information processing system 110 are transmitted on flexible wiring 114, 116. Flexible wiring 114, 116 includes, for example, multiple conductive lines on or within an elongated flexible substrate. Flexible wiring 114, 116 may include electromagnetic shielding to protect the wires from signal interference. Additionally, the wires within wiring 114, 116 may be impedance matched to quantum information processing system 110 and control electronics 150 to reduce signal reflections from the load.

[0042] Each flexible cabling 114, 116 may include multiple individual wires. Individual wires may extend along the length (long dimension) of the flexible cabling 114, 116 and may be arranged in an array (e.g., wires may extend parallel to the length of the flexible cabling 114, 116). The total number of wires within or on the flexible cabling may vary. For example, each flexible cabling 114, 116 may include 10 or more wires, 20 or more wires, 30 or more wires, 50 or more wires, 100 or more wires, or 200 or more wires. Other numbers of wires may also be used within each flexible cabling 114, 116. Each flexible cabling may be connected to another flexible cabling, allowing data and control signals to be transmitted from one flexible cabling to another. For example, flexible cabling 114 may be connected to flexible cabling 116. In some embodiments, a first group of at least two flexible cablings may be connected to a second group of at least two flexible cablings. For example, a first group of 5, 10, 15, 20 or more flexible cablings may be connected to a second group of 5, 10, 15, 20 or more flexible cablings. Other numbers of flexible wirings can be connected together. For the first and / or second group, the flexible wirings within this group can be directly stacked on top of each other, or alternatively, spacers (e.g., 2-10 mm spacers) can be used to separate the individual flexible wirings within the stack. The advantage of forming multiple wires within and / or using multiple flexible wirings is that, in some embodiments, the smaller coverage area and higher line density of the flexible wiring allow for a significantly increased total number of connections between the quantum information processing system and control electronics compared to devices relying on coaxial cables. In some embodiments, short portions of the flexible wirings 114, 116 are clamped at boundaries 104, 106 or elsewhere within the cryostat 100 to heat-sink the flexible wirings 114, 116. For example, wiring 116 can be clamped at boundary 104 to a heat sink maintained at a temperature of 3 K. Similarly, wiring 114 can be clamped at boundary 106 to a heat sink maintained at a temperature of 20 mK. Conversely, the distance between the boundaries of wirings 114, 116 is much longer than the clamping length to reduce heat flow.

[0043] Figure 2 This is a schematic diagram illustrating an example of flexible wiring that can be used in cryogenic applications, including, for example, a quantum information processing system for connection to a cryostat such as cryostat 102. Figure 2 A plan view of the top surface of the flexible wiring 200 and a cross-sectional view of the flexible wiring 200 along line AA are shown. As shown in the plan view, the flexible wiring 200 includes an elongated flexible substrate 202. The flexible wiring 200 also includes a plurality of conductive traces 204 disposed on a main surface (e.g., the top surface or side surface) of the elongated flexible substrate 202. Each conductive trace 204 corresponds to a single wire, and the plurality of traces 204 can be arranged in an array. For example, the conductive traces 204 can be arranged in parallel, with their long dimension (e.g., their length) extending along the long dimension (length) of the elongated flexible substrate 202. For each pair of adjacent traces 204, the spacing between adjacent traces 204 can be the same.

[0044] The elongated flexible substrate 202 can be formed from a flexible plastic strip, such as a polyimide strip. Examples of materials that can be used for the elongated flexible substrate 202 include, for example, poly(4,4'-oxydiphenylene-pyromellitic tetracarboximide) (also known as...). The thickness of the elongated flexible substrate 202 can be, for example, from about 10 μm to about 500 μm, including thicknesses such as 20 μm, 50 μm, 75 μm, and 100 μm. The width of the elongated flexible substrate 202 can be, for example, from about 1 mm to about 30 mm, including widths such as 10 mm, 15 mm, and 20 mm. The length of the elongated flexible substrate 202 can be at least the length necessary to provide a connection between devices, systems, and / or other wiring.

[0045] The conductive trace 204 comprises a thin film material that can be patterned on an elongated flexible substrate 202. The conductive trace 204 may comprise, for example, a single-layer or double-layer material. Materials that can be used to form the conductive trace 204 may include superconducting materials and / or non-superconducting metals. Examples of materials that can be used to form the conductive trace 204 include, for example, copper, copper alloys (copper-nickel alloys, brass, bronze), aluminum, indium, NbTi, NbTi alloys, and / or niobium. Because in some cases the thermal conductivity of copper may be too high, resulting in high heat transfer, it may be advantageous to use copper alloys with lower thermal conductivity. This helps to reduce the thermal power load, thereby allowing the cryostat to maintain the low temperature required for the operation of the quantum information processing system 110. In the case of a double-layer trace, the trace 204 may comprise a first layer formed on and in contact with the elongated flexible substrate 202 and a second layer formed on and in contact with the first layer. The first layer of the double-layer trace may comprise a superconducting material such as niobium, while the second layer of the double-layer trace may, for example, comprise a non-superconducting material such as copper or a copper alloy. To improve the adhesion of the metal or superconductor to the surface of the substrate 202, for example in the case of a polyimide substrate, the substrate 202 can be ion-polished. Alternatively, the first layer of the double-layer trace may comprise a non-superconducting material such as copper, and the second layer of the double-layer trace may comprise a superconducting material such as niobium or aluminum. In some embodiments, the material used to form the conductive trace may depend on the location where the flexible wiring is used in the cryostat. For example, in the lowest temperature region such as 3K to 10mK (e.g., the temperature region where a quantum information processing system may be located), a material with low loss tangent and low thermal conductivity can be used to form the flexible wiring. In this case, the conductive trace may be formed by a superconductor such as niobium. In the higher temperature region of the cryostat (e.g., the region where the wiring transitions from low temperature to room temperature) (e.g., temperatures above 3K), the flexible wiring may be formed by a material that is not superconducting but has low thermal conductivity (e.g., a copper alloy), although high-temperature superconductors (e.g., Nb) may also be used. Additionally, in some embodiments, the material used to form the trace may be selected based on its role in providing solder connections. For example, copper can be used in areas where wire bonding or other solder bonding is required.

[0046] The length of the conductive trace 204 can be the same as the length of the elongated flexible substrate 202. The width of each conductive trace 204 can be, for example, from about 1 μm to about 250 μm, including widths such as 5 μm, 10 μm, 20 μm, 30 μm, 50 μm, or 100 μm. In some embodiments, the width of the conductive trace is selected to provide a predetermined impedance, such as 50 ohms or 75 ohms, to reduce signal reflection from the load. The thickness of each conductive trace 204 can be, for example, from about 10 nm to about 100 μm, including thicknesses such as 50 nm, 100 nm, 250 nm, 500 nm, 750 nm, 1 μm, 5 μm, 10 μm, 20 μm, 50 μm, etc. In the case of a double-layer conductive trace, each layer can have the same or different thicknesses. For example, in some embodiments, the thickness of the first layer is 2 μm, while the thickness of the second layer is 5 μm. Optionally, in some cases, the thickness of the first layer is 20 μm, while the thickness of the second layer is 5 μm. The conductive traces 204 can be separated by a constant or variable spacing. For example, in some embodiments, the spacing between adjacent conductive traces 204 is from about 1 μm to about 1 mm, including spacings such as 5 μm, 10 μm, 50 μm, 100 μm, 250 μm, 500 μm, or 750 μm. The conductive traces 204 can be formed on the elongated flexible substrate 202 using integrated circuit (IC) fabrication techniques such as deposition (e.g., sputtering and vapor deposition), etching, and / or lift-off techniques.

[0047] like Figure 2 As shown in cross-sectional view AA, the flexible wiring 200 includes a conductive layer 208 on a second main surface / bottom side of an elongated flexible substrate 202, wherein the second main surface is opposite to a first main surface / top side. The conductive layer 208 may be an electromagnetic shielding layer for shielding the conductive traces 204 from crosstalk. To allow the electromagnetic shielding layer 208 to provide shielding between the traces 204, the flexible substrate 202 includes a folded region 206. The folded region 206 includes an area of ​​the flexible substrate 202 in which the substrate 202 has been folded to provide an elongated raised band. The length of the elongated raised band of the folded region 206 may extend between and alongside the conductive traces 204. For example, the elongated raised band of the folded region 206 may extend parallel to the conductive traces 204 within the space between adjacent conductive traces 204. The raised band can be formed by folding the flexible substrate back into itself in a manner similar to a fold. In some embodiments, the peaks or apexes of the raised bands extend above the top surface of the conductive trace 204 (e.g., the surface of trace 204 facing away from substrate 202). When substrate 202 is folded in this manner, the electromagnetic shielding layer 208 in the folded region 206 forms an elongated arc, which serves as a wall extending between adjacent traces 204. Figure 2In the plan view, the span of the arc of each folded region 206 is depicted by two parallel dashed lines. Furthermore, the peaks or apexes of the elongated arcs within the folded region 206 can extend above the top surface of the conductive trace 204. As a result, the shielding layer 208 within the folded region 206 provides an electromagnetic barrier between adjacent traces to shield against crosstalk between traces. Figure 2 As shown in the cross-sectional view, the folded region 206 is characterized by raised fins, giving the flexible wiring an accordion-like shape. Figure 2 The folded region 206 shown includes a portion of the first main surface of the flexible substrate that does not have conductive traces 204 formed thereon. In other embodiments, the folded region 206 may include a portion of the first main surface of the substrate 202 on which conductive traces 204 are formed. The advantage of introducing the folded region 206 is that it provides shielding between traces without requiring shielding of the wires or shielding within the substrate 202 as might be necessary in a stripline design. In some embodiments, the folded region 206 can provide a reduction in crosstalk between adjacent conductive traces of the order 20-60 dB or higher, relative to flexible wiring having conductive traces formed on the first main side without the folded region.

[0048] In order to keep the folded area in place so that the substrate does not return to its initial flat state, the substrate and / or electromagnetic shielding layer 208 can be modified to introduce mechanical stress that helps maintain the folded shape. Figure 3 This is a schematic diagram illustrating an example of a flexible wiring 250, which includes recessed regions to introduce mechanical stress to hold folded regions in place. Similar to wiring 200, flexible wiring 250 includes an elongated flexible substrate 202, conductive traces 204 on a first main side of substrate 202, and an electromagnetic shielding layer 208 on a second main side of substrate 202. Various parameters relating to the materials and dimensions discussed herein with respect to wiring 200 can also be applied to wiring 250. Wiring 250 (in plan view and along...) Figure 3 (shown in the cross-sectional view of line AA) and Figure 2 The difference between the wiring 200 and the wiring 250 is that wiring 250 is shown in a flat state to help illustrate the formation of grooves in the folded area. When the folded substrate 202 is folded to provide the folded area, the grooves can provide mechanical stress to hold the folded area in place.

[0049] In some embodiments, a groove, such as groove 210, is formed within a first main surface of substrate 202. The length of groove 210 is parallel to (e.g., in...) Figure 3The groove 210 extends along the length of one or more adjacent conductive traces 204 (longer in the X direction). The groove 210 can have various depths into the substrate 202. For example, the groove depth can range from approximately 1 μm to approximately 500 μm, such as 10 μm, 20 μm, 50 μm, 70 μm, 100 μm, 200 μm, 250 μm, 300 μm, or 400 μm. The groove 210 can have various widths. For example, the groove width can range from approximately 10 μm to approximately 1 mm, such as 20 μm, 50 μm, 100 μm, 250 μm, 500 μm, or 750 μm. The groove 210 can extend along the entire length of the elongated flexible substrate 202, or it can extend to a length shorter than the entire length of the elongated flexible substrate. Figure 3 In the example, each groove 210 is shown as a single continuous piece extending between adjacent conductive traces 204. In other embodiments, multiple separate individual grooves may be formed between the conductive traces 204, whether arranged as a single line or a series of lines (e.g., a two-dimensional array).

[0050] In some embodiments, a groove, such as groove 212, is formed within the second main surface of the substrate 202. As explained herein with respect to groove 210, the same variations in groove depth, width, length, and arrangement can be applied to groove 212. An electromagnetic shielding layer 28 may cover the groove formed within the second main surface of the flexible substrate 202. As along... Figure 3 As shown in the cross-sectional view of line AA, the groove 212 can be positioned, for example, along the Y-axis between adjacent conductive traces 204. In some embodiments, such as Figure 3 As shown, the groove 212 is formed within the electromagnetic shielding layer 208 rather than within the second main surface of the substrate 202. That is, the electromagnetic shielding layer 208 can be patterned (e.g., by photolithography and etching or lift-off processes) so that the opening is formed only within the electromagnetic shielding layer and not within the substrate 202. The groove depth can extend completely through the electromagnetic shielding layer 208 or partially through it. In some embodiments, the groove extends through the electromagnetic shielding layer 208 and into the second main surface of the flexible substrate 202, as shown in... Figure 3 The groove 214, constrained by dashed lines, is depicted in the sectional view.

[0051] The grooves can be formed in the flexible substrate 202 using photoprocessing techniques (e.g., spin-coating a resist onto the substrate 202, exposing and developing a pattern in the resist, and etching exposed areas of the substrate 202 to form grooves). In other embodiments, the grooves can be formed by user laser processing (e.g., polyimide laser drilling technology).

[0052] In some embodiments, the folded areas of the flexible wiring can be held in place by arranging the electromagnetic shielding layer in multiple strips extending across a second main surface of an elongated flexible substrate. These strips can be used to replace or supplement the grooves described herein. For example, Figure 4 This is a schematic diagram illustrating an example of flexible wiring 300. Specifically, Figure 4 The diagram includes a plan view of the second main surface of the flexible wiring substrate 302 on which the electromagnetic shielding element 308 is formed, and a cross-sectional view through the substrate 302 at line AA. Figure 4 In the plan view, the location, boundaries, and arrangement of the conductive traces 304 formed on the first main surface of the substrate 302 are depicted using dashed lines. The flexible wiring 300 is shown in its flattened state, i.e., before the folded areas are formed.

[0053] like Figure 4 As shown, the electromagnetic shielding layer 308 is arranged as multiple individual strips extending along the Y direction. When the substrate 302 is folded to provide a folded region, the shielding layer strips 308 can provide mechanical stress to hold the folded region in place. Figure 4 As further shown in the plan view, the length of strip 308 extends along a direction (Y direction) orthogonal to the direction in which the length of conductive trace 304 extends (X direction). The advantage of using individual strips to form the electromagnetic shielding layer 308 is that lower overall heat transfer can be achieved due to the use of less thermally conductive material to provide the shielding layer.

[0054] Alternatively, in some embodiments, strips may be attached to a ground plane rather than formed as a ground plane. For example, a ground plane layer, such as layer 208, may be provided on the second main surface of an elongated flexible substrate to provide a ground plane, and multiple strips, such as strip 308, may be formed on the surface of the ground plane layer to provide mechanical stability. For example, the ground plane layer may be formed of niobium, while the strips formed on the surface of the ground plane layer may be formed of copper. The dimensions described herein with respect to layer 208 may also be applied to the ground plane layer. Similarly, the dimensions and spacing described herein with respect to strip 308 may also be applied to strips formed on the ground plane layer.

[0055] In some implementations, the number of wires contained within the flexible wiring can be increased by stacking the flexible wiring. For example, any of flexible wirings 200, 250, or 300 can be stacked together to provide stacked flexible wiring. In some cases, flexible wiring can be stacked together using adhesive-based or adhesive-free lamination techniques (e.g., applying heat and / or pressure to bond the polyimide layers together). In some implementations, using adhesive-free polyimide bonding is advantageous because it eliminates the adhesive, which sometimes leads to degassing in a vacuum environment. Furthermore, the coefficient of thermal expansion (CTE) of adhesive-free lamination closely matches the CTE of copper, thereby reducing stress between the substrate and the shield / trace caused by large temperature changes (temperatures used in cryogenic systems) when cooled to extremely low temperatures. In some cases, a polymer sealant can be used to form the stacked flexible wiring, which is sprayed or brushed onto an initial elongated polymer substrate including the conductive traces / shielding layer. For example, in some cases, an epoxy sealant (e.g., Stycast 2850FT) can be sprayed or brushed onto flexible wiring (e.g., wiring 200, 250, or 300), and then the epoxy sealant is cured to provide an additional polymer layer on which other conductive materials can be deposited and patterned.

[0056] and Figure 2-4 In contrast to the flexible wiring shown, in some embodiments, flexible wiring can be formed as strips. Figure 5 This is a schematic diagram illustrating an example of a flexible wiring 500 formed in a strip-line configuration. The flexible wiring 500 includes signal traces 506 disposed between a first elongated flexible substrate portion 502 and a second elongated flexible substrate portion 504. The signal traces 506 may include a conductive thin film material for transmitting control and / or data signals. The top surface (e.g., a first main surface) of the first elongated flexible substrate portion 502 may include a first conductive layer 508, while the bottom surface (e.g., a second main surface) of the second elongated flexible substrate portion 504 may include a second conductive layer 510. The first conductive layer 508, the second conductive layer 510, and the signal traces 506 may include thin film materials such as metals or superconducting thin films. For example, metal or superconducting thin films may include copper, copper alloys, aluminum, niobium, or indium thin film layers. Although in Figure 5 Only a single signal trace 506 is shown, but multiple signal traces 506 can be included between the first elongated flexible substrate portion 502 and the second elongated flexible substrate portion 504 (e.g., entering and exiting along the Y-axis). Figure 5 (Page). For example, this signal trace 506 can be used with... Figure 2 The conductive traces 204 shown are aligned in a similar parallel manner.

[0057] In some cases, the first conductive layer 508, the second conductive layer 510, and / or the signal trace 506 may comprise a double-layer film, such as the double-layer film described herein with respect to flexible wiring 200. For example, as Figure 5 As shown, the second conductive layer 510 may include a bilayer film having a first thin film layer 518 formed on and / or in contact with the bottom surface of the second elongated flexible substrate portion 504. The bilayer film may also include a second thin film layer 516 formed on and in contact with the first thin film layer 518. The bilayer film may also be formed on the top surface of the first elongated flexible substrate portion 502. In some embodiments, a portion of the second layer 516 is removed, exposing the underlying first layer 518.

[0058] The length of signal trace 506 can be the same as the length of the elongated flexible substrate portions 502, 504. The width of each signal trace 506 can be, for example, from about 1 μm to about 250 μm, including widths such as 5 μm, 10 μm, 20 μm, 30 μm, 50 μm, or 100 μm. The thickness of each signal trace 506 can be, for example, from about 10 nm to about 100 μm, including thicknesses such as 50 nm, 100 nm, 250 nm, 500 nm, 750 nm, 1 μm, 5 μm, 10 μm, 20 μm, 50 μm, etc. In the case of a double-layer conductive trace, each layer can have the same or different thicknesses. For example, in some embodiments, the thickness of the first layer is 2 μm, and the thickness of the second layer is 5 μm. Alternatively, in some cases, the thickness of the first layer is 20 μm, and the thickness of the second layer is 5 μm. The conductive traces 204 can be separated by a constant or variable spacing. For example, in some embodiments, the spacing between adjacent signal traces 506 is from about 1 μm to about 1 mm, including spacings such as 5 μm, 10 μm, 50 μm, 100 μm, 250 μm, 500 μm, or 750 μm. The signal traces 506 can be formed on the elongated flexible substrate portion 502 or portion 504 using integrated circuit (IC) fabrication techniques such as deposition (e.g., sputtering and vapor deposition), etching, and / or lift-off techniques.

[0059] Each of the first elongated flexible substrate portion 502 and the second elongated flexible substrate portion 504 may be formed, for example, from a flexible plastic strip such as polyimide tape (e.g., poly(4,4'-oxydiphenylene-pyromellitic tetracarboxyimide)). The first elongated flexible substrate portion 502 may be bonded to the second elongated flexible substrate portion 504. The thickness of the substrate portions 502 and 504 may be, for example, from about 10 μm to about 500 μm, including thicknesses such as 20 μm, 50 μm, 75 μm, and 100 μm. The width of the elongated flexible substrate 202 may be, for example, from about 1 mm to about 30 mm, including widths such as 10 mm, 15 mm, and 20 mm. The length of the elongated flexible substrate portions 502 and 504 may be at least the length necessary to provide a connection between devices, systems, and / or other wiring.

[0060] The first conductive layer 508 and the second conductive layer 510 may each correspond to an electromagnetic shielding layer that shields the signal trace 506 from external signal noise. In some embodiments, flexible wiring 500 may be stacked with one or more flexible wirings 500 to provide a stack of flexible wiring with an increased number of signal lines for transmitting control and / or data signals. As described herein, flexible wiring can be stacked using adhesive-based or adhesive-free lamination techniques. In some cases, a polymer sealant may be used to form the stacked flexible wiring, which is sprayed or brushed onto an initial elongated polymer substrate including the conductive trace / shielding layer. For example, in some cases, an epoxy sealant (e.g., Stycast 2850FT) may be sprayed or brushed onto the flexible wiring (e.g., wiring 500), which is then cured to provide an additional polymer layer on which other conductive materials may be deposited and patterned.

[0061] In some embodiments, the flexible wiring 500 includes one or more through-holes 512 extending through a first elongated flexible substrate portion 502. The through-holes 512 may include a conductive material (through-hole contact 514) formed within them. The through-hole contacts 514 may include, for example, superconducting and / or non-superconducting metals, such as copper, aluminum, niobium, indium, or copper alloys. In some cases, the through-hole contacts 514 are formed on the sidewalls of the through-hole 512 but do not completely fill it. In other cases, the through-hole contacts 514 completely fill the through-hole 512, such that there is no continuous opening extending through it. In some embodiments, the through-hole contacts 514 include an adhesive layer formed to help the through-hole contacts 514 adhere to the sidewalls of the through-hole 512. For example, the adhesive layer may include a film of copper or niobium (e.g., about 1 nm to about 1 micrometer thick relative to the through-hole sidewalls). In some embodiments, the material of the via contact 514 formed on the adhesive layer may include a film of copper or niobium (e.g., about 500 nm to about 20 micrometers thick relative to the via sidewalls).

[0062] An adhesive layer can be formed, for example, by electroless plating of an adhesive layer material (e.g., Cu) to create a thin first adhesive layer, followed by electroplating of the adhesive layer material (e.g., Cu) to create a second adhesive layer on the first adhesive layer. The remaining material of the through-hole contact 514 (e.g., Al, Cu, or Nb) can then be formed on the adhesive layer, for example, by electroplating. For example, aluminum can be plated (e.g., electroplated) onto the adhesive layer. Other plating techniques can also be used to plate the through-hole contact 514. For example, solvent-based plating can be used to form a niobium through-hole contact.

[0063] In some embodiments, the via 512 extends from the first conductive layer 508 to the signal trace 506, such that the via contact 514 connects the first conductive layer 508 to the signal trace 506. In some embodiments, the via 512 extends from the first conductive layer 508 to the second conductive layer 510, such that the via contact 514 connects the first conductive layer 508 to the second conductive layer 510. In some embodiments, the via 512 extends from the second conductive layer 510 to the signal trace 506, such that the via contact 514 connects the second conductive layer 510 to the signal trace 506. The via 512 can be formed using laser drilling technology.

[0064] In some embodiments, the flexible wiring 500 has an area in which the signal trace 506 is exposed, allowing for electrical connections to the signal trace, such as wire bonding or bump bonding. Exposing the signal trace 506 may include removing a portion of a first elongated flexible substrate portion 502 covering the signal trace 506 and / or removing a portion of a second elongated flexible substrate portion 504 covering the signal trace 506. In some cases, the length of the first elongated flexible substrate portion 502 and / or the second elongated flexible substrate portion 504 is insufficient to cover the entire signal trace 506, resulting in a portion of the signal trace 506 being exposed.

[0065] An example of a technique used to connect flexible wiring to each other, to quantum information processing systems, and / or to circuit components is the use of coaxial connectors, such as SMA connectors. However, coaxial connections can be bulky, thus taking up a significant amount of limited available space within cryostats. Furthermore, the large size of coaxial connectors can make it difficult to connect to the contacts of high-density flexible wiring. An alternative to coaxial connectors is the use of improved mating joints that employ wire bonding between the contacts of the flexible wiring. Figure 6 This is a schematic diagram illustrating an example of an improved butt joint bonding method employing wire bonding. Specifically, Figure 6 A cross-sectional view is depicted of a first flexible cabling 602 connected to a second flexible cabling 604 using an improved mating connector. Each of the first flexible cabling 602 and the second flexible cabling 604 may have a connection with... Figure 2 The flexible wiring 200 shown has the same structure. For example, the flexible wiring 602 may include an elongated flexible substrate 606, with a plurality of conductive traces 608 disposed on the main surface of the elongated flexible substrate 606. Figure 6 The diagram shows a trace 608 and a conductive layer 610 on the second main surface of an elongated flexible substrate 606. Similarly, the flexible wiring 604 may include an elongated flexible substrate 612 and a plurality of conductive traces 614 disposed on the main surface of an elongated flexible substrate 616. Figure 6 A trace 614 is shown, along with a conductive layer 616 on the second main surface of the elongated flexible substrate 616. (See diagram 614). Figure 2 In the flexible wiring 200 shown, each conductive trace 608, 614 corresponds to a separate wire, and multiple traces can be arranged in an array (e.g., entering and exiting along the Y direction). Figure 6 (See the page). Additionally, conductive layers 610 and 616 can be electromagnetic shielding layers, used to shield conductive traces 608 and 614 from crosstalk, respectively. Although flexible wiring 602 and 604 are in... Figure 6The layers are all shown as flat, but they can include folded areas, such as in flexible wiring 200, so that layers 610, 616 can provide shielding for traces 608, 614.

[0066] The first flexible wiring 602 is arranged to have an edge 601 facing the edge 603 of the second flexible wiring 604. Edge 601 may be separated from edge 603 by a relatively small distance 622 or may touch each other. For example, the distance 622 is from approximately 25 micrometers to approximately a few millimeters, such as 100 μm or 250 μm. A wire bond 618 is provided for electrically connecting the trace 608 of the first flexible wiring 602 to the trace 614 of the second flexible wiring 604.

[0067] In some implementations, solder bridges may be used instead of wire bonds to electrically connect trace 608 of the first flexible wiring 602 to trace 614 of the second flexible wiring 604. The distance 622 should be kept as small as possible to allow for the formation of the solder bridge. The solder used to form the wire bond 618 or solder bridge may be formed of a superconducting or non-superconducting material.

[0068] Laser processing can be used to cut both the edge 601 of the first flexible wiring 602 and the edge 603 of the second flexible wiring 604 to provide more precise and relatively smooth edges. The edges 601 and 603 can then be placed closer together to provide a smaller bridge length for the solder bridge, which improves connection integrity and facilitates the bonding process.

[0069] In some embodiments, the joint between the first flexible wiring 602 and the second flexible wiring 604 is secured against a metal block to provide a mechanical connection for the first flexible wiring 602 and the second flexible wiring 604, to provide an electrical connection between the first flexible wiring 602 and the second flexible wiring 604, and / or to maintain the wiring at a cryostat-level temperature in which the wiring is arranged. For example, as Figure 6 As shown, the metal block 620 can be fixed to and in thermal contact with the electromagnetic shielding layers 610, 616. In some embodiments, the metal block 620 is clamped in place against the flexible wiring 602 and 604. Alternatively, or additionally, the metal block 620 is fixed to the shielding layers 610, 616 by an adhesive such as solder. The metal block 620 can be formed of a material suitable for providing sufficient heat transfer within a cryostat, such as copper. In some embodiments, the shielding layers 610, 616 also serve as grounding planes, and the metal block 620 provides a common ground.

[0070] Figure 6 It shows a method for having, for example Figure 2 The illustrated improved mating connector for flexible wiring. In some embodiments, the improved mating connector can also be used with… Figure 5The flexible wiring configuration shown is illustrated. For example, Figure 7A This is a schematic cross-sectional view showing a first flexible cable 702 connected to a second flexible cable 704 using an improved mating connector. Each of the first flexible cable 702 and the second flexible cable 704 has a connection with... Figure 5 The flexible wiring 500 shown has the same stripline structure. For example, flexible wiring 702 may include a first elongated flexible substrate portion 706, a second elongated flexible substrate portion 708, a signal trace 714 disposed between portions 706 and 708, a first conductive layer 710 on the top surface of substrate portion 706, and a second conductive layer 712 on the bottom surface of substrate portion 708. Similarly, flexible wiring 704 may include a first elongated flexible substrate portion 716, a second elongated flexible substrate portion 718, a signal trace 724 disposed between portions 716 and 718, a first conductive layer 720 on the top surface of substrate portion 716, and a second conductive layer 722 on the bottom surface of substrate portion 718. Figure 5 In the flexible wiring 500 shown, each signal trace 714, 724 corresponds to a separate wire, and multiple traces can be arranged in an array (e.g., entering and exiting along the Y direction). Figure 7A (See the page). In addition, conductive layers 710, 712, 720, and 722 can be electromagnetic shielding layers used to shield signal traces 714 and 724 from crosstalk.

[0071] The first flexible wiring 702 is arranged with an edge 701 facing the edge 703 of the second flexible wiring 704. Edge 701 may be separated from edge 703 by a relatively small distance or may touch each other. For example, edge 701 may be separated from edge 703 by a distance of approximately 25 micrometers to approximately a few millimeters, such as 100 μm or 250 μm. Wire bonding 730 is provided for electrically connecting the trace 714 of the first flexible wiring 702 to the trace 724 of the second flexible wiring 704. In some embodiments, solder bridges may be used instead of wire bonding to connect the trace 714 of the first flexible wiring 702 to the trace 724 of the second flexible wiring 704. The distance between the first edge 701 and the second edge 703 should be kept as small as possible to allow for the formation of solder bridges. Laser processing may be used to cut both the edge 701 of the first flexible wiring 702 and the edge 703 of the second flexible wiring 704 to provide more precise and relatively smooth edges. Edges 701 and 703 can then be placed closer together to provide a smaller bridge length for the solder bridge, which improves connection integrity and facilitates the bonding process. The solder used to form the wire bond 730 or solder bridge can be formed from superconducting or non-superconducting materials.

[0072] In some embodiments, the first flexible wiring 702 may include a region 726 in which a substrate portion 706 is removed or absent to expose a portion of the signal trace 714. Similarly, the second flexible wiring 704 may include a region 728 in which a substrate portion 716 is removed or absent to expose a portion of the signal trace 724. By exposing the signal traces in the regions 726, 728, the signal traces 726, 728 can be accessed to form wire bonding or solder bridge bonding. Figure 7B It shows the source Figure 7A A schematic side view of the edge 703 and region 728 of the second flexible wiring 704. (See diagram below.) Figure 7B As shown, only a portion of the substrate portion 716 directly above the signal trace needs to be removed or omitted to form region 728 and expose signal trace 724. The left and right sides of the substrate portion 716 of region 728 can remain in place to bond to substrate portion 718 and provide a support surface for conductive layer 720. In some embodiments, regions 726, 728 include solder that forms an electrical connection between the first flexible wiring 702 and the second flexible wiring 704.

[0073] In some embodiments, the joint between the first flexible wiring 702 and the second flexible wiring 704 is fixed to and in thermal contact with a metal block to provide a mechanical connection between the first flexible wiring 702 and the second flexible wiring 704, to provide an electrical connection between the first flexible wiring 702 and the second flexible wiring 704, and / or to maintain the wiring at a cryostat-level temperature in which the wiring is arranged. For example, as Figure 7A As shown, the metal block 732 can be positioned against the electromagnetic shielding layers 712, 722. In some embodiments, the metal block 732 is clamped in place against the flexible wiring 702 and 704. Alternatively, or additionally, the metal block 732 is secured to the shielding layers 712, 722 by an adhesive such as solder. Alternatively, or additionally, an additional metal block is secured to and in thermal contact with the shielding layers 710, 720. The additional metal block can also be secured to the shielding layers 710, 720 by an adhesive such as solder. The metal block can be formed of a material suitable for providing sufficient heat transfer within a cryogenic thermostat, such as copper. In some embodiments, the shielding layers 712, 722 also serve as grounding planes, and the metal block 732 provides a common ground. Similarly, the shielding layers 710, 720 can also serve as grounding planes, to which the additional metal block provides a common ground.

[0074] In some embodiments, a joint can be provided at the boundary within the cryostat between the first flexible wiring and the second flexible wiring, this boundary separating a temperature stage of the cryostat maintained at a first temperature and a second temperature stage of the cryostat maintained at a temperature different from the first stage. For example, the joint can separate a temperature stage maintained at a temperature below 3K (e.g., Figure 1 The first flexible wiring (e.g., first flexible wiring 602 or 702) within the middle stage 103 is connected to a temperature stage (e.g., maintained at a temperature above 3K but below room temperature) Figure 1 The second flexible wiring (e.g., second flexible wiring 604 or 704) is located within stage 101. In some embodiments, the flexible wiring at transitions between different temperature stages within the cryostat, or at transitions from a vacuum environment to another vacuum environment or to a non-vacuum environment, can be sealed at the transition points using epoxy adhesive that is fixed to the flexible wiring or a clamping device (e.g., a metal ring such as a copper ring).

[0075] As disclosed herein, various methods can be used to fabricate flexible wiring. For example, in some embodiments, flexible wiring can be constructed by providing a large substrate (e.g., a flexible plastic substrate, such as polyimide) on which a metal and / or superconducting film is formed. The substrate may include, for example, a large sheet greater than 8” on one side, such as 12” by 14”. To deposit the metal / superconducting film, the substrate may be placed in a vacuum chamber. The substrate surface may be cleaned, for example, by performing ion cleaning (e.g., Ar ion cleaning) before depositing any film. In the case of forming a bilayer film on the substrate, a first layer of material is blanket-deposited on the substrate. The first layer may include, for example, a superconducting film, such as niobium deposited using sputtering. Alternatively, the first layer may include a non-superconducting film, such as copper. The first layer may be deposited to have a thickness of up to about 5 μm. For example, the first layer may be deposited to have a thickness of 100 nm, 250 nm, 500 nm, 750 nm. A second layer is then deposited on top of the first layer using a blanket deposition method (e.g., sputtering or electroless plating). The second layer may comprise a non-superconducting film, such as copper, or a superconducting film, such as niobium or aluminum. The second layer can be deposited to have a thickness of up to about 20 μm. For example, the second layer can be deposited to have a thickness of 100 nm, 250 nm, 500 nm, 750 nm, or 1 μm. In some cases, the first deposited portion of the second layer serves as a base layer for subsequent electroplating steps. For example, a 100 nm thin film of copper can be deposited before electroplating a thicker copper layer. In some embodiments, the film is deposited on both the top and bottom sides of the substrate. The film can then be deposited on both sides of the substrate. The deposited film is patterned (e.g., using etching or stripping processes) to form a desired circuit pattern. In some cases of bilayer films, the same pattern is transferred to both the first and second layers during the patterning step. In other cases, different patterns are formed for the first layer and then for the second layer during the patterning step. In some embodiments, vias are formed within the substrate using a laser etching process. The vias can then be filled with a via contact material (e.g., copper and / or a superconducting material) to form via contacts. Once patterned, the substrate sheet can be diced into individual flexible wirings. Dividing the substrate sheet may require performing laser cutting or mechanical cutting of the substrate sheet using a blade. Sheets. In some embodiments, separating the substrate sheets results in the final flexible wiring. Alternatively, in some embodiments, the separated substrate sheets can be stacked together to form stacked flexible wiring (e.g., a stack of multiple flexible wirings 200), to form a stripline configuration (e.g., flexible wiring 500), or to form stacked stripline flexible wiring. Stacking the separated substrate sheets may require introducing an adhesive between the cured substrates to bond the stacked substrates together. Alternatively, adhesive-free bonding techniques can be used to bond the separated substrate sheets together. After obtaining the stacked flexible wiring, further processing may be performed if necessary.For example, additional through-hole contacts can be formed within one or more stacked substrates to provide connectivity to conductive traces on stacked flexible wiring.

[0076] In some embodiments, extrusion and roll forming processes can be used to construct flexible wiring. For example, a first elongated sheet of superconducting or non-superconducting material (e.g., a 0.25” thick sheet of niobium, aluminum, or copper) can be provided. In some cases, a second elongated sheet of superconducting or non-superconducting material (e.g., a 0.25” thick sheet of niobium, aluminum, or copper) can be placed on top of the first elongated sheet. If only a single sheet is provided, the single sheet of material is passed through an extruder that thins the sheet (e.g., to a thickness of about 20 micrometers to about 10 mm). If a double layer is provided, the first and second elongated sheets can be pressed together under vacuum and / or heat, and passed through an extruder that thins the double-layer sheet and adheres the material in the double-layer sheet together (e.g., to a thickness of about 20 micrometers to about 10 mm). The thinned single-layer or double-layer sheet can then be laminated with a polyimide substrate. In some embodiments, the thinned single-layer or double-layer sheet is laminated on both sides of a polyimide substrate. As explained herein, superconducting and / or non-superconducting films on a polyimide substrate can be patterned (e.g., using an etching process) to form a desired circuit pattern. In some cases, for bilayer films, the same pattern is transferred to both the first and second layers during the patterning step. In other cases, different patterns are formed for the first layer and then for the second layer during the patterning step. In some embodiments, vias are formed within the substrate using a laser etching process. The vias can then be filled with a via contact material (e.g., copper and / or a superconducting material) to form via contacts. Once patterned, the substrate sheet including the patterned film can be diced into individual flexible wirings. Dividing the substrate sheet may require laser cutting or mechanical cutting of the substrate sheet using a blade. In some embodiments, the diced substrate sheet results in the final flexible wiring. Alternatively, in some embodiments, the diced substrate sheets can be stacked together to form stacked flexible wirings (e.g., a stack of multiple flexible wirings 200), to form a stripline configuration (e.g., flexible wiring 500), or to form stacked stripline flexible wirings. Stacked, segmented substrate sheets may require the introduction of an adhesive between the cured substrates to bond the stacked substrates together. Alternatively, adhesive-free bonding techniques can be used to bond the segmented substrate sheets together. After obtaining the stacked flexible wiring, further processing can be performed if desired. For example, additional via contacts can be formed within one or more stacked substrates to provide connectivity to conductive traces on the stacked flexible wiring.

[0077] The implementations of quantum topics and quantum operations described in this specification can be implemented in suitable quantum circuits or, more generally, quantum information processing systems, in quantum computing systems, including the structures disclosed in this specification and their equivalents, or combinations thereof. The terms "quantum computing system" and "quantum information processing system" can include, but are not limited to, quantum computers, quantum cryptography systems, topological quantum computers, or quantum simulators.

[0078] The terms quantum information and quantum data refer to information or data carried, held, or stored by a quantum system, in which the smallest nontrivial system is a qubit, for example, a system that defines a unit of quantum information. It should be understood that the term "qubit" encompasses all quantum systems that can be appropriately approximated as a two-level system in the appropriate context. Such quantum systems can include, for example, multi-level systems with two or more levels. For example, such systems can include atoms, electrons, photons, ions, or superconducting qubits. In some implementations, the computational ground state is identified as the ground state and a first excited state; however, it should be understood that other computational settings in which the computational state is identified as having higher levels of excited states are also possible. It is understood that a quantum memory is a device capable of storing quantum data for a long time with high fidelity and efficiency, such as a light-matter interface, where light is used for transmission and matter is used for storage and preservation of quantum features of quantum data, such as superposition or quantum coherence.

[0079] Quantum circuit elements (also known as quantum computing circuit elements) include circuit elements used to perform quantum processing operations. That is, quantum circuit elements are configured to operate on data in an indeterminate manner using quantum mechanical phenomena such as superposition and entanglement. Some quantum circuit elements (e.g., qubits) can be configured to simultaneously represent and manipulate information in more than one state. Examples of superconducting quantum circuit elements include circuit elements such as quantum LC oscillators, qubits (e.g., flux qubits, phase qubits, or charge qubits), and superconducting quantum interference devices (SQUIDs) (e.g., RF-SQUIDs or DC-SQUIDs).

[0080] In contrast, classical circuit elements typically process data in a deterministic manner. Classical circuit elements can be configured to collectively execute the instructions of a computer program by performing basic arithmetic, logic, and / or input / output operations on data, where the data is represented in analog or digital form. In some implementations, classical circuit elements can be used to send data to and / or receive data from quantum circuit elements via electrical or electromagnetic connections. Examples of classical circuit elements include CMOS-based circuit elements, fast single-throughput quantum (RSFQ) devices, reversible quantum logic (RQL) devices, and ERSFQ devices (an energy-efficient version of RSFQ that does not use bias resistors).

[0081] The fabrication of the quantum and classical circuit elements described herein may require the deposition of one or more materials, such as superconductors, dielectrics, and / or metals. Depending on the materials chosen, these materials can be deposited using deposition processes such as chemical vapor deposition, physical vapor deposition (e.g., evaporation or sputtering), or epitaxial techniques. The processes described herein for fabricating circuit elements may require the removal of one or more materials from the device during fabrication. Depending on the material to be removed, the removal process may include, for example, wet etching, dry etching, or stripping processes. Known lithographic techniques (e.g., photolithography or electron beam etching) can be used to pattern the materials forming the circuit elements described herein.

[0082] During the operation of a quantum computing system using superconducting quantum circuit elements and / or superconducting classical circuit elements (such as those described herein), the superconducting circuit elements are cooled within a cryostat to a temperature that allows the superconducting material to exhibit superconducting properties. A superconducting (or superconducting) material can be understood as a material that exhibits superconducting properties at or below its superconducting critical temperature. Examples of superconducting materials include aluminum (superconducting critical temperature of about 1.2 Kelvin), indium (superconducting critical temperature of about 3.4 Kelvin), NbTi (superconducting critical temperature of about 10 Kelvin), and niobium (superconducting critical temperature of about 9.3 Kelvin). Therefore, superconducting structures, such as superconducting traces and superconducting ground planes, are formed from materials that exhibit superconducting properties at or below their superconducting critical temperature.

[0083] Although this specification contains many specific implementation details, these details should not be construed as limiting the scope of claims, but rather as descriptions of features specific to particular embodiments. Certain features described in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments. Furthermore, while features may be described above as acting in a particular combination, or even initially claimed in this manner, in some cases one or more features from the claimed combination may be removed from that combination, and the claimed combination may be for sub-combinations or variations thereof.

[0084] Similarly, although operations are depicted in a specific order in the accompanying drawings, this should not be construed as requiring such operations to be performed in the specific order shown, sequentially, or all of the shown operations to obtain the desired result. For example, the actions described in the claims can be performed in a different order and still achieve the desired result. In some cases, multitasking and parallel processing are advantageous. Furthermore, the separation of the various components in the above embodiments should not be construed as requiring such separation in all embodiments.

[0085] Many embodiments have been described. However, it should be understood that various modifications can be made without departing from the spirit and scope of the invention. Therefore, other embodiments are within the scope of the appended claims.

Claims

1. A flexible wiring device, comprising: The first flexible cabling includes A first elongated flexible substrate having a first electromagnetic shielding folded region. The first plurality of conductive traces are arranged on the first side of the first elongated flexible substrate. The first electromagnetic shielding folded region provides electromagnetic shielding between the first and second conductive traces of the first plurality of conductive traces. as well as The second flexible cabling includes A second elongated flexible substrate having a second electromagnetic shielding folded region The second plurality of conductive traces are arranged on the first side of the second elongated flexible substrate. The second electromagnetic shielding folded region provides electromagnetic shielding between the first and second conductive traces of the second plurality of conductive traces, and The first flexible wiring is combined with the second flexible wiring.

2. The apparatus of claim 1, wherein the first electromagnetic shielding folded region includes a first protruding band in the first elongated flexible substrate, and The second electromagnetic shielding folded region includes a second raised band in the second elongated flexible substrate.

3. The apparatus of claim 2, wherein the length of the first raised band extends parallel to the length of the first plurality of conductive traces, and the length of the second raised band extends parallel to the length of the second plurality of conductive traces.

4. The apparatus according to claim 1, wherein the first electromagnetic shielding folded region includes a first groove, and wherein the second electromagnetic shielding folded region includes a second groove.

5. The apparatus of claim 4, wherein the first groove extends parallel to the length of the first plurality of conductive traces, and The second groove extends parallel to the length of the second plurality of conductive traces.

6. The apparatus of claim 4, wherein the first groove extends into the first elongated flexible substrate, and The second groove extends into the second elongated flexible substrate.

7. The device of claim 6, wherein the first groove has a depth between approximately 1 micrometer and approximately 500 micrometers, and The second groove has a depth between approximately 1 micrometer and approximately 500 micrometers.

8. The device of claim 6, wherein the first groove has a width between approximately 10 micrometers and approximately 1 mm, and The second groove has a width between approximately 10 micrometers and approximately 1 mm.

9. The apparatus of claim 4, wherein the first flexible wiring includes a first shielding layer, wherein the second flexible wiring includes a second shielding layer, wherein the first groove is formed in the first shielding layer, and wherein the second groove is formed in the second shielding layer.

10. The apparatus of claim 4, wherein the first flexible wiring includes a first shielding layer, wherein the second flexible wiring includes a second shielding layer, wherein the first shielding layer covers the first groove, and wherein the second shielding layer covers the second groove.

11. The apparatus of claim 1, wherein the first electromagnetic shielding folded region includes a first plurality of grooves, and wherein the second electromagnetic shielding folded region includes a second plurality of grooves.

12. A system for cryogenic applications, comprising: Low-temperature thermostat; A quantum information processing system within the cryostat; and Flexible wiring within the cryostat and connected to the quantum information processing system, wherein the flexible wiring includes... Part One includes A first elongated flexible substrate having a first electromagnetic shielding folded region. The first plurality of conductive traces are arranged on the first side of the first elongated flexible substrate. The first electromagnetic shielding folded region provides electromagnetic shielding between the first and second conductive traces of the first plurality of conductive traces. and Part Two includes A second elongated flexible substrate having a second electromagnetic shielding folded region The second plurality of conductive traces are arranged on the first side of the second elongated flexible substrate. The second electromagnetic shielding folded region provides electromagnetic shielding between the first and second conductive traces of the second plurality of conductive traces, and The first part is combined with the second part.

13. The system of claim 12, wherein the first electromagnetic shielding folded region includes a first raised band in the first elongated flexible substrate, and The second electromagnetic shielding folded region includes a second raised band in the second elongated flexible substrate.

14. The system of claim 13, wherein the length of the first raised band extends parallel to the length of the first plurality of conductive traces, and the length of the second raised band extends parallel to the length of the second plurality of conductive traces.

15. The system of claim 12, wherein the first electromagnetic shielding folded region includes a first groove, and wherein the second electromagnetic shielding folded region includes a second groove.

16. The system of claim 15, wherein the first groove extends parallel to the length of the first plurality of conductive traces, and The second groove extends parallel to the length of the second plurality of conductive traces.

17. The system of claim 15, wherein the first groove extends into the first elongated flexible substrate, and The second groove extends into the second elongated flexible substrate.

18. The system of claim 17, wherein the first groove has a depth between approximately 1 micrometer and approximately 500 micrometers, and The second groove has a depth between approximately 1 micrometer and approximately 500 micrometers.

19. The system of claim 15, wherein the first portion of the flexible wiring includes a first shielding layer, the second portion of the flexible wiring includes a second shielding layer, wherein the first groove is formed in the first shielding layer, and wherein the second groove is formed in the second shielding layer.

20. The system of claim 15, wherein the first portion of the flexible wiring includes a first shielding layer, the second portion of the flexible wiring includes a second shielding layer, wherein the first shielding layer covers the first groove, and wherein the second shielding layer covers the second groove.

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