Display panel and display device

Abstract

Embodiments of the present application provide a display panel and a display device, the display panel comprising a pixel circuit and a light emitting device electrically connected, a control end of a power voltage writing module is electrically connected with a first light emitting control signal line, and a control end of a light emitting control module is electrically connected with a second light emitting control signal line. One working cycle of the pixel circuit comprises a first stage and a second stage, there is a first phase difference between a control signal transmitted by the second light emitting control signal line and a control signal transmitted by the first light emitting control signal line, and the first phase difference in the second stage is different from the first phase difference in the first stage. The present application can realize light emitting brightness compensation, avoid flickering of the display panel, and improve display effect of the display panel. Moreover, light emitting duration can be flexibly adjusted, accurate compensation of light emitting brightness is realized, and problems such as overcompensation and insufficient compensation are avoided.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel and display device. Background Technology

[0002] Organic light-emitting diode (OLED) display panels have advantages such as low power consumption, self-illumination, wide viewing angle, wide temperature characteristics and fast response speed, and are widely used in the market.

[0003] In existing display panels, due to the operating characteristics of the driving transistors, there is a significant difference in luminous brightness between the first and second light-emitting stages, affecting the display effect, especially noticeable in low-frequency display conditions. The first light-emitting stage includes both the data writing and light-emitting phases, while the second light-emitting stage occurs after the first stage but does not include the data writing phase and does include the light-emitting phase. Application content

[0004] In view of this, the present application provides a display panel and a display device that solve the above problems.

[0005] In a first aspect, embodiments of this application provide a display panel, including a pixel circuit and a light-emitting device electrically connected. The pixel circuit includes: a driving transistor for generating a light-emitting driving current; a power supply voltage writing module, the input terminal of which is electrically connected to a power supply voltage signal line, the output terminal of which is electrically connected to a first electrode of the driving transistor, and the control terminal of which is electrically connected to a first light-emitting control signal line; and a light-emitting control module, the input terminal of which is electrically connected to a second electrode of the driving transistor, the output terminal of which is electrically connected to the light-emitting device, and the control terminal of which is electrically connected to a second light-emitting control signal line. One working cycle of a pixel circuit includes a first stage and a second stage that occurs after the first stage. The first stage includes a data writing stage and a light emission stage that occurs after the data writing stage; the second stage includes the light emission stage. There is a first phase difference between the control signal transmitted by the second light-emitting control signal line and the control signal transmitted by the first light-emitting control signal line. The first phase difference in the second stage is different from the first phase difference in the first stage.

[0006] In one implementation of the first aspect, the first phase difference in the second stage is smaller than the first phase difference in the first stage.

[0007] In one implementation of the first aspect, a working cycle of the pixel circuit includes multiple second stages, each with the same first phase difference.

[0008] In one implementation of the first aspect, a working cycle of the pixel circuit includes multiple second stages, at least some of which have different first phase differences.

[0009] In one implementation of the first aspect, during one operating cycle of the pixel circuit, the first phase difference in each of the second stages gradually decreases.

[0010] In one implementation of the first aspect, the pixel circuit further includes a data writing module and a threshold capturing module. The input terminal of the data writing module is electrically connected to the first signal line and the output terminal is electrically connected to the first electrode of the driving transistor. The input terminal of the threshold capturing module is electrically connected to the second electrode of the driving transistor and the output terminal is electrically connected to the gate of the driving transistor. During the data writing phase, the data writing module and the threshold capture module are activated, and the first signal line transmits the data voltage.

[0011] In one implementation of the first aspect, the second stage also includes a conditioning stage, which is performed before the emission stage; During the adjustment phase, the data writing module is turned on and the threshold capture module is turned off, and the first signal line transmits the adjustment voltage.

[0012] In one implementation of the first aspect, the duration between the closing time of the data writing module and the opening time of the power supply voltage writing module is a first duration, and the first duration in the first stage is the same as the first duration in the second stage.

[0013] In one implementation of the first aspect, the pixel circuit further includes a first reset module, wherein the input terminal of the first reset module is electrically connected to a first reset signal line and the output terminal is electrically connected to the gate of the driving transistor. The first stage also includes a reset stage, which takes place before the data writing stage. During the reset stage, the first reset module is activated.

[0014] In one implementation of the first aspect, during the light-emitting stage, both the power supply voltage writing module and the light-emitting control module are turned on.

[0015] Secondly, embodiments of this application provide a display device, including a display panel as provided in the first aspect.

[0016] In this embodiment, the first phase difference in the first stage is different from the first phase difference in the second stage. This allows for adjustment of the difference between the two phase differences, thereby compensating for the difference in luminance of the display panel within one cycle T. The inclusion of a first luminance control signal line and a second luminance control signal line in the pixel circuit facilitates flexible adjustment of the timing of the luminance control signal transmission. Based on the change in luminance within one cycle, the difference between the two phase differences can be precisely adjusted, resulting in a more accurate adjustment of the luminance duration difference between the first and second stages. This ensures accurate compensation for luminance within one cycle, avoiding problems such as overcompensation or undercompensation. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 A schematic diagram of a display panel provided in an embodiment of this application; Figure 2 for Figure 1 The diagram shows a schematic of a pixel circuit. Figure 3 for Figure 2 A schematic diagram of a pixel circuit is shown. Figure 4 A timing diagram of a pixel circuit provided for an embodiment of this application; Figure 5 A timing diagram of yet another pixel circuit provided in an embodiment of this application; Figure 6 A timing diagram of yet another pixel circuit provided in an embodiment of this application; Figure 7 A timing diagram of yet another pixel circuit provided in an embodiment of this application; Figure 8 A timing diagram of yet another pixel circuit provided in an embodiment of this application; Figure 9 This is a schematic diagram of a display device provided in an embodiment of this application. Detailed Implementation

[0019] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0020] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0021] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0022] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0023] In the description of this specification, it should be understood that the terms "substantially", "approximately", "about", "about", "generally", "largely" used in the claims and embodiments of this application refer to values ​​that can be generally agreed upon within a reasonable range of process operations or tolerances, rather than a precise value.

[0024] It should be understood that although terms such as "first," "second," etc., may be used to describe poles, light emission control signal lines, stages, etc., in the embodiments of this application, these poles, light emission control signal lines, stages, etc., should not be limited to these terms. These terms are only used to distinguish poles, light emission control signal lines, stages, etc., from each other. For example, without departing from the scope of the embodiments of this application, a first pole may also be referred to as a second pole, and similarly, a second pole may also be referred to as a first pole.

[0025] Through meticulous and in-depth research, the applicant in this case has provided a solution to the problems existing in the prior art.

[0026] Figure 1 This is a schematic diagram of a display panel provided in an embodiment of this application. Figure 2 for Figure 1 The diagram shows a schematic of a pixel circuit. Figure 3 for Figure 2 The diagram shows a schematic of a pixel circuit. Figure 4 This is a timing diagram of a pixel circuit provided in an embodiment of this application.

[0027] This application embodiment provides a display panel 100, combined with... Figures 1-3 As shown, the device includes a pixel circuit 200 and a light-emitting device 300 that are electrically connected. The pixel circuit 200 includes: The driving transistor Md is used to generate a light-emitting driving current. The pixel circuit 200 can transmit the light-emitting driving current to the first electrode 3001 of the light-emitting device 300 to drive the light-emitting device 300 to emit light.

[0028] The light-emitting device 300 can be an organic light-emitting diode, and the first electrode 3001 of the light-emitting device 300 can be its anode.

[0029] The power supply voltage writing module 10 has an input terminal 101 electrically connected to the power supply voltage signal line DL1, an output terminal 102 electrically connected to the first pole of the driving transistor Md, and a control terminal 103 electrically connected to the first light emission control signal line EM1.

[0030] Optionally, the first electrode of the driving transistor Md is the source.

[0031] The power supply voltage signal line DL1 is used to transmit the power supply voltage PVDD.

[0032] The signal transmitted by the first light-emitting control signal line EM1 is used to control the power supply voltage writing module 10 to turn on or off. When the first light-emitting control signal line EM1 transmits an enable signal to the power supply voltage writing module 10, the power supply voltage writing module 10 turns on and transmits the power supply voltage PVDD to the first terminal of the driving transistor Md. The power supply voltage PVDD can be used to generate the light-emitting driving current.

[0033] The light-emitting control module 20 has an input terminal 201 electrically connected to the second electrode of the driving transistor Md, an output terminal 202 electrically connected to the light-emitting device 300, and a control terminal 203 electrically connected to the second light-emitting control signal line EM2.

[0034] Optionally, the second electrode of the driving transistor Md is the drain.

[0035] The signal transmitted by the second light-emitting control signal line EM2 is used to control the light-emitting control module 20 to turn on or off.

[0036] The light-emitting control module 20 is used to transmit the light-emitting driving current. When the second light-emitting control signal line EM2 transmits an enable signal to the light-emitting control module 20, the light-emitting control module 20 is turned on and the light-emitting driving current is transmitted to the first electrode 3001 of the light-emitting device 300.

[0037] In one operating cycle T of the pixel circuit 200, such as Figure 4 As shown, it includes a first stage T1 and a second stage T2 that occurs after the first stage T1. The first stage T1 includes a data writing stage E1 and a light emission stage E2 that occurs after the data writing stage E1; the second stage T2 includes a light emission stage E2.

[0038] It is understandable that one working cycle T of the pixel circuit 200 can be the process of the display panel 100 displaying one frame of the image. Therefore, the image displayed by the display panel 100 in the first stage T1 and the second stage T2 is the same. This situation is usually called low-frequency display, which is beneficial to reducing energy consumption.

[0039] In existing technologies, due to the nature of the driving transistors, the brightness of light emitted in each stage of a pixel circuit's operating cycle is not entirely uniform, but rather exhibits a gradual dimming trend. Typically, the duration of light emission in the second stage is set to be longer than that in the first stage to correct this dimming problem.

[0040] However, this also presents the problem of not being able to precisely control the duration of the light-emitting phase. The pixel circuit has only one light-emitting control signal line, and the duration of the light-emitting phase is controlled by the signal transmitted through this line. The limitation is that the control signal transmitted by the light-emitting control signal line must be based on the refresh time of one row of pixel circuits in the display panel, and this control signal is used to change the duration of the second-stage light-emitting phase. This results in an inability to flexibly adjust the duration of the second-stage light-emitting phase according to the decay of the light intensity, leading to poor improvement in light intensity.

[0041] To improve this situation, the inventors of this application proposed a scheme to set two light emission control signal lines in the pixel circuit 200, setting the first light emission control signal line EM1 to control the power supply voltage writing module 10, and using the second light emission control signal line EM2 to control the light emission control module 20.

[0042] The first light-emitting control signal line EM1 and the second light-emitting control signal line EM2 are two independent light-emitting control signal lines. The timing of transmitting the control signal is directly controlled by the main control chip IC, which creates the conditions for flexibly adjusting the duration of the light-emitting stage E2.

[0043] Obviously, the light-emitting device 300 can only emit light when the power supply voltage writing module 10 and the light-emitting control module 20 are turned on simultaneously. That is, during the light-emitting stage E2, both the first light-emitting control signal line EM1 and the second light-emitting control signal line EM2 transmit enable signals.

[0044] Among them, there is a first phase difference t1 between the control signal transmitted by the second light-emitting control signal line EM2 and the control signal transmitted by the first light-emitting control signal line EM1, and the first phase difference in the second stage T2. The first phase difference t1 in the first stage T1 is different from that in the second stage T2. For ease of representation in the accompanying drawings, the first phase difference in the second stage T2 is referred to as... express.

[0045] Optionally, the pulse widths of the control signals transmitted by the first light-emitting control signal line EM1 and the second light-emitting control signal line EM2 are equal.

[0046] Optionally, the working time of the first stage T1 and the second stage T2 is the same.

[0047] Optionally, the enable signals transmitted by the first light-emitting control signal line EM1 and the second light-emitting control signal line EM2 are both low-level signals.

[0048] Specifically, in the first phase T1: Before the light emission stage E2, the first light emission control signal line EM1 transmits a pulse signal. After a period of time t1, the second light emission control signal line EM2 transmits a pulse signal.

[0049] Of course, each pulse signal contains a rising edge and a falling edge. The rising edge of the pulse signal transmitted by the first light-emitting control signal line EM1 is t1 ahead of the rising edge of the pulse signal transmitted by the second light-emitting control signal line EM2. Therefore, the falling edge of the pulse signal transmitted by the first light-emitting control signal line EM1 is also t1 ahead of the falling edge of the pulse signal transmitted by the second light-emitting control signal line EM2.

[0050] The data writing stage E1 must be completed before the light emission stage E2.

[0051] During the data writing phase E1, the data voltage Vdata is written to the gate of the driving transistor Md.

[0052] During the light-emitting stage E2, the first light-emitting control signal line EM1 sends an enable signal to the power supply voltage writing module 10, and the second light-emitting control signal line EM2 sends an enable signal to the light-emitting control module 20.

[0053] When the power supply voltage writing module 10 is turned on, it transmits the power supply voltage PVDD to the first terminal of the driving transistor Md. At this time, the potential of the first terminal of the driving transistor Md is greater than the potential of the gate, so the driving transistor Md is turned on and generates a light-emitting driving current.

[0054] At the same time, the light-emitting control module 20 is turned on, and the light-emitting control module 20 transmits the received light-emitting driving current to the first electrode 3001 of the light-emitting device 300, and the light-emitting device 300 completes the light emission.

[0055] Within the first stage T1, the duration of the luminescence stage E2 is ET.

[0056] The first stage, T1, completes its emission, and then the second stage, T2, begins.

[0057] In the second phase T2: Before the light emission stage E2, the first light emission control signal line EM1 transmits a pulse signal. After a period of time t1', the second light emission control signal line EM2 transmits a pulse signal.

[0058] The rising edge of the pulse signal transmitted by the first light-emitting control signal line EM1 is t1' earlier than the rising edge of the pulse signal transmitted by the second light-emitting control signal line EM2. Therefore, the falling edge of the pulse signal transmitted by the first light-emitting control signal line EM1 is also earlier than the falling edge of the pulse signal transmitted by the second light-emitting control signal line EM2. .

[0059] When both the first light-emitting control signal line EM1 and the second light-emitting control signal line EM2 transmit enable signals, the pixel circuit 200 once again enters the light-emitting stage E2.

[0060] The luminescence stage E2 of the second stage T2 is the same as the luminescence stage E2 in the first stage T1, and will not be described again here.

[0061] However, the emission duration in the second stage T2 differs from that in the first stage T1; the emission duration in the second stage T2 is t1 longer than that in the first stage T1. If it is necessary to change the difference in emission duration between the second stage T2 and the first stage T1, it is only necessary to change the first phase difference t1 in the first stage T1 and the first phase difference in the second stage T2. The difference is sufficient.

[0062] For example, if it is necessary to improve the problem that the light emission brightness of the light-emitting device 300 gradually decreases within a period T, it can be achieved by extending the duration of the light emission stage E2 in the second stage T2, that is, by extending the light emission duration within the second stage T2.

[0063] Let t1> Therefore, the duration of the light-emitting phase E2 in the second stage T2 is longer than the duration of the light-emitting phase E2 in the first stage T1, thus prolonging the light-emitting duration in the second stage T2.

[0064] In this embodiment of the application, the first phase difference t1 in the first stage T1 and the first phase difference in the second stage T2 are set. Different. It is advantageous to adjust the first phase difference t1 and the first phase difference... The difference is used to adjust the difference in the light emission duration between the second stage T2 and the first stage T1, which helps to compensate for the difference in light emission brightness of the display panel 100 in one cycle T.

[0065] Furthermore, setting a first light emission control signal line EM1 and a second light emission control signal line EM2 in the pixel circuit 200 facilitates flexible adjustment of the timing of the light emission control signal transmission between the two light emission control signal lines. Based on the change in light emission brightness within a period T, the first phase difference t1 and the first phase difference can be precisely adjusted. The difference is adjusted to more accurately adjust the difference in luminous duration between the first stage T1 and the second stage T2, so as to accurately compensate for the luminous brightness within a cycle T and avoid problems such as overcompensation or undercompensation.

[0066] In one embodiment of this application, such as Figure 4 As shown, the first phase difference in the second stage T2 It is less than the first phase difference t1 in the first stage T1.

[0067] That is, within one working cycle T, if the transmission pulse signal of the second light-emitting control signal line EM2 in the second stage T2 is earlier than that in the first stage T1, then the start time of the light-emitting stage E2 in the second stage T2 is also earlier than that in the first stage T1.

[0068] For the first phase difference in the second stage T2 The degree to which the light emission brightness of the light-emitting device 300 decreases from the first phase difference t1 in the first stage T1 can be determined based on the degree of brightness decay of the light-emitting device 300 in the second stage T2.

[0069] In this embodiment of the application, a first phase difference is set in the second stage T2. Less than the first phase difference in the first stage T1 This is beneficial to prolong the duration of the light-emitting stage E2 in the second stage T2, making the light-emitting duration of the second stage T2 longer than that of the first stage T1. This is beneficial to improve the light-emitting brightness attenuation in the second stage T2 and to compensate for the light-emitting brightness of the light-emitting device 300.

[0070] By monitoring the attenuation of luminous intensity during the second stage T2, the first phase difference in the second stage T2 can be flexibly set. This allows for flexible adjustment of the light-emitting duration of the light-emitting device 300 within the second stage T2, which helps improve the light-emitting stability of the light-emitting device 300 and enhance the display effect of the display panel 100.

[0071] Figure 5 This is a timing diagram of another pixel circuit provided in an embodiment of this application.

[0072] In one embodiment of this application, such as Figure 5 As shown, one operating cycle T of the pixel circuit 200 includes multiple second stages T2, and the first phase difference in each second stage T2... same.

[0073] Specifically, in order to adjust the display frequency of the display panel 100, multiple second stages T2 can be set within one working cycle T of the pixel circuit 200, which helps to reduce display power consumption.

[0074] In multiple second stages T2, the timing of pulse signal transmission on the first light-emitting control signal line EM1 is the same, and the timing of pulse signal transmission on the second light-emitting control signal line EM2 is also the same. Therefore, the start time of the light-emitting stage E2 in multiple second stages T2 is the same, and the light-emitting duration of the light-emitting device 300 is the same.

[0075] In this embodiment, when a period T of the pixel circuit 200 includes multiple second stages T2, the light emission duration of the multiple second stages T2 is set to be the same. Setting a uniform light emission duration is beneficial for navigating the first phase difference... By adjusting the emission duration, while achieving brightness compensation, the difficulty of brightness compensation adjustment is reduced, and the feasibility of adjusting the emission duration in multiple second stages T2 is improved. This avoids the situation where the emission duration needs to be adjusted one by one when there are many second stages T2 within a period T, thus reducing the operational redundancy of the pixel circuit 200.

[0076] Figure 6 This is a timing diagram of another pixel circuit provided in an embodiment of this application.

[0077] In one embodiment of this application, such as Figure 6 As shown, one operating cycle T of the pixel circuit 200 includes multiple second stages T2, at least a portion of which contain a first phase difference. different.

[0078] That is, the start time of the light-emitting stage E2 in multiple second stages T2 is different, and the light-emitting duration of the light-emitting device 300 is different in different second stages T2.

[0079] In this embodiment, a first phase difference is set in multiple second stages T2. The difference is that it allows for adjustment of the first phase difference based on the decay of luminous intensity in each second stage T2. The value of this value is beneficial for adaptively adjusting the emission duration of each second stage T2, thereby adaptively compensating for the emission brightness of each second stage T2. This largely avoids overcompensation or undercompensation caused by different levels of emission brightness compensation required for each second stage T2, facilitating precise compensation of emission brightness and further improving the stability of the emission brightness of the light-emitting device 300.

[0080] In one embodiment of this application, reference continues to be made to... Figure 6 As shown, in one operating cycle T of the pixel circuit 200, the first phase difference in each second stage T2 Gradually decrease.

[0081] Specifically, in each of the second stages T2, the timing of pulse signal transmission on the first light-emitting control signal line EM1 is the same; however, the timing of pulse signal transmission on the second light-emitting control signal line EM2 is progressively advanced, resulting in a first phase difference between the pulse signals transmitted by the first light-emitting control signal line EM1 and the pulse signals transmitted by the second light-emitting control signal line EM2. Decrease step by step.

[0082] In multiple second stages T2, the falling edge of the pulse signal transmitted by the second light-emitting control signal line EM2 is gradually advanced, thus the start time of the light-emitting stage E2 is also gradually advanced, and the light-emitting duration of the light-emitting device 300 is gradually increased.

[0083] Optionally, the first phase difference in the second stage T2 is set. The degree of gradual decrease varies.

[0084] Optionally, the first phase difference in the second stage T2 is set. The degree of gradual decrease is the same.

[0085] The first phase difference in setting the second stage T2 When the degree of gradual reduction is the same, the first phase difference in the second stage T2 can be unified according to formulas (1) and (2). The degree of change Δ2.

[0086] Δ1= (1) Δ2= (2) Where Δ1 represents the degree of brightness decay of the light-emitting device 300 within one period T, t1 represents the first phase difference in the first stage T1 within one period T, and ET represents the duration of the light-emitting stage E2 in the first stage T1 within one period T. By substituting these known parameters, the first phase difference in the last second stage T2 within one period T can be obtained. .

[0087] N represents the number of second stages T2 within a period T. -t1 represents the first phase difference t1 of the first stage T1 and the first phase difference of the last second stage T2 within a period T. The amount of change between them. Substituting these known parameters, we can obtain the first phase difference between each second stage T2 within one period T. The degree of gradual decrease Δ2.

[0088] In this embodiment of the application, within one period T of the pixel circuit 200, the first phase difference of each second stage T2 is set. Gradually decreasing the duration of light emission is beneficial for gradually increasing the duration of light emission in the second stage T2 based on the decay of light emission brightness, thereby compensating for the light emission brightness.

[0089] It is also possible to determine the first phase difference of each second stage T2. Setting a uniform, gradually decreasing degree facilitates consistent adjustments and reduces adjustment difficulty. It allows for comprehensive adjustment of the luminous intensity decay within a single cycle T, reducing the operational redundancy of the pixel circuitry 200.

[0090] In one embodiment of this application, such as Figure 2 As shown, the pixel circuit 200 also includes a data writing module 30 and a threshold capturing module 40.

[0091] The input terminal 301 of the data writing module 30 is electrically connected to the first signal line DL2, the output terminal 302 is electrically connected to the first gate of the driving transistor Md, and the control terminal 303 is electrically connected to the first control line S1. The first signal line DL2 is used to transmit the data voltage Vdata. When the first control line S1 transmits an enable signal to the data writing module 30, the data writing module 30 is turned on and transmits the data voltage Vdata to the gate of the driving transistor Md.

[0092] The input terminal 401 of the threshold grasping module 40 is electrically connected to the second electrode of the driving transistor Md, the output terminal 402 is electrically connected to the gate of the driving transistor Md, and the control terminal 403 is electrically connected to the second control line S2. When the second control line S2 transmits an enable signal to the threshold grasping module 40, the threshold grasping module 40 is turned on and the threshold voltage of the driving transistor Md is compensated to the gate of the driving transistor Md.

[0093] Figure 7 This is a timing diagram of another pixel circuit provided in an embodiment of this application.

[0094] During the data writing phase E1, such as Figure 7 As shown, both the first control line S1 and the second control line S2 transmit enable signals, the data writing module 30 and the threshold capture module 40 are turned on, and the first signal line DL1 transmits the data voltage Vdata.

[0095] The data writing module 30 transmits the data voltage Vdata to the first terminal of the driving transistor Md, while the threshold capture module 40 compensates the threshold voltage of the driving transistor Md to the gate of the driving transistor Md.

[0096] In one embodiment of this application, reference continues to be made to... Figure 7As shown, within one operating cycle T of the pixel circuit 200, the second stage T2 also includes an adjustment stage E3, which is performed before the light emission stage E2.

[0097] During the adjustment phase E3, the first control line S1 transmits an enable signal, turning on the data writing module 30. The second control signal line S2 transmits a disable signal, turning off the threshold capture module. At this time, the first signal line DL2 transmits the adjustment voltage Vint, and the data writing module 30 transmits the adjustment voltage Vint to the first terminal of the driving transistor Md to adjust the difference in bias state between the driving transistor Md in the second phase T2 and the first phase T1, maintaining stable light emission of the light-emitting device 300.

[0098] Figure 8 This is a timing diagram of another pixel circuit provided in an embodiment of this application.

[0099] In one embodiment of this application, such as Figure 8 As shown, the duration between the closing time of the data writing module 30 and the opening time of the power supply voltage writing module 10 is the first duration tim1. The first duration tim1 in the first stage T1 is the same as the first duration tim1 in the second stage T2.

[0100] In the first stage T1, the duration for which the data writing module 30 is enabled can be the same as the duration for which it is enabled in the second stage T2. In the first stage T1, the data writing module 30 transmits the data voltage Vdata; in the second stage T2, the data writing module 30 transmits the adjustment voltage Vint.

[0101] Optionally, the data writing module 30 can be shut down when the control signal goes high.

[0102] Optionally, such as Figure 8 As shown, in the first stage T1 and the second stage T2, the first light-emitting control signal line EM1 transmits the pulse signal at the same time, and the first control line S1 transmits the enable signal to the data writing module 30 at the same time.

[0103] In this embodiment, the first duration tim1 in the first stage T1 is maintained to be the same as the first duration tim1 in the second stage T2, and the duration for which the data writing module 30 is turned on in the first stage T1 is the same as the duration for which the data writing module 30 is turned on in the second stage T2. Maintaining the same duration between the turn-on time of the data writing module 30 and the turn-on time of the power supply voltage writing module 10 in both the first stage T1 and the second stage T2 helps to ensure more accurate adjustment of the bias state of the driving transistor Md by the transmission of the adjustment voltage Vint in the second stage T2, avoiding situations where the adjustment voltage Vint transmission is delayed or the adjustment duration is insufficient, thereby helping to maintain the light emission stability of the light-emitting device 300.

[0104] In one embodiment of this application, such as Figure 2 The pixel circuit 200 shown also includes a first reset module 50, the input terminal 501 of the first reset module 50 is electrically connected to the first reset signal line SL1, the output terminal 502 is electrically connected to the gate of the driving transistor Md, and the control terminal 503 is electrically connected to the third control line S3.

[0105] The first reset signal line SL1 is used to transmit the first reset voltage Vref1. When the third control line S3 transmits the enable signal, the first reset module 50 transmits the first reset voltage Vref1 to the gate of the driving transistor Md.

[0106] The first reset module 50 is used to reset the gate of the driving transistor Md to improve the accuracy of the gate potential of the driving transistor Md during the data writing stage E1.

[0107] The pixel circuit 200 also includes a second reset module 60, the input terminal 601 of which is electrically connected to the second reset signal line SL2, the output terminal 602 of which is electrically connected to the first pole 3001 of the light-emitting device 300, and the control terminal 603 of which is electrically connected to the first control line S1.

[0108] The second reset signal line SL2 is used to transmit the second reset voltage Vref2. When the first control line S3 transmits the enable signal, the second reset module 60 transmits the second reset voltage Vref2 to the first electrode 3001 of the light-emitting device 300.

[0109] The second reset module 60 is used to reset the light-emitting device 300 to improve the accuracy of the light-emitting drive current received by the light-emitting device 300 during the light-emitting stage E2.

[0110] like Figure 7 As shown, within one working cycle T of the pixel circuit 200, the first stage T1 also includes a reset stage E4. The reset stage E4 is performed before the data writing stage E1. During the reset stage E4, the first reset module 50 is turned on.

[0111] During the reset phase E4, the third control line S3 transmits an enable signal, the first reset module 50 is turned on, and the first reset voltage Vref1 is transmitted to the gate of the driving transistor Md.

[0112] During the data writing phase E1, the first control signal line S1 transmits an enable signal, and both the second reset module 60 and the data writing module 30 are turned on. The second reset module 60 transmits the second reset voltage Vref2 to the first electrode 3001 of the light-emitting device 300. The data writing module 30 writes the data voltage Vdata to the driving transistor Md.

[0113] In one embodiment of this application, during the light emission stage E2, combined with Figure 2 , Figure 4 As shown, both the power supply voltage writing module 10 and the light emission control module 20 are turned on.

[0114] The first light-emitting control line EM1 controls the power supply voltage writing module 10. When the first light-emitting control signal line EM1 transmits an enable signal, the power supply voltage writing module 10 can be turned on, and the driving transistor Md can then generate the light-emitting driving current. At this time, the light-emitting driving current flows out from the second terminal of the driving transistor Md.

[0115] The second light-emitting control line EM2 controls the light-emitting control module 20. When the second light-emitting control signal line EM2 transmits an enable signal, the light-emitting control module 20 can be turned on, so that the light-emitting driving current can flow through the light-emitting control module 20 to the light-emitting device 300, and the light-emitting device 300 completes the light emission.

[0116] In addition, such as Figure 3 As shown, in the pixel circuit 200 proposed in this application, the power supply voltage writing module 10 includes a first transistor M1. The first electrode of the first transistor M1 receives the power supply voltage PVDD, the second electrode is electrically connected to the second node N2, and the gate is electrically connected to the first light emission control signal line EM1.

[0117] The light-emitting control module 20 includes a second transistor M2, the first terminal of the second transistor M2 is electrically connected to the third node N3, the second terminal is electrically connected to the first terminal 3001 of the light-emitting device 300, and the gate is electrically connected to the second light-emitting control signal line EM2.

[0118] The data writing module 30 includes a third transistor M3. The first terminal of the third transistor M3 receives the data voltage Vdata, the second terminal is electrically connected to the second node N2, and the gate is electrically connected to the first control line S1.

[0119] The threshold capture module 40 includes a fourth transistor M4 and a fifth transistor M5. The first terminal of the fourth transistor M4 is electrically connected to the fourth node N4, the second terminal is electrically connected to the first node N1, and the gate is electrically connected to the second control line S2. The first terminal of the fifth transistor M5 is electrically connected to the third node N3, the second terminal is electrically connected to the fourth node N4, and the gate is electrically connected to the second control line S2.

[0120] The fourth transistor M4 and the fifth transistor M5 have the same channel type.

[0121] The first reset module 50 includes a sixth transistor M6 and a seventh transistor M7. The first terminal of the sixth transistor M6 receives a first reset voltage Vref1, the second terminal is electrically connected to the fifth node N5, and the gate is electrically connected to the third control line S3. The first terminal of the seventh transistor M7 is electrically connected to the fifth node N5, the second terminal is electrically connected to the first node N1, and the gate is electrically connected to the third control signal line S3.

[0122] The sixth transistor M6 and the seventh transistor M7 have the same channel type.

[0123] The second reset module 60 includes an eighth transistor M8. The first terminal of the eighth transistor M8 receives the second reset voltage Vref2, the second terminal is electrically connected to the first terminal 3001 of the light-emitting device 300, and the gate is electrically connected to the first control line S1.

[0124] The third transistor M3 has the same channel type as the eighth transistor M8.

[0125] Figure 9 This is a schematic diagram of a display device provided in an embodiment of this application.

[0126] This application embodiment also provides a display device 200, such as... Figure 9 As shown, the display device 200 includes the display panel 100 provided in the above embodiments. The display device 200 provided in this application embodiment can be a mobile phone. In addition, the display device 200 provided in this application embodiment can also be a computer, television, or other display device.

[0127] In the display device 200, a first phase difference t1 in the first stage T1 and a first phase difference in the second stage T2 are set. Different. It is advantageous to adjust the first phase difference t1 and the first phase difference... The difference is used to adjust the difference in the light emission duration between the second stage T2 and the first stage T1, which helps to compensate for the difference in light emission brightness of the display panel 100 in one cycle T.

[0128] Furthermore, setting a first light emission control signal line EM1 and a second light emission control signal line EM2 in the pixel circuit 200 facilitates flexible adjustment of the timing of the light emission control signal transmission between the two light emission control signal lines. Based on the change in light emission brightness within a period T, the first phase difference t1 and the first phase difference can be precisely adjusted. The difference is adjusted to more accurately adjust the difference in luminous duration between the first stage T1 and the second stage T2, so as to accurately compensate for the luminous brightness within a cycle T and avoid problems such as overcompensation or undercompensation.

[0129] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A display panel, characterized in that, The pixel circuit includes an electrically connected pixel circuit and a light-emitting device, the pixel circuit comprising: A driving transistor is used to generate a light-emitting driving current. A power supply voltage writing module, wherein the input terminal of the power supply voltage writing module is electrically connected to the power supply voltage signal line, the output terminal is electrically connected to the first electrode of the driving transistor, and the control terminal is electrically connected to the first light emission control signal line; The light-emitting control module has an input terminal electrically connected to the second electrode of the driving transistor, an output terminal electrically connected to the light-emitting device, and a control terminal electrically connected to the second light-emitting control signal line. One operating cycle of the pixel circuit includes a first stage and a second stage performed after the first stage. The first stage includes a data writing stage and a light emission stage performed after the data writing stage; the second stage includes the light emission stage. There is a first phase difference between the control signal transmitted by the second light-emitting control signal line and the control signal transmitted by the first light-emitting control signal line. The first phase difference in the second stage is different from the first phase in the first stage. The pulse widths of the control signals transmitted by the first light-emitting control signal line and the second light-emitting control signal line are equal.

2. The display panel according to claim 1, characterized in that, The first phase difference in the second stage is smaller than the first phase difference in the first stage.

3. The display panel according to claim 2, characterized in that, One operating cycle of the pixel circuit includes multiple second stages, and the first phase difference is the same in each of the second stages.

4. The display panel according to claim 2, characterized in that, One operating cycle of the pixel circuit includes multiple second stages, and the first phase difference is different in at least some of the second stages.

5. The display panel according to claim 4, characterized in that, During one operating cycle of the pixel circuit, the first phase difference in each of the second stages gradually decreases.

6. The display panel according to claim 1, characterized in that, The pixel circuit further includes a data writing module and a threshold capturing module. The input terminal of the data writing module is electrically connected to the first signal line and the output terminal is electrically connected to the first electrode of the driving transistor. The input terminal of the threshold capturing module is electrically connected to the second electrode of the driving transistor and the output terminal is electrically connected to the gate of the driving transistor. During the data writing phase, the data writing module and the threshold capture module are activated, and the first signal line transmits data voltage.

7. The display panel according to claim 6, characterized in that, The second stage also includes a conditioning stage, which is performed before the light emission stage; During the adjustment phase, the data writing module is turned on and the threshold capture module is turned off, and the first signal line transmits the adjustment voltage.

8. The display panel according to claim 7, characterized in that, The duration between the closing time of the data writing module and the opening time of the power supply voltage writing module is a first duration, and the first duration in the first stage is the same as the first duration in the second stage.

9. The display panel according to claim 6, characterized in that, The pixel circuit further includes a first reset module, the input terminal of which is electrically connected to a first reset signal line and the output terminal of which is electrically connected to the gate of the driving transistor. The first stage also includes a reset stage, which is performed before the data writing stage, during which the first reset module is activated.

10. The display panel according to claim 1, characterized in that, During the light-emitting stage, both the power supply voltage writing module and the light-emitting control module are turned on.

11. A display device, characterized in that, Includes the display panel as described in any one of claims 1-10.

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