Control device for conducting valley selection and switching lock of flyback switching power supply

Abstract

The application provides a control device for turn-on valley selection, switching and locking of a flyback switching power supply, comprising a load detection module, a valley bottom selection oscillator, a valley bottom detection module, a logic operation module and a switching control module, wherein in a quasi-resonant control mode, the control device selects an appropriate resonant valley bottom to turn on a switching tube according to the size of the load of the switching power supply by using a frequency control method; meanwhile, a hysteresis frequency between an increase valley frequency and a decrease valley frequency is set when switching between adjacent valley bottoms, and the hysteresis frequency difference is related to the output power of the system, so that the phenomenon of valley jumping, the output envelope ripple problem and the audio noise problem are avoided. Therefore, the control device has high adaptability in the popular AC-DC flyback switching power supply suitable for mobile phones and notebook computers.

Description

Technical Field

[0001] This invention belongs to the field of switching power supply technology, specifically relating to a control device for selecting, switching, and locking the conduction valley of a flyback switching power supply. Background Technology

[0002] AC-DC switching power supplies are an important part of the power management market. Their function is to safely and reliably convert AC mains power into a stable DC voltage. AC-DC switching power supplies with flyback topology are widely used in low-power personal electronic power products. Figure 1 This is a typical flyback switching power supply structure used in mobile phone and laptop chargers. The input is AC voltage, which is converted to DC voltage after EMI filtering and rectification by a rectifier bridge. Energy is then transferred to the secondary side via a transformer, achieving the conversion of high-voltage AC input to a stable low-voltage DC output. Specifically, during the turn-on period of the main switch M1, the primary-side transformer stores energy; during the turn-off period of the main switch M1, the primary-side transformer releases energy to the secondary-side transformer. The signal controlling the turn-on or turn-off of the main switch M1 is generated by the power management IC, which receives the signal fed back from the secondary-side output to the primary side. Based on the magnitude of the feedback, it determines the turn-on and turn-off times of the main switch M1. During this period, the RCD circuit absorbs the energy stored in the leakage inductance. The protocol and interface circuit determine the output voltage value of this flyback switching power supply.

[0003] In the operation of a flyback switching power supply, the turn-on loss of the main switching transistor is a significant component of the total system loss. The smaller the product of the current flowing through the main switching transistor and the voltage across the source-drain parasitic capacitance at turn-on, the lower the turn-on loss. Therefore, the QR (Quasi-resonant) control mode, with its higher transmission efficiency, has gradually replaced traditional PWM and PFM control modes and has gained widespread application; for example... Figure 2 As shown, in the quasi-resonant control mode, the primary inductor will resonate with the parasitic capacitance of the main switch. Depending on the load of the switching power supply, the main switch is turned on at an appropriate resonant valley. The voltage across the source-drain parasitic capacitance is the lowest, and the current flowing through the main switch is also close to zero. This control method greatly reduces the turn-on loss of the main switch.

[0004] However, in the quasi-resonant control mode, changes in the load at the output of the flyback switching power supply alter the valley number selected when the main switch turns on. This valley switching threshold is related to the feedback quantity corresponding to the load. If the load is stable and the corresponding feedback quantity is the same as the valley switching threshold, it will cause the main switch to continuously switch at low frequencies between two or more adjacent valleys, leading to output envelope ripple and audio noise problems, which urgently need to be addressed.

[0005] Chinese patent application CN115864853A discloses a control circuit and method for valley latching and switching based on output power. The method calculates the output power detection value of the switching power supply based on the output voltage and output current detection values; compares the output power detection value with a preset valley switching power threshold and outputs the comparison result; and performs valley latching and switching based on the comparison result. However, this solution requires monitoring the output current on the secondary side of the flyback converter from the primary side, necessitating additional external components such as auxiliary windings. Furthermore, it places high demands on the circuit design for monitoring the output current, resulting in a complex circuit scale and high cost.

[0006] Chinese patent application CN209963955U discloses a quasi-resonant valley locking method without feedback reference. To address the issue of alternating opening of two adjacent valleys under specific loads causing jitter frequencies within the human hearing range, resulting in audio noise in the transformer, a power controller is designed. This controller includes a first counter configured as a reference valley value and a second counter configured as the current required valley value. When the first and second counters count equally, the switching transistor is turned on, improving the stability of the power converter valley locking system. However, this solution lacks a feedback reference, and the valley addition and subtraction thresholds remain consistent. Therefore, it cannot avoid the influence of audio noise when the load undergoes periodic changes. Furthermore, this technology suffers from the difficulty of obtaining the reference valley value. Summary of the Invention

[0007] In view of the above, the present invention provides a control device for selecting, switching and locking the conduction valley of a flyback switching power supply, which can solve the output envelope ripple problem and audio noise problem caused by low-frequency valley switching in the traditional quasi-resonant control mode.

[0008] A control device for selecting, switching, and locking the conduction valley of a flyback switching power supply, comprising:

[0009] The load detection module is used to detect the load feedback voltage of the flyback switching power supply and convert it into a current feedback signal that reflects the load condition.

[0010] The valley selection oscillator uses the leading edge blanking pulse of the flyback switching power supply main switch transistor turn-on (which is high level each time the main switch transistor is turned on) as the reset signal to oscillate and sample the current feedback signal to output the valley signal plus or minus;

[0011] The valley detection module is used to detect the moment when the resonant wave valley reaches the valley when the flyback switching power supply enters the resonant state, and outputs the valley detection signal; at the same time, it counts each time the resonant wave valley reaches the valley and outputs the current conduction valley count signal.

[0012] The logic operation module performs digital logic operations based on the addition / subtraction valley signal and the current conduction valley count signal to output a conduction signal that determines the resonant wave valley sequence number at the turn-on time of the main switch transistor.

[0013] The switching control module, based on the conduction signal, valley detection signal, current sampling signal of the primary excitation inductor of the flyback switching power supply, and load feedback voltage, provides an output switching control signal to the gate of the main switching transistor through logic control.

[0014] Furthermore, the load detection module includes:

[0015] The oscillator circuit uses the leading-edge blanking pulse as a reset signal to control the oscillation of the current feedback signal and generate a square wave signal.

[0016] The valley signal generation circuit is used to sample the square wave signal each time the main switch is turned on, and generate valley signals Vosc1 and Vosc2, which respectively reflect whether the resonance valley index at the current main switch turn-on time needs to be moved forward and backward.

[0017] Furthermore, the oscillator circuit includes a PMOS transistor M1, a charging current source, a discharging current source, NMOS transistors M2 and M3, a capacitor C1, comparators CMP1 and CMP2, an inverter, and an RS flip-flop. The source of M1 is connected to the power supply voltage, and the drain of M1 is connected to the input of the charging current source. The output of the charging current source is connected to the input of the discharging current source, the drain of M3, one end of C1, the inverting input of CMP1, and the non-inverting input of CMP2. The non-inverting input of CMP1 is connected to a reference voltage Vref2, and the inverting input of CMP2 is connected to... The reference voltage Vref1 is used. The output of CMP1 is connected to the S input of the RS flip-flop, the output of CMP2 is connected to the R input of the RS flip-flop, the Q output of the RS flip-flop is connected to the input of the inverter, the output of the inverter is connected to the gate of M1 and the gate of M2 to generate a square wave signal, the gate of M3 is connected to the reset signal, the output of the discharge current source is connected to the drain of M2, the source of M2 is connected to the source of M3 and the other end of C1 and grounded; the current magnitude of the charging current source depends on the current feedback signal, and the current magnitude of the discharge current source is a given constant.

[0018] Furthermore, the valley signal generation circuit consists of two D flip-flops D1 and D2 and an inverter. The input of the inverter is connected to the clock terminal of D1 and to the square wave signal. The inputs of D1 and D2 are both connected to the power supply voltage. The output of D1 generates the valley signal Vosc1, and the output of D2 generates the valley signal Vosc2.

[0019] Furthermore, the reset terminals of the flip-flops D1 and D2 are controlled by the reset signal after a short delay, ensuring that the two flip-flops read out the square wave signal of the previous cycle before being reset, so as to output the plus and minus valley signals Vosc1 and Vosc2.

[0020] Furthermore, the logic operation module includes a signal generator, a preset valley counter, a current valley counter, two AND gates AG1 and AG2, two XOR gates OR1 and OR2, and an XNOR gate. The signal generator receives the valley addition and subtraction signals Vosc1 and Vosc2, and after logic operation and delay, outputs the valley addition signal INC and the valley subtraction signal DEC. The first input of AG1 is connected to the output of OR1, and the second input of AG1 is connected to INC. The first input of AG2 is connected to the output of OR2, and the second input of AG2 is connected to DEC. The input terminals of the valley counter are connected to the output terminals of AG1 and AG2 respectively, and output a three-bit binary digital code signal A through counting. The two input terminals of OR1 are connected to the preset three-bit digital code

[110] and digital code signal A respectively. The two input terminals of OR2 are connected to the preset three-bit digital code

[000] and digital code signal A respectively. The input terminal of the current valley counter is connected to the current conducting valley counting signal, and outputs a three-bit binary digital code signal B through counting. The two input terminals of the XOR gate are connected to the digital code signals A and B respectively. The output terminal of the XOR gate generates the conducting signal.

[0021] Furthermore, the operational logic of the signal generator is as follows:

[0022] When both Vosc1 and Vosc2 are high, INC is low and DEC is high.

[0023] When both Vosc1 and Vosc2 are low, INC is high and DEC is low.

[0024] When Vosc1 is low and Vosc2 is high, then INC and DEC are both low.

[0025] When the above three situations occur, the output of the signal generator will only flip and output the corresponding signal after 360 PWM cycles.

[0026] Furthermore, the switch control module includes an OR gate, an RS flip-flop, an error amplifier, and a drive circuit. The two inputs of the OR gate are respectively connected to the turn-on signal and the valley detection signal. The output of the OR gate is connected to the S input of the RS flip-flop. The non-inverting input of the error amplifier is connected to the load feedback voltage, and the inverting input of the error amplifier is connected to the current sampling signal of the primary magnetizing inductor. The output of the error amplifier is connected to the R input of the RS flip-flop. The Q output of the RS flip-flop is connected to the input of the drive circuit. The output of the drive circuit outputs a switch control signal to the gate of the main switch transistor.

[0027] The present invention also provides a charger that includes the above-mentioned control device, which enables valley locking to ensure the stability of the charger and avoid audio noise from the charger.

[0028] Based on the above technical solution, the control device of the present invention can solve the problem of continuous low-frequency switching of the switching transistor between two or more adjacent valleys caused by the same feedback quantity and valley switching threshold when the load is stable in the prior art, as well as the output envelope ripple and audio noise problems caused thereby. It can avoid the phenomenon of jumping between valleys and the output envelope ripple and audio noise problems, and has high adaptability in today's popular AC-DC flyback switching power supplies for mobile phones and laptops. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of a typical flyback switching power supply structure.

[0030] Figure 2 for Figure 1 Waveforms of the drain voltage, gate drive signal, and current flowing through the switching transistor M1.

[0031] Figure 3 This diagram illustrates the relationship between the feedback voltage, the conduction wave valley number, and the switching frequency under traditional quasi-resonant control mode.

[0032] Figure 4 This is a block diagram of the control device for selecting, switching, and locking the conduction valley of the present invention.

[0033] Figure 5 This is a block diagram illustrating the application of the control device of the present invention in an AC-DC switching power supply system with a flyback topology.

[0034] Figure 6 A schematic diagram of the circuit structure for selecting an oscillator at the bottom of the valley.

[0035] Figure 7 A schematic diagram of the output waveforms of each key node in the oscillator circuit selected for the valley bottom.

[0036] Figure 8This is a schematic diagram of the circuit structure of the logic operation module.

[0037] Figure 9 This is a schematic diagram of the operational logic of the signal generator in the logic operation module.

[0038] Figure 10 This is a schematic diagram showing the relationship between the feedback voltage, the conduction wave valley number, and the switching frequency under the control of the device of the present invention. Detailed Implementation

[0039] To describe the present invention in more detail, the technical solution of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0040] In traditional quasi-resonant control mode, for the switching between conduction troughs of adjacent ordinal numbers, the corresponding valley addition threshold and valley subtraction threshold are the same. These thresholds are typically frequency signals, the magnitude of which is obtained by monitoring the feedback signal corresponding to the load. When the load changes, causing the output power to decrease from high to low, under the same ordinal number valley bottom conduction state, the on-time of the switching transistor gradually decreases, causing the switching frequency to increase. When the switching frequency reaches the threshold corresponding to the valley addition threshold, the conduction trough ordinal number switches backward. Conversely, when the load changes, causing the output power to increase from low to high, under the same ordinal number valley bottom conduction state, the on-time of the switching transistor gradually increases, causing the switching frequency to decrease. When the switching frequency reaches the threshold corresponding to the valley subtraction threshold, the conduction trough ordinal number switches forward. Figure 3 The relationship between feedback voltage, conduction valley number, and switching frequency under traditional quasi-resonant control mode is given. If the power stability point is near the power corresponding to the valley cut-off point shown in the figure when the load is stable, the conduction valley number at the moment the switch is turned on will jump back and forth at a lower frequency at the corresponding conduction valley.

[0041] To address the output envelope ripple and audio noise issues caused by low-frequency valley switching in traditional quasi-resonant control modes, this invention provides a control device for selecting, switching, and locking the conduction valley of a flyback switching power supply.

[0042] Figure 4The structural principle framework of one embodiment of the control device of the present invention is given. The control device includes a load detection module, a valley selection oscillator, a valley detection module, and a logic operation module. The load detection module detects the load size of the flyback converter. The valley selection oscillator uses the leading-edge blanking pulse as the reset period, receives the current signal reflecting the load size output by the load detection module, and outputs the valley addition / subtraction signal reflecting the required value under the current load. The valley detection module detects the moment when the oscillation valley reaches the valley, outputs the valley detection signal, and outputs the current conduction valley signal to the logic operation module. The logic operation module performs digital logic operations based on the valley addition / subtraction signal output by the valley selection oscillator and the current conduction valley signal output by the valley detection module to output a conduction signal. This conduction signal is ORed with the valley detection signal output by the valley detection module to jointly determine the generation of the switch turn-on signal.

[0043] In this embodiment, the control device can be applied to, for example... Figure 5 The AC-DC switching power supply system with a flyback topology shown includes a driver, an error amplifier EA, and digital logic. Pin PRT connects to the valley detection module, providing the valley detection module with the voltage waveform generated by the resonance between the parasitic capacitance and the transformer magnetizing inductance when the switching transistor M1 is off. Pin CS connects to the source of the switching transistor and the sampling resistor R1, monitoring the current in the primary inductor (i.e., the magnetizing inductor connected in parallel on the primary winding) and inputting it to the inverting input of the error amplifier EA. Pin FB connects to the output of the feedback loop and inputs it to the non-inverting input of the error amplifier EA, along with the primary inductor current. This forms a peak current control loop to control the turn-off time of the switching transistor. Simultaneously, pin FB is connected to the load detection module to provide the load feedback voltage signal to the load detection module. Pin GATE is connected to the gate of switching transistor M1 and the output terminal of the Driver to control the turn-on and turn-off of switching transistor M1. The set terminal of the RS flip-flop is connected to the switch turn-on signal PWM_ON, and the set terminal is connected to the output of the error amplifier PWM_OFF. The output terminal is connected to the Driver module to drive the main switching transistor. At the same time, the lead-edge blanking sampling is performed on the turn-on time of the main switching transistor at the output terminal of the Driver, and the lead-edge blanking pulse signal is output to the valley selection oscillator.

[0044] like Figure 6As shown, the valley-selection oscillator circuit includes MOSFETs M1-M3, capacitor C1, charging current source Icharge, discharging current source Idischarge, comparators CMP1 and CMP2, and digital logic. The magnitude of the charging current source Icharge is controlled by the feedback signal input from the load detection module; the heavier the load, the larger the charging current source Icharge. When the charging current source Icharge charges capacitor C1, causing its threshold value to reach Vref2, the set-1 input of the RS flip-flop is low, the set-0 input is high, the output is set to 0, and the Vosc square wave signal output by the inverter is high. When the discharging current source... When Idischarge discharges capacitor C1, causing its threshold to reach Vref1, the RS flip-flop's set-1 input is high and its set-0 input is low, resulting in a zero output. The Vosc square wave signal output by the inverter is low. The high-level period length of the generated square wave signal Vosc is positively correlated with the magnitude of the discharge current source Idischarge, and the low-level period length is positively correlated with the magnitude of the charging current source Icharge. It is a square wave signal with a certain duty cycle, and its duty cycle D is related to the feedback signal input at the feedback pin FB. The heavier the load, the larger the feedback signal, the larger the charging current source Icharge, and the larger the duty cycle. The square wave signal Vosc is input to the valley signal generation circuit. Flip-flop D1 receives the square wave signal Vosc from the oscillator circuit at its clock input. With its D terminal high, it triggers when the square wave signal Vosc has a falling edge, generating the valley signal Vosc1. Flip-flop D2 receives the inverted square wave signal Vosc from the oscillator circuit at its clock input. With its D terminal high, it triggers when the inverted square wave signal Vosc has a falling edge, generating the valley signal Vosc2. MOSFET M3 acts as a reset switch, controlled by the reset signal RST. RST is a leading-edge blanking pulse that sets the square wave signal Vosc output from the oscillator circuit to zero. The reset terminals of flip-flops D1 and D2 are controlled by a short delay after the reset signal RST, ensuring that the flip-flops read the previous cycle's square wave signal Vosc before resetting and output the valley signals Vosc1 and Vosc2.

[0045] Figure 7 The output waveforms of each key node of the valley-selected oscillator are given. Combined with the above circuit structure, the specific working principle of the synchronous rectification control circuit can be explained in detail.

[0046] like Figure 8 As shown, the logic operation module includes a signal generator, a preset valley counter, a current valley counter, and digital logic composed of XOR gates, XOR gates, and AND gates. The Vosc1 and Vosc2 signals are the valley addition and subtraction signals output by the valley selection oscillator circuit and are input to the signal generator. Figure 9This demonstrates the specific logic of a signal generator that generates a valley signal INC and a valley signal DEC based on the high and low levels of the valley signals Vosc1 and Vosc2: When both Vosc1 and Vosc2 are low, the signal generator output flips after 360 PWM cycles, at which point the valley signal INC is high and the valley signal DEC is low; when both Vosc1 and Vosc2 are high, the signal generator output flips after 360 PWM cycles, at which point both the valley signal INC and the valley signal DEC are low; and when both Vosc1 and Vosc2 are high, the signal generator output flips after 360 PWM cycles, at which point both the valley signal INC and the valley signal DEC are high. Figure 7 As shown, when the system is working normally, there will be no situation where Vosc1 is high and Vosc2 is low. After the output signals INC and DEC of the signal generator are processed by digital logic, they are input to the preset valley and output a three-digit digital code signal A[2:0]. This can realize counting within the six conduction valleys. When the output signal A[2:0] is

[000] or

[110] , it means that the ordinal number of the conduction valley is 1 or 6. At this time, the output signal A[2:0] will no longer be affected by the valley addition signal and the valley subtraction signal. The input to the current valley counter is the current conduction valley count signal output by the valley detection module. The output is a three-digit digital code signal B[2:0], which represents the ordinal number of the actual resonant valley of the drain voltage of the switch M1 in the current system. When the digital code signal A[2:0] is equal to B[2:0], it means that the ordinal number of the actual resonant valley is the same as the ordinal number of the preset resonant valley. At this time, the logic operation module outputs a conduction signal to the RS flip-flop to drive the switch M1 to turn on.

[0047] like Figure 10 The diagram shows the relationship between the feedback voltage, the conduction wave valley number, and the switching frequency under the control of the device of this invention. Figure 3It is evident that traditional quasi-resonant mode control technology suffers from output envelope ripple and audio noise issues caused by low-frequency valley switching. In traditional techniques, since the output power corresponding to the valley addition and subtraction thresholds between adjacent valleys is equal, when the load is stable, if the corresponding power stability point is near the power point corresponding to the valley cut, the conduction wave valley number at the moment the switch turns on will jump back and forth at a lower frequency within the corresponding conduction wave valley. However, under the control of the device of this invention, there is a hysteresis between the valley addition and subtraction frequencies when switching between adjacent valleys, and the hysteresis frequency difference is related to the load size and system output power; the larger the load, the larger the hysteresis frequency difference, thus avoiding the phenomenon of valley jumping. Compared with the current mainstream valley locking technology, the control method of this invention uses frequency signals for control, allowing free adjustment of the valley addition and subtraction frequency curves. If the chip operates in different working modes under different loads, it can easily achieve a smooth transition of the system switching frequency, exhibiting high adaptability in today's popular AC-DC flyback switching power supplies for mobile phones and laptops.

[0048] This embodiment also provides a charger that includes the aforementioned control device. The control device enables valley locking, ensuring the stability of the charger and preventing audio noise from the charger.

[0049] The above description of the embodiments is provided to enable those skilled in the art to understand and apply the present invention. Those skilled in the art can readily make various modifications to the above embodiments and apply the general principles described herein to other embodiments without creative effort. Therefore, the present invention is not limited to the above embodiments, and any improvements and modifications made to the present invention by those skilled in the art based on the disclosure thereof should be within the scope of protection of the present invention.

Claims

1. A control device for selecting, switching, and locking the conduction valley of a flyback switching power supply, characterized in that, include: The load detection module is used to detect the load feedback voltage of the flyback switching power supply and convert it into a current feedback signal that reflects the load condition. The valley selection oscillator uses the leading edge blanking pulse at the turn-on moment of the flyback switching power supply as the reset signal to oscillate and sample the current feedback signal, and output the plus or minus valley signal. The valley detection module is used to detect the moment when the resonant wave valley reaches the valley when the flyback switching power supply enters the resonant state, and outputs the valley detection signal; at the same time, it counts each time the resonant wave valley reaches the valley and outputs the current conduction valley count signal. The logic operation module performs digital logic operations based on the addition / subtraction valley signal and the current conduction valley count signal to output a conduction signal that determines the resonant wave valley sequence number at the turn-on time of the main switch transistor. The switching control module provides a switching control signal to the gate of the main switching transistor through logic control based on the conduction signal, valley detection signal, current sampling signal of the primary excitation inductor of the flyback switching power supply, and load feedback voltage. The valley-selective oscillator includes: The oscillator circuit uses the leading-edge blanking pulse as a reset signal to control the oscillation of the current feedback signal and generate a square wave signal. The valley signal generation circuit is used to sample the square wave signal each time the main switch is turned on, and generate valley signals Vosc1 and Vosc2, which respectively reflect whether the resonant valley sequence at the current main switch turn-on time needs to be moved forward or backward. The oscillator circuit includes a PMOS transistor M1, a charging current source, a discharging current source, two NMOS transistors M2 and M3, a capacitor C1, two comparators CMP1 and CMP2, an inverter INV1, and an RS flip-flop RS1. The source of PMOS transistor M1 is connected to the power supply voltage, and its drain is connected to the input of the charging current source. The output of the charging current source is connected to the input of the discharging current source, the drain of NMOS transistor M3, one end of capacitor C1, the inverting input of comparator CMP1, and the non-inverting input of comparator CMP2. The non-inverting input of comparator CMP1 is connected to a reference voltage Vref2, and the inverting input of comparator CMP2 is connected to a reference voltage Vref1. The output of comparator CMP1 is connected to the S input of RS flip-flop RS1, the output of comparator CMP2 is connected to the R input of RS flip-flop RS1, the Q output of RS flip-flop RS1 is connected to the input of inverter INV1, the output of inverter INV1 is connected to the gate of PMOS transistor M1 and the gate of NMOS transistor M2 to generate a square wave signal, the gate of NMOS transistor M3 is connected to the reset signal, the output of the discharge current source is connected to the drain of NMOS transistor M2, the source of NMOS transistor M2 is connected to the source of NMOS transistor M3 and the other end of capacitor C1 and grounded; the current magnitude of the charging current source depends on the current feedback signal, and the current magnitude of the discharging current source is a given constant.

2. The control device according to claim 1, characterized in that: The valley signal generation circuit consists of two D flip-flops D1 and D2 and an inverter INV2. The input of the inverter INV2 is connected to the clock terminal of the D flip-flop D1 and receives the square wave signal. The output of the inverter INV2 is connected to the clock terminal of the D flip-flop D2. The inputs of both the D flip-flops D1 and D2 are connected to the power supply voltage. The output of the D flip-flop D1 generates the valley signal Vosc1, and the output of the D flip-flop D2 generates the valley signal Vosc2.

3. The control device according to claim 2, characterized in that: The reset terminals of D flip-flops D1 and D2 are controlled by the reset signal after a short delay, ensuring that D flip-flops D1 and D2 read out the square wave signal of the previous cycle before being reset, so as to output the valley signal Vosc1 and the valley signal Vosc2.

4. The control device according to claim 1, characterized in that: The logic operation module includes a signal generator, a preset valley counter, a current valley counter, two AND gates AG1 and AG2, two XOR gates XOR1 and XOR2, and an XNOR gate. The signal generator receives the valley addition / subtraction signals Vosc1 and Vosc2, performs logic operations, and after a delay, outputs the valley addition signal INC and the valley subtraction signal DEC. The first input of AND gate AG1 is connected to the output of XOR gate XOR1, and the second input of AND gate AG1 receives the valley addition signal INC. The first input of AND gate AG2 is connected to the output of XOR gate XOR2, and the second input of AND gate AG2 receives the valley subtraction signal DEC. EC, the input of the preset valley counter is connected to the output of AND gate AG1 and AND gate AG2 respectively, and outputs a three-bit binary digital code signal A through counting. The two inputs of XOR gate XOR1 are connected to the preset three-bit digital code [110] and digital code signal A respectively. The two inputs of XOR gate XOR2 are connected to the preset three-bit digital code [000] and digital code signal A respectively. The input of the current valley counter is connected to the current conducting valley counting signal, and outputs a three-bit binary digital code signal B through counting. The two inputs of the XNOR gate receive digital code signal A and digital code signal B respectively. The output of the XNOR gate generates the conducting signal.

5. The control device according to claim 4, characterized in that: The operational logic of the signal generator is as follows: When both the addition and subtraction valley signals Vosc1 and Vosc2 are high, the addition valley signal INC is low and the subtraction valley signal DEC is high. When both the addition and subtraction valley signals Vosc1 and Vosc2 are low, the addition valley signal INC is high and the subtraction valley signal DEC is low. When the valley addition / subtraction signal Vosc1 is low and the valley addition / subtraction signal Vosc2 is high, then the valley addition signal INC and the valley subtraction signal DEC are both low. When the above three situations occur, the output of the signal generator will only flip and output the corresponding signal after 360 PWM cycles.

6. The control device according to claim 1, characterized in that: The switch control module includes an OR gate, an RS flip-flop RS2, an error amplifier, and a drive circuit. The two inputs of the OR gate are connected to the turn-on signal and the valley detection signal, respectively. The output of the OR gate is connected to the S input of the RS flip-flop RS2. The non-inverting input of the error amplifier is connected to the load feedback voltage, and the inverting input of the error amplifier is connected to the current sampling signal of the primary magnetizing inductor. The output of the error amplifier is connected to the R input of the RS flip-flop RS2. The Q output of the RS flip-flop RS2 is connected to the input of the drive circuit. The output of the drive circuit outputs a switch control signal to the gate of the main switch transistor.

7. A charger, characterized in that: Includes the control device as described in any one of claims 1 to 6, through which trough locking is achieved to ensure the stability of the charger and avoid audio noise from the charger.

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