A class-e inverter with double constant output based on coupled inductance design

Abstract

The application discloses a kind of E class inverter of double constant output based on coupling inductance design, belong to wireless power transmission technical field;A kind of E class inverter of double constant output based on coupling inductance design includes direct current power supply V in , input inductance L R , parallel resonance filter network and series resonance filter network, it further includes power switch S1 and parallel capacitor C R , power switch, parallel capacitor C R It is parallelly connected in series resonance filter network two ends respectively;Parallel resonance filter network includes first load resistance R1, first inductance L1 and first capacitor C1 connected in parallel structure;Series resonance filter network includes second inductance L2, second capacitor C2 and second load resistance R2 connected in series structure;Mutual inductance M exists between inductance L1, L2;By mutual inductance parameter design, CC and CV output of parallel resonance and series resonance network can be obtained respectively;Therefore, two loads can work independently, and do not affect each other, so as to simplify load power control.

Description

Technical Field

[0001] This invention belongs to the field of wireless power transmission technology, specifically relating to a Class E inverter that achieves dual constant output based on a coupled inductor design. Background Technology

[0002] In recent years, research on Class E inverters has deepened due to the widespread development of wireless power transfer (WPT) technology, which requires high switching frequencies. Unlike the widely used full-bridge and half-bridge inverters, Class E inverters require only one power switch. Furthermore, with appropriate parameter design, zero-voltage switching (ZVS) can be achieved. The power switch is located on the low-voltage side, which facilitates the design of the gate drive circuit, which does not require an isolated power supply. Therefore, Class E inverters are particularly suitable for low-power, high-frequency applications, such as wireless charging devices for mobile phones or other electronic products.

[0003] A classic Class E inverter includes a choke inductor at its input; to obtain a constant current source, this choke inductance must be sufficiently large. To reduce voltage stress on the MOSFETs, an LC filter circuit can be connected across them. Although Class E inverters can achieve zero-VS (zero voltage resistance) for MOSFETs, their operating range is narrow; deviations from the rated load resistance lead to non-ZVS operation and reduced efficiency. During battery charging, the load impedance can vary significantly, making classic Class E inverters unsuitable for WPT (Wastewater Transmission) systems.

[0004] To address the aforementioned shortcomings of classic Class E inverters, a load-independent Class E inverter has been proposed. The input choke inductor is replaced with an inductor with a finite inductance value that participates in the resonant process. The output series resonant circuit generates a constant voltage (CV) output, independent of load resistance variations. Therefore, compared to traditional Class E inverters, the series resonant Class E inverter has a wider operating range. Simultaneously, another load-independent Class E inverter has been proposed, with its output being a parallel resonant slot. It has been proven that by selecting appropriate parameters, a constant current (CC) output can be obtained. Class E inverters with constant current and constant voltage outputs can meet the needs of various scenarios.

[0005] Recently, WPTs with multiple loads have received widespread attention. Sometimes, it's necessary to use both CC and CV power supplies simultaneously in the same application. For example, when charging a battery, to extend battery life, CC charging needs to be performed first, followed by CV charging. Therefore, existing Class E inverters with only one output and independent of the load cannot meet these requirements. Summary of the Invention

[0006] To address the shortcomings of existing technologies, the present invention aims to provide a Class E inverter with dual constant output based on coupled inductor design, thus solving the problems in the prior art.

[0007] The objective of this invention can be achieved through the following technical solutions:

[0008] A Class E inverter with dual constant output based on coupled inductor design includes a DC power supply V connected in sequence. in Input inductance L R The system includes parallel resonant filter networks and series resonant filter networks, as well as a power switch S1 and a parallel capacitor C. R Power switch, parallel capacitor C R The first load resistor R1, the second inductor L1, and the first capacitor C1 are connected in parallel at both ends of the series resonant filter network. The parallel resonant filter network includes a first load resistor R1, a first inductor L1, and a first capacitor C1 connected in parallel. The series resonant filter network includes a second inductor L2, a second capacitor C2, and a second load resistor R2 connected in series. There is mutual inductance M between the inductors L1 and L2.

[0009] Furthermore, the current flowing through the first load resistor R1 is a constant output sinusoidal current with an amplitude of I1, and the voltage flowing through the second load resistor R2 is a constant output sinusoidal voltage with an amplitude of V2; the voltage of the power switch is 0 at the moment of switching on.

[0010] Furthermore, when the load changes, the outputs I1 and V2 are the input currents i and i, respectively. in and input voltage v DS The sinusoidal component is constant and needs to be compensated for. in and v DS cosine component I 1x and V 2x .

[0011] Furthermore, the parameters designed to keep the sinusoidal component constant are as follows:

[0012] tan[π(D off -1)q]=πD off q

[0013]

[0014] V2=a3V in =k1V in

[0015]

[0016] In the formula, D off L is the duty cycle for the switch's off-time. R q represents the input inductance of the inverter circuit, where q indicates the input inductance L. R and parallel capacitor C R The ratio of the resonant frequency to the switching frequency, For i in The phases of the sine and cosine components, a1, a2, and a3, are all D. off , q, The function, k1, k2 is D off The function is: V1 is the voltage across the first load resistor R1, and I2 is the current flowing through the second load resistor R2.

[0017] Furthermore, the formula for calculating q is:

[0018]

[0019] In the formula, L R For the input inductance, C R It is a parallel capacitor.

[0020] Furthermore, by compensating through a controlled voltage source related to the mutual inductance M, i in Cosine component I 1x The terms related to I2 and v DS cosine component V 2x The terms related to V1 are eliminated; and the compensation capacitor C is used to eliminate them. 1b Eliminate I 1x The terms related to V1 are compensated by inductance L. 2b Eliminate V 2x The terms related to I2.

[0021] Furthermore, mutual inductance M and compensation capacitor C 1b and compensation inductor L 2b The calculation formulas are as follows:

[0022]

[0023] Furthermore, the first load resistor R1 obtains a constant current output independent of the load, the second load resistor R2 obtains a constant voltage output independent of the load, and the power switch S1 can realize zero-voltage switching independent of the load.

[0024] Furthermore, the differential equation for the Class E inverter circuit model is:

[0025]

[0026] In the formula, v DS The voltage across the switching transistor. Let i2 be the phase angle of the current. Let v1 be the phase angle of voltage v1.

[0027] An electronic device comprising the aforementioned Class E inverter.

[0028] The beneficial effects of this invention are:

[0029] 1. The circuit of this invention is designed with two resonant circuits. Through the design of the coupling inductor between the two resonant circuits, the CC and CV outputs of the parallel resonant circuit and the series resonant circuit can be obtained respectively. Therefore, the two loads can work independently without affecting each other, thereby simplifying the load power control.

[0030] 2. Within a given operating range, the ZVS of the power switch is ensured, thereby reducing switching losses and facilitating the increase of switching frequency.

[0031] 3. Class E inverters can achieve load independence and ZVS constant output requirements, resulting in high system efficiency. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a schematic diagram of the E-class inverter topology of the present invention;

[0034] Figure 2 This is a schematic diagram of the equivalent topology of the E-class inverter of the present invention;

[0035] Figure 3 This is the equivalent circuit diagram of the output port of the basic components used in this invention;

[0036] Figure 4 These are the three types of v that satisfy the load-independent condition of this invention. DS Waveform diagram;

[0037] Figure 5 Different D in this invention off Lower power output capacity c p and P tn Relationship curve diagram;

[0038] Figure 6 This is the invention P tn When = 1, the power output capacity c p and D off Relationship curve diagram;

[0039] Figure 7 This invention is different from R 1n R 2n Downward driving voltage v GS Switching voltage V DS And the experimental waveforms of the output voltages v1 and v2. Detailed Implementation

[0040] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0041] Example 1

[0042] like Figure 1 As shown, a Class E inverter based on coupled inductor design to achieve dual constant output includes a DC power supply V. in Input inductance L R Parallel resonant filter network L1-C1-R1, series resonant filter network L2-C2-R2, power switch S1, and parallel capacitor C R The mutual inductance between coupled inductors L1 and L2 is denoted as M.

[0043] Among them, DC voltage source V in Input inductance L R The parallel resonant filter network and the series resonant filter network are connected in sequence, with power switch S1 and parallel capacitor C. R They are connected in parallel at both ends of the series resonant filter network; the parallel resonant filter network includes a first load resistor R1, a first inductor L1 and a first capacitor C1 connected in parallel; the series resonant filter network includes a second inductor L2, a second capacitor C2 and a second load resistor R2 connected in series.

[0044] This Class E inverter has two output terminals with resistors R1 and R2 respectively. By designing appropriate circuit parameters and coupling inductor mutual inductance parameters, both output terminals can achieve constant output while avoiding mutual interference. R1 provides a load-independent CC output i1, while R2 provides a load-independent CV output v2. Power switch S1 achieves load-independent ZVS. The equivalent circuit is shown below. Figure 2 As shown;

[0045] Among them, the current flowing through the first load resistor R1 is a sinusoidal current with constant output and amplitude I1, and the voltage flowing through the second load resistor R2 is a sinusoidal voltage with constant output and amplitude V2; at the same time, for any given voltage V1 across the first load resistor R1 and current I2 flowing through the second load resistor R2, the voltage of the power switch S1 is 0 at the moment of connection.

[0046] The steps for designing mutual inductance parameters are as follows:

[0047] Analyze the topology and derive the theoretical equations;

[0048] By combining the KCL equations and the equations for inductance and capacitance when the switch is closed and open, we obtain the differential equations for the Class E inverter circuit model:

[0049]

[0050] In the formula, vDS is the voltage across the power switch. Let i2 be the phase angle of the current. Let v1 be the phase angle of voltage v1.

[0051] Solving the differential equation yields the solutions for the power switch voltage and input current:

[0052]

[0053]

[0054] Where K1 and K2 are constants, and A and B satisfy...

[0055]

[0056]

[0057] D off The duty cycle is the turn-off time of the power switch, and q represents the finite choke coil L. R and parallel capacitor C R The ratio of the resonant frequency to the switching frequency

[0058] q is defined as:

[0059]

[0060] In the formula, L R For the input inductance, C R It is a parallel capacitor.

[0061] To ensure ZVS, v DS Conditions met:

[0062]

[0063] The biggest problem this invention needs to solve is interference between the two outputs. Therefore, the conditions for achieving load-independent outputs are analyzed, under which the two outputs can operate freely without affecting each other. Then, the influence of power switching is analyzed, and the operating range of the proposed Class E inverter is summarized. Finally, the power output capability is also explained.

[0064] The load-independent characteristic consists of three parts: the power switch S1 can achieve load-independent ZVS, the parallel resonant network can achieve load-independent CC of R1, and the series resonant network can achieve load-independent CV of R2.

[0065] Load-independent zero-voltage switching (ZVS) should be achieved throughout the entire operating range to ensure the safe operation of power switch S1 and improve system efficiency. This means that when S1 is turned on, v DS It should be zero. Rearranging formula (11), we can obtain that when S1 is connected, v DS The calculation formula is:

[0066] v DS (2πD off )=a1V in +b1V1+c1I2 (8);

[0067] In the formula, a1, b1, and c1 are D off , q, The function.

[0068] V1 and I2 are load-dependent. To achieve load independence, the following equation must be satisfied:

[0069] a1=b1=c1=0 (9);

[0070] Through Fourier transform, i in It can be decomposed into phase as The sine and cosine components; similarly, v DS It can also be divided into phases. The sine and cosine components:

[0071]

[0072]

[0073] Among them, i in_1 is i in The fundamental frequency component, v DS_1 It is v DS The fundamental frequency component.

[0074] Figure 3 The equivalent circuit of the output port using basic components is shown. Figure 3 In (a), C1 is considered as two capacitors connected in parallel. 1a and C 1b ,and Figure 3 In (b), L2 is considered as two inductors connected in series. 2a and L 2b L1 and C 1a The resonant frequency is f, L 2aThe resonant frequency of C2 is also f, and its expression is:

[0075]

[0076] Quality factors Q1 and Q2 are defined as follows:

[0077]

[0078]

[0079] The function of mutual inductance M can be represented by a controlled voltage source:

[0080]

[0081]

[0082] In the formula I L1 is i L1 The amplitude, θ is i L1 The first appearance.

[0083] Input current i in The amplitude of the sinusoidal component can be obtained through the Fourier expansion:

[0084]

[0085] In the formula, a2, b2, and c2 are also D. off , q, The function.

[0086] In order to obtain a constant I1 when the load changes, the following equation must be satisfied:

[0087] b2 = c2 = 0 (18);

[0088] Similarly, v DS The sine amplitude is:

[0089]

[0090] In the formula, a3, b3, and c3 are also D. off , q, The function.

[0091] To ensure a constant V2, the following equation must be satisfied:

[0092] b3 = c3 = 0 (20);

[0093] Solving equations (9), (18), and (20) yields the following equations:

[0094] tan[π(D-1)q]=πD off q (21);

[0095]

[0096]

[0097] According to equation (19), q increases with D off The trend of change is as follows Figure 4 As shown; when D off As q increases from 0 to 1, it decreases from positive infinity to 1.

[0098] From equations (21)-(23), I1 and V2 can be expressed as follows:

[0099]

[0100] V2=a3V in =k1V in (25);

[0101] In the formula, k1 is D off The function; k1 as D off The changing trend is also attached Figure 4 Displayed in the middle. When D off As k2 increases, it also increases from 0 to positive infinity.

[0102] i in The amplitude of the cosine component is:

[0103]

[0104] Where k2 is D off The function. For example... Figure 4 As shown, when D off As k2 increases, it increases from 0 to positive infinity.

[0105] v DS The amplitude of the cosine component is:

[0106]

[0107] Therefore, i in and v DS The sine component is constant and independent of V1 and I2. However, the cosine component is related to both V1 and I2. To achieve a load-independent output, the circuit needs to be properly designed to compensate for the cosine component, retaining only the constant sine component.

[0108] I 1x The component related to V1 can be passed through capacitor C. 1b Compensation, and V 2x The component related to I2 can be transmitted through inductor L. 2b Compensation. Then, I1x Terms related to I2 and V 2x The terms related to V1 can be compensated by a controlled voltage source related to the mutual inductance M, as shown below:

[0109] From equations (15), (31) and (32), we can obtain v1 and v M21 They are in phase; according to Figure 3 (a) can determine i L1 for

[0110]

[0111] From equation (28), KCL, and KVL, we can obtain M and C. 1b L 2b expression:

[0112] M = k2L1 (29);

[0113] C 1b =(k2+1)q 2 C R (30);

[0114]

[0115] When solving the above equation, v under different load conditions DS There are three possible solutions, and v in these three cases. DS Waveform as Figure 4 As shown. In these three cases, v DS At ωt=2πD off All times are zero, and the ZVS condition is satisfied regardless of the load. However, when ωt = 2πD off At that time, v DS The derivative ξ has different signs, and is written as:

[0116]

[0117] When ξ≤0, v DS Gradually decrease, at ωt=2πD off When ξ > 0, v is zero. DS First decrease, until at 2πD off It previously became a negative value. Then, v DS Increase it again, at ωt=2πD off When the voltage is zero, it is zero. This is because a MOSFET can only withstand unidirectional voltage. Therefore, v... DS It cannot be negative; this approach should be avoided. Therefore, ξ should satisfy the following condition:

[0118] ξ≤0 (33);

[0119] According to equation (33), the inequality can be obtained as follows:

[0120]

[0121] Where r is D off The function is given by P1, where P1 is the power on R1 and P2 is the power on R2. As D... off As the value of increases, r will decrease from positive infinity to 0. off It typically varies between 0.4 and 0.6.

[0122] From equation (34), it can be seen that the maximum output power P of the circuit is max yes

[0123]

[0124] With P max Using the base value, the normalized P1 and P2 are denoted as P 1n and P 2n Therefore, (34) can be simplified to:

[0125] P 1n +P 2n ≤1 (36);

[0126] Power output capacity is used to measure the effective utilization of a switch at a specific output power level, and is defined as follows:

[0127]

[0128] Among them, v DSn_max and i DSn_max They represent v respectively DS and i DS The normalized value relative to its maximum value, and:

[0129]

[0130]

[0131] The expression for the switching current has already been derived above:

[0132]

[0133] Subsequently, c can be calculated using equations (37)-(40) and equation (2). p Value; from this, we can deduce that c p Only affected by P tn and D off The influence of P tn It is P 1n and P 2n The sum of .

[0134] Figure 5 This explains the situation in D. off When the values ​​are 0.3, 0.4, 0.5, 0.6, and 0.7, c p With P tn The changing situation. It can be seen that when D... off When c is 0.5, 0.6, or 0.7, p With P tn It increases with the increase of P. tn When c reaches its maximum value of 1, p It has reached its maximum value. (D) off The maximum c when = 0.5 p D is 0.102. off The maximum c when = 0.6 p D is 0.087. off The maximum c when = 0.7 p It is 0.065. When D off When P is 0.3 or 0.4, as P... tn The increase of c p Start increasing. When D off When c = 0.3, p In P tn It reaches its maximum value when D = 0.6. off When c = 0.4, p In P tn It reaches its maximum value when c = 0.7; after that, c p Slow descent.

[0135] Figure 6 This explains when P tn c remains constant at 1 p With D off The relationship between P; tn When c = 1, the circuit can achieve maximum output power, and the corresponding c p This serves as the design basis for the present invention. For example... Figure 6 As shown, D off When c < 0.49, p With D off Increase and increase, D off When >0.49, c p With D off It increases and decreases. When D off =0.49, c p The maximum value is 0.102. When designing circuits, D is usually chosen as... off =0.5 makes c p It reached a relatively large value.

[0136] Example 2

[0137] The specific design process for the parameters of a novel Class E inverter that achieves dual constant output through coupled inductor design is as follows:

[0138] (1) Set the DC power supply voltage V in Switching frequency f, duty cycle D of power switch off time off Output current I1.

[0139] (2) Calculate q, k1, k2, r, and V2 according to equation (21), equation (24)-(26), and equation (34).

[0140] (3) Calculate L according to equation (6) and equation (24) R C R .

[0141] (4) Calculate P according to equations (35) and (41). max R 1max R 2min .

[0142]

[0143] (5) Determine the maximum quality factor Q 1max Q 2max Then, calculate L1 and C according to equations (17)-(19). 1a L 2a And C2.

[0144] (6) Calculate M and C according to equations (12)-(14). 1b L 2b .

[0145] Within the operating region described by equation (36), a total of 14 experimental load points were implemented. However, due to losses, the output power in the experimental circuit will vary, therefore, R is used respectively. 1max and R 2min The normalized resistance R obtained as a reference value 1n and R 2n As a variable. R 1n and R 2n The definition is as follows:

[0146]

[0147]

[0148] When R 1n and R 2n When it changes, the driving voltage v GS Switching voltage V DS And the experimental waveforms of the output voltage v2 are as follows: Figure 7As shown in the figure. During the experiment, i1 was calculated using Ohm's law by measuring voltage v2. The experimental waveforms show that ZVS is satisfied within the operating range. Throughout the entire operating range, a constant output satisfying both load independence and ZVS can be observed.

[0149] Therefore, it can be seen that by designing parameters such as coupling inductors, the present invention can achieve load independence within the operating range and constant output that meets ZVS.

[0150] In the description of this specification, references to terms such as "an embodiment," "example," "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0151] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed invention.

Claims

1. A Class E inverter with dual constant output based on coupled inductor design, characterized in that, Including the DC power supply V connected in sequence in Input inductance L R The system includes parallel resonant filter networks and series resonant filter networks, as well as a power switch S1 and a parallel capacitor C. R Power switch, parallel capacitor C R The first load resistor R1, the second inductor L1, and the first capacitor C1 are connected in parallel at both ends of the series resonant filter network. The parallel resonant filter network includes a first load resistor R1, a first inductor L1, and a first capacitor C1 connected in parallel. The series resonant filter network includes a second inductor L2, a second capacitor C2, and a second load resistor R2 connected in series. There is mutual inductance M between the inductors L1 and L2. The parameters designed to keep the sinusoidal component constant are as follows: In the formula, D off L is the duty cycle for the switch's off-time. R q represents the input inductance of the inverter circuit, where q indicates the input inductance L. R and parallel capacitor C R The ratio of the resonant frequency to the switching frequency, Let v1 be the phase angle of voltage v1, and k1 and k2 be the phase angles of voltage v1 and voltage v2 respectively. off The function of; V1 is the voltage across the first load resistor R1, and I2 is the current flowing through the second load resistor R2; Compensation is achieved by a controlled voltage source related to the mutual inductance M, which will reduce i in Cosine component I 1x The terms related to I2 and v DS cosine component V 2x The terms related to V1 are eliminated; and the compensation capacitor C is used to eliminate them. 1b Eliminate I 1x The terms related to V1 are compensated by inductance L. 2b Eliminate V 2x Items related to I2; Mutual inductance M, compensation capacitor C 1b and compensation inductor L 2b The calculation formulas are as follows: 。 2. The Class E inverter with dual constant output based on coupled inductor design according to claim 1, characterized in that, The current flowing through the first load resistor R1 is a constant output sinusoidal current with an amplitude of I1, and the voltage flowing through the second load resistor R2 is a constant output sinusoidal voltage with an amplitude of V2; the voltage of the power switch is 0 at the moment of switching on.

3. The Class E inverter with dual constant output based on coupled inductor design according to claim 2, characterized in that, When the load changes, the outputs I1 and V2 are the input currents i and i, respectively. in and input voltage v DS The sinusoidal component is constant and needs to be compensated for. in and v DS cosine component I 1x and V 2x .

4. The Class E inverter with dual constant output based on coupled inductor design according to claim 1, characterized in that, The formula for calculating q is: ； In the formula, LR is the input inductance and CR is the parallel capacitor.

5. A Class E inverter with dual constant output based on coupled inductor design according to claim 1, characterized in that, The first load resistor R1 obtains a constant current output independent of the load, the second load resistor R2 obtains a constant voltage output independent of the load, and the power switch S1 realizes zero-voltage switching independent of the load.

6. A Class E inverter with dual constant output based on coupled inductor design according to claim 1, characterized in that, The differential equation for the Class E inverter circuit model is: In the formula, v DS The voltage across the switching transistor. Let i2 be the phase angle of the current. Let v1 be the phase angle of voltage v1.

7. An electronic device comprising the Class E inverter as described in any one of claims 1-6.

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