Single-phase three-level narrow-pulse-free high-frequency inverter modulation and carrier modulation method

Abstract

This invention discloses a single-phase three-level high-frequency inverter modulation and carrier modulation method without narrow pulses. The single-phase three-level high-frequency inverter modulation method transforms the traditional modulation conduction time control into a hybrid control of conduction time and carrier period, ultimately obtaining the switching transistor S when the modulated wave is in positive half-axis modulation or negative half-axis modulation. a1 S a2 S a3 S a4 The actual activation time in the next carrier cycle t 1s , t 2s , t 3s , t 4s The carrier modulation method includes the following steps: S101, Start; S102, Record the current carrier period value. u cot Simultaneously, the time base counter is cleared to zero; S103, the time base counter is started counting simultaneously to prepare for carrier generation; S104, the time base counter is set to... u top = j ;make u bot = u cot - j S105, Output u top , u bot S106, Judgment u bot If the value <0 is true, proceed to step S107; otherwise, return to step S103 to continue generating the carrier. S107: End.

Description

Technical Field

[0001] This invention relates to the field of inverters, and more particularly to a single-phase three-level high-frequency inverter modulation and carrier modulation method without narrow pulses. Background Technology

[0002] High-speed permanent magnet motors are widely used in the automotive, medical, and various electronics industries due to their high power density, high efficiency, and simple structure. As motor speeds continue to increase, higher demands are placed on the frequency and quality of the inverter's output waveform. In high-frequency inversion, two-level full-bridge inverters suffer from high switching losses and high output harmonic content, making them insufficient to meet requirements. Compared to two-level solutions, three-level inverters, at the same carrier frequency, have double the equivalent frequency, better output waveform quality, and lower switching stress, thus attracting increasing attention in high-speed permanent magnet drive motor applications.

[0003] Narrow pulse problems are one of the core issues that three-level modulation technology must address, as they severely impact inverter operation safety and output waveform quality. The impact of narrow pulses on three-level modulation becomes even more severe during high-frequency inversion. The literature [Research on Narrow Pulse Compensation Methods for Three-Level Inverters] sets a minimum switching time limit based on the safe switching time of power semiconductors. When the inverter output pulse width is less than this limit, the output pulse width is set to equal the limit, thus eliminating narrow pulses. However, simple limit control within the narrow pulse region can cause incorrect modulation duty cycles, leading to output waveform distortion. The literature [Research on Narrow Pulse Suppression Using Three-Level Virtual Space Vector Pulse Width Modulation Method] analyzes the narrow pulse distribution of the three-level space vector pulse width modulation (SVPWM) method. By changing the switching vector action time and segmentation method within the narrow pulse region, it suppresses the occurrence of narrow pulses, improving output waveform quality to some extent. However, the method is affected by the carrier frequency; its effective range is narrower when applied to high-frequency carriers. Building upon the previous paper, "[Research on Narrow Pulse Suppression in Three-Level Virtual Space Vector Pulse Width Modulation Method]", the paper "[Hybrid Modulation Strategy for Narrow Pulse Suppression in High-Frequency Three-Level Low Modulation Ratio Region]" analyzed the modulation range without narrow pulses using switching sequences with zero and small vectors as the start and end points, and proposed a hybrid modulation strategy. This strategy uses different switching sequences in different modulation ranges to expand the effective range of narrow pulse suppression after increasing the carrier frequency. However, with further increases in carrier frequency, the narrow pulse problem remains unresolved. Furthermore, the paper "[Hybrid Modulation Strategy for Narrow Pulse Suppression in High-Frequency Three-Level Low Modulation Ratio Region]" did not address the narrow pulse problem under high modulation ratios. The paper "[Research on Asymmetric Dead-Time Compensation Modulation Strategy for Three-Level Inverter Based on Narrow Pulse Elimination]" proposes a modulation strategy based on asymmetric vector action time to achieve narrow pulse elimination and dead-time compensation in SVPWM. Its narrow pulse elimination method is similar to that in the paper "[Hybrid Modulation Strategy for Narrow Pulse Suppression in High-Frequency Three-Level Low Modulation Ratio Region]", implemented by changing the switching sequence. However, using a simple limit method to eliminate narrow pulses in a five-segment switching sequence will lead to the same problem as described in the literature [Research on Narrow Pulse Compensation Method for Three-Level Inverters].

[0004] The literature [Research on Narrow Pulse Compensation Technology for PWM Control of Three-Level Inverters] employs Sine Wave Pulse Width Modulation (SPWM) to eliminate narrow pulses at the peaks and valleys of the three-phase modulated wave by injecting zero-sequence voltage. However, this method, while addressing narrow pulses in one phase, can lead to the appearance of narrow pulses in other phases. The literature [A narrow pulse compensation method for neutral-point-clamped three-level converters considering neutral-point balance] avoids the impact on other phases when eliminating narrow pulses in one phase by limiting the magnitude of the injected zero-sequence voltage. However, the aforementioned zero-sequence injection method still employs simple limit control for narrow pulses near the zero-crossing point of the modulated wave, failing to solve the waveform distortion problem near the zero-crossing point.

[0005] In summary, current narrow pulse control methods have limited suppression capabilities, and narrow pulse control near the zero crossing of the modulated wave still has problems. Moreover, most studies are aimed at NPC three-level three-phase topologies, which are not suitable for single-phase systems. For example, methods such as optimizing SVPWM or zero-sequence injection SPWM to eliminate narrow pulses will introduce third harmonics, causing distortion of the output waveform. It is necessary to improve these methods. Summary of the Invention

[0006] The purpose of this invention is to address the aforementioned problems by providing a single-phase three-level high-frequency inverter modulation and carrier modulation method that can solve harmonic issues and improve the quality of the output waveform.

[0007] To achieve the above objectives, the technical solution of the present invention is as follows:

[0008] A single-phase three-level high-frequency inverter modulation method without narrow pulses includes the following steps:

[0009] S1, Begin;

[0010] S2, The switching transistor S is obtained through SPWM modulation. a3 Opening time t o ;

[0011] S3. Determine the activation time t of the next carrier cycle S3. on ≤t min +t DB Check if the condition is met. If it is met, proceed to step S4; otherwise, proceed to step S16.

[0012] S4. T is obtained through iterative calculation. top (k+1),T top(k+2) and the modulation wave angle value θ(k+3) after three beats; its calculation formula is:

[0013]

[0014] Among them, T top (k+1),T top (k+2) are the calculated values ​​of the next and the next-next carrier cycles in the top narrow pulse region, respectively;

[0015] S5. Perform a correction judgment using the flag bit; if the judgment is true, proceed to step S16; if the judgment is false, proceed to step S6.

[0016] S6. Determine whether the modulation wave start angle value θ(k) of the current carrier cycle is less than 90°. If it is true, proceed to step S7; otherwise, proceed to step S8.

[0017] S7. Determine whether the modulation wave angle value θ(k+3) < 90° after three beats is true. If it is true, proceed to step S10; otherwise, calculate the angle difference Δθ between the modulation wave and the zero point, and proceed to step S14. The calculation formula is as follows:

[0018] Δθ = 90° - θ(k+2);

[0019] S8. Determine whether the modulation wave start angle value θ(k) of the current carrier cycle is greater than 270°. If it is true, proceed to step S10; otherwise, proceed to step S9.

[0020] S9. Determine whether the modulation wave angle value θ(k+3) ≤ 270° after three beats is true. If it is true, do not correct the calculated value T of the next carrier cycle in the top narrow pulse region. top (k+1), proceed to step S10; otherwise, calculate the angle difference Δθ between the modulated wave and the null point, and proceed to step S14; the calculation formula is:

[0021] Δθ = 270° - θ(k+2);

[0022] S10. Determine the calculated value T of the next carrier cycle in the top narrow pulse region. top Is (k+1) greater than the stored carrier period execution value T of the current carrier period? s (k), if true, proceed to step S13; otherwise, proceed to step S11;

[0023] S11. Determine the calculated value T of the next carrier cycle in the top narrow pulse region. top Is (k+1) less than or equal to the set minimum carrier period T? s If the condition is met, proceed to step S12; otherwise, proceed to step S13.

[0024] S12. Calculate the activation time t of the next carrier cycle S3. on The actual carrier cycle value T executed in the next carrier cycle s (k+1), its calculation formula is:

[0025]

[0026] Let the stored carrier period execution value T of the current carrier period be... s (k) equals the actual carrier cycle value T calculated by the above formula for the next carrier cycle. s (k+1), then execute step S31;

[0027] S13. Calculate the activation time t of the next carrier cycle S3. on The actual carrier cycle value T executed in the next carrier cycle s (k+1), its calculation formula is:

[0028]

[0029] Let the stored carrier period execution value T of the current carrier period be... s (k) equals the actual carrier cycle value T calculated by the above formula for the next carrier cycle. s (k+1), then execute step S31;

[0030] S14. At this point, the carrier period at the top and bottom peaks is too large. Calculate the value T for the next carrier period in the top narrow pulse region. top (k+1) is corrected, then the flag value is set to 1, and step S15 is executed;

[0031] S15. Recalculate the activation time t of the next carrier cycle S3. on The actual carrier cycle value T executed in the next carrier cycle s (k+1), its calculation formula is:

[0032]

[0033] Let the stored carrier period execution value T of the current carrier period be... s (k) equals the actual carrier cycle value T calculated by the above formula for the next carrier cycle. s (k+1), then execute step S31;

[0034] S16. Match the first carrier period value after the modulation peak and valley with the period value of the last carrier before the modulation peak and valley, and calculate the on-time t of the corrected next carrier period S3. on The actual carrier cycle value T executed in the next carrier cycle s(k+1); its calculation formula is:

[0035]

[0036] Let the stored carrier period execution value T of the current carrier period be... s (k) equals the actual carrier cycle value T calculated by the above formula for the next carrier cycle. s (k+1), then execute step S31;

[0037] S17. Determine the activation time t of the next carrier cycle S3. on ≥[T s -(t min +t DB If the condition is true, proceed to step S19; otherwise, proceed to step S18.

[0038] S18. Calculate the activation time t of the next carrier cycle S3. on The actual carrier cycle value T executed in the next carrier cycle s (k+1); its calculation formula is:

[0039]

[0040] Let the stored carrier period execution value T of the current carrier period be... s (k) equals the actual carrier cycle value T calculated by the above formula for the next carrier cycle. s (k+1), then execute step S31;

[0041] S19. T is obtained through iterative calculation. zer (k+1),T zer (k+2) and the modulation wave angle value θ(k+3) after three beats; its calculation formula is:

[0042]

[0043] Among them, T zer (k+1),T zer (k+2) are the calculated values ​​of the next and the next-next carrier cycles in the bottom narrow pulse region, respectively;

[0044] S20. Perform a correction judgment using the flag bit; if the judgment is true, proceed to step S28; if the judgment is false, proceed to step S21.

[0045] S21. Determine whether the modulation wave start angle value θ(k) of the current carrier cycle is less than 180°. If it is true, proceed to step S22; otherwise, proceed to step S23.

[0046] S22. Determine whether the modulation wave angle value θ(k+3) < 180° after three beats is true. If it is true, do not correct the calculated value T of the next carrier cycle in the bottom narrow pulse region. zer If (k+1), proceed to step S24; otherwise, calculate the angle difference Δθ between the modulated wave and the null point, and proceed to step S28; the calculation formula is:

[0047] Δθ = 180° - θ(k+2);

[0048] S23. Determine whether the modulation wave angle value θ(k+3) ≤ 360° after three beats holds true. If it holds true, do not correct the calculated value T of the next carrier cycle in the top narrow pulse region. top (k+1), proceed to step S24; otherwise, calculate the angle difference Δθ between the modulated wave and the null point, and proceed to step S28;

[0049] Δθ = 360° - θ(k+2);

[0050] S24. Determine the calculated value T of the next carrier cycle in the bottom narrow pulse region. zer Is (k+1) greater than the stored carrier period execution value T of the current carrier period? s (k), if true, proceed to step S27; otherwise, proceed to step S25;

[0051] S25. Determine the calculated value T of the next carrier cycle in the bottom narrow pulse region. zer Is (k+1) less than or equal to the set minimum carrier period T? s If the condition is met, proceed to step S26; otherwise, proceed to step S27.

[0052] S26. Calculate the activation time t of the next carrier cycle S3. on The actual carrier cycle value T executed in the next carrier cycle s (k+1); its calculation formula is:

[0053]

[0054] Let the stored carrier period execution value T of the current carrier period be... s (k) equals the actual carrier cycle value T calculated by the above formula for the next carrier cycle. s (k+1), then execute step S31;

[0055] S27. Calculate the activation time t of the next carrier cycle S3. on The actual carrier cycle value T executed in the next carrier cycle s (k+1); its calculation formula is:

[0056]

[0057] Let the stored carrier period execution value T of the current carrier period be... s (k) equals the actual carrier cycle value T calculated by the above formula for the next carrier cycle. s (k+1), then execute step S31;

[0058] S28. Calculate the value T for the next carrier cycle in the bottom narrow pulse region. zer (k+1) is corrected and the flag value is set to 1, then step S31 is executed;

[0059] S29, the activation time t for the next carrier cycle S3 on The actual carrier cycle value T executed in the next carrier cycle s (k+1) is recalculated, and the calculation formula is as follows:

[0060]

[0061] Let the stored carrier period execution value T of the current carrier period be... s (k) equals the actual carrier cycle value T calculated by the above formula for the next carrier cycle. s (k+1), then execute step S31;

[0062] S30. Match the first carrier period value after the modulation peak and valley with the period value of the last carrier before the modulation peak and valley, and calculate the on-time t of the corrected next carrier period S3. on The actual carrier cycle value T executed in the next carrier cycle s (k+1); its calculation formula is:

[0063]

[0064] Let the stored carrier period execution value T of the current carrier period be... s (k) equals the actual carrier cycle value T calculated by the above formula for the next carrier cycle. s The value of (k+1) is then calculated; step S31 is then executed.

[0065] S31. By judging the sign of the modulation wave u(t) and the above calculation results, the value of the switching transistor is set; if the modulation wave u(t)>0 is true, then step S32 is executed, at which time the modulation wave is in positive half-axis modulation; otherwise, step S33 is executed, at which time the modulation wave is in negative half-axis modulation.

[0066] S32. When the modulating wave is modulated on the positive half-axis, the switching transistor S is calculated. a1 S a2 S a3 Sa4 The actual activation time t in the next carrier cycle 1s t 2s t 3s t 4s ;

[0067] S33. When the modulating wave is in negative half-axis modulation, the switching transistor S is calculated. a1 S a2 S a3 S a4 The actual activation time t in the next carrier cycle 1s t 2s t 3s t 4s ;

[0068] S34, End.

[0069] Furthermore, in step S2, the switching transistor S a3 Opening time t o The calculation formula is:

[0070] t o =[1-Msinθ(k)]T s ;

[0071] Where M is the modulation ratio; θ(k) is the modulation wave start angle value of the current carrier period; and Ts is the set minimum carrier period.

[0072] Furthermore, in step S14, the calculated value T of the next carrier cycle in the top narrow pulse region... top The corrected formula for (k+1) is:

[0073]

[0074] Among them, t DB Dead time; t min θ(k+1) represents the minimum switching time when the switching transistor is working normally; θ(k+1) represents the starting angle of the modulation wave in the next carrier cycle.

[0075] Furthermore, in step S28, the calculated value T of the next carrier cycle in the bottom narrow pulse region... zer The corrected formula for (k+1) is:

[0076]

[0077] Among them, T s (k) represents the stored carrier period execution value for the current carrier period; t DB Dead time; t minθ(k+1) represents the minimum switching time when the switching transistor is working normally; θ(k+1) represents the starting angle of the modulation wave in the next carrier cycle.

[0078] Furthermore, in step S32, the switching transistor S a1 S a2 S a3 S a4 The actual activation time t in the next carrier cycle 1s t 2s t 3s t 4s The calculation formula is:

[0079]

[0080] Among them, T s (k+1) is the actual carrier cycle value executed in the next carrier cycle; t on The activation time of S3 in the next carrier cycle; t DB This refers to the dead zone time.

[0081] Furthermore, in step S33, the switching transistor S a1 S a2 S a3 S a4 The actual activation time t in the next carrier cycle 1s t 2s t 3s t 4s The calculation formula is:

[0082]

[0083] Among them, T s (k+1) is the actual carrier cycle value executed in the next carrier cycle; t on The activation time of S3 in the next carrier cycle; t DB This refers to the dead zone time.

[0084] A carrier modulation method includes the following steps:

[0085] S101, Begin;

[0086] S102. Record the current carrier period value u cot At the same time, the time base counter is reset to zero;

[0087] S103. Simultaneously start the time base counter to prepare for carrier generation;

[0088] S104, Order u top =j;u topLet u be the lower-layer carrier period value generated using the up-counting mode at the current counting time. bot =u cot -j;u bot This is the upper-layer carrier period value generated using the down-counting mode at the current counting time.

[0089] S105, Output u top u bot ;

[0090] S106, Determine u bot If the value <0 is true, the current carrier period has been generated and step S107 is executed. If the value is false, the current carrier period has not been generated and the process returns to step S103 to continue generating the carrier.

[0091] S107, End.

[0092] Compared with the prior art, the advantages and positive effects of this invention are:

[0093] This invention addresses the narrow pulse problem in single-phase NPC three-level inverters at high frequencies. It analyzes the effects of modulation ratio, carrier frequency, and dead time on narrow pulses, derives the distribution law of narrow pulses in NPC three-level inverters, and proposes a narrow pulse-free high-frequency inverter modulation method. This method effectively eliminates modulation peaks and valleys, as well as narrow pulses near zero-crossing points. Compared to the traditional direct narrow pulse elimination method, this method not only eliminates narrow pulse phenomena throughout the entire modulation range but also ensures the sinusoidal nature of the output waveform, more effectively reducing the THD value of the output waveform.

[0094] Based on this, the present invention also analyzes the digital implementation of the high-frequency inverter modulation method and the waveform distortion problems near the peak and valley values ​​and zero crossing points of the modulation wave. A carrier modulation method is proposed to solve the harmonic problem caused by the narrow pulse elimination strategy, thereby further ensuring the output waveform quality without narrow pulse modulation and improving the performance of the inverter. Attached Figure Description

[0095] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0096] Figure 1 This is a topology diagram of a single-phase NPC three-level converter;

[0097] Figure 2The modulation waveform diagram of a single-phase NPC three-level converter;

[0098] Figure 3 For the switching transistor S a3 The original control signal generation diagram;

[0099] Figure 4 A schematic diagram of the control signals for adding a dead zone;

[0100] Figure 5 This is a logic framework diagram without narrow pulse modulation;

[0101] Figure 6 A diagram showing the digital implementation without narrow pulse modulation;

[0102] Figure 7 Generate a digital implementation diagram for the two carrier waves;

[0103] Figure 8 A schematic diagram of a carrier wave with a 180° phase difference;

[0104] Figure 9 shows the switching transistor S before and after compensation. a1 S a2 S a3 A schematic diagram of a pulse signal; where, Figure 9a For traditional switching transistor S a1 S a2 S a3 A schematic diagram of the pulse signal. Figure 9b To compensate for the switching transistor S a1 S a2 S a3 A schematic diagram of a pulse signal;

[0105] Figure 10 shows a comparison of the effects of narrow pulse processing; among which... Figure 10a The waveform of the AC output current in the traditional method is shown when the modulation ratio is 0.9. Figure 10b The output current waveform without narrow pulse modulation is shown when the modulation ratio is 0.9. Figure 10c This is a comparison of the current waveforms obtained using the traditional method and without narrow-pulse modulation when the modulation ratio is 0.3. Figure 10d The image shows a comparison before and after correction without narrow pulse modulation when the modulation ratio is 0.6;

[0106] Figure 11 This is a schematic diagram comparing the current THD under different modulation ratios. Detailed Implementation

[0107] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, any modifications, equivalent substitutions, improvements, etc., made by those skilled in the art to all other embodiments obtained without creative effort should be included within the protection scope of the present invention.

[0108] 1. Inverter modulation principle and narrow pulse

[0109] 1.1 Inverter Structure and Modulation Principle

[0110] A single-phase NPC three-level inverter, hereinafter referred to as the inverter, has the following topology: Figure 1 As shown;

[0111] The inverter consists of identical front and rear bridge arms, S a1 ~S a4 S b1 ~S b4 These are the switching transistors for the front and rear bridge arms, respectively. The operation of the switching transistors is controlled using a carrier in-phase cascade modulation method, with modulation as follows: Figure 2 As shown:

[0112] Figure 2 In the middle, the upper and lower in-phase carrier waves are compared with the modulating wave respectively. During the positive half-cycle of the modulating wave, S a4 Always off, S a2 Always on; if the modulated wave is greater than the upper carrier wave, S a1 Activate, or S a3 On; during the negative half-cycle of the modulated wave, S a1 Always off, S a3 Always on; if the modulated wave is greater than the lower-level carrier wave, S a2 Activate, or S a4 Activation. For ease of description below, it is defined that during the positive half-cycle of the modulating wave, S... a3 This is the modulation reference switch; during the negative half-cycle of the modulation wave, S a2 It is a modulation reference switch.

[0113] 1.2 Causes of Narrow Pulse Generation and the Influence of Dead Zone

[0114] Since the carrier frequency is much higher than the modulation wave frequency, the modulation wave can be approximated as constant within one carrier cycle. Let S... a3 For example, the original control signal S within a single upper-layer carrier cycle can be approximately plotted. a3 The generated graph, such as Figure 3 As shown.

[0115] Figure 3 In the middle, Ts For the carrier period, t o For S a3 The opening time of V c Let u1(t) be the carrier amplitude. u1(t) is the modulating wave, and its expression is:

[0116] u1(t)=V m sin(ωt) (1)

[0117] In the formula V m ω and ω represent the amplitude and angular frequency of the modulating wave, respectively. It is easy to see from the graph that t... o Too large or too small will cause S a3 The control generates narrow pulses. Based on the geometric relationship between the carrier wave and the modulating wave, we can obtain:

[0118]

[0119] In the formula, M is the modulation ratio. As can be seen from equation (2), the generation of a narrow pulse is related to the change in the modulating wave waveform, the magnitude of the modulation ratio, and the size of the carrier period. With the change of the sinusoidal modulating wave, t will be affected near its zero crossing. o Approximate to or equal to T s This results in a narrow pulse being turned on; if M is too large, a narrow pulse will be turned off in the peak and valley regions of the modulated wave; as T... s As the amplitude decreases, the range of the narrow pulse during modulation will increase. Let t be the minimum switching time for normal operation of the switching transistor. min You can then Figure 2 The narrow pulse generation region during carrier in-phase overlay modulation is marked in Table 1, and the corresponding narrow pulse generation conditions are shown in Table 1.

[0120] Table 1. Conditions for generating narrow pulses in in-phase cascaded modulation

[0121]

[0122] With S a3s Based on, S a1 S a3 PWM waveform after adding dead time, such as Figure 4 As shown.

[0123] Figure 4 In the middle, S a1c S a3c S after adding dead zone a1 S a3 The actual control signal, t s1 t s3 S respectively a1 S a3 The opening time, t DB This is the set dead time. As shown in the figure, after the dead time is added, t... s1t s3 The time was shortened by t compared to before joining. DB This will lead to Figure 2 The narrow pulse region is further expanded. Table 2 shows the conditions for the occurrence of narrow pulses after the addition of the dead zone.

[0124] Table 2. Conditions for narrow pulse generation of in-phase cascaded modulation after dead zone addition.

[0125]

[0126]

[0127] Therefore, the zero-crossing narrow pulse region of the inverter is unavoidable, and the top and bottom narrow pulse regions are related to the modulation ratio, carrier period, and dead time. During high-frequency inversion, as the carrier period decreases, the narrow pulse region gradually expands. Unless a faster switching transistor is used, the proportion of the dead time in the entire modulation period will be non-negligible. The modulation strategy in the narrow pulse region will greatly affect the quality of the inverter output waveform. To address this issue, this invention proposes a narrow-pulse-free high-frequency inverter modulation method. This method eliminates the narrow pulse phenomenon in the narrow pulse region by limiting the minimum switching time of the switching transistor and reducing the carrier frequency, while also ensuring the sinusoidal nature of the duty cycle. However, due to the excessive frequency reduction, waveform distortion occurs near the peaks and valleys of the modulation wave and near the zero point of the modulation wave. To address this problem, a three-step carrier predictive control method is adopted. By predicting and calculating the size of the next carrier period, the value of the next carrier period is adjusted to prevent waveform distortion caused by an excessively large carrier period, further improving the THD value of the output waveform. The specific implementation method is shown below.

[0128] 2. No narrow-pulse high-frequency inverter strategy

[0129] To ensure the quality of the output waveform, it is essential to guarantee that the waveform modulated in the narrow pulse region still follows the pattern of the modulation wave. To eliminate narrow pulses in the modulation, these pulses need to be combined to ensure that the switching pulse width of the switching transistor is greater than t. min +t DB And less than T s -(t min +t DB If the narrow pulse problem is addressed from the perspective of narrow pulse combining, the processing method becomes exceptionally complex due to the influence of dead time and its compensation strategy. Further consideration of the result of narrow pulse combining reveals that its essence is a reduction in carrier frequency. Therefore, this invention, based on traditional carrier in-phase superimposed modulation, incorporates carrier period control and proposes... Figure 5 The narrow-pulse modulation strategy shown is not applicable.

[0130] Figure 5 middle:

[0131] u(t) is the modulating wave;

[0132] t o For S a3 Opening time;

[0133] θ(k) is the starting angle value of the modulated wave in the current carrier period;

[0134] θ(k+1) and θ(k+2) are the modulation wave start angle values ​​for the next and the next-next carrier cycles, respectively;

[0135] T zer (k) is the calculated value of the carrier period of the current bottom narrow pulse region;

[0136] T zer (k+1),T zer (k+2) are the calculated values ​​of the next and the next-next carrier cycles in the bottom narrow pulse region, respectively;

[0137] T top (k) is the calculated value of the carrier period of the current top narrow pulse region;

[0138] T top (k+1),T top (k+2) are the calculated values ​​of the next and the next-next carrier cycles in the top narrow pulse region, respectively;

[0139] T s (k) is the stored value of the current carrier period execution;

[0140] T s The minimum carrier period is set.

[0141] T s (k+1) is the actual carrier cycle value executed in the next carrier cycle;

[0142] t DB Dead time;

[0143] t min This is the minimum switching time for the switching transistor to operate normally.

[0144] t on The turn-on time of S3 in the next carrier cycle is obtained through SPWM modulation. This time is not necessarily the actual turn-on time of the next carrier cycle of S3.

[0145] t 1s t 2s t 3s t 4s S a1 S a2 Sa3 S a4 The actual activation time in the next carrier cycle.

[0146] The three-phase carrier prediction method is a method that uses the current carrier cycle and the starting angle of the carrier cycle to predict and calculate the next carrier cycle value and the starting angle of the carrier cycle. The specific calculation method is shown in Equation (4) and Equation (19) below.

[0147] Step 1: Begin;

[0148] Step 2: Obtain t through SPWM modulation o , t o =[1-Msinθ(k)]T s , where M is the modulation ratio; θ(k) is the starting angle value of the modulated wave in the current carrier period;

[0149] Step 3: Determine t on ≤t min +t DB If the condition is met, proceed to step four, indicating that the next carrier cycle modulation will be within the top narrow pulse region; otherwise, proceed to step sixteen.

[0150] Step 4: Iteratively calculate the value T using equation (3). top (k+1),T top (k+2) and the modulation wave angle value θ(k+3) after three beats;

[0151]

[0152] Step 5: Perform a correction judgment using the flag bit. If the judgment is true, proceed to step 16, where the first carrier cycle value after the modulated wave reaches its peak and trough values ​​is corrected; if the judgment is false, proceed to step 6.

[0153] Step 6: Determine if θ(k) < 90° is true. If it is true, it means that the modulation wave has not yet reached the peak of the positive half axis, and proceed to step 7; otherwise, it means that it has exceeded the peak and valley of the positive half axis of the modulation wave, and proceed to step 8.

[0154] Step 7: Determine if θ(k+3) < 90° holds true. If it does, then no correction is needed for T. top (k+1), execute step 10; otherwise, it proves that T needs to be corrected at this point. top The maximum value of the carrier period at the peak of the modulated wave is limited by the (k+1) method. The angle difference Δθ between the modulated wave and the zero point can be calculated as shown in the following formula (4), and the fourteenth step is executed.

[0155] Δθ=90°-θ(k+2) (4)

[0156] Step 8: Determine if θ(k) > 270° holds true. If it does, then no correction T is needed. top If (k+1), proceed to step 10; otherwise, it indicates that further judgment is needed, and proceed to step 9.

[0157] Step 9: Determine if θ(k+3)≤270° holds true. If it does, then no correction is needed for T. top (k+1), execute the tenth step; otherwise, it proves that the maximum value of the carrier period at the bottom of the modulated wave needs to be limited. At this time, the angle difference Δθ between the modulated wave and the zero point can be calculated as shown in the following formula (5), and the fourteenth step is executed.

[0158] Δθ=270°-θ(k+2) (5)

[0159] Step 10: Determine T top Is (k+1) greater than T? s (k), if true, proceed to step thirteen, indicating that the next carrier cycle modulation enters the top narrow pulse carrier down-frequency region; otherwise, proceed to step eleven, indicating that the next carrier cycle modulation enters the top narrow pulse carrier up-frequency region;

[0160] Step 11: Determine T top Is (k+1) less than or equal to T? s If the condition is met, proceed to step 12, indicating that the carrier frequency increase will end in the next carrier cycle and the carrier will be in a non-narrow pulse region; otherwise, proceed to step 13.

[0161] Step 12: Calculate t on T s The calculation method for (k+1) is shown in equation (6):

[0162]

[0163] Let T s (k) equals T calculated by equation (6) s The value of (k+1) is used to store T. s (k+1) is used to facilitate calculation in the next carrier cycle. Then, step thirty-one is executed.

[0164] Step 13: Calculate t on T s The calculation method for (k+1) is shown in equation (7):

[0165]

[0166] Let T s (k) equals T calculated by equation (7) s The value of (k+1) is used to store T. s(k+1) is used to facilitate the calculation in the next carrier cycle; then step thirty-one is executed.

[0167] Step 14: This indicates that the carrier period at the top and bottom peaks is too large, and T needs to be adjusted. top The calculated value of (k+1) is corrected, and the calculation method of the correction is shown in the following formula (8). The flag value is set to 1 so that the period value of the first carrier after the peak and valley values ​​of the modulation wave are corrected in the next run. Then, step 15 is executed.

[0168]

[0169] Step 15: To ensure the sinusoidal principle of the duty cycle, due to the above-mentioned T top If (k+1) is recalculated, then t needs to be recalculated. on The value is also recalculated, then t on T s The calculation method for (k+1) is shown in equation (9):

[0170]

[0171] Let T s (k) equals T calculated by equation (9) s The value of (k+1) is used to store T. s (k+1) is used to facilitate calculation in the next carrier cycle. Then, step thirty-one is executed.

[0172] Step 16: The calculated value of the first carrier period after the modulation peak and valley may be too large, which will affect the normal modulation in non-narrow pulse regions; therefore, the value of the first carrier period after the modulation peak and valley should be kept consistent with the value of the period of the last carrier before the modulation peak and valley, thus correcting the value of t. on T s The calculation method for (k+1) is shown in equation (10);

[0173]

[0174] Let T s (k) equals T calculated by equation (10) s The value of (k+1) is used to store T. s (k+1), then set flag to 0 to facilitate calculation in the next carrier cycle. Then execute step thirty-one;

[0175] Step 17: Determine t on ≥[T s -(t min +t DBIf the condition is met, proceed to step nineteen, indicating that the next carrier cycle modulation will be within the zero-point narrow pulse region; otherwise, proceed to step eighteen, indicating that the next carrier cycle modulation will be within the non-narrow pulse region.

[0176] Step 18: Calculate t on T s The calculation method for (k+1) is shown in equation (11):

[0177]

[0178] Let T s (k) equals T calculated by equation (10) s The value of (k+1) is used to store T. s (k+1) is used to facilitate the calculation in the next carrier cycle; then step thirty-one is executed.

[0179] Step 19: Iteratively calculate the calculated value T using equation (12). zer (k+1),T zer (k+2) and the modulation wave angle value θ(k+3) after three beats;

[0180]

[0181] Step 20: Perform a correction check using the flag bit. If the check is successful, proceed to step 28, where the first carrier period value after the modulated wave crosses zero is corrected; if the check is unsuccessful, proceed to step 21.

[0182] Step 21: Determine if θ(k) < 180° is true. If it is true, it means that the current position is on the positive half-axis of the modulation wave, and proceed to step 22; otherwise, it means that the current position is on the negative half-axis of the modulation wave, and proceed to step 23.

[0183] Step 22: Determine if θ(k+3) < 180° holds true. If it does, then no correction is needed for T. zer (k+1), proceed to step 24; otherwise, it proves that T needs to be modified. zer (k+1), at this time the angle difference Δθ between the modulated wave and the zero point can be calculated as shown in the following formula (13), and the twenty-eighth step is executed;

[0184] Δθ=180°-θ(k+2) (13)

[0185] Step 23: Determine if θ(k+3)≤360° holds true. If it does, then no correction is needed for T. top (k+1), execute step twenty-four; otherwise, it proves that the maximum value of the carrier period at the zero crossing of the modulated wave needs to be limited. The angle difference Δθ between the modulated wave and the zero point can be calculated as shown in equation (14), and step twenty-eight is executed.

[0186] Δθ=360°-θ(k+2) (14)

[0187] Step 24: Determine T zer Is (k+1) greater than T? s (k), if true, execute step 27, indicating that the next carrier cycle modulation enters the zero-crossing narrow pulse carrier frequency reduction region; otherwise, execute step 25, indicating that the next carrier cycle modulation enters the zero-crossing narrow pulse carrier frequency increase region;

[0188] Step 25: Determine T zer Is (k+1) less than or equal to T? s If the condition is met, proceed to step 26, indicating that the carrier frequency increase will end in the next carrier cycle and the carrier will be in a non-narrow pulse region; otherwise, proceed to step 27.

[0189] Step 26: Calculate t on T s The calculation method for (k+1) is shown in equation (15).

[0190]

[0191] Let T s (k) equals T calculated by equation (15) s The value of (k+1) is used to store T. s (k+1) is used to facilitate the calculation in the next carrier cycle; then step thirty-one is executed.

[0192] Step 27: Calculate t on T s The calculation method for (k+1) is shown in equation (16).

[0193]

[0194] Let T s (k) equals T calculated by equation (16) s The value of (k+1) is used to store T. s (k+1) is used to facilitate the calculation in the next carrier cycle; then step thirty-one is executed.

[0195] Step 28: At this point, during the carrier modulation process described above, the zero-crossing narrow pulse, because the last carrier period crosses the zero point, will cause the duty cycle before and after the zero point to lose its sinusoidal variation. Therefore, it is necessary to adjust T... zer The calculated value of (k+1) is corrected, and the calculation method of the correction is shown in the following formula (17). The flag value is set to 1 so that the first carrier period value after the modulation wave crosses zero is corrected in the next run. Then the thirty-first step is executed.

[0196]

[0197] Step 29: To ensure the sinusoidal principle of the duty cycle, due to the above-mentioned T... top If (k+1) is recalculated, then t needs to be recalculated. on The value is also recalculated, then t on T s The calculation method for (k+1) is shown in equation (18):

[0198]

[0199] Let T s (k) equals T calculated by equation (18) s The value of (k+1) is used to store T. s (k+1) is used to facilitate the calculation in the next carrier cycle; then step thirty-one is executed.

[0200] Step 30: The calculated value of the first carrier period after the modulation peak and valley may be too large, which will affect the normal modulation in non-narrow pulse regions; therefore, the value of the first carrier period after the modulation peak and valley should be kept consistent with the value of the period of the last carrier before the modulation peak and valley, thus correcting the value of t. on T s The calculation method for (k+1) is shown in equation (19);

[0201]

[0202] Let T s (k) equals T calculated by equation (19) s The value of (k+1) is used to store T. s (k+1) is used to facilitate the calculation in the next carrier cycle; then step thirty-one is executed.

[0203] Step 31: Set the value of the switching transistor by judging the sign of u(t) and the above calculation results. If u(t) > 0, then execute step 32, which indicates that the modulation wave is modulated on the positive half-axis; otherwise, execute step 33, which indicates that the modulation wave is modulated on the negative half-axis.

[0204] Step 32: t 1s t 2s t 3s t 4s The calculation method for the positive half-axis is shown in equation (20):

[0205]

[0206] Step 33: t 1s t 2st 3s t 4s The calculation method for the negative half-axis is shown in equation (21):

[0207]

[0208] Step 34: End.

[0209] 3. Digital Implementation and Carrier Strategy

[0210] When using a Micro Controller Unit (MCU) to digitally implement the method, the carrier wave corresponds to the change in the ePWM module counter value. The modulated wave is absolute-valued and then scaled to the range of 0 to TBPRD for comparison with the carrier wave, where TBPRD is the period value of the ePWM counter. Based on the principle of carrier-in-phase superimposed modulation, after processing, the lower-layer carrier is shifted to the upper-layer carrier, and they need to have a 180° phase shift relationship. Due to the switching of the modulation reference transistor in the zero-crossing narrow pulse region, the periods and switching times of the two carrier waves need to be updated synchronously, making it difficult to implement two symmetrical triangular carrier waves that are 180° out of phase. Therefore, this invention proposes a method... Figure 6 The method for implementing a sawtooth carrier with a 180° phase difference is shown.

[0211] Figure 6 in, u s Modulated wave implemented digitally; u top The counter for the upper-layer carrier is configured to operate in down-counting mode; u bot The counter for the lower-layer carrier is set to operate in up-counting mode; the phase shift angle between the two carriers is zero, making u top At time zero and u bot The timing of the periodicity coincides, thus forming a 180° phase difference between the two carriers; within the same calculation period, the periods of the two carriers are the same, u top To simultaneously update the period value of the next carrier wave and the turn-on time of each switch at time zero, the specific carrier modulation method is as follows: Figure 7 As shown;

[0212] Figure 7 middle:

[0213] u cot It is the carrier period value calculated above for the current moment, which is the TBPRD value in the DSP;

[0214] j represents the DSP's time base counter, which counts in steps using the DSP's system clock signal; the system clock signal is determined by the size of the crystal oscillator.

[0215] Step 1: Begin;

[0216] Step 2: Record the current carrier period value u cot At the same time, set j = 0 to clear the time base counter;

[0217] Step 3: Simultaneously start the time base counter to prepare for carrier generation;

[0218] Step 4: Let u top =j represents the lower-layer carrier period value generated using the up-counting mode at the current counting time; u bot =u cot -j represents the upper-layer carrier period value generated using the down-counting mode at the current counting time.

[0219] Step 5: Output u top u bot ;

[0220] Step 6: Determine u bot If the value < 0 is true, it means that the current carrier period has been generated. If it is false, it means that the current carrier period has not been generated and we need to return to the third step to continue generating the carrier.

[0221] Step 7: End.

[0222] By following the steps above, two carrier waves with a 180° phase difference can be formed within the frequency reduction range, such as... Figure 8 As shown;

[0223] At the same time, in each carrier cycle, the minimum switching time of the switching transistor is always maintained at t. DB +t min This means that within the narrow pulse region, the modulation amplitude remains constant for each carrier cycle. This ensures that the output waveform retains its full sinusoidal characteristic even without the presence of narrow pulses.

[0224] 4. Analysis of Experimental Results

[0225] To verify the above arguments, a single-phase NPC inverter experimental platform was built. The platform inverter was designed with a power output of 3kW and used a DSP TMS320F28377D as the main controller. The AC side consisted of an inductive load with a resistance of 20Ω and an air-core inductor with an inductance of 0.5mH. The DC side used a Chroma programmable DC power supply 62050H. The inverter parameters are shown in Table 3.

[0226] Table 3 Inverter Parameters

[0227]

[0228]

[0229] To more clearly demonstrate the effectiveness of the proposed strategy, a comparative experiment was conducted with traditional narrow pulse elimination methods, represented by the [High-Frequency Three-Level Low Modulation Ratio Region Narrow Pulse Suppression Hybrid Modulation Strategy] in the literature. The experimental results are shown in Figures 9 and 10. Figure 11 As shown.

[0230] Figure 9a and Figure 9b When M = 0.9, the power switch S before and after narrow pulse compensation a1 S a2 S a3 The pulse signal. Comparing the two figures above, it can be seen that the uncompensated power switch will exhibit narrow pulse phenomena at the bottom of the modulation wave and at zero crossings; while with the non-narrow pulse modulation method, the minimum pulse of the power switch is limited to the minimum switching time, and the narrow pulse phenomenon has been completely eliminated. Let the AC side output line voltage be expressed as U. ab The output current using the traditional narrow pulse direct rejection method is denoted as I0; the output currents before and after strategy correction using the no-narrow-pulse modulation method are denoted as I1 and I2, respectively. Thus, the output current waveforms after narrow pulse compensation using different strategies are shown in Figure 10.

[0231] like Figure 10a As shown, when the modulation ratio is 0.9, the output current waveform of the narrow pulse direct rejection method exhibits distortion at the peak of the modulation wave; while Figure 10b The narrow pulse modulation method, at a modulation ratio of 0.9, can not only suppress the narrow pulse phenomenon at the top and bottom but also ensure the sinusoidal nature of the output current waveform. Because the modulation ratio is high at this point and the zero-crossing narrow pulse region is small, the zero-crossing distortion of the output current is not severe.

[0232] like Figure 10c As shown, with the modulation ratio decreasing to 0.3, the zero-crossing narrow pulse region has a major impact on the output waveform quality. Traditional narrow pulse rejection methods have already exhibited severe distortion, making it difficult to maintain the sinusoidal nature of the waveform; while the method without narrow pulse modulation can still make the output current waveform change sinusoidally at low modulation ratios without producing severe distortion.

[0233] like Figure 10d As shown, the proportion of the zero-crossing narrow pulse region in the entire modulation wave is relatively large. Therefore, if the strategy correction of the zero-crossing narrow pulse region is not performed, the output waveform near the zero point will be distorted. However, after the strategy correction, this situation has been significantly improved and zero-point distortion will not occur.

[0234] Depend on Figure 11 The comparison shows that the high-frequency inverter strategy without narrow pulses can meet the requirements of THD at various modulation ratios and is significantly better than the traditional narrow pulse direct rejection method, thus meeting the requirements of high-frequency modulation.

[0235] 5. Conclusion

[0236] This invention addresses the narrow pulse problem in single-phase NPC three-level inverters at high frequencies. It analyzes in detail the causes and distribution patterns of narrow pulse generation and proposes a narrow pulse-free high-frequency inverter strategy. Compared with the traditional direct narrow pulse elimination method, this strategy can not only eliminate the narrow pulse phenomenon throughout the entire modulation range, but also ensure the sinusoidal nature of the output waveform, more effectively reduce the THD value of the output waveform, and guarantee the output waveform quality without narrow pulse modulation.

Claims

1. A single-phase three-level high-frequency inverter modulation method without narrow pulses, wherein the single-phase three-level high-frequency inverter without narrow pulses is a diode-clamped three-level inverter, the structure of which consists of identical front and rear bridge arms, Sa1~Sa4 connected in series, Sb1~Sb4 connected in series, and a and b are the switching transistors of the front and rear bridge arms, respectively; characterized in that: Includes the following steps: S1, Begin; S2, The switching transistor S is obtained through SPWM modulation. a3 Opening time t o ; S3, Determine the activation time of the next carrier cycle S3. t on ≤ t min + t DB If the condition is met, proceed to step S4; otherwise, proceed to step S16. in, t DB Dead time; t min This is the minimum switching time for the switching transistor to operate normally. t on The turn-on time of S3 in the next carrier cycle is obtained through SPWM modulation. This time is not necessarily the actual turn-on time executed in the next carrier cycle of S3. S4, obtained through iterative calculation T top ( k +1) T top ( k +2) and the modulation wave angle value after three beats θ ( k +3); its calculation formula is: ； Where M is the modulation ratio; w The angular frequency of the modulated wave; T top ( k +1) T top ( k +2) are the calculated values ​​for the next and the next-next carrier cycles in the top narrow pulse region, respectively; θ ( k () represents the starting angle value of the modulated wave in the current carrier period; θ ( k +1) θ ( k +2) are the modulation wave start angle values ​​for the next and the next-next carrier cycles, respectively; S5. Perform a correction judgment using the flag bit; if the judgment is true, proceed to step S16; if the judgment is false, proceed to step S6. S6. Determine the modulation wave start angle value of the current carrier period. θ ( k If the angle is less than 90°, proceed to step S7; otherwise, proceed to step S8. S7. Determine the modulation wave angle value after three beats. θ ( k If +3) < 90° is true, proceed to step S10; otherwise, calculate the angle difference Δ between the modulated wave and the null point. θ And execute step S14; the calculation formula is: ； S8. Determine the modulation wave start angle value of the current carrier period. θ ( k If the value is greater than 270°, proceed to step S10; otherwise, proceed to step S9. S9. Determine the modulation wave angle value after three beats. θ ( k +3) Is ≤270° true? If true, then do not correct the calculated value of the next carrier cycle in the top narrow pulse region. T top ( k +1), execute step S10; otherwise, calculate the angle difference Δ between the modulated wave and the null point. θ And execute step S14; the calculation formula is: ； S10. Determine the calculated value of the next carrier cycle in the top narrow pulse region. T top ( k +1) Is it greater than the stored carrier period execution value of the current carrier period? T s ( k If the condition is met, proceed to step S13; otherwise, proceed to step S11. S11. Determine the calculated value of the next carrier cycle in the top narrow pulse region. T top ( k +1) Is it less than or equal to the set minimum carrier period? T s If the condition is met, proceed to step S12; otherwise, proceed to step S13. S12. Calculate the activation time of the next carrier cycle S3. t on The actual carrier cycle value executed in the next carrier cycle T s ( k +1), its calculation formula is: ； Let the stored current carrier period execute value T s ( k The value of the carrier cycle actually executed in the next carrier cycle, calculated by the above formula, is equal to the value of the carrier cycle actually executed in the next carrier cycle. T s ( k +1), then proceed to step S31; in T s ( k The stored value represents the carrier period execution value for the current carrier period. T s (k+1) is the actual carrier cycle value executed in the next carrier cycle; T s The minimum carrier period is set. S13. Calculate the activation time of the next carrier cycle S3. t on The actual carrier cycle value executed in the next carrier cycle T s ( k +1), its calculation formula is: ； Let the stored current carrier period execute value T s ( k The value of the carrier cycle actually executed in the next carrier cycle, calculated by the above formula, is equal to the value of the carrier cycle actually executed in the next carrier cycle. T s ( k +1), then proceed to step S31; S14. At this point, the carrier period at the top and bottom peaks is too large. Calculate the next carrier period value in the top narrow pulse region. T top ( k +1) Make corrections, then set the flag value to 1 and execute step S15; S15. Recalculate the activation time of the next carrier cycle S3. t on The actual carrier cycle value executed in the next carrier cycle T s ( k +1), its calculation formula is: ； Let the stored current carrier period execute value T s ( k The value of the carrier cycle actually executed in the next carrier cycle, calculated by the above formula, is equal to the value of the carrier cycle actually executed in the next carrier cycle. T s ( k +1), then proceed to step S31; S16. Match the first carrier period value after the modulation peak and valley value with the period value of the last carrier before the modulation peak and valley value, and calculate the activation time of the corrected next carrier period S3. t on The actual carrier cycle value executed in the next carrier cycle T s ( k +1); its calculation formula is: ； Let the stored current carrier period execute value T s ( k The value of the carrier cycle actually executed in the next carrier cycle, calculated by the above formula, is equal to the value of the carrier cycle actually executed in the next carrier cycle. T s ( k +1), then proceed to step S31; S17. Determine the activation time of the next carrier cycle S3. t on ≥[ T s -( t min + t DB If the condition is true, proceed to step S19; otherwise, proceed to step S18. S18. Calculate the activation time of the next carrier cycle S3. t on The actual carrier cycle value executed in the next carrier cycle T s ( k +1); its calculation formula is: ； Let the stored current carrier period execute value T s ( k The value of the carrier cycle actually executed in the next carrier cycle, calculated by the above formula, is equal to the value of the carrier cycle actually executed in the next carrier cycle. T s ( k +1), then proceed to step S31; S19, obtained through iterative calculation T zer ( k +1) T zer ( k +2) and the modulation wave angle value after three beats θ ( k +3); its calculation formula is: ； in, T zer ( k +1) T zer ( k +2) are the calculated values ​​for the next and the next-next carrier cycles in the bottom narrow pulse region, respectively; S20. Perform a correction judgment using the flag bit; if the judgment is true, proceed to step S28; if the judgment is false, proceed to step S21. S21. Determine the modulation wave start angle value of the current carrier period. θ ( k If the angle is less than 180°, proceed to step S22; otherwise, proceed to step S23. S22. Determine the modulation wave angle value after three beats. θ ( k +3) Is the value less than 180° true? If so, do not correct the calculated value of the next carrier cycle in the bottom narrow pulse region. T zer ( k +1), proceed to step S24; otherwise, calculate the angle difference Δ between the modulated wave and the null point. θ And execute step S28; the calculation formula is: ； S23. Determine the modulation wave angle value after three beats. θ ( k +3) Does ≤360° hold true? If so, do not correct the calculated value of the next carrier cycle in the top narrow pulse region. T top ( k +1), proceed to step S24; otherwise, calculate the angle difference Δ between the modulated wave and the null point. θ And execute step S28; ； S24. Determine the calculated value of the next carrier cycle in the bottom narrow pulse region. T zer ( k +1) Is it greater than the stored carrier period execution value of the current carrier period? T s ( k If the condition is met, proceed to step S27; otherwise, proceed to step S25. S25. Determine the calculated value of the next carrier cycle in the bottom narrow pulse region. T zer ( k +1) Whether it is less than or equal to the set minimum carrier period T s If the condition is met, proceed to step S26; otherwise, proceed to step S27. S26. Calculate the activation time of the next carrier cycle S3. t on The actual carrier cycle value executed in the next carrier cycle T s ( k +1); its calculation formula is: ； Let the stored current carrier period execute value T s ( k The value of the carrier cycle actually executed in the next carrier cycle, calculated by the above formula, is equal to the value of the carrier cycle actually executed in the next carrier cycle. T s ( k +1), then proceed to step S31; S27. Calculate the activation time of the next carrier cycle S3. t on The actual carrier cycle value executed in the next carrier cycle T s ( k +1); its calculation formula is: ； Let the stored current carrier period execute value T s ( k The value of the carrier cycle actually executed in the next carrier cycle, calculated by the above formula, is equal to the value of the carrier cycle actually executed in the next carrier cycle. T s ( k +1), then proceed to step S31; S28. Calculate the value of the next carrier cycle in the bottom narrow pulse region. T zer ( k +1) Make corrections and set the flag value to 1, then execute step S31; S29, the activation time for the next carrier cycle S3 t on The actual carrier cycle value executed in the next carrier cycle T s ( k +1) Recalculate, and the calculation formula is: ； Let the stored current carrier period execute value T s ( k The value of the carrier cycle actually executed in the next carrier cycle, calculated by the above formula, is equal to the value of the carrier cycle actually executed in the next carrier cycle. T s ( k +1), then proceed to step S31; S30. The first carrier period value after the modulation peak and valley values ​​is kept consistent with the period value of the last carrier before the modulation peak and valley values. The activation time of the corrected next carrier period S3 is then calculated. t on The actual carrier cycle value executed in the next carrier cycle T s ( k +1); its calculation formula is: ； Let the stored current carrier period execute value T s ( k The value of the carrier cycle actually executed in the next carrier cycle, calculated by the above formula, is equal to the value of the carrier cycle actually executed in the next carrier cycle. T s ( k The value of +1) is then executed; then step S31 is performed; S31, By judging the modulation wave u The sign of (t) and the above calculation results are used to set the value of the switching transistor; if the modulation wave u If (t)>0 is true, then step S32 is executed, and the modulated wave is modulated on the positive half-axis; otherwise, step S33 is executed, and the modulated wave is modulated on the negative half-axis. S32. When the modulating wave is modulated on the positive half-axis, the switching transistor S is calculated. a1 S a2 S a3 S a4 The actual activation time in the next carrier cycle t 1s , t 2s , t 3s , t 4s ; S33. When the modulating wave is in negative half-axis modulation, the switching transistor S is calculated. a1 S a2 S a3 S a4 The actual activation time in the next carrier cycle t 1s , t 2s , t 3s , t 4s ; S34, End.

2. The single-phase three-level high-frequency inverter modulation method without narrow pulse as described in claim 1, characterized in that: In step S2, the switching transistor S a3 Opening time t o The calculation formula is: ； Where θ(k) is the modulation wave start angle value of the current carrier period, and Ts is the set minimum carrier period.

3. The single-phase three-level high-frequency inverter modulation method without narrow pulse as described in claim 2, characterized in that: In step S14, the calculated value of the next carrier cycle in the top narrow pulse region. T top ( k The corrected calculation formula for +1) is: ； in, t DB Dead time; t min This is the minimum switching time for the switching transistor to operate normally. θ ( k +1) is the starting angle value of the modulation wave for the next carrier cycle.

4. The single-phase three-level high-frequency inverter modulation method without narrow pulse as described in claim 3, characterized in that: In step S28, the calculated value of the next carrier cycle in the bottom narrow pulse region. T zer ( k The corrected calculation formula for +1) is: ； in, T s ( k The stored value represents the carrier period execution value for the current carrier period. t DB Dead time; t min This is the minimum switching time for the switching transistor to operate normally. θ ( k +1) is the starting angle value of the modulation wave for the next carrier cycle.

5. The single-phase three-level high-frequency inverter modulation method without narrow pulse as described in claim 4, characterized in that: In step S32, the switching transistor S a1 S a2 S a3 S a4 The actual activation time in the next carrier cycle t 1s , t 2s , t 3s , t 4s The calculation formula is: ； in, T s ( k +1) represents the actual carrier cycle value executed in the next carrier cycle; t on The activation time of S3 for the next carrier cycle; t DB This refers to the dead zone time.

6. The single-phase three-level high-frequency inverter modulation method without narrow pulse as described in claim 5, characterized in that: In step S33, the switching transistor S a1 S a2 S a3 S a4 The actual activation time in the next carrier cycle t 1s , t 2s , t 3s , t 4s The calculation formula is: ； in, T s ( k +1) represents the actual carrier cycle value executed in the next carrier cycle; t on The activation time of S3 for the next carrier cycle; t DB This refers to the dead zone time.

7. A carrier modulation method for digitally implementing the single-phase three-level narrow-pulse-free high-frequency inverter modulation method of claim 6, characterized in that: Includes the following steps: S101, Begin; S102. Record the current carrier period value. u cot At the same time, the time base counter is reset to zero; S103. Simultaneously start the time base counter to prepare for carrier generation; S104, Order u top = j ; u top This is the lower-layer carrier period value generated using the upward counting mode at the current counting time. make u bot = u cot - j ; u bot This is the upper-layer carrier period value generated using the down-counting mode at the current counting time. S105, Output u top , u bot ; S106, Judgment u bot If the value <0 is true, the current carrier period has been generated and step S107 is executed. If the value is false, the current carrier period has not been generated and the process returns to step S103 to continue generating the carrier. in, u cot It is the carrier period value calculated above for the current moment, which is the TBPRD value in the DSP; j This indicates that the DSP's time base counter counts in steps using the DSP's system clock signal; the system clock signal is determined by the size of the crystal oscillator. u s Modulated waves implemented digitally; u top This is a counter for the upper-layer carrier; it is set to operate in down-counting mode. u bot The counter for the lower-layer carrier is configured to operate in up-counting mode; S107, End.

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