A method for improving performance of a heterojunction resistive memory through a double-layer structure

Abstract

The application discloses a method for improving the performance of a heterojunction resistive memory through a double-layer structure, which comprises the following steps: spin-coating poly[2-methoxy-5-(2-ethylhexyloxy)-1,4-phenylene vinylene] (MEH-PPV) on a bottom electrode of the heterojunction resistive memory to form a MEH-PPV layer; vacuum evaporating full fluorinated copper phthalocyanine (F 16 CuPc on the MEH-PPV layer to form a F 16 CuPc layer; the MEH-PPV layer and the F 16 CuPc layer form a functional layer of the heterojunction resistive memory. In the application, the F 16 CuPc thin film is prepared on the MEH-PPV layer through vacuum evaporation, the transfer of protons and holes is combined, the transmission performance of the device is improved, the opening voltage and the current of the single-layer device are reduced, and the power consumption is saved.

Description

Technical Field

[0001] This invention belongs to the field of organic electronics and information, and specifically relates to a method for improving the performance of heterojunction memristors through a double-layer structure. Background Technology

[0002] As a two-terminal device, the memristor, based on its unique array structure, can perform large-scale parallel computing. By mimicking the complex structure and intelligent information processing mode of the brain's neural network, it can significantly improve the information processing capabilities of computers and enhance their cognitive abilities, and is expected to overcome the fundamental limitations of the current von Neumann computing architecture.

[0003] The human brain consists of approximately 10 14 -10 15 Synaptic plasticity refers to the ability of neural synapses to adjust their structure according to certain rules to maintain specific synaptic weights in response to external stimuli, thus adapting to changing environments. Synaptic plasticity is the biomolecular basis of the brain's learning and memory functions. The process of external signal stimulation of synapses is the process of synaptic learning, and the process of synaptic weight adjustment is the process of information storage. Building hardware architectures based on basic components with specific functions is an important approach to realizing neuromorphic computing. In this regard, artificial synapses have been shown to be simulating using many devices, among which memristors are considered one of the most promising candidate devices for neuromorphic computing applications.

[0004] Memristors can simulate synaptic weight through nonlinear conductivity and can be controlled by applying a voltage bias higher than the characteristic device threshold. Simulated memristor neural networks have demonstrated their ability to solve computational tasks using various algorithms. However, to date, the vast majority of devices implementing these functions have been made of inorganic materials. Memristor devices, however, can also be made of organic materials, which are fundamentally attractive due to their unique advantages: low cost; simple and diverse methods for preparing thin films; and good compatibility with flexible substrates. These advantages pave the way for the integration of organic memristors with biomedical devices and wearable IoT devices.

[0005] Currently, typical memristor synaptic devices have only a single-layer structure, which is simple in structure and function. Summary of the Invention

[0006] The purpose of this section is to outline some aspects of embodiments of the present invention and to briefly describe some preferred embodiments. Simplifications or omissions may be made in this section, as well as in the abstract and title of this application, to avoid obscuring the purpose of these documents; however, such simplifications or omissions should not be construed as limiting the scope of the invention.

[0007] In view of the problems existing in the above and / or prior art, the present invention is proposed.

[0008] Therefore, the purpose of this invention is to overcome the shortcomings of the prior art and provide a method for improving the performance of heterojunction memristors through a double-layer structure.

[0009] To solve the above-mentioned technical problems, the present invention provides the following technical solution: a method for improving the performance of heterojunction memristors through a double-layer structure, comprising,

[0010] A MEH-PPV layer is formed by spin-coating selected poly[2-methoxy-5-(2-ethylhexyloxy)-1,4-phenylenevinylene]MEH-PPV onto the bottom electrode of a heterojunction memristor.

[0011] Vacuum evaporation of copper perfluorophthalocyanine (F) onto the MEH-PPV layer 16 CuPc, forming F 16 CuPc layer;

[0012] MEH-PPV layer and F 16 The CuPc layer forms the functional layer of the heterojunction memristor.

[0013] As a preferred embodiment of the method described in this invention, the method includes: growing a bottom electrode layer on the substrate surface, and sequentially cleaning it with ITO cleaning agent, ultrapure water, and drying it.

[0014] The dried sample was subjected to ultraviolet ozone treatment for 10-15 minutes to obtain an ozone-treated sample.

[0015] MEH-PPV solution was spin-coated onto the ozone-treated sample and then annealed to obtain the MEH-PPV layer.

[0016] The prepared sample is placed in a vacuum evaporation system to deposit F on the sample surface. 16 After the CuPc layer is deposited, maintain a vacuum state until the functional layer cools to room temperature.

[0017] Place the sample into the vacuum evaporation system and begin evaporating the top electrode;

[0018] After the evaporation is completed, the vacuum state is maintained until the top electrode cools to room temperature to obtain a heterojunction memristor based on a double-layer structure.

[0019] In a preferred embodiment of the method described in this invention, the bottom electrode material is indium tin oxide, and the bottom electrode thickness is 130–140 nm.

[0020] As a preferred embodiment of the method described in this invention, the MEH-PPV solution is formed by dissolving MEH-PPV with a molar mass ≥100000 in chloroform, and its concentration is 7 mg / mL.

[0021] In a preferred embodiment of the method described in this invention, the MEH-PPV layer is obtained by annealing, wherein the annealing temperature is 80°C, the annealing time is 1 hour, and the thickness of the MEH-PPV layer is 20-30 nm.

[0022] As a preferred embodiment of the method described in this invention, wherein: the F 16 The CuPc layer is composed of F with a molar mass ≥100,000. 16 CuPc powder is formed by vacuum evaporation.

[0023] As a preferred embodiment of the method described in this invention, the vacuum evaporation process involves evacuating the cavity until the internal pressure is below 5 × 10⁻⁶. -4 After Pa, the vapor deposition temperature is 350℃.

[0024] As a preferred embodiment of the method described in this invention, wherein: the F 16 The thickness of the CuPc layer is 20–30 nm.

[0025] In a preferred embodiment of the method described in this invention, the top electrode material for vacuum evaporation is aluminum, and the top electrode evaporation rate is... The thickness is controlled at 90–100 nm using a crystal oscillator.

[0026] In a preferred embodiment of the method described in this invention, the cleaning time between the ITO cleaning agent and ultrapure water is 25 to 30 minutes.

[0027] Beneficial effects of this invention:

[0028] (1) The MEH-PPV layer of the slowly varying meta-junction memristor provided by the present invention is prepared by solution spin coating, which has the advantages of good sustainability, good solubility, simple fabrication and excellent photoelectric performance.

[0029] (2) This invention uses vacuum evaporation to prepare nanoscale F on MEH-PPV layers. 16 CuPc thin films, through the joint transfer of protons and holes, synergistically improve the transmission performance of devices, reduce the turn-on voltage and current of single-layer devices, and save power consumption.

[0030] (3) The heterojunction memristor in this invention can perform various neuromorphic simulations, such as long-term / short-term memory (LTM / STM) and "learning-forgetting" experiential learning. The heterojunction memristor in this invention has low cost and good repeatability, and can be used in artificial neuromorphic computing systems, providing more possibilities for constructing artificial memristor neural networks. Attached Figure Description

[0031] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0032] Figure 1 This is a schematic diagram of the memristor with improved synaptic performance through a double-layer structure prepared according to the present invention;

[0033] Figure 2 This is a molecular structure diagram of MEH-PPV in an embodiment of the present invention;

[0034] Figure 3 F in the embodiments of the present invention 16 CuPc molecular structure diagram;

[0035] Figure 4 MEH-PPV:F prepared in Example 1 16 The current-voltage (IV) curves of CuPc heterojunction memristors under ambient temperature and pressure conditions were obtained using a KEITHLEY 4200 semiconductor analyzer when a positive and negative voltage of 7V was applied.

[0036] Figure 5 This is a schematic diagram of the IV curves of a simple MEH-PPV memristor in Example 2 under ambient air temperature and pressure conditions using a KEITHLEY 4200 semiconductor analyzer with an applied positive and negative voltage of 8V.

[0037] Figure 6 Example 3: Simple F 16 A schematic diagram of the IV curve of a CuPc memristor under normal air temperature and pressure conditions using a KEITHLEY4200 semiconductor analyzer with a positive and negative voltage of 10V applied.

[0038] Figure 7 MEH-PPV:F prepared in Example 1 16 A schematic diagram of the conductivity change curve of a CuPc heterojunction memristor under continuous positive and negative 7V voltage pulse stimulation using a KEITHLEY4200 semiconductor analyzer under ambient temperature and pressure conditions.

[0039] Figure 8 MEH-PPV:F prepared in Example 1 16 A schematic diagram of the conductivity change curve of a CuPc heterojunction memristor under ambient temperature and pressure conditions using a KEITHLEY 4200 semiconductor analyzer under continuous 7.5V voltage spike pulse stimulation.

[0040] Figure 9MEH-PPV:F prepared in Example 1 16 A schematic diagram of the "STM-LTM" variation curve of a CuPc heterojunction memristor under ambient temperature and pressure conditions using a KEITHLEY 4200 semiconductor analyzer under a continuous voltage stimulation of 7.5V from 8s to 26s.

[0041] Figure 10 MEH-PPV:F prepared in Example 1 16 A schematic diagram showing the "memory-forgetting" curves of a CuPc heterojunction memristor under ambient temperature and pressure conditions using a KEITHLEY4200 semiconductor analyzer at 7V and 5V.

[0042] Figure 11 MEH-PPV:F prepared for Comparative Example 1 16 A schematic diagram of the IV curves of a CuPc bulk heterojunction device under ambient temperature and pressure conditions using a KEITHLEY 4200 semiconductor analyzer at ±6V.

[0043] Figure 12 MEH-PPV:F prepared for Comparative Example 2 16 A schematic diagram of the IV curves of a CuPc heterojunction device under ambient temperature and pressure conditions using a KEITHLEY4200 semiconductor analyzer at positive 7V and negative 6V.

[0044] Figure 13 MEH-PPV:F prepared for Comparative Example 3 16 A schematic diagram of the IV curves of a CuPc heterojunction device under ambient temperature and pressure conditions using a KEITHLEY4200 semiconductor analyzer at positive 8V and negative 6V.

[0045] Figure 14 MEH-PPV:F prepared for Comparative Example 4 16 A schematic diagram of the IV curve of a CuPc heterojunction device under ambient temperature and pressure conditions using a KEITHLEY4200 semiconductor analyzer at a positive 8V voltage.

[0046] Figure 15 This is a schematic diagram of the IV curve of the MEH-PPV device prepared in Example 4 under ambient temperature and pressure conditions using a KEITHLEY4200 semiconductor analyzer at ±7V.

[0047] Figure 16 F prepared in Example 5 16 A schematic diagram of the IV curve of a CuPc device at ±10V using a KEITHLEY4200 semiconductor analyzer under ambient temperature and pressure conditions. Detailed Implementation

[0048] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the examples in the specification.

[0049] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0050] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.

[0051] This invention provides a memristor with improved synaptic performance through a double-layer structure and its fabrication method, the structure of which is as follows: Figure 1 As shown, it includes: a top electrode, a functional layer, and a bottom electrode, with an overall vertical structure. The functional layer consists of a MEH-PPV layer and an F... 16 The CuPc layer composition, the MEH-PPV layer thickness is 20-30 nm, and F 16 The CuPc layer thickness is 20-30 nm.

[0052] In this invention, poly[2-methoxy-5-(2-ethylhexyloxy)-1,4-phenylenevinylene], abbreviated as MEH-PPV, is a commercially available raw material purchased from Xi'an Baolai Optoelectronic Technology Co., Ltd. The molecular structure diagram of MEH-PPV is shown below. Figure 2 As shown;

[0053] In this embodiment of the invention, perfluorophthalocyanine copper is referred to as F. 16 CuPc, a common commercially available raw material, was purchased from Sigma-Aldrich. 16 The molecular structure diagram of CuPc is shown below. Figure 3 As shown.

[0054] Example 1

[0055] (1) Select conductive glass as the substrate, generate a layer of indium tin oxide with a thickness of 135nm on the conductive glass to form ITO conductive glass, and clean the ITO conductive glass with ITO cleaning agent and ultrapure water for 30min in sequence, then blow dry and place it in an oven at 120℃ for 60min to dry.

[0056] (2) The dried ITO conductive glass is treated with ultraviolet ozone for 15 minutes;

[0057] (3) Using a pipette, MEH-PPV solution (7 mg / mL) dissolved in chloroform was spin-coated onto ITO conductive glass to form a film, and annealed at 80°C for 1 hour. The thickness of the MEH-PPV layer was 20-30 nm.

[0058] (4) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, the system is heated to 350℃, and F is deposited on the sample surface. 16 CuPc layer, F 16 The thickness of the CuPc layer is 20-30 nm;

[0059] (5) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, begin evaporating aluminum electrodes, with an aluminum thickness of 90-100 nm; the film thickness was measured using a profilometer and further confirmed by SEM;

[0060] (6) After the vapor deposition experiment is completed, the metal electrode is cooled to room temperature in the vacuum chamber to obtain the heterojunction memristor. Then the chamber is opened and the wafer is taken out and the electrical performance of the device is tested.

[0061] Example 2

[0062] (1) Select conductive glass as the substrate, generate a layer of indium tin oxide with a thickness of 135nm on the conductive glass to form ITO conductive glass, and clean the ITO conductive glass with ITO cleaning agent and ultrapure water for 30min in sequence, then blow dry and place it in an oven at 120℃ for 60min to dry.

[0063] (2) The dried ITO conductive glass is treated with ultraviolet ozone for 15 minutes;

[0064] (3) Using a pipette, MEH-PPV solution (7 mg / mL) dissolved in chloroform was spin-coated onto ITO conductive glass to form a film, and annealed at 80°C for 1 hour. The thickness of the MEH-PPV layer was 20-30 nm.

[0065] (4) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, begin evaporating aluminum electrodes, with an aluminum thickness of 90-100 nm; the film thickness was measured using a profilometer and further confirmed by SEM;

[0066] (5) After the vapor deposition experiment is completed, the metal electrode is cooled to room temperature in the vacuum chamber to obtain the heterojunction memristor. Then the chamber is opened and the wafer is taken out and the electrical performance of the device is tested.

[0067] Example 3

[0068] (1) Select conductive glass as the substrate, generate a layer of indium tin oxide with a thickness of 135nm on the conductive glass to form ITO conductive glass, and clean the ITO conductive glass with ITO cleaning agent and ultrapure water for 30min in sequence, then blow dry and place it in an oven at 120℃ for 60min to dry.

[0069] (2) The dried ITO conductive glass is treated with ultraviolet ozone for 15 minutes;

[0070] (3) Place the ITO conductive glass into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. -4 Pa, the system is heated to 350℃, and F is deposited on the sample surface. 16 CuPc layer, F 16 The thickness of the CuPc layer is 20-30 nm;

[0071] (4) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, begin evaporating aluminum electrodes, with an aluminum thickness of 90-100 nm; the film thickness was measured using a profilometer and further confirmed by SEM;

[0072] (5) After the vapor deposition experiment is completed, the metal electrode is cooled to room temperature in the vacuum chamber to obtain the heterojunction memristor. Then the chamber is opened and the wafer is taken out and the electrical performance of the device is tested.

[0073] Example 4

[0074] (1) Select conductive glass as the substrate, generate a layer of indium tin oxide with a thickness of 135nm on the conductive glass to form ITO conductive glass, and clean the ITO conductive glass with ITO cleaning agent and ultrapure water for 30min in sequence, then blow dry and place it in an oven at 120℃ for 60min to dry.

[0075] (2) The dried ITO conductive glass is treated with ultraviolet ozone for 15 minutes;

[0076] (3) Using a pipette, MEH-PPV solution (7 mg / mL) dissolved in chloroform was spin-coated onto ITO conductive glass to form a film, and annealed at 80°C for 1 hour. The thickness of the MEH-PPV layer was 45-55 nm.

[0077] (4) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, begin evaporating aluminum electrodes, with an aluminum thickness of 90-100 nm; the film thickness was measured using a profilometer and further confirmed by SEM;

[0078] (5) After the vapor deposition experiment is completed, the metal electrode is cooled to room temperature in the vacuum chamber to obtain the heterojunction memristor. Then the chamber is opened and the wafer is taken out and the electrical performance of the device is tested.

[0079] Example 5

[0080] (1) Select conductive glass as the substrate, generate a layer of indium tin oxide with a thickness of 135nm on the conductive glass to form ITO conductive glass, and clean the ITO conductive glass with ITO cleaning agent and ultrapure water for 30min in sequence, then blow dry and place it in an oven at 120℃ for 60min to dry.

[0081] (2) The dried ITO conductive glass is treated with ultraviolet ozone for 15 minutes;

[0082] (3) Place the ITO conductive glass into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. -4 Pa, the system is heated to 350℃, and F is deposited on the sample surface. 16 CuPc layer, F 16 The CuPc layer thickness is 50-60 nm;

[0083] (4) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, begin evaporating aluminum electrodes, with an aluminum thickness of 90-100 nm; the film thickness was measured using a profilometer and further confirmed by SEM;

[0084] (5) After the vapor deposition experiment is completed, the metal electrode is cooled to room temperature in the vacuum chamber to obtain the heterojunction memristor. Then the chamber is opened and the wafer is taken out and the electrical performance of the device is tested.

[0085] Comparative Example 1

[0086] (1) Select conductive glass as the substrate, generate a layer of indium tin oxide with a thickness of 135nm on the conductive glass to form ITO conductive glass, and clean the ITO conductive glass with ITO cleaning agent and ultrapure water for 30min in sequence, then blow dry and place it in an oven at 120℃ for 60min to dry.

[0087] (2) The dried ITO conductive glass is treated with ultraviolet ozone for 15 minutes;

[0088] (3) Using a pipette, mix 7 mg / mL MEH-PPV dissolved in chloroform with 3 mg / mL F 16 The CuPc blend heterojunction solution was spin-coated onto ITO conductive glass and annealed at 80°C for 1 hour. The thickness of the blend heterojunction layer was 20-30 nm.

[0089] (4) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, begin evaporating aluminum electrodes, with an aluminum thickness of 90-100 nm; the film thickness was measured using a profilometer and further confirmed by SEM;

[0090] (5) After the vapor deposition experiment is completed, the metal electrode is cooled to room temperature in the vacuum chamber to obtain the heterojunction memristor. Then the chamber is opened and the wafer is taken out and the electrical performance of the device is tested.

[0091] Comparative Example 2

[0092] (1) Select conductive glass as the substrate, generate a layer of indium tin oxide with a thickness of 135nm on the conductive glass to form ITO conductive glass, and clean the ITO conductive glass with ITO cleaning agent and ultrapure water for 30min in sequence, then blow dry and place it in an oven at 120℃ for 60min to dry.

[0093] (2) The dried ITO conductive glass is treated with ultraviolet ozone for 15 minutes;

[0094] (3) Using a pipette, spin-coat a 7 mg / mL MEH-PPV solution dissolved in chlorobenzene onto an ITO conductive glass to form a film, anneal at 80°C for 1 hour, and the thickness of the MEH-PPV layer is 20-30 nm.

[0095] (4) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, the system is heated to 350℃, and F is deposited on the sample surface. 16 CuPc layer, F 16 The thickness of the CuPc layer is 20-30 nm;

[0096] (5) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, begin evaporating aluminum electrodes, with an aluminum thickness of 90-100 nm; the film thickness was measured using a profilometer and further confirmed by SEM;

[0097] (6) After the vapor deposition experiment is completed, the metal electrode is cooled to room temperature in the vacuum chamber to obtain the heterojunction memristor. Then the chamber is opened and the wafer is taken out and the electrical performance of the device is tested.

[0098] Comparative Example 3

[0099] (1) Select conductive glass as the substrate, generate a layer of indium tin oxide with a thickness of 135nm on the conductive glass to form ITO conductive glass, and clean the ITO conductive glass with ITO cleaning agent and ultrapure water for 30min in sequence, then blow dry and place it in an oven at 120℃ for 60min to dry.

[0100] (2) The dried ITO conductive glass is treated with ultraviolet ozone for 15 minutes;

[0101] (3) Using a pipette, spin-coat a 7 mg / mL MEH-PPV solution dissolved in chloroform onto an ITO conductive glass to form a film, anneal at 80°C for 1 hour, and the thickness of the MEH-PPV layer is 20-30 nm.

[0102] (4) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, the system is heated to 350℃, and F is deposited on the sample surface. 16 CuPc layer, F 16 The thickness of the CuPc layer is 10-18 nm;

[0103] (5) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, begin evaporating aluminum electrodes, with an aluminum thickness of 90-100 nm; the film thickness was measured using a profilometer and further confirmed by SEM;

[0104] (6) After the vapor deposition experiment is completed, the metal electrode is cooled to room temperature in the vacuum chamber to obtain the heterojunction memristor. Then the chamber is opened and the wafer is taken out and the electrical performance of the device is tested.

[0105] Comparative Example 4

[0106] (1) Select conductive glass as the substrate, generate a layer of indium tin oxide with a thickness of 135nm on the conductive glass to form ITO conductive glass, and clean the ITO conductive glass with ITO cleaning agent and ultrapure water for 30min in sequence, then blow dry and place it in an oven at 120℃ for 60min to dry.

[0107] (2) The dried ITO conductive glass is treated with ultraviolet ozone for 15 minutes;

[0108] (3) Using a pipette, spin-coat a 3 mg / mL MEH-PPV solution dissolved in chloroform onto an ITO conductive glass to form a film, anneal at 80°C for 1 hour, and the thickness of the MEH-PPV layer is 20-30 nm.

[0109] (4) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, the system is heated to 350℃, and F is deposited on the sample surface. 16 CuPc layer, F 16 The thickness of the CuPc layer is 20-30 nm;

[0110] (5) Place the ITO conductive glass film into the vacuum evaporation equipment and control the pressure in the vacuum chamber to be 4×10⁻⁶. - 4 Pa, begin evaporating aluminum electrodes, with an aluminum thickness of 90-100 nm; the film thickness was measured using a profilometer and further confirmed by SEM;

[0111] (6) After the vapor deposition experiment is completed, the metal electrode is cooled to room temperature in the vacuum chamber to obtain the heterojunction memristor. Then the chamber is opened and the wafer is taken out and the electrical performance of the device is tested.

[0112] Performance testing:

[0113] All electrical performance tests were performed using a KEITHLEY 4200 semiconductor analyzer under ambient temperature and pressure conditions.

[0114] See Figure 1 and Figure 4 The diagram shows the structure and IV curve of the heterojunction memristor in Example 1, with reference to Examples 2 and 3. Figure 5 and Figure 6 It can be seen that the fabricated heterojunction device is similar to the monolayer MEH-PPV memristor and F 16 Compared to CuPc memristors, both current and voltage levels decrease due to the co-migration of holes and protons within the device.

[0115] See Figure 7 The diagram shows the conductivity curves of the heterojunction memristor prepared in Example 1 under continuous positive and negative voltage long-term scanning. Under positive and negative operating voltages, the conductivity of the memristor increases, and under negative operating voltages, the conductivity decreases.

[0116] See Figure 8The figure shows the conductivity curve of the heterojunction memristor prepared in Example 1 under continuous positive peak pulse stimulation. Under the positive operating voltage, the peak conductivity of the memristor gradually increases. The conductivity can be regarded as the change of memory weight when the stimulation signal acts on the synapse. An increase indicates that memory is being formed, and a decrease indicates that forgetting is being formed.

[0117] See Figure 9 The figure shows the change in "memory capacity" of the heterojunction memristor prepared in Example 1 under different stimulation times. As the stimulation time increases, the decay of the device conductivity gradually slows down, simulating the transition of the human brain from short-term memory to long-term memory.

[0118] See Figure 10 This is a schematic diagram of the "memory-forgetting" change curves of the heterojunction memristor prepared in Example 1 under different continuous voltages, used to simulate the changes in memory and forgetting in the human brain when receiving different amounts of stimulation.

[0119] See Figure 11 The image shown is the IV image of the bulk heterojunction device prepared in Comparative Example 1. Under the structure of Comparative Example 1, the prepared heterojunction device does not have the positively enhanced memristor hysteresis characteristic.

[0120] See Figure 12 The image shown is an IV image of the heterojunction device prepared in Comparative Example 2. In the solvent of Comparative Example 2, the prepared heterojunction device does not have the positively enhanced memristor hysteresis characteristic.

[0121] See Figure 13 The image shown is the IV image of the heterojunction device prepared in Comparative Example 3. At the evaporation thickness of Comparative Example 3, the prepared heterojunction device does not have the positively enhanced memristor hysteresis characteristics.

[0122] See Figure 14 Image 1 shows the IV image of the heterojunction device prepared in Comparative Example 4. At the solution concentration of Comparative Example 3, the prepared heterojunction device does not exhibit positively enhanced memristor hysteresis characteristics.

[0123] See Figure 15 Image IV shows the heterojunction device prepared in Example 4. At the spin coating thickness of Example 4, the prepared heterojunction device does not have the positively enhanced memristor hysteresis characteristics.

[0124] See Figure 16 Image IV shows the heterojunction device prepared in Example 5. At the evaporation thickness of Example 5, the prepared heterojunction device only exhibits memristor characteristics at 10V, and has a very high current level and high power consumption.

[0125] In summary, this invention provides a method for improving the performance of heterojunction memristors through a bilayer structure, employing vacuum evaporation to prepare nanoscale FH on a MEH-PPV layer. 16 CuPc thin films, through the combined transfer of protons and holes, synergistically improve the transmission performance of devices, reduce the turn-on voltage and current of single-layer devices, and save power consumption; at the same time, by selecting specific solvents and processing methods, their excellent performance can be achieved.

[0126] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the present invention.

Claims

1. A method for improving the performance of heterojunction memristors through a double-layer structure, characterized in that: include, A poly[2-methoxy-5-(2-ethylhexyloxy)-1,4-phenylenevinylene]MEH-PPV solution was spin-coated onto the bottom electrode of a heterojunction memristor, and then annealed to form a MEH-PPV layer. The MEH-PPV solution was formed by dissolving MEH-PPV with a molar mass ≥100000 in chloroform, with a concentration of 7 mg / mL. The annealing temperature was 80℃, the annealing time was 1 h, and the thickness of the MEH-PPV layer was 20~30 nm. Vacuum evaporation of copper perfluorophthalocyanine (F) onto the MEH-PPV layer 16 CuPc, forming F 16 CuPc layer, where F 16 CuPc powder molar mass ≥ 100,000, vacuum deposition is performed with the cavity pressure below 5 × 10⁻⁶. -4 After Pa, the evaporation temperature is 350℃, and the F 16 The thickness of the CuPc layer is 20~30nm; MEH-PPV layer and F 16 The CuPc layer forms the functional layer of the heterojunction memristor.

2. The method as described in claim 1, characterized in that: This includes growing a bottom electrode layer on the substrate surface, and then sequentially cleaning it with ITO cleaning agent, ultrapure water, and drying it. The dried sample was subjected to ultraviolet ozone treatment for 10-15 minutes to obtain an ozone-treated sample. MEH-PPV solution was spin-coated onto the ozone-treated sample and then annealed to obtain the MEH-PPV layer. The prepared sample is placed in a vacuum evaporation system to deposit F on the sample surface. 16 After the CuPc layer is deposited, maintain a vacuum state until the functional layer cools to room temperature. Place the sample into the vacuum evaporation system and begin evaporating the top electrode; After the evaporation is completed, the vacuum state is maintained until the top electrode cools to room temperature to obtain a heterojunction memristor based on a double-layer structure.

3. The method as described in claim 2, characterized in that: The bottom electrode material is indium tin oxide, and the bottom electrode thickness is 130~140nm.

4. The method as described in claim 2, characterized in that: The top electrode material for vacuum evaporation is aluminum, the evaporation rate of the top electrode is 1-3 Å / s, and the thickness is controlled at 90-100 nm using a crystal oscillator.

5. The method as described in claim 4, characterized in that: The cleaning time for ITO cleaning agent and ultrapure water is 25-30 minutes.

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