Pixel circuit, display panel and display device

CN117292651BActive Publication Date: 2026-10-09HEFEI VISIONOX TECH CO LTD
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Patent Information

Application Number
CN202310957156.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-07-28
Publication Date
2026-10-09
Estimated Expiration
2043-07-28

AI Technical Summary

Technical Problem

[0004]本发明提供了一种像素电路、显示面板及显示装置,以改善显示面板的显示不均问题

Benefits of technology

[0034]The technical solution of this invention employs a pixel circuit comprising: a data writing module, a driving module, a light-emitting module, a first light-emitting control module, a first initialization module, and a reset module. The data writing module writes a data voltage to the first terminal of the driving module during the data writing phase. The driving module generates a driving current based on the data voltage, and the light-emitting module emits light in response to the driving current. The first light-emitting control module is connected between the second terminal of the driving module and the first terminal of the light-emitting module. The first light-emitting control module is activated during a light-emitting sub-phase of the light-emitting phase, which includes a light-emitting sub-phase and a reset sub-phase, alternating between the two. The first initialization module transmits a first initialization signal to the first terminal of the light-emitting module during the initialization phase. During the reset sub-phase, the first initialization module does not transmit the first initialization signal to the light-emitting module. The reset module resets the second terminal of the driving module during both the reset and initialization phases. The first initialization module initializes the light-emitting module only during the initialization phase. During the light-emitting phase, the first initialization module does not initialize the light-emitting module again. The initialization of the light-emitting modules corresponding to all row pixel circuits in the display panel is performed during the initialization phase. During initialization, the load of the initialization signal is the same for each row of pixel circuits, ensuring that the initialization degree of each row is the same. This technology can improve upon the uneven initialization caused by the multi-pulse design in existing technologies, which leads to uneven loads for some rows and lower loads for others, resulting in uneven display. Furthermore, the reset module can reset the second terminal of the driver module multiple times, thereby mitigating the fatigue effect of the driver module.

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Abstract

The application discloses a pixel circuit, a display panel and a display device. The pixel circuit comprises a data writing module, a driving module, a light emitting module, a first light emitting control module, a first initialization module and a reset module. The data writing module is used for transmitting a data voltage to a first end of the driving module. The driving module is used for generating a driving current according to the data voltage, and the light emitting module emits light in response to the driving current. The first light emitting control module is used for being turned on in a light emitting sub-stage of a light emitting stage. The light emitting stage comprises the light emitting sub-stage and a reset sub-stage. The first initialization module is used for transmitting a first initialization signal to a first end of the light emitting module in an initialization stage. In the reset sub-stage, the first initialization module does not transmit the first initialization signal to the light emitting module. The reset module is used for resetting a second end of the driving module in the reset sub-stage and the initialization stage. The application can improve the display uneven phenomenon of the display panel.
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Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a pixel circuit, a display panel, and a display device. Background Technology

[0002] With the development of display technology, the application of display panels is becoming more and more widespread, and the requirements for display panels are also getting higher and higher.

[0003] The display panel contains multiple pixel circuits, which emit light to achieve the display function. However, in existing display panels, the brightness of each pixel circuit is uneven, especially at low brightness and low grayscale levels, causing mura (display unevenness) and affecting the display effect. Summary of the Invention

[0004] The present invention provides a pixel circuit, a display panel, and a display device to improve the problem of uneven display on the display panel.

[0005] According to one aspect of the present invention, a pixel circuit is provided, the pixel circuit comprising:

[0006] The system comprises a data writing module, a driving module, a light-emitting module, a first light-emitting control module, a first initialization module, and a reset module; the data writing module is used to transmit data voltage to the driving module; the driving module is used to generate a driving current based on the data voltage, and the light-emitting module emits light in response to the driving current;

[0007] The first light-emitting control module is connected between the second end of the driving module and the first end of the light-emitting module; the first light-emitting control module is used to turn on the light-emitting sub-stage of the light-emitting stage, the light-emitting stage includes the light-emitting sub-stage and the reset sub-stage, and the light-emitting sub-stage and the reset sub-stage are performed alternately;

[0008] The first initialization module is used to transmit a first initialization signal to the first end of the light-emitting module during the initialization phase; during the reset phase, the first initialization module does not transmit the first initialization signal to the light-emitting module.

[0009] The reset module is used to reset the second terminal of the drive module during the reset sub-phase and the initialization phase.

[0010] Optionally, a first initialization signal is connected to the first terminal of the first initialization module, a second terminal of the first initialization module is electrically connected to the first terminal of the light-emitting module, and a first scanning signal is connected to the control terminal of the first initialization module; wherein, the first scanning signal controls the first initialization module to be turned on during the initialization phase and controls the first initialization module to be turned off during the reset phase.

[0011] The first terminal of the reset module is connected to a reset signal, the second terminal of the reset module is electrically connected to the second terminal of the drive module, and the control terminal of the reset module is connected to a second scan signal; wherein, the second scan signal controls the reset module to be turned on during the initialization phase and the reset sub-phase, and controls the reset module to be turned off during the light emission sub-phase.

[0012] Optionally, the pixel circuit further includes a first storage module;

[0013] The first terminal of the first initialization module is electrically connected to the first terminal of the first storage module, the second terminal of the first initialization module is electrically connected to the first terminal of the light-emitting module, and the control terminal of the first initialization module is connected to a third scanning signal; wherein, the third scanning signal controls the first initialization module to be turned on during the initialization phase and the reset sub-phase, and controls the first initialization module to be turned off during the light-emitting sub-phase.

[0014] The first terminal of the reset module is connected to a reset signal, the second terminal of the reset module is electrically connected to the second terminal of the drive module, and the control terminal of the reset module is connected to the third scan signal; wherein, the third scan signal controls the reset module to be turned on during the initialization phase and the reset sub-phase, and controls the reset module to be turned off during the light emission sub-phase.

[0015] Optionally, the pixel circuit further includes a charging and discharging module, which is used to transmit a first initialization signal to the second terminal of the first storage module during the charging phase and to discharge the second terminal of the storage module during the discharging phase.

[0016] Preferably, the charging phase precedes the initialization phase, and the discharging phase precedes the light-emitting phase;

[0017] Optionally, the charging and discharging module includes:

[0018] The charging unit and the discharging unit are provided. The first end of the charging unit is connected to the first initialization signal, the second end of the charging unit is electrically connected to the second end of the first storage module, and the control end of the charging unit is connected to the fourth scan signal. The fourth scan signal controls the charging unit to be turned on during the charging phase, and transmits the first initialization signal to the second end of the first storage module.

[0019] The first end of the discharge unit is grounded, the second end of the discharge unit is electrically connected to the second end of the first storage module, and the control end of the discharge unit is connected to a fifth scan signal; wherein, the fifth scan signal controls the discharge unit to conduct during the discharge phase, thereby grounding the second end of the first storage module.

[0020] Optionally, the pixel circuit further includes a threshold compensation module, a second storage module, and a second light emission control module;

[0021] The first end of the data writing module is connected to the data voltage, the second end of the data writing module is electrically connected to the first end of the driving module, and the control end of the data writing module is connected to the sixth scan signal.

[0022] The first terminal of the second light-emitting control module is connected to the first power supply voltage, the second terminal of the second light-emitting control module is electrically connected to the first terminal of the driving module, and the control terminal of the second light-emitting module is connected to the light-emitting control signal.

[0023] The first terminal of the second storage module is connected to the first power supply voltage, and the second terminal of the second storage module is electrically connected to the control terminal of the drive module.

[0024] The first end of the threshold compensation module is electrically connected to the second end of the drive module, the second end of the threshold compensation module is electrically connected to the control end of the drive module, and the control end of the threshold compensation module is connected to the seventh scan signal;

[0025] The first terminal of the first light-emitting control module is electrically connected to the second terminal of the driving module, the second terminal of the first light-emitting control module is electrically connected to the first terminal of the light-emitting module, and the control terminal of the first light-emitting module is connected to the light-emitting control signal.

[0026] The second terminal of the light-emitting module is connected to a second power supply voltage.

[0027] Optionally, the pixel circuit further includes a second initialization module, which is used to initialize the control terminal of the driving module.

[0028] Optionally, at least one of the second initialization module and the threshold compensation module is an oxide thin-film transistor.

[0029] According to another aspect of the present invention, a display panel is provided, the display panel comprising multiple rows of pixel circuits as described above.

[0030] Optionally, the pixel circuit further includes a charging / discharging module and a first storage module; a first terminal of the first initialization module is electrically connected to a first terminal of the first storage module, a second terminal of the first initialization module is electrically connected to a first terminal of the light-emitting module, and a control terminal of the first initialization module is connected to a third scanning signal; wherein, the third scanning signal controls the first initialization module to be turned on during the initialization phase and the reset phase, and controls the first initialization module to be turned off during the light-emitting phase; the charging / discharging module is used to transmit the first initialization signal to the second terminal of the first storage module during the charging phase before the initialization phase, and to discharge the second terminal of the storage module during the discharging phase before the light-emitting phase; a first terminal of the reset module is connected to a reset signal, a second terminal of the reset module is electrically connected to a second terminal of the driving module, and a control terminal of the reset module is connected to the third scanning signal; wherein, the third scanning signal controls the reset module to be turned on during the initialization phase and the reset phase, and controls the reset module to be turned off during the light-emitting phase;

[0031] The display panel includes a display area and a border area that at least partially surrounds the display area, and the pixel circuit is disposed in the display area;

[0032] The display panel also includes a grounding wire extending from the bezel area to the display area, and the charging / discharging module is connected to the grounding wire.

[0033] According to another aspect of the present invention, a display device is provided, the display device comprising a display panel as described above.

[0034] The technical solution of this invention employs a pixel circuit comprising: a data writing module, a driving module, a light-emitting module, a first light-emitting control module, a first initialization module, and a reset module. The data writing module writes a data voltage to the first terminal of the driving module during the data writing phase. The driving module generates a driving current based on the data voltage, and the light-emitting module emits light in response to the driving current. The first light-emitting control module is connected between the second terminal of the driving module and the first terminal of the light-emitting module. The first light-emitting control module is activated during a light-emitting sub-phase of the light-emitting phase, which includes a light-emitting sub-phase and a reset sub-phase, alternating between the two. The first initialization module transmits a first initialization signal to the first terminal of the light-emitting module during the initialization phase. During the reset sub-phase, the first initialization module does not transmit the first initialization signal to the light-emitting module. The reset module resets the second terminal of the driving module during both the reset and initialization phases. The first initialization module initializes the light-emitting module only during the initialization phase. During the light-emitting phase, the first initialization module does not initialize the light-emitting module again. The initialization of the light-emitting modules corresponding to all row pixel circuits in the display panel is performed during the initialization phase. During initialization, the load of the initialization signal is the same for each row of pixel circuits, ensuring that the initialization degree of each row is the same. This technology can improve upon the uneven initialization caused by the multi-pulse design in existing technologies, which leads to uneven loads for some rows and lower loads for others, resulting in uneven display. Furthermore, the reset module can reset the second terminal of the driver module multiple times, thereby mitigating the fatigue effect of the driver module.

[0035] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a schematic diagram of the circuit structure of an existing pixel circuit;

[0038] Figure 2 for Figure 1 The corresponding timing diagram;

[0039] Figure 3 A schematic diagram of a pixel circuit structure provided in an embodiment of the present invention;

[0040] Figure 4 A timing diagram of a pixel circuit provided in an embodiment of the present invention;

[0041] Figure 5 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0042] Figure 6 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0043] Figure 7 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0044] Figure 8 A timing diagram of a pixel circuit provided in an embodiment of the present invention;

[0045] Figure 9 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0046] Figure 10 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0047] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0048] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0049] As mentioned in the background section, existing display panels are prone to uneven pixel distribution, which affects the display effect. After careful research, the inventors discovered that the cause of this technical problem is:

[0050] Figure 1 This is a schematic diagram of the circuit structure of an existing pixel circuit. Figure 2 for Figure 1 The corresponding timing diagram, such as Figure 1 and Figure 2 As shown, a current pixel circuit includes eight transistors (T1' to T8') and a capacitor C'. It drives the light-emitting unit to emit light through the coordination of power signals (ELVDD', ELVSS'), data signals Vdata', scan signals (SP1', SP2', SN1', SN2'), light-emitting control signal EM', and reset signal Vrefnp'. The driving process includes an initialization phase t1', a data writing phase t2', and a light-emitting phase t3'. SP2' is a multi-pulse design, typically three pulses during the light-emitting phase, which allows for better fatigue recovery of the driving transistors. However, when one of the three pulses scans a blank row, only two pulses are actually driving the pixel circuit within the display panel. This reduces the driving load, causing a difference in the delay of the SP2' signal for that pixel row compared to other rows. This affects the degree of anode initialization of the light-emitting unit, resulting in mura at low brightness and low grayscale.

[0051] To address the aforementioned technical problems, the present invention proposes the following solutions:

[0052] Figure 3 This is a schematic diagram of a pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 1 The pixel circuit includes: a data writing module 101, a driving module 102, a light-emitting module 103, a first light-emitting control module 105, a first initialization module 106, and a reset module 107. The data writing module 101 is used to write a data voltage Vdata to the first terminal of the driving module 102 during the data writing phase. The driving module 102 is used to generate a driving current according to the data voltage Vdata, and the light-emitting module 103 emits light in response to the driving current. The first light-emitting control module 105 is connected between the second terminal of the driving module 102 and the first terminal of the light-emitting module 103. The first light-emitting control module 105 is used to turn on the light-emitting sub-phase during the light-emitting phase, which includes a light-emitting sub-phase and a reset sub-phase, and the light-emitting sub-phase and the reset sub-phase are performed alternately. The first initialization module 106 is used to transmit a first initialization signal to the first terminal of the light-emitting module 103 during the initialization phase. During the reset sub-phase, the first initialization module 106 does not transmit the first initialization signal to the light-emitting module. The reset module 107 is used to reset the second terminal of the driving module 102 during the reset sub-phase and the initialization phase.

[0053] Specifically, the light-emitting unit 103 can be an OLED (Organic Light Emitting Diode), Micro LED, or μLED, etc. The light-emitting unit 103 is a current-driven device, emitting light of varying brightness depending on the magnitude of the driving current. It may specifically include an anode layer, a hole injection layer, a hole transport layer, an electron blocking layer, a light-emitting layer, a hole blocking layer, an electron transport layer, an electron injection layer, and a cathode layer. Its specific light-emitting principle is well-known to those skilled in the art and will not be elaborated upon here. The driving process of the pixel circuit includes an initialization stage, a data writing stage, and a light-emitting stage.

[0054] During the initialization phase, the first initialization module 106 initializes the first end of the light-emitting module 103 to prevent residual signals from the previous frame from affecting the light emission in the current frame. Within one frame, the first initialization module 106 can initialize the light-emitting module 103 during the initialization phase, but during the reset phase, regardless of whether it is turned on or off, it will not transmit the first initialization signal to the light-emitting module, thus avoiding the use of the first initialization signal to initialize the light-emitting module 103.

[0055] During the data writing phase, the data writing module 101 is turned on, and the data voltage Vdata is written to the driver module 102.

[0056] In the light-emitting stage, this embodiment includes alternating light-emitting sub-stages and reset sub-stages. During the light-emitting sub-stage, the first light-emitting control module 105 is turned on, and the driving current generated by the driving module 102 controls the light-emitting module 103 to emit light. During the reset sub-stage, the first light-emitting control module 105 is turned off, and the light-emitting module 103 does not emit light. However, due to the persistence of vision, the light-emitting module 103 still appears to be emitting light to the human eye. During the reset sub-stage, the reset module 107 is turned on to reset the driving module 102, allowing for fatigue recovery. In this embodiment, the number of repetitions of the reset sub-stage is not specifically limited, but it is at least twice, preferably three times; that is, the pulse controlling the reset module 107 to turn on is set to three times during the light-emitting stage. By resetting the first end of the driving module 102 multiple times during the light-emitting stage, fatigue of the driving module 102 can be effectively alleviated, and problems such as ghosting can be improved. Furthermore, during the light-emitting phase, the first initialization module 106 no longer initializes the light-emitting module 103. The initialization of the light-emitting modules corresponding to all row pixel circuits in the display panel is performed during the initialization phase. During initialization, the load of the initialization signal is the same for all row pixel circuits, ensuring uniform initialization across rows. This improves upon the uneven initialization caused by multi-pulse design in existing technologies, which results in some rows having high loads and others low loads, leading to uneven display.

[0057] The technical solution of this embodiment employs a pixel circuit comprising: a data writing module, a driving module, a light-emitting module, a first light-emitting control module, a first initialization module, and a reset module. The data writing module writes a data voltage to the first terminal of the driving module during the data writing phase. The driving module generates a driving current based on the data voltage, and the light-emitting module emits light in response to the driving current. The first light-emitting control module is connected between the second terminal of the driving module and the first terminal of the light-emitting module. The first light-emitting control module is used to conduct during the light-emitting sub-phase of the light-emitting phase, which includes a light-emitting sub-phase and a reset sub-phase, alternating between the two. The first initialization module transmits a first initialization signal to the first terminal of the light-emitting module during the initialization phase. During the reset sub-phase, the first initialization module does not transmit the first initialization signal to the light-emitting module. The reset module resets the second terminal of the driving module during both the reset and initialization phases. The first initialization module initializes the light-emitting module only during the initialization phase. During the light-emitting phase, the first initialization module does not initialize the light-emitting module again. The initialization of the light-emitting modules corresponding to all row pixel circuits in the display panel is performed during the initialization phase. During initialization, the load of the initialization signal is the same for each row pixel circuit, ensuring that the initialization degree of each row is the same. This technology can improve upon the uneven initialization caused by the multi-pulse design in existing technologies, which leads to uneven loads for some rows and lower loads for others, resulting in uneven display. Furthermore, the reset module can reset the second terminal of the driver module multiple times, thereby mitigating the fatigue effect of the driver module.

[0058] As an optional implementation method, such as Figure 3 As shown, the first terminal of the first initialization module 106 is connected to the first initialization signal Vrefn1, the second terminal of the first initialization module 106 is electrically connected to the first terminal of the light-emitting module 103, and the control terminal of the first initialization module 106 is connected to the first scan signal SP1; wherein, the first scan signal SP1 controls the first initialization module 106 to be turned on during the initialization phase and controls the first initialization module 106 to be turned off during the reset phase; the first terminal of the reset module 107 is connected to the reset signal Vrefnp, the second terminal of the reset module 107 is electrically connected to the second terminal of the drive module 102, and the control terminal of the reset module 107 is connected to the second scan signal SP2; wherein, the second scan signal SP2 controls the reset module to be turned on during the initialization phase and the reset phase, and controls the reset module to be turned off during the light-emitting phase.

[0059] Specifically, in this embodiment, the reset module 107 and the first initialization module 106 respond to different scan signals, that is, the reset module 107 and the first initialization module 106 are controlled independently. Figure 4 As shown, Figure 4 This is a timing diagram of a pixel circuit provided in an embodiment of the present invention. Figure 4and Figure 3 Correspondingly. Additionally, it should be noted that this embodiment uses the example where the first initialization module 106, reset module 107, first light-emitting control module 105, data writing module 106, and driving module 102 are all low-level conducting, while the threshold compensation module 104 is high-level conducting.

[0060] During the initialization phase t1, the first scan signal SP1 controls the first initialization module 106 to be turned on, and the first initialization signal Vrefn1 initializes the first end of the light-emitting module 103.

[0061] During the data writing phase t2, the sixth scan signal SP6 controls the data writing module 101 to turn on. The data writing module writes the data voltage Vdata through the drive module 102 and the threshold compensation module 104 to the control terminal of the drive module 102. When the potential difference between the control terminal and the first terminal of the drive module 102 is equal to the threshold voltage of the drive module 102, the drive module 102 turns off, thus completing the threshold compensation.

[0062] In the light-emitting sub-stage t31 of the light-emitting stage t3, the light-emitting control signal EM controls the first light-emitting control module 105 to turn on, and the driving current generated by the driving module 102 controls the light-emitting module 103 to emit light. In the reset sub-stage t32, the first light-emitting control module 105 is turned off, and the light-emitting module 103 does not emit light at this time. However, according to the persistence of vision effect of the human eye, the light-emitting module 103 still appears to be emitting light at this time. In the reset sub-stage t32, the second scan signal SP2 controls the reset module 107 to turn on, resetting the driving module 102 and performing fatigue recovery on the driving module 102.

[0063] In this embodiment, the first initialization module 106 and the reset module 107 are driven independently and will not interfere with each other, resulting in higher stability of the pixel circuit.

[0064] Further reference Figure 3 and Figure 4The pixel circuit also includes a second storage module 108 and a second light-emitting control module 109; the first terminal of the data writing module 101 is connected to a data voltage Vdata, the second terminal of the data writing module 101 is electrically connected to the first terminal of the driving module 102, and the control terminal of the data writing module 101 is connected to a sixth scan signal SP6; the first terminal of the second light-emitting control module 109 is connected to a first power supply voltage ELVDD, the second terminal of the second light-emitting control module 109 is electrically connected to the first terminal of the driving module 102, and the control terminal of the second light-emitting control module 109 is connected to a light-emitting control signal EM; the first terminal of the second storage module 108 is connected to the second light-emitting control module 109. The first terminal of the control module 109 is electrically connected, and the second terminal of the second storage module 108 is electrically connected to the control terminal of the drive module 102. The first terminal of the threshold compensation module 104 is electrically connected to the second terminal of the drive module 102, and the second terminal of the threshold compensation module 104 is electrically connected to the control terminal of the drive module 102. The control terminal of the threshold compensation module 104 is connected to the seventh scan signal SN2. The first terminal of the first light emission control module 105 is electrically connected to the second terminal of the drive module 102, and the second terminal of the first light emission control module 105 is electrically connected to the first terminal of the light emission module 103. The control terminal of the first light emission control module 105 is connected to the light emission control signal EM. The second terminal of the light emission module 103 is connected to the second power supply voltage ELVSS. Preferably, the pixel circuit further includes a second initialization module 110, which is used to initialize the control terminal of the drive module 102. The first terminal of the light emission module 103 can be an anode, and the second terminal can be a cathode.

[0065] like Figure 3 As shown, at least one of the second initialization module 110 and the threshold compensation module 104 is an oxide thin-film transistor (OST) to reduce leakage current; preferably, both are OSTs, such as indium gallium zinc oxide (IZN) OSTs. The second initialization module 110 and the threshold compensation module 104 can be turned on in response to a high-level signal. The first terminal of the second initialization module 110 is connected to the second initialization signal Vrefn2, the second terminal of the second initialization module 110 is electrically connected to the first terminal of the threshold compensation module 104, and the control terminal of the second initialization module 110 is connected to the eighth scan signal SN1.

[0066] During the initialization phase t1, both the seventh scan signal SN2 and the eighth scan signal SN1 are at a high level. At this time, both the second initialization module 110 and the threshold compensation module 104 are turned on, thereby initializing the control terminal of the drive module 102, so that the drive module 102 can be turned on during the data writing phase.

[0067] During the data writing phase, the seventh scan signal SN2 is at a high level, and the threshold compensation module 104 is turned on, so that the data voltage Vdata can be written to the control terminal of the drive module 102.

[0068] During the light-emitting stage, the light-emitting control signal EM is at a low level, which turns on the first light-emitting control module 105 and the second light-emitting control module 109. The driving current generated by the driving module 102 drives the light-emitting module 103 to emit light.

[0069] In the above embodiments, the first initialization signal Vrefn1 can be a negative voltage, and the reset signal Vrefnp can be a positive voltage. The voltage of the first power supply voltage ELVDD is higher than the voltage of the second power supply voltage ELVSS.

[0070] For example, Figure 5 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention, with reference to... Figure 5 The data writing module 101 includes a first transistor T1, the first electrode of the first transistor T1 serves as the first terminal of the data writing module 101, the second electrode of the first transistor T1 serves as the second terminal of the data writing module 101, and the control electrode of the first transistor T1 serves as the control electrode of the data writing module 101.

[0071] The driving module 102 includes a second transistor T2, the first terminal of the second transistor T2 serves as the first terminal of the driving module 102, the second terminal of the second transistor T2 serves as the second terminal of the driving module 102, and the control terminal of the second transistor T2 serves as the control terminal of the driving module 102.

[0072] The threshold compensation module 104 includes a third transistor T3. The first terminal of the third transistor T3 serves as the first terminal of the threshold compensation module 104, the second terminal of the third transistor T3 serves as the second terminal of the threshold compensation module 104, and the control terminal of the third transistor T3 serves as the control terminal of the threshold compensation module 104.

[0073] The first light-emitting control module 105 includes a fourth transistor T4. The first electrode of the fourth transistor T4 serves as the first terminal of the first light-emitting control module 105, the second electrode of the fourth transistor T4 serves as the second terminal of the first light-emitting control module 105, and the control electrode of the fourth transistor T4 serves as the control terminal of the first light-emitting control module 105.

[0074] The first initialization module 106 includes a fifth transistor T5. The first terminal of the fifth transistor T5 serves as the first terminal of the first initialization module 106, the second terminal of the fifth transistor T5 serves as the second terminal of the first initialization module 106, and the control terminal of the fifth transistor T5 serves as the control terminal of the first initialization module 106.

[0075] The reset module 107 includes a sixth transistor T6. The first terminal of the sixth transistor T6 serves as the first terminal of the reset module 107, the second terminal of the sixth transistor T6 serves as the second terminal of the reset module 107, and the control terminal of the sixth transistor T6 serves as the control terminal of the reset module 107.

[0076] The storage module 108 includes a second capacitor C2, with the first end of the second capacitor C2 serving as the first end of the storage module 108 and the second end of the second capacitor C2 serving as the second end of the storage module 108.

[0077] The second initialization module 110 includes an eighth transistor T8. The first terminal of the eighth transistor T8 serves as the first terminal of the first initialization module 110, the second terminal of the eighth transistor T8 serves as the second terminal of the first initialization module 110, and the control terminal of the eighth transistor T8 serves as the control terminal of the first initialization module 110.

[0078] In the above embodiments, the third transistor T3 and the eighth transistor T8 can be oxide thin-film transistors. The remaining transistors can be low-temperature polycrystalline silicon transistors, preferably P-type low-temperature polycrystalline silicon transistors.

[0079] In some alternative implementations, the first initialization module and the reset module may also be turned on in response to the same scan signal.

[0080] like Figure 6 As shown, Figure 6 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention, with reference to... Figure 6 The pixel circuit also includes a charging / discharging module 112 and a first storage module 111; the first terminal of the first initialization module 106 is electrically connected to the first terminal of the first storage module 111, the second terminal of the first initialization module 106 is electrically connected to the first terminal of the light-emitting module 103, and the control terminal of the first initialization module 106 is connected to a third scan signal SP3; wherein, the third scan signal controls the first initialization module 106 to be turned on during the initialization phase and the reset phase, and controls the first initialization module 106 to be turned off during the light-emitting phase; the charging / discharging module 112 is used to write the first initialization signal to the second terminal of the first storage module during the charging phase before the initialization phase, and to discharge the second terminal of the storage module 111 during the discharging phase before the light-emitting phase; the first terminal of the reset module 107 is connected to a reset signal Vrefnp, the second terminal of the reset module 107 is electrically connected to the second terminal of the driving module 102, and the control terminal of the reset module 107 is connected to the third scan signal SP3; wherein, the third scan signal SP3 controls the reset module to be turned on during the initialization phase and the reset phase, and controls the reset module to be turned off during the light-emitting phase.

[0081] Specifically, the driving process of the pixel circuit in this embodiment includes a charging stage, an initialization stage, a data writing stage, a discharging stage, and a light emission stage performed sequentially.

[0082] During the charging phase, the charging and discharging module 112 writes the first initialization signal to the second terminal of the first storage module 111. At this time, the potential of the second terminal of the first storage module 111 is Vrefn1, and the voltage difference between the two terminals of the first storage module 111 in the previous frame is 0. Therefore, according to the principle that the voltage across the capacitor cannot change abruptly, the voltage of the first terminal of the first storage module 111 after this phase is Vrefn1.

[0083] During the initialization phase, the third scan signal SP3 controls the first initialization module 106 and the reset module 107 to be turned on. The first initialization signal stored on the first terminal of the first storage module 111 is written to the first terminal of the light-emitting module 103, thereby initializing the light-emitting module 103. Simultaneously, the reset signal Vrefnp is written to the second terminal of the driving module 102, initializing the second terminal of the driving module 102.

[0084] During the data writing phase, the data writing module 101 is turned on, and the data voltage Vdata is written to the control terminal of the driving module 102 after passing through the driving module 102 and the threshold compensation module 104. When the potential difference between the control terminal and the first terminal of the driving module 102 is equal to the threshold voltage of the driving module 102, the driving module 102 is turned off, thereby completing the threshold compensation.

[0085] During the discharge phase, the charge-discharge module 112 discharges the signal stored in the first storage module 111, discharging the potential of the second terminal of the first storage module 111 to 0. According to the principle that the voltage across a capacitor cannot change abruptly, the potential of the first terminal of the first storage module 111 is also 0 at this time.

[0086] In the light-emitting stage, this embodiment includes alternating light-emitting sub-stages and reset sub-stages. During the light-emitting sub-stage, the first light-emitting control module 105 is turned on, and the driving current generated by the driving module 102 controls the light-emitting module 103 to emit light. During the reset sub-stage, the first light-emitting control module 105 is turned off, and the light-emitting module 103 does not emit light. However, due to the persistence of vision, the light-emitting module 103 still appears to be emitting light to the human eye. During the reset sub-stage, the reset module 107 is turned on to reset the driving module 102 and perform fatigue recovery. Additionally, although the first initialization module 106 is also turned on during the light-emitting stage, it cannot initialize the light-emitting module 103 because the first storage module 111 has been discharged. Therefore, the initialization of the light-emitting modules corresponding to all row pixel circuits in the display panel is performed during the initialization stage. During initialization, the load of the initialization signal is the same for each row pixel circuit, ensuring that the initialization degree of each row is the same. This can improve the uneven display problem caused by the uneven initialization due to the multi-pulse design in the existing technology, where some rows have high loads and others have low loads. In addition, during the reset sub-stage, the first terminal of the first storage module 111 writes a 0 potential to the first terminal of the light-emitting module 103. Compared with the problem of uneven display caused by writing the first initialization signal in the traditional way, by writing a 0 potential, the first terminal of the light-emitting module 103 has a higher potential before it lights up. This can shorten the time required for the light-emitting module 103 to light up in the subsequent light-emitting sub-stage. Under the same frame time, the light-emitting time of the light-emitting stage is also longer, resulting in a brighter visual brightness and helping to improve the display unevenness problem.

[0087] Optionally, Figure 7 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention. Figure 8 This is a timing diagram of a pixel circuit provided in an embodiment of the present invention. Figure 8 and Figure 7 Corresponding, combined Figure 7 and Figure 8 .

[0088] The charging and discharging module 112 includes a charging unit 1121 and a discharging unit 1122. The first terminal of the charging unit 1121 is connected to a first initialization signal Vrefn1, and the second terminal of the charging unit 1121 is electrically connected to the second terminal of the first storage module 111. The control terminal of the charging unit 1121 is connected to a fourth scan signal SP4. The fourth scan signal SP4 controls the charging unit 1121 to be turned on during the charging phase t0.

[0089] The first end of the discharge unit 1122 is grounded, the second end of the discharge unit 1122 is electrically connected to the second end of the first storage module 111, and the control end of the discharge unit 1122 is connected to the fifth scan signal SP5; wherein, the fifth scan signal SP5 controls the discharge unit 1122 to be turned on during the discharge phase.

[0090] Specifically, the pixel circuit also includes a second storage module 108 and a second light-emitting control module 109; the first terminal of the data writing module 101 is connected to a data voltage Vdata, the second terminal of the data writing module 101 is electrically connected to the first terminal of the driving module 102, and the control terminal of the data writing module 101 is connected to a sixth scan signal SP6; the first terminal of the second light-emitting control module 109 is connected to a first power supply voltage ELVDD, the second terminal of the second light-emitting control module 109 is electrically connected to the first terminal of the driving module 102, and the control terminal of the second light-emitting control module 109 is connected to a light-emitting control signal EM; the first terminal of the second storage module 108 is connected to the second light-emitting control module 109; the first terminal of the second storage module 108 is connected to the second light-emitting control module 109; the second terminal of the second light-emitting control module 109 is connected to a first power supply voltage ELVDD, the second terminal of the second light-emitting control module 109 is electrically connected to the first terminal of the driving module 102, and the control terminal of the second light-emitting control module 109 is connected to a light-emitting control signal EM; the first terminal of the second storage module 108 is connected to the second light-emitting control module 109; the second ... The first terminal of the light control module 109 is electrically connected, and the second terminal of the second storage module 108 is electrically connected to the control terminal of the driving module 102. The first terminal of the threshold compensation module 104 is electrically connected to the second terminal of the driving module 102, and the second terminal of the threshold compensation module 104 is electrically connected to the control terminal of the driving module 102. The control terminal of the threshold compensation module 104 is connected to the seventh scan signal SN2. The first terminal of the first light emission control module 105 is electrically connected to the second terminal of the driving module 102, and the second terminal of the first light emission control module 105 is electrically connected to the first terminal of the light emission module 103. The control terminal of the first light emission control module 105 is connected to the light emission control signal EM. The second terminal of the light emission module 103 is connected to the second power supply voltage ELVSS. Preferably, the pixel circuit further includes a second initialization module 110, which is used to initialize the control terminal of the driving module 102.

[0091] like Figure 7 As shown, at least one of the second initialization module 110 and the threshold compensation module 104 is an oxide thin-film transistor (OST) to reduce leakage current; preferably, both are OSTs, such as indium gallium zinc oxide (IZN) OSTs. The second initialization module 110 and the threshold compensation module 104 can be turned on in response to a high-level signal. The first terminal of the second initialization module 110 is connected to the second initialization signal Vrefn2, the second terminal of the second initialization module 110 is electrically connected to the first terminal of the threshold compensation module 104, and the control terminal of the second initialization module 110 is connected to the eighth scan signal SN1.

[0092] During the charging phase t0, the fourth scan signal SP4 is at a low level, controlling the charging unit 1121 to be turned on, so that the first initialization signal Vrefn1 is written to the second terminal of the first storage module 111.

[0093] During the initialization phase t1, both the seventh scan signal SN2 and the eighth scan signal SN1 are at a high level. At this time, both the second initialization module 110 and the threshold compensation module 104 are turned on, thereby initializing the control terminal of the drive module 102, so that the drive module 102 can be turned on during the data writing phase.

[0094] During the data writing phase t2, the seventh scan signal SN2 is at a high level, and the threshold compensation module 104 is turned on, so that the data voltage Vdata can be written to the control terminal of the drive module 102.

[0095] During the discharge phase t5, the fifth scan signal SP5 controls the discharge unit 1122 to be turned on, so that the second terminal of the first storage module 111 is grounded, and the first storage module 111 is discharged.

[0096] During the light-emitting sub-stage t31 of the light-emitting stage t3, the light-emitting control signal EM is at a low level, which turns on the first light-emitting control module 105 and the second light-emitting control module 109. The driving current generated by the driving module 102 drives the light-emitting module 103 to emit light.

[0097] During the reset sub-stage t32 of the light-emitting stage t3, the third scan signal SP3 is low, and the reset module 107 is turned on to reset the drive module 102. Additionally, during the reset sub-stage t32, although the first initialization module 106 is also turned on, it cannot initialize the light-emitting module 103 using the first initialization signal Vrefn1 because the first storage module 111 has been discharged.

[0098] For example, such as Figure 7 As shown, the charging unit 1121 includes a ninth transistor T9. The first terminal of the ninth transistor T9 serves as the first terminal of the charging unit 1121, the second terminal of the ninth transistor T9 serves as the second terminal of the charging unit 1121, and the control terminal of the ninth transistor T9 serves as the control terminal of the charging unit 1121. The discharging unit 1122 includes a tenth transistor T10. The first terminal of the tenth transistor T10 serves as the first terminal of the discharging unit 1122, the second terminal of the tenth transistor T10 serves as the second terminal of the discharging unit 1122, and the control terminal of the tenth transistor T10 serves as the control terminal of the discharging unit 1122. The first storage module 111 includes a first capacitor C1. The first terminal of the first capacitor C1 serves as the first terminal of the first storage module 111, and the second terminal of the first capacitor C1 serves as the second terminal of the first storage module 111.

[0099] This invention also provides a display panel, such as... Figure 9 As shown, Figure 9This is a schematic diagram of a display panel provided in an embodiment of the present invention. The display panel includes a plurality of pixel circuits PX provided in any embodiment of the present invention, and the pixel circuits PX are arranged in an array. Because it includes the pixel circuits provided in any embodiment of the present invention, it also has the same beneficial effects, which will not be described again here.

[0100] refer to Figure 9 The display panel may include crisscrossing scan lines and data lines (DL1-DLn). The scan lines are used to provide corresponding first scan signal, second scan signal, third scan signal or fourth scan signal. The scan lines are electrically connected to the scan driving circuit 30, and the data lines are electrically connected to the data driving circuit 20. The display panel may also include a light emission control signal generating circuit 40 and corresponding light emission control signal lines (EM1-EMk). The light emission control signal generating circuit 40 generates the second light emission control signal in this embodiment of the invention.

[0101] Optionally, the pixel circuit further includes a charging / discharging module and a first storage module; a first terminal of the first initialization module is electrically connected to a first terminal of the first storage module, a second terminal of the first initialization module is electrically connected to a first terminal of the light-emitting module, and a third scan signal is connected to the second terminal of the first initialization module; wherein, the third scan signal controls the first initialization module to be turned on during the initialization phase and the reset phase, and controls the first initialization module to be turned off during the light-emitting phase; the charging / discharging module is used to write the first initialization signal to the second terminal of the first storage module during the charging phase before the initialization phase, and to discharge the second terminal of the storage module during the discharging phase before the light-emitting phase; a reset signal is connected to the first terminal of the reset module, a second terminal of the reset module is electrically connected to the second terminal of the drive module, and a third scan signal is connected to the control terminal of the reset module; wherein, the third scan signal controls the reset module to be turned on during the initialization phase and the reset phase, and controls the reset module to be turned off during the light-emitting phase; the display panel includes a display area and a border area that at least partially surrounds the display area, and the pixel circuit is disposed in the display area; the display panel further includes a grounding wire extending from the border area to the display area, and the charging / discharging module is connected to the grounding wire.

[0102] Specifically, the charging and discharging module includes the charging unit and discharging unit described in the above embodiments. To better discharge the first storage module, the first end of the discharging unit in the pixel circuit can be connected to a grounding line. This grounding line is grounded within the frame, specifically through a via connected to the grounding component corresponding to the touch module; alternatively, an additional grounding structure can be provided. Each row of pixel circuits can correspond to one grounding line, and the discharging units corresponding to the pixel circuits in the same row are all connected to the same grounding line.

[0103] This invention also provides a display device, such as... Figure 10 As shown, Figure 10This is a schematic diagram of a display device provided in an embodiment of the present invention. The display device includes the display panel provided in the embodiment of the present invention, and therefore has the same beneficial effects, which will not be described again here. The display device can be a mobile phone, tablet computer, MP3 player, MP4 player, personal digital assistant, smartwatch, smart helmet, or other wearable device, etc.

[0104] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0105] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A pixel circuit, characterized in that, The pixel circuit includes: The system comprises a data writing module, a driving module, a light-emitting module, a first light-emitting control module, a first initialization module, and a reset module; the data writing module is used to transmit data voltage to the driving module; the driving module is used to generate a driving current based on the data voltage, and the light-emitting module emits light in response to the driving current; The first light-emitting control module is connected between the second end of the driving module and the first end of the light-emitting module; the first light-emitting control module is used to turn on the light-emitting sub-stage of the light-emitting stage, the light-emitting stage includes the light-emitting sub-stage and the reset sub-stage, and the light-emitting sub-stage and the reset sub-stage are performed alternately; The first initialization module is used to transmit a first initialization signal to the first end of the light-emitting module during the initialization phase; during the reset phase, the first initialization module does not transmit the first initialization signal to the light-emitting module. The reset module is used to reset the second terminal of the drive module during the reset sub-stage and the initialization stage; The pixel circuit further includes a first storage module; a first terminal of the first initialization module is electrically connected to a first terminal of the first storage module, a second terminal of the first initialization module is electrically connected to a first terminal of the light-emitting module, and a control terminal of the first initialization module is connected to a third scanning signal; wherein, the third scanning signal controls the first initialization module to be turned on during the initialization phase and the reset sub-phase, and controls the first initialization module to be turned off during the light-emitting sub-phase. The pixel circuit also includes a charging and discharging module, which is used to transmit a first initialization signal to the second end of the first storage module during the charging phase and to discharge the second end of the first storage module during the discharging phase.

2. The pixel circuit according to claim 1, characterized in that, The first terminal of the first initialization module is connected to a first initialization signal, the second terminal of the first initialization module is electrically connected to the first terminal of the light-emitting module, and the control terminal of the first initialization module is connected to a first scanning signal; wherein, the first scanning signal controls the first initialization module to be turned on during the initialization phase and controls the first initialization module to be turned off during the reset phase. The first terminal of the reset module is connected to a reset signal, the second terminal of the reset module is electrically connected to the second terminal of the drive module, and the control terminal of the reset module is connected to a second scan signal; wherein, the second scan signal controls the reset module to be turned on during the initialization phase and the reset sub-phase, and controls the reset module to be turned off during the light emission sub-phase.

3. The pixel circuit according to claim 1, characterized in that, The first terminal of the reset module is connected to a reset signal, the second terminal of the reset module is electrically connected to the second terminal of the drive module, and the control terminal of the reset module is connected to the third scan signal; wherein, the third scan signal controls the reset module to be turned on during the initialization phase and the reset sub-phase, and controls the reset module to be turned off during the light emission sub-phase.

4. The pixel circuit according to claim 3, characterized in that, The charging phase precedes the initialization phase, and the discharging phase precedes the light-emitting phase.

5. The pixel circuit according to claim 1, characterized in that, The charging / discharging module includes: The charging unit and the discharging unit are provided. The first end of the charging unit is connected to the first initialization signal, the second end of the charging unit is electrically connected to the second end of the first storage module, and the control end of the charging unit is connected to the fourth scan signal. The fourth scan signal controls the charging unit to be turned on during the charging phase, and transmits the first initialization signal to the second end of the first storage module. The first end of the discharge unit is grounded, the second end of the discharge unit is electrically connected to the second end of the first storage module, and the control end of the discharge unit is connected to a fifth scan signal; wherein, the fifth scan signal controls the discharge unit to conduct during the discharge phase, thereby grounding the second end of the first storage module.

6. The pixel circuit according to claim 1, characterized in that, The pixel circuit also includes a threshold compensation module, a second storage module, and a second light emission control module; The first end of the data writing module is connected to the data voltage, the second end of the data writing module is electrically connected to the first end of the driving module, and the control end of the data writing module is connected to the sixth scan signal. The first terminal of the second light-emitting control module is connected to the first power supply voltage, the second terminal of the second light-emitting control module is electrically connected to the first terminal of the driving module, and the control terminal of the second light-emitting module is connected to the light-emitting control signal. The first terminal of the second storage module is connected to the first power supply voltage, and the second terminal of the second storage module is electrically connected to the control terminal of the drive module. The first end of the threshold compensation module is electrically connected to the second end of the drive module, the second end of the threshold compensation module is electrically connected to the control end of the drive module, and the control end of the threshold compensation module is connected to the seventh scan signal; The first terminal of the first light-emitting control module is electrically connected to the second terminal of the driving module, the second terminal of the first light-emitting control module is electrically connected to the first terminal of the light-emitting module, and the control terminal of the first light-emitting module is connected to the light-emitting control signal. The second terminal of the light-emitting module is connected to a second power supply voltage.

7. The pixel circuit according to claim 6, characterized in that, The pixel circuit further includes a second initialization module, which is used to initialize the control terminal of the driving module.

8. The pixel circuit according to claim 7, characterized in that, At least one of the second initialization module and the threshold compensation module is an oxide thin-film transistor.

9. A display panel, characterized in that, The display panel includes multiple rows of pixel circuits as described in any one of claims 1-8.

10. The display panel according to claim 9, characterized in that, The pixel circuit further includes a charging / discharging module and a first storage module; a first terminal of the first initialization module is electrically connected to a first terminal of the first storage module, a second terminal of the first initialization module is electrically connected to a first terminal of the light-emitting module, and a control terminal of the first initialization module is connected to a third scanning signal; wherein, the third scanning signal controls the first initialization module to be turned on during the initialization phase and the reset phase, and controls the first initialization module to be turned off during the light-emitting phase; the charging / discharging module is used to transmit the first initialization signal to the second terminal of the first storage module during the charging phase before the initialization phase, and to discharge the second terminal of the storage module during the discharging phase before the light-emitting phase; a first terminal of the reset module is connected to a reset signal, a second terminal of the reset module is electrically connected to a second terminal of the driving module, and a control terminal of the reset module is connected to the third scanning signal; wherein, the third scanning signal controls the reset module to be turned on during the initialization phase and the reset phase, and controls the reset module to be turned off during the light-emitting phase; The display panel includes a display area and a border area that at least partially surrounds the display area, and the pixel circuit is disposed in the display area; The display panel also includes a grounding wire extending from the frame area to the display area, and the charging / discharging module is connected to the grounding wire.

11. A display device, characterized in that, The display device includes the display panel as described in claim 9 or 10.

Citation Information

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