Method for adding failover communication between PCIE virtual crossbars

Abstract

The application discloses a method for adding fault transfer communication between PCIE virtual cross switches, and belongs to the chip circuit field. A PCIE bridge with a virtual channel function is provided, and a controller sets a basic mode or a virtual channel mode; when the working mode is selected as the virtual channel mode, the controller opens at least one virtual channel; when the working mode is selected as the virtual channel mode, one of the ports is set as a management port, the management port has the communication function of an ordinary port, and functions as an upstream port or a downstream port in any mode. On the basis of the basic virtual channel mode structure, a management port is added, and a method for uniformly managing and reporting exceptions, errors and faults on all non-management ports is added; meanwhile, the exceptions, errors and faults of the management port can also be reported through each non-management port, so that the resource utilization rate is improved, the power consumption is reduced, and the normal operation of the basic function is ensured.

Description

Technical Field

[0001] This invention relates to the field of chip circuit technology, and in particular to a method for adding fault transfer communication between PCIe virtual cross switches. Background Technology

[0002] With the development of the integrated circuit industry, integrated circuits are constantly evolving towards being lighter, thinner, and smaller, with increasingly complex structures and a corresponding increase in the required integration level. Not only are performance upgrades continuously being made, but functional innovations are also constantly emerging, with chips becoming increasingly specialized in their functions. Communication between different chips relies heavily on bridge chips, among which PCIe bridge chips (hereinafter referred to as "bridge chips") are a widely used type. The global market size for bridge chips is projected to reach US$706.64 million by 2025. In recent years, chip design manufacturers have continuously innovated bridge chip structures to improve their performance.

[0003] VirtualSwitchMode is an important structure for improving bridge chip performance. Its original intention was to add one or more independent virtual channels on top of BaseMode, thereby enhancing the communication capabilities and efficiency of the bridge chip. However, in practical applications, both BaseMode and VirtualSwitchMode inevitably encounter some anomalies, errors, and faults that require reporting. If each channel reports independently, a separate reporting channel needs to be designed and equipped with dedicated registers. However, since anomalies, errors, and faults are low-probability events, this individual channel will be idle during normal operation, resulting in significant resource waste. Summary of the Invention

[0004] The purpose of this invention is to provide a method for adding failover communication between PCIe virtual cross switches to solve the problems in the background art.

[0005] To address the aforementioned technical problems, this invention provides a method for adding failover communication between PCIe virtual cross switches, comprising:

[0006] Provides a PCIe bridge chip with virtual channel functionality, the controller can be set to basic mode or virtual channel mode, and can control the number of channels in virtual channel mode;

[0007] When the working mode is selected as virtual channel mode, the controller opens at least one virtual channel. If multiple virtual channels are opened, the normal data communication between the ports of each virtual channel is physically isolated and will not affect each other.

[0008] When the working mode is selected as virtual channel mode, one of the ports is set as the management port. The management port has the communication function of a normal port and can act as an upstream or downstream port in any mode.

[0009] In one implementation, the management port also has an additional failover communication channel for additional communication with all other non-management ports for reporting anomalies, errors, and faults on all channels.

[0010] In one implementation, the failover communication channel does not overlap with or interfere with the normal communication of the data path within each virtual channel; furthermore, the failover communication channel is configured for bidirectional transmission, so that anomalies, errors, and faults of the management port are transferred to any non-management port through the failover communication channel, and anomalies, errors, and faults of any non-management port can also be transferred to the management port through the failover communication channel.

[0011] In one implementation, the failover communication channel includes two functions: an interrupt function and a note function. The interrupt function is an actively initiated function, in which the management port or non-management port actively sends an interrupt information, which is received by the corresponding non-management port and the management port, and then reported for processing. The note function is a passive monitoring function, which monitors the virtual channel while it is working normally, making it easier to detect anomalies, errors and faults in the operation.

[0012] In one implementation, each port is equipped with six registers to realize the function of a failover channel, namely: a note register for the direction from the management port to the non-management port, an interrupt generation and clearing register for the direction from the management port to the non-management port, an interrupt mask register for the direction from the management port to the non-management port, and a note register, an interrupt generation and clearing register, and an interrupt mask register for the direction from the non-management port to the management port.

[0013] In one implementation, a note register with one or more bits manages a virtual channel and provides note functionality; an interrupt generation and clear register with one or more bits manages a virtual channel and provides interrupt generation and clearing functionality; and an interrupt mask register with one or more bits manages a virtual channel and provides interrupt masking functionality.

[0014] This invention provides a method for adding failover communication between PCIe virtual cross switches. Based on the basic VirtualSwitchMode structure, a management port is added to uniformly manage and report anomalies, errors, and faults on all non-managed ports. At the same time, anomalies, errors, and faults on the management port can also be reported through each non-managed port, which can greatly improve resource utilization, reduce power consumption, and at the same time ensure the normal operation of basic functions. Attached Figure Description

[0015] Figure 1 This invention provides the overall structure for adding fault transfer communication to the virtual cross switch.

[0016] Figure 2 This invention explains the interrupt generation and clearing mechanism for communication between non-management ports and management ports.

[0017] Figure 3 This invention explains the interrupt generation and clearing mechanism for communication between the management port and the non-management port.

[0018] Figure 4 This invention describes the interrupt shielding mechanism for communication from non-management ports to management ports.

[0019] Figure 5 This invention explains the interrupt shielding mechanism for communication between the management port and the non-management port.

[0020] Figure 6 This explains the working principle of the note register in this invention. Detailed Implementation

[0021] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a method for adding failover communication between PCIe virtual cross switches according to the present invention. The advantages and features of the present invention will become clearer from the following description. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0022] like Figure 1 As shown, the present invention provides a PCIe bridge chip with virtual channel function. The controller in the PCIe bridge chip can be set to basic mode or virtual channel mode, and can control the number of channels in virtual channel mode.

[0023] Select a port and set it as the management port; in this invention, the first port is used as an example. This management port is first and foremost a regular port with the communication functions of a regular port, and can act as an upstream or downstream port in any mode.

[0024] In addition to general communication functions, the management port also has an additional failover communication channel, which allows for supplementary communication with all other non-management ports. This failover communication channel does not overlap with or interfere with the normal communication of the data paths within each virtual channel, and is used for reporting anomalies, errors, and faults from all channels. Furthermore, this failover communication channel is configured for bidirectional transmission, meaning that anomalies, errors, and faults from the management port can be transferred to any non-management port through this failover communication channel, and anomalies, errors, and faults from any non-management port can also be transferred to the management port through this failover communication channel.

[0025] The failover channel has two sub-functions: interrupt function and note function.

[0026] The interrupt function is primarily controlled actively. Interrupt control can be implemented on each non-managed port by configuring the management port, and vice versa. Relatedly, four registers are configured on each port: an interrupt generation and clearing register (m2nm_intr_req_clr) and an interrupt mask register (m2nm_intr_mask) for the direction from the management port to the non-managed port, and an interrupt generation and clearing register (nm2m_intr_req_clr) and an interrupt mask register (nm2m_intr_mask) for the direction from the non-managed port to the management port.

[0027] The interrupt generation and clearing registers from non-management ports to management ports (nm2m_intr_req_clr) and from management ports to non-management ports (m2nm_intr_req_clr) are respectively as follows: Figure 2 and Figure 3 As shown, it has the following functions:

[0028] 1. When a non-management port communicates with the management port, configuring the nm2m_intr_req_clr register on the non-management port allows the fault transfer to the management port via the failover channel, triggering an interrupt and reporting it through the management port. Configuring the nm2m_intr_req_clr register on the management port clears the corresponding interrupt information. This nm2m_intr_req_clr register exists on both the management and non-management ports. When a non-management port communicates with the management port, the nm2m_intr_req_clr register is set on both sides, including the following masking. nm = notmanagement, m = management. The m2nm_intr_req_clr register is the same below.

[0029] 2. When the management port communicates with a non-management port, by configuring the m2nm_intr_req_clr register of the management port, the fault transfer can be transferred to the non-management port through the fault transfer channel, thereby triggering an interrupt and reporting it through the non-management port. Then, by configuring the m2nm_intr_req_clr register of the non-management port, the interrupt information of the corresponding bit on the non-management port can be cleared.

[0030] The interrupt mask registers (nm2m_intr_mask) for the non-management port to management port direction and (m2nm_intr_mask) for the management port to non-management port direction are used to mask interrupts, as follows: Figure 4 and Figure 5 As shown:

[0031] 1. When a non-management port communicates with a management port, by configuring the nm2m_intr_mask register of the non-management port and transferring the fault transfer channel to the management port, the interrupt generation information of the corresponding bit of the non-management port can be masked. After masking, although the corresponding interrupt generation register can still generate interrupts, it cannot be transferred or reported. By configuring the nm2m_intr_mask register of the management port, the mask bit of each non-management port can be cleared to zero, thereby canceling the masking.

[0032] 2. When the management port communicates with a non-management port, by configuring the m2nm_intr_mask register of the management port and transferring the fault transfer channel to the non-management port, the interrupt generation information of the corresponding bit of the management port can be masked. After masking, the corresponding interrupt generation register can still generate interrupts, but cannot be transferred or reported. By configuring the m2nm_intr_mask register of any non-management port, the mask bit of the management port can be cleared to zero, thereby canceling the masking.

[0033] The sticky note function primarily functions as a passive monitoring feature. Each port is equipped with one or more sticky note registers (only one is used in this invention, depending on the intelligence of the sticky note function). The management port and non-management ports can monitor the real-time status of each other's sticky note registers to determine if there are any anomalies, errors, or faults, thus achieving real-time monitoring. For example... Figure 6 As shown.

[0034] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A method for adding failover communication between PCIe virtual cross switches, characterized in that, include: Provides a PCIe bridge chip with virtual channel functionality, the controller can be set to basic mode or virtual channel mode, and can control the number of channels in virtual channel mode; When the working mode is selected as virtual channel mode, the controller opens at least one virtual channel. If multiple virtual channels are opened, the normal data communication between the ports of each virtual channel is physically isolated and will not affect each other. When the working mode is selected as virtual channel mode, one of the ports is set as the management port. The management port has the communication function of a normal port and can act as an upstream or downstream port in any mode. The management port also has an additional failover communication channel for additional communication with all other non-management ports, used for reporting anomalies, errors and faults on all channels. The failover communication channel does not overlap with or interfere with the normal communication of the data path within each virtual channel; furthermore, the failover communication channel is configured for bidirectional transmission, so that anomalies, errors, and faults of the management port are transferred to any non-management port through the failover communication channel, and anomalies, errors, and faults of any non-management port can also be transferred to the management port through the failover communication channel.

2. The method for adding failover communication between PCIe virtual cross switches as described in claim 1, characterized in that, The failover communication channel includes two functions: an interrupt function and a note function. The interrupt function is an actively initiated function. The management port or non-management port actively sends an interrupt information, which is received by the corresponding non-management port and management port, and then reported for processing. The note function is a passive monitoring function that monitors the virtual channel while it is working normally, making it easier to detect abnormalities, errors and malfunctions in the work.

3. The method for adding failover communication between PCIe virtual cross switches as described in claim 2, characterized in that, Each port is equipped with 6 registers to implement the fault transfer channel function, namely: a note register for the direction from the management port to the non-management port, an interrupt generation and clearing register for the direction from the management port to the non-management port, an interrupt mask register for the direction from the management port to the non-management port, and a note register for the direction from the non-management port to the management port, an interrupt generation and clearing register for the direction from the non-management port to the management port, and an interrupt mask register for the direction from the non-management port to the management port.

4. The method for adding failover communication between PCIe virtual cross switches as described in claim 3, characterized in that, Each bit or bit of the note register manages a virtual channel, providing note functionality; each bit or bit of the interrupt generation and clear register manages a virtual channel, providing interrupt generation and clearing functionality; each bit or bit of the interrupt mask register manages a virtual channel, providing interrupt masking functionality.

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