Power control circuit, power amplifier and voltage regulator chip
The bias circuit and voltage regulation circuit fabricated by deep well process solve the problem of insufficient voltage withstand capability of the negative voltage circuit of the voltage regulator chip, and achieve higher voltage withstand capability and circuit stability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- WUXI GREATECH MICROELECTRONICS TECH CO LTD
- Filing Date
- 2023-10-18
- Publication Date
- 2026-07-21
Smart Images
Figure CN117311432B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of integrated circuit technology, and in particular to power control circuits, power amplifiers and voltage regulator chips. Background Technology
[0002] In the field of integrated circuit design, negative voltage circuits must also be designed based on positive voltage process platforms. For negative voltage circuits, the withstand voltage of the negative voltage is a significant challenge. For example, a voltage regulator chip operates at 3.3V and generates a negative voltage of -3.3V. The voltage difference between the positive and negative voltages is 6.6V. However, voltage regulator chips operating at 3.3V are generally designed using 3.3V process technology. Theoretically, 3.3V process technology cannot withstand a voltage difference of 6.6V, thus posing a risk of overvoltage breakdown in the design of negative voltage circuits. Summary of the Invention
[0003] Therefore, it is necessary to provide a power control circuit, a power amplifier, and a voltage regulator chip to address the aforementioned technical problems.
[0004] In a first aspect, this application provides a power control circuit, comprising:
[0005] The bias circuit is used to connect to the negative voltage power supply and to perform multiplexing on the negative voltage input signal input by the negative voltage power supply according to the received start signal, so as to output multiple bias voltage signals and multiple adjustment voltage signals respectively.
[0006] A voltage regulation circuit, connected to the bias circuit, is used to receive the externally input voltage-to-be-regulated signal, the negative voltage input signal, and the start signal, and to perform voltage regulation processing on the voltage-to-be-regulated signal according to the start signal, multiple bias voltage signals, the negative voltage input signal, and the adjustment voltage signal, so as to output a target negative voltage signal.
[0007] The bias circuit and the voltage regulation circuit are configured using a deep well process.
[0008] In one embodiment, the bias circuit includes:
[0009] The first signal conversion module is used to connect the negative voltage power supply and the equivalent ground terminal, and convert the negative voltage input signal into a first bias voltage signal when the drive terminal of the first signal conversion module receives a start signal;
[0010] The second signal conversion module is used to connect the negative voltage power supply and the equivalent ground terminal, and convert the negative voltage input signal into a second bias voltage signal when the second signal conversion module receives a start signal and the first signal conversion module outputs a first bias voltage signal.
[0011] The third signal conversion module is connected to the first signal conversion module and the second signal conversion module. It is used to connect to the negative voltage power supply and convert the negative voltage input signal into a third bias voltage signal when the third signal conversion module receives a start signal and the first signal conversion module outputs a first bias voltage signal.
[0012] A voltage adjustment module is connected to the second signal conversion module; it is used to connect the negative voltage power supply and the equivalent ground terminal, and convert the negative voltage input signal into multiple adjustment voltage signals when the voltage adjustment module receives the start signal and the second bias voltage signal.
[0013] In one embodiment, the voltage regulating circuit includes:
[0014] A signal input module, connected to the second signal conversion module, is used to receive the voltage signal to be regulated;
[0015] A signal amplification module, connected to the signal input module, the first signal conversion module, and the third signal conversion module, is used to output a target negative voltage signal when the signal amplification module receives the adjustment voltage signal, the first bias voltage signal, and the third bias voltage signal, and the signal input module receives the voltage signal to be regulated.
[0016] In one embodiment, the voltage-to-be-regulated signal includes a first voltage-to-be-regulated signal in a first voltage range and a second voltage-to-be-regulated signal in a second voltage range, the first voltage range and the second voltage range constituting the withstand voltage range of the power supply control circuit; the signal input module includes:
[0017] The first signal input unit is connected to the first signal conversion module and the signal amplification module. It is used to connect to the equivalent ground terminal and, when the first signal input unit receives the negative voltage input signal, the first bias voltage and the first voltage to be regulated signal, it connects to the signal amplification module.
[0018] The second signal input unit is connected to the signal amplification module and is used to connect to the negative pressure power supply. When receiving the start signal, the negative pressure input signal and the second voltage-to-be-regulated signal, it connects to the signal amplification module.
[0019] In one embodiment, the signal amplification module includes:
[0020] The first signal amplification unit is connected to the voltage adjustment module and the first signal conversion module, and is used to output the target negative voltage signal when the first signal amplification unit receives the first bias voltage signal and the first adjustment voltage signal output by the voltage adjustment module, and the connection between the first signal amplification unit and the second signal input unit is made open;
[0021] The second signal amplification unit is connected to the voltage adjustment module and the third signal conversion module, and is used to output a second target negative voltage signal when the second signal amplification unit receives the second adjustment voltage signal and the third bias voltage output by the voltage adjustment module and the connection between the second signal amplification unit and the first signal input unit is made open.
[0022] In one embodiment, the first signal conversion module includes:
[0023] NMOS transistor M1, the gate of which is used to receive the start signal, and the source of which is used to connect to the negative voltage power supply;
[0024] PMOS transistor M2, the gate and drain of which are connected to the drain of NMOS transistor M1, and the source of PMOS transistor M2 is used to connect to the equivalent ground terminal; PMOS transistor M2 is also used to output a first bias voltage signal.
[0025] In one embodiment, the second signal conversion module includes:
[0026] NMOS transistor M3, the gate of which is used to receive the start signal, and the source of which is used to connect to the negative voltage power supply;
[0027] PMOS transistor M4, the gate of which is connected to the drain of NMOS transistor M3, the source of which is connected to the equivalent ground terminal, and the drain of which is connected to the third signal conversion module; the gate of PMOS transistor M4 is also used to output a second bias voltage signal.
[0028] PMOS transistor M5, the gate of which is connected to the drain of NMOS transistor M3, the source of which is connected to the equivalent ground terminal, and the drain of which is connected to the third signal conversion module.
[0029] In one embodiment, the third signal conversion module includes:
[0030] NMOS transistor M6, the gate of NMOS transistor M6 is used to output the third bias voltage signal, the source of NMOS transistor M6 is used to connect to the negative voltage power supply, and the drain of NMOS transistor M6 is connected to the gate of NMOS transistor M6.
[0031] PMOS transistor M7, the drain of PMOS transistor M7 is connected to the drain of NMOS transistor M6, the source of PMOS transistor M7 is connected to the second signal conversion module, and the gate of PMOS transistor M7 is connected to the first signal conversion module;
[0032] PMOS transistor M8, the gate of PMOS transistor M8 is connected to the gate of PMOS transistor M7 and the first signal conversion module, the drain of PMOS transistor M8 is connected to the second signal conversion module, and the source of PMOS transistor M8 is connected to the second signal conversion module.
[0033] In one embodiment, the voltage adjustment module includes:
[0034] NMOS transistor M9, the gate of which is used to receive the start signal, and the source of which is used to connect to the negative voltage power supply;
[0035] PMOS transistor M10, the gate and drain of PMOS transistor M10 are connected to the drain of NMOS transistor M9, and the gate of PMOS transistor M10 is used to output a first adjustment voltage signal;
[0036] PMOS transistor M11, the gate and drain of PMOS transistor M11 are connected to the source of PMOS transistor M10, and the source of PMOS transistor M11 is used to connect to the equivalent ground terminal;
[0037] NMOS transistor M12, the source of which is connected to the negative voltage power supply, and the gate of which is connected to the drain of which;
[0038] PMOS transistor M13, the source of which is connected to the drain of NMOS transistor M12, the gate of which is connected to the source of PMOS transistor M13, and the gate of PMOS transistor M13 is used to output a second adjustment voltage signal.
[0039] PMOS transistor M12, the gate of which is connected to the second signal conversion module, the source of which is connected to the equivalent ground terminal, and the drain of which is connected to the drain of PMOS transistor M13.
[0040] In one embodiment, each of the MOS transistors is fabricated using a deep-well process.
[0041] In one embodiment, it further includes:
[0042] A conversion circuit, connected to the bias circuit, is used to connect the negative voltage power supply and the equivalent ground terminal, and converts the negative voltage input signal into the start signal when an enable signal is received.
[0043] Secondly, this application also provides a power amplifier, comprising:
[0044] Such as the power control circuit described above;
[0045] A charge pump conversion circuit, connected to the power control circuit, is used to connect to a power supply to convert the power supply signal input by the power supply into a negative voltage input signal.
[0046] Thirdly, this application also provides a voltage regulator chip, comprising:
[0047] Such as the power control circuit described above, or the power amplifier described above; the power control circuit has a first input terminal, a second input terminal, and an output terminal, and the output terminal of the power control circuit is connected to the second input terminal for outputting a target negative voltage signal;
[0048] A voltage selection module is connected to the first input terminal of the power control circuit and is used to connect to a positive voltage power supply and a negative voltage power supply respectively, so as to output the voltage to be regulated signal corresponding to the selection signal to the power control circuit according to the external selection signal.
[0049] The aforementioned power control circuit, power amplifier, and voltage regulator chip include a bias circuit and a voltage regulation circuit. On one hand, the bias circuit, under the influence of a startup signal and a negative voltage power supply, converts the negative voltage input signal into multiple bias voltage signals and multiple adjustment voltage signals. This allows the voltage regulation circuit to process the externally input signal to be regulated and output the target negative voltage signal, thus meeting the requirement of providing a negative voltage signal. On the other hand, components in the bias circuit and voltage regulation circuit that have voltage withstand limitations are all constructed using deep-well technology, improving the voltage withstand capability of the power control circuit. Attached Figure Description
[0050] Figure 1 This is one of the structural schematic diagrams of the power control circuit in one embodiment of this application;
[0051] Figure 2 This is a second schematic diagram of the power control circuit in one embodiment of this application;
[0052] Figure 3 This is a schematic diagram of the bias circuit in one embodiment of this application;
[0053] Figure 4 This is a schematic diagram of the conversion circuit in one embodiment of this application;
[0054] Figure 5 This is a schematic diagram of the structure of a voltage regulator chip in one embodiment of this application.
[0055] Explanation of icon numbers:
[0056] Power control circuit: 100; bias circuit: 110; first signal conversion module: 111; second signal conversion module: 112; third signal conversion module: 113; voltage adjustment module: 114; voltage regulation circuit: 120; first signal input unit: 1211; second signal input unit: 1212; first signal amplification unit: 1221; second signal amplification unit: 1222; negative voltage power supply: 200. Detailed Implementation
[0057] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.
[0058] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0059] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.
[0060] See Figure 1 , Figure 1The diagram shows one of the structural schematic diagrams of a power control circuit according to an embodiment of this application. The power control circuit 100 provided in this embodiment includes a bias circuit 110 and a voltage regulation circuit 120. The bias circuit 110 is used to connect to a negative voltage power supply 200 and to perform multiplexing on the negative voltage input signal input to the negative voltage power supply 200 according to the received start signal, so as to output multiple bias voltage signals and multiple adjustment voltage signals. The voltage regulation circuit 120 is connected to the bias circuit 110 and is used to receive the external input voltage signal to be regulated, the negative voltage input signal and the start signal. According to the start signal, multiple bias voltage signals, negative voltage input signal and adjustment voltage signal, the voltage signal to be regulated is regulated to output the target negative voltage signal. The bias circuit 110 and the voltage regulation circuit 120 are set by deep well process.
[0061] Understandably, due to the poor voltage withstand capability of existing power control circuits, when a chip requires negative voltage, its negative voltage circuit needs to be customized according to the actual needs of the chip. Specifically, when the negative voltage circuit does not require a large load, it can be designed based on the design concept of a charge pump circuit; when the negative voltage circuit requires a large load, a charge pump circuit needs to be set, and then an LDO (low drop-out regulator) circuit is further set to output an adjustable negative voltage signal; when the negative voltage circuit requires a large load and needs to output a fixed voltage, a charge pump circuit and a DC-DC (Direct Current to Direct Current) circuit can work together to output a fixed negative voltage.
[0062] Furthermore, in this embodiment, to ensure that the final output signal of the power control circuit 100 is a negative voltage signal, both the bias circuit 110 and the voltage regulation circuit 120 operate under the power supply of the negative voltage power supply 200. For example, the negative voltage power supply 200 in this embodiment can be a charge pump; depending on actual needs, this charge pump can be configured to supply a -3.3V voltage. Therefore, the bias voltage and the voltage regulation circuit 120 can convert the -3.3V voltage into a target negative voltage signal to meet the negative voltage power supply requirements. Furthermore, the MOSFETs used in the bias circuit 110 and the voltage regulation circuit 120 are fabricated using a deep-well process to improve the voltage withstand capability of the power control circuit 100.
[0063] The bias circuit 110 is a circuit used to generate a bias voltage signal, which is used to output the generated bias voltage signal to the voltage regulation circuit 120 so that the voltage regulation circuit 120 can perform voltage regulation processing on the voltage signal to be regulated in order to output the target negative voltage signal.
[0064] For example, such as Figure 2The second schematic diagram of the power control circuit shown includes a bias circuit 110 that may include a first signal conversion module 111, a second signal conversion module 112, a third signal conversion module 113, and a voltage adjustment module 114. The first signal conversion module 111 is used to connect the negative voltage power supply 200 and the equivalent ground terminal, and converts the negative voltage input signal into a first bias voltage signal when the drive terminal of the first signal conversion module 111 receives a start signal.
[0065] Optionally, such as Figure 3 The second schematic diagram of the power control circuit shows that the first signal conversion module 111 includes an NMOS transistor M1 and a PMOS transistor M2. The gate of the NMOS transistor M1 is used to receive a start signal, and the source of the NMOS transistor M1 is used to connect to the negative voltage power supply 200. The gate and drain of the PMOS transistor M2 are connected to the drain of the NMOS transistor M1, and the source of the PMOS transistor M2 is used to connect to the equivalent ground terminal GND. The PMOS transistor M2 is also used to output a first bias voltage signal. In other words, the driving terminal of the first signal conversion module 111 is the gate of the NMOS transistor M1.
[0066] The aforementioned startup signal can be a bias voltage signal. Specifically, when the startup signal is applied to NMOS transistor M1, NMOS transistor M1 is driven to generate current, which is then transferred to the drain and gate of PMOS transistor M2, thereby enabling PMOS transistor M2 to operate. Since current is input to the drain of PMOS transistor M2 at this time, when the gate of PMOS transistor M2 is connected to other circuits, it is equivalent to transmitting a first bias voltage signal to those other circuits.
[0067] The second signal conversion module 112 is used to connect the negative voltage power supply 200 and the equivalent ground terminal, and converts the negative voltage input signal into a second bias voltage signal when the second signal conversion module 112 receives the start signal and the first bias voltage signal output by the first signal conversion module 111.
[0068] Optionally, such as Figure 3The schematic diagram of the bias circuit shown indicates that the second signal conversion module 112 includes an NMOS transistor M3, a PMOS transistor M4, and a PMOS transistor M5. The gate of the NMOS transistor M3 is used to receive the start signal, and the source of the NMOS transistor M3 is used to connect to the negative voltage power supply 200. The gate of the PMOS transistor M4 is connected to the drain of the NMOS transistor M3, the source of the PMOS transistor M4 is used to connect to the equivalent ground terminal, and the drain of the PMOS transistor M4 is connected to the third signal conversion module 113. The gate of the PMOS transistor M4 is also used to output the second bias voltage signal. The gate of the PMOS transistor M5 is connected to the drain of the NMOS transistor M3, the source of the PMOS transistor M5 is used to connect to the equivalent ground terminal, and the drain of the PMOS transistor M5 is connected to the third signal conversion module 113.
[0069] Specifically, since the gate of NMOS transistor M3 is connected to the same gate as the gate of NMOS transistor M1, when the start signal is applied to NMOS transistor M1, the start signal is also applied to NMOS transistor M3 at the same time. At this time, NMOS transistor M3 is driven by the start signal to generate current. Through the drain of PMOS transistor M4, the gate of PMOS transistor M4 outputs the second bias voltage signal mentioned above. The second bias signal is applied to PMOS transistor M5, and current is generated at the drain of PMOS transistor M5.
[0070] The third signal conversion module 113 is connected to the first signal conversion module 111 and the second signal conversion module 112. It is used to connect to the negative voltage power supply 200 and convert the negative voltage input signal into a third bias voltage signal when the third signal conversion module 113 receives the start signal and the first signal conversion module 111 outputs the first bias voltage signal.
[0071] Optionally, such as Figure 3The schematic diagram of the bias circuit shown indicates that the third signal conversion module 113 includes NMOS transistors M6, M7, and M8. The gate of NMOS transistor M6 is used to output the third bias voltage signal, and the source of NMOS transistor M6 is connected to the negative voltage power supply 200. The drain of NMOS transistor M6 is connected to its gate. The drain of PMOS transistor M7 is connected to the drain of NMOS transistor M6, and the source of PMOS transistor M7 is connected to the second signal conversion module 112 (PMOS...). The drain of transistor M5 is connected to the first signal conversion module 111 (the gate of PMOS transistor M2); the gate of PMOS transistor M7 is connected to the first signal conversion module 111 (the gate of PMOS transistor M2 / the drain of NMOS transistor M1); the drain of PMOS transistor M8 is connected to the second signal conversion module 112 (the drain of NMOS transistor M3); and the source of PMOS transistor M8 is connected to the second signal conversion module 112 (the drain of PMOS transistor M4).
[0072] Specifically, PMOS transistors M7 and M8 operate by receiving the first bias voltage signal from PMOS transistor M2. PMOS transistors M7 and M8 can output the drain current of NMOS transistors M3 and M5 to the drain of PMOS transistors M4 and M6, so that the gate of NMOS transistor M6 can transmit the third bias voltage signal.
[0073] The voltage adjustment module 114 is connected to the second signal conversion module 112; it is used to connect the negative voltage power supply 200 and the equivalent ground terminal, and convert the negative voltage input signal into multiple adjustment voltage signals when the voltage adjustment module 114 receives the start signal and the second bias voltage signal.
[0074] Optionally, such as Figure 3The schematic diagram of the bias circuit shown indicates that the voltage adjustment module 114 includes NMOS transistors M9, M10, M11, M12, M13, and M14. The gate of NMOS transistor M9 is used to receive a start signal, and the source of NMOS transistor M9 is used to connect to the negative voltage power supply 200. The gate and drain of PMOS transistor M10 are connected to the drain of NMOS transistor M9, and the gate of PMOS transistor M10 is used to output a first adjustment voltage signal. The gate and drain of PMOS transistor M11 are connected to the source of PMOS transistor M10, and the source of PMOS transistor M11 is used to connect to... The equivalent ground terminal is connected; the source of NMOS transistor M12 is used to connect to the negative voltage power supply 200, and the gate of NMOS transistor M12 is connected to the drain of NMOS transistor M12; the source of NMOS transistor M13 is connected to the drain of NMOS transistor M12, and the gate of NMOS transistor M13 is connected to the source of NMOS transistor M13. The gate of NMOS transistor M13 is used to output the second adjustment voltage signal; the gate of PMOS transistor M14 is connected to the second signal conversion module 112 (the gate of PMOS transistor M4), the source of PMOS transistor M14 is used to connect to the equivalent ground terminal, and the drain of PMOS transistor M14 is connected to the drain of NMOS transistor M13.
[0075] The voltage adjustment signals include a first voltage adjustment signal and a second voltage adjustment signal. The first and second voltage adjustment signals refer to a first preset voltage value (low voltage) and a second preset voltage value (high voltage), respectively. That is, the signal amplification module can operate regardless of whether the voltage signal is low or high. Furthermore, the first preset voltage value is related to the VGS of the PMOS transistor M10, and the second preset voltage value is related to the VGS of the NMOS transistor M13.
[0076] In this embodiment, on the one hand, the bias circuit 110, under the action of the start signal and the negative voltage power supply 200, converts the negative voltage input signal into multiple bias voltage signals and multiple adjustment voltage signals, so that the voltage regulation circuit 120 outputs the target negative voltage signal after regulating the externally input voltage-to-be-regulated signal, thus meeting the requirement of providing a negative voltage signal. On the other hand, the components in the bias circuit 110 and the voltage regulation circuit 120 that have voltage withstand issues are all set using deep-well technology, which improves the voltage withstand value of the power control circuit 100.
[0077] In one embodiment, the voltage regulation circuit includes a signal input module and a signal amplification module. The signal input module is connected to a second signal conversion module and is used to receive a voltage signal to be regulated in the signal input module. The signal amplification module is connected to the signal input module, the first signal conversion module, and the third signal conversion module and is used to output a target negative voltage signal when the signal amplification module receives a first bias voltage signal and a third bias voltage signal, and the signal input module receives the voltage signal to be regulated.
[0078] The voltage to be regulated includes a first voltage to be regulated signal in a first voltage range and a second voltage to be regulated signal in a second voltage range. The first voltage range and the second voltage range constitute the voltage withstand range of the power supply control circuit. For example, if the voltage withstand range of the power supply control circuit is 0~VDD, then the first voltage range is 0~1 / 2VDD, and the second voltage range is 1 / 2VDD~VDD.
[0079] For example, the signal input module includes a first signal input unit and a second signal input unit. The first signal input unit is connected to the first signal conversion module and the signal amplification module, and is used to connect to the equivalent ground terminal. When the first signal input unit receives a negative voltage input signal, a first bias voltage, and a first voltage-to-be-regulated signal, it connects to the signal amplification module. The second signal input unit is connected to the signal amplification module, and is used to connect to the negative voltage power supply. When it receives a start signal, a negative voltage input signal, and a second voltage-to-be-regulated signal, it connects to the signal amplification module.
[0080] Optionally, such as Figure 3 The schematic diagram of the bias circuit shown indicates that the first signal input unit 1211 includes PMOS transistors 15 to 17, and the second signal input unit 1212 includes NMOS transistors M18 to M20. The aforementioned signal input modules can be the transistor inputs of a rail-to-rail operational amplifier, where PMOS transistors M17 and M20 serve as the non-inverting inputs of the operational amplifier, and PMOS transistors M16 and M19 serve as the inverting inputs.
[0081] Specifically, the gate of PMOS transistor M15 is connected to the gate of PMOS transistor M4. Therefore, PMOS transistor M15 can receive the second bias voltage output from the gate of PMOS transistor M4, and under the action of the second bias voltage, the connection between PMOS transistor M15 and PMOS transistors M16 and M17 is turned on, so PMOS transistor M15 can output current at its drain. Therefore, when PMOS transistor M16 or PMOS transistor M17 receives the first externally input voltage signal to be regulated, it can be in the on state, thus turning on the connection between PMOS transistor M16 or PMOS transistor M17 and the second signal amplification unit in the signal amplification module. Similarly, the gate of NMOS transistor M18 is connected to the gate of NMOS transistor M1. Therefore, when NMOS transistor M1 receives the start signal, the gate of NMOS transistor M18 will also receive the start signal. Under the driving action of the start signal, NMOS transistor M18 can output current at its drain. Therefore, when NMOS transistor M19 or NMOS transistor M20 receives the second voltage-to-be-regulated signal, the connection between NMOS transistor M19 or NMOS transistor M20 and the first signal amplification unit in the signal amplification module can be turned on.
[0082] For example, the signal amplification module includes a first signal amplification unit and a second signal amplification unit. The first signal amplification unit is connected to the voltage adjustment module and the first signal conversion module, and is used to output a target negative voltage signal when the first signal amplification unit receives a first bias voltage signal and a first adjustment voltage signal output by the voltage adjustment module, and the connection between the first signal amplification unit and the second signal input unit is connected. The second signal amplification unit is connected to the voltage adjustment module and the third signal conversion module, and is used to output a second target negative voltage signal when the second signal amplification unit receives a second adjustment voltage signal output by the voltage adjustment module and a third bias voltage, and the connection between the second signal amplification unit and the first signal input unit is connected.
[0083] Optionally, such as Figure 3The schematic diagram of the bias circuit shown includes a first signal amplification unit 1221 comprising PMOS transistors M21 to M27, and a second signal amplification unit 1222 comprising NMOS transistors M28 to M34. Specifically, when PMOS transistors M23 and M26 receive the first adjustment voltage signal, they are driven to operate. When PMOS transistors M22 and M25 receive the first bias voltage signal, they output current at their drains, simultaneously driving PMOS transistors M21 and M24 to operate. PMOS transistors M24 and M25 then cause PMOS transistor M27 to output the target negative voltage signal. When NMOS transistors M28 and M31 receive the second adjustment voltage signal, they are driven to work. While NMOS transistors M28 and M31 are working, NMOS transistors M29 and M32 receive the third bias voltage signal, allowing them to output current at their drains. This simultaneously drives NMOS transistors M30 and M33, enabling them to work. Furthermore, NMOS transistors M32 and M33 cause NMOS transistor M34 to output the target negative voltage signal.
[0084] In one embodiment, the power control circuit further includes a conversion circuit connected to the bias circuit for connecting the negative voltage power supply and the equivalent ground terminal, and converting the negative voltage input signal into a start signal upon receiving an enable signal.
[0085] Optionally, such as Figure 4The schematic diagram of the conversion circuit shown includes PMOS transistors M35, M37, M39, M41, M44, M45, NMOS transistors M36, M38, M40, M42, M43, and M46. When a high-level enable signal is applied, PMOS transistor M35 is in the off state, NMOS transistor M36 is in the on state, and then PMOS transistor M37 is in the on state while NMOS transistor M38 is in the off state. Due to the energy storage effect of capacitor C3, the signal transmission after passing through capacitor C3 is delayed, thereby generating a start signal. At this time, the time when PMOS transistors M39 and NMOS transistor M40 change from the on state to the off state is later than the time when NMOS transistor M38 is in the off state. Since the sources of PMOS transistors M41, M44, and M46 are connected to the equivalent ground, and the gates of PMOS transistors M41, M44, and M46 are connected to the equivalent ground, an operating current can be generated when the connection between the gate and the equivalent ground is turned on. This current is then used to generate a bias voltage signal (i.e., a start signal) through NMOS transistor M46 to start the operation of the bias circuit. Furthermore, the drain of NMOS transistor M42 is connected to the drain of PMOS transistor M41, the source of NMOS transistor M42 is connected to the negative voltage power supply, the gate and source of PMOS transistor M44 are connected to the equivalent ground terminal, the gate of NMOS transistor M43 is connected to the drain of PMOS transistor M41, the source of NMOS transistor M43 is connected to the negative voltage power supply through resistor R, and the drain of NMOS transistor M43 is connected to the drain of PMOS transistor M44. In this case, NMOS transistors M42 and M43 are used as regulating transistors to limit the operating current (e.g., limit the operating current to 1uA) to avoid excessive current damaging the circuit. In one embodiment, this application also provides a power amplifier including: the power control circuit as described above; and a charge pump conversion circuit connected to the power control circuit for connecting to the power supply to convert the power supply signal input by the power supply into a negative voltage input signal.
[0086] In one embodiment, such as Figure 5 The schematic diagram of the voltage regulator chip shown in this application also provides a voltage regulator chip, including the power control circuit 100 as described above, or the power amplifier as described above, and a voltage selection module; the power control circuit 100 has a first input terminal, a second input terminal, and an output terminal, and the output terminal of the power control circuit 100 is connected to the second input terminal for outputting a target negative voltage signal; the voltage selection module is connected to the first input terminal of the power control circuit 100 for connecting a positive voltage power supply and a negative voltage power supply respectively, so as to output a voltage-to-be-regulated signal corresponding to the selection signal to the power control circuit 100 according to the external selection signal.
[0087] Optionally, the voltage selection module includes a resistor R4, a variable resistor R5, and a multiplexer MUX. One end of the resistor R4 is connected to the positive power supply VCCT (e.g., +3.3V), and the other end is connected to one end of the variable resistor R5. The other end of the variable resistor R5 is connected to the negative power supply VEE (e.g., -3.3V). The resistance control terminal of the variable resistor R5 is connected to the multiplexer MUX. The other end of the multiplexer is connected to the first input terminal of the power control circuit 100 (equivalent to the non-inverting input terminal of the power amplifier). The second input terminal of the power control circuit 100 (equivalent to the inverting input terminal of the power amplifier) is connected to the output terminal of the power control circuit 100.
[0088] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0089] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the scope of protection of this application. Therefore, the scope of protection of this patent application should be determined by the appended claims.
Claims
1. A power supply control circuit, characterized in that, include: The bias circuit is used to connect to the negative voltage power supply and to perform multiplexing on the negative voltage input signal input by the negative voltage power supply according to the received start signal, so as to output multiple bias voltage signals and multiple adjustment voltage signals respectively. A voltage regulation circuit, connected to the bias circuit, is used to receive the externally input voltage-to-be-regulated signal, the negative voltage input signal, and the start signal, and to perform voltage regulation processing on the voltage-to-be-regulated signal according to the start signal, multiple bias voltage signals, the negative voltage input signal, and the adjustment voltage signal, so as to output a target negative voltage signal. The bias circuit and the voltage regulation circuit are configured using a deep well process. The bias circuit includes: A first signal conversion module is used to connect a negative voltage power supply and an equivalent ground terminal, and converts the negative voltage input signal into a first bias voltage signal when a start signal is received at the drive terminal of the first signal conversion module. The first signal conversion module includes an NMOS transistor M1 and a PMOS transistor M2. The gate of the NMOS transistor M1 is used to receive the start signal, and the source of the NMOS transistor M1 is used to connect to the negative voltage power supply. The gate and drain of the PMOS transistor M2 are connected to the drain of the NMOS transistor M1, and the source of the PMOS transistor M2 is used to connect to the equivalent ground terminal. The PMOS transistor M2 is also used to output the first bias voltage signal. A second signal conversion module is used to connect the negative voltage power supply and the equivalent ground terminal. When the second signal conversion module receives a start signal and the first signal conversion module outputs a first bias voltage signal, it converts the negative voltage input signal into a second bias voltage signal. The second signal conversion module includes an NMOS transistor M3, a PMOS transistor M4, and a PMOS transistor M5. The gate of the NMOS transistor M3 is used to receive the start signal, and the source of the NMOS transistor M3 is used to connect to the negative voltage power supply. The gate of the PMOS transistor M4 is connected to the drain of the NMOS transistor M3, and the source of the PMOS transistor M4 is used to connect to the equivalent ground terminal. The drain of the PMOS transistor M4 is connected to a third signal conversion module. The gate of the PMOS transistor M4 is also used to output the second bias voltage signal. The gate of the PMOS transistor M5 is connected to the drain of the NMOS transistor M3, and the source of the PMOS transistor M5 is used to connect to the equivalent ground terminal. The drain of the PMOS transistor M5 is connected to the third signal conversion module. A third signal conversion module, connected to the first and second signal conversion modules, is used to connect to a negative voltage power supply. When the third signal conversion module receives a start signal and the first signal conversion module outputs a first bias voltage signal, it converts the negative voltage input signal into a third bias voltage signal. The third signal conversion module includes an NMOS transistor M6, a PMOS transistor M7, and a PMOS transistor M8. The gate of the NMOS transistor M6 is used to output the third bias voltage signal, and the source of the NMOS transistor M6 is connected to the negative voltage power supply. The drain of the NMOS transistor M6 is connected to its gate. The drain of the PMOS transistor M7 is connected to the drain of the NMOS transistor M6, and the source of the PMOS transistor M7 is connected to the second signal conversion module. The gate of the PMOS transistor M7 is connected to the gate of the PMOS transistor M7 and to the first signal conversion module. The drain of the PMOS transistor M8 is connected to the second signal conversion module, and the source of the PMOS transistor M8 is connected to the second signal conversion module. A voltage adjustment module, connected to the second signal conversion module, is used to connect the negative voltage power supply and the equivalent ground terminal, and converts the negative voltage input signal into multiple adjustment voltage signals when the voltage adjustment module receives a start signal and the second bias voltage signal. The voltage adjustment module includes NMOS transistors M9, M10, M11, M12, M13, and M14. The gate of NMOS transistor M9 is used to receive the start signal, and the source of NMOS transistor M9 is used to connect to the negative voltage power supply. The gate and drain of PMOS transistor M10 are connected to the drain of NMOS transistor M9, and the gate of PMOS transistor M10 is used to output a first adjustment voltage signal. The gate of PMOS transistor M11... The gate and drain of the PMOS transistor M10 are connected to the source of the PMOS transistor M11, and the source of the PMOS transistor M11 is used to connect to the equivalent ground terminal. The source of the NMOS transistor M12 is used to connect to the negative voltage power supply, and the gate of the NMOS transistor M12 is connected to the drain of the NMOS transistor M12. The source of the PMOS transistor M13 is connected to the drain of the NMOS transistor M12, and the gate of the PMOS transistor M13 is connected to the source of the PMOS transistor M13. The gate of the PMOS transistor M13 is used to output a second adjustment voltage signal. The gate of the PMOS transistor M12 is connected to the second signal conversion module, and the source of the PMOS transistor M12 is used to connect to the equivalent ground terminal. The drain of the PMOS transistor M12 is connected to the drain of the PMOS transistor M13. The voltage regulation circuit includes: A signal input module, connected to the second signal conversion module, is used to receive the voltage signal to be regulated; A signal amplification module, connected to the signal input module, the first signal conversion module, and the third signal conversion module, is used to output a target negative voltage signal when the signal amplification module receives the adjustment voltage signal, the first bias voltage signal, and the third bias voltage signal, and the signal input module receives the voltage signal to be regulated.
2. The power control circuit according to claim 1, characterized in that, The voltage to be regulated signal includes a first voltage to be regulated signal in a first voltage range and a second voltage to be regulated signal in a second voltage range, wherein the first voltage range and the second voltage range constitute the withstand voltage range of the power supply control circuit. The signal input module includes: The first signal input unit is connected to the first signal conversion module and the signal amplification module. It is used to connect to the equivalent ground terminal and, when the first signal input unit receives the negative voltage input signal, the first bias voltage and the first voltage to be regulated signal, it connects to the signal amplification module. The second signal input unit is connected to the signal amplification module and is used to connect to the negative pressure power supply. When receiving the start signal, the negative pressure input signal and the second voltage-to-be-regulated signal, it connects to the signal amplification module.
3. The power control circuit according to claim 2, characterized in that, The signal amplification module includes: The first signal amplification unit is connected to the voltage adjustment module and the first signal conversion module, and is used to output the target negative voltage signal when the first signal amplification unit receives the first bias voltage signal and the first adjustment voltage signal output by the voltage adjustment module, and the connection between the first signal amplification unit and the second signal input unit is made open. The second signal amplification unit is connected to the voltage adjustment module and the third signal conversion module, and is used to output a second target negative voltage signal when the second signal amplification unit receives the second adjustment voltage signal and the third bias voltage output by the voltage adjustment module and the connection between the second signal amplification unit and the first signal input unit is made open.
4. The power control circuit according to claim 1, characterized in that, Each of the MOS transistors is fabricated using a deep-well process.
5. The power control circuit according to claim 1, characterized in that, Also includes: A conversion circuit, connected to the bias circuit, is used to connect the negative voltage power supply and the equivalent ground terminal, and converts the negative voltage input signal into the start signal when an enable signal is received.
6. A power amplifier, characterized in that, include: The power control circuit as described in any one of claims 1 to 5; A charge pump conversion circuit, connected to the power control circuit, is used to connect to a power supply to convert the power supply signal input by the power supply into a negative voltage input signal.
7. A voltage regulator chip, characterized in that, include: The power control circuit as described in any one of claims 1 to 5, or the power amplifier as described in claim 6; The power control circuit has a first input terminal, a second input terminal, and an output terminal. The output terminal of the power control circuit is connected to the second input terminal and is used to output a target negative pressure signal. A voltage selection module is connected to the first input terminal of the power control circuit and is used to connect to a positive voltage power supply and a negative voltage power supply respectively, so as to output the voltage to be regulated signal corresponding to the selection signal to the power control circuit according to the external selection signal.