Method for manufacturing a semiconductor device

Abstract

The present application provides a semiconductor device manufacturing method, which stabilizes the electrical connection between an electrode pad and a through electrode, and improves the yield of the semiconductor device. In the semiconductor device manufacturing method, a first through hole is formed from a first surface to a second surface of a semiconductor substrate, a second insulating film is formed on the first surface of the semiconductor substrate and the side surface of the first through hole, a resist is arranged on the surface of the second insulating film from the first surface of the semiconductor substrate to the end of the side surface of the first through hole on the first surface side, the second insulating film is subjected to wet etching with the resist as a mask, an organic insulating film is used to cover the first surface of the semiconductor substrate and the side surface of the first through hole, and a second conductive film is formed on the surface of the organic insulating film.

Description

Technical Field

[0001] This invention relates to a method for manufacturing a semiconductor device. Background Technology

[0002] Patent Document 1 discloses a method for manufacturing a semiconductor device, which includes: a silicon substrate having a through-hole extending from one main surface to another main surface opposite to the main surface; a CVD oxide film disposed on the side of the through-hole; an organic insulating film disposed on the CVD oxide film; an Al film exposed at the bottom of the through-hole; and a silicon through-electrode disposed on the organic insulating film and connected to the Al film. The Al film is used as a device pad for connecting the semiconductor device, etc.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2018-113466 Summary of the Invention

[0004] However, in the semiconductor device manufacturing method described in Patent Document 1, the CVD oxide film disposed on the side of the through-hole tends to thin as it approaches the bottom of the through-hole. Furthermore, this tendency becomes more pronounced as the aspect ratio of the through-hole increases. Additionally, the Bosch method is used to form through-holes with a large aspect ratio. When the Bosch method is used to form the through-hole, a fan-shaped notch is formed on the side of the through-hole, thus the thickness of the CVD oxide film disposed on the side of the through-hole easily becomes uneven. Consequently, the adhesion between the CVD oxide film disposed on the side of the through-hole and the side of the through-hole tends to decrease as it approaches the bottom of the through-hole. Because the adhesion between the CVD oxide film disposed on the side of the through-hole near the bottom of the through-hole and the side of the through-hole decreases, the CVD oxide film may detach during the semiconductor device manufacturing process and adhere to the Al film exposed at the bottom of the through-hole.

[0005] If the CVD oxide film detaches onto the Al film, the electrical connection between the Al film and the silicon through electrode becomes unstable, leading to a decrease in the yield of semiconductor devices.

[0006] A method for manufacturing a semiconductor device includes: sequentially disposing a first insulating film and a first conductive film on the second surface of a semiconductor substrate having a first surface and a second surface; forming a first through-hole extending from the first surface of the semiconductor substrate to the second surface, exposing the first insulating film disposed on the second surface through the first through-hole; forming a second insulating film on the first surface of the semiconductor substrate and the side surface of the first through-hole; disposing a photoresist on the surface of the second insulating film from the first surface of the semiconductor substrate to an end near the first surface of the side surface of the first through-hole; using the photoresist as a mask, performing wet etching on the first insulating film and the second insulating film to form a second through-hole continuous with the first through-hole in the first insulating film; covering the first surface of the semiconductor substrate, the side surface of the first through-hole, the side surface of the second through-hole, and the surface of the first conductive film exposed from the second through-hole with an organic insulating film; forming an opening in the organic insulating film to expose the first conductive film; and forming a second conductive film on the surface of the organic insulating film and the surface of the first conductive film exposed from the opening formed in the organic insulating film. Attached Figure Description

[0007] Figure 1 This is a cross-sectional view of the semiconductor device according to Embodiment 1.

[0008] Figure 2 This is a flowchart illustrating an example of a method for manufacturing a semiconductor device according to Embodiment 1.

[0009] Figure 3 It is a cross-sectional view used to illustrate the manufacturing method of a semiconductor device.

[0010] Figure 4 It is a cross-sectional view used to illustrate the manufacturing method of a semiconductor device.

[0011] Figure 5 yes Figure 4 An enlarged sectional view of part D in the diagram.

[0012] Figure 6 It is a cross-sectional view used to illustrate the manufacturing method of a semiconductor device.

[0013] Figure 7 yes Figure 6 An enlarged sectional view of part E in the diagram.

[0014] Figure 8 It is a cross-sectional view used to illustrate the manufacturing method of a semiconductor device.

[0015] Figure 9 It is a cross-sectional view used to illustrate the manufacturing method of a semiconductor device.

[0016] Figure 10 It is a cross-sectional view used to illustrate the manufacturing method of a semiconductor device.

[0017] Figure 11 It is a cross-sectional view used to illustrate the manufacturing method of a semiconductor device.

[0018] Figure 12 It is a cross-sectional view used to illustrate the manufacturing method of a semiconductor device.

[0019] Figure 13 yes Figure 12 An enlarged sectional view of part G in the diagram.

[0020] Figure 14 This is a cross-sectional view of the semiconductor device according to Embodiment 2.

[0021] Figure 15 This is a cross-sectional view of the semiconductor device according to Embodiment 3.

[0022] Figure 16 This is a cross-sectional view of the semiconductor device according to Embodiment 4.

[0023] Label Explanation

[0024] 1-1c: Semiconductor device; 2: Semiconductor substrate; 2A: Upper surface (first surface) of semiconductor substrate; 2B: Lower surface (second surface) of semiconductor substrate; 4: First insulating film; 6: First conductive film; 6A: Upper surface (surface) of first conductive film; 8: Second insulating film; 10: Organic insulating film; 12: Second conductive film; 14: Third insulating film; 21: First through-hole; 25: Shoulder of first through-hole; 41: Second through-hole; 53: Photoresist; 101: Opening of organic insulating film; 111: Surface of organic insulating film; 112: First surface of organic insulating film; 113: Second surface of organic insulating film; 114: Third surface of organic insulating film; 115: Fourth surface of organic insulating film; 213: Side surface of first through-hole; 413: Side surface of second through-hole; S1-S8: Process. Detailed Implementation

[0025] 1. Implementation Method 1

[0026] Reference Figure 1 The semiconductor device 1 of Embodiment 1 will be described.

[0027] like Figure 1 As shown, the semiconductor device 1 includes a semiconductor substrate 2, a first insulating film 4, a first conductive film 6, a second insulating film 8, an organic insulating film 10, and a second conductive film 12.

[0028] The semiconductor substrate 2 has an upper surface 2A as a first surface and a lower surface 2B as a second surface, which is opposite to the upper surface 2A. In this embodiment, the semiconductor substrate 2 is made of silicon. However, the material constituting the semiconductor substrate 2 is not limited to silicon; for example, the semiconductor substrate 2 may also be made of germanium, gallium nitride, or the like.

[0029] Furthermore, the semiconductor substrate 2 has a first through-hole 21 extending from the upper surface 2A to the lower surface 2B. The first through-hole 21 has a first opening 211 opening on the upper surface 2A of the semiconductor substrate 2, a second opening 212 opening on the lower surface 2B of the semiconductor substrate 2, and a side surface 213 connected to the first opening 211 and the second opening 212. In this embodiment, the side surface 213 is formed parallel to the thickness direction of the semiconductor substrate 2. The thickness direction of the semiconductor substrate 2 is the direction from the upper surface 2A of the semiconductor substrate 2 towards the lower surface 2B.

[0030] Additionally, the semiconductor substrate 2 has a circuit (not shown) containing active components such as transistors. In this embodiment, this circuit is disposed on the lower surface 2B of the semiconductor substrate 2.

[0031] A first insulating film 4 is disposed on the lower surface 2B of the semiconductor substrate 2. The first insulating film 4 covers a circuit (not shown) disposed on the lower surface 2B of the semiconductor substrate 2. In this embodiment, the first insulating film 4 is made of silicon oxide. However, the material constituting the first insulating film 4 is not limited to silicon oxide. For example, the first insulating film 4 may also be made of silicon nitride or the like.

[0032] In addition, the first insulating film 4 has a second through hole 41 extending from the upper surface of the first insulating film 4 to the lower surface of the first insulating film 4.

[0033] The second through hole 41 is disposed at a position communicating with the first through hole 21 of the semiconductor substrate 2. Specifically, the second through hole 41 is located below the first through hole 21 and is disposed continuously with the first through hole 21.

[0034] The first conductive film 6 is disposed on the lower surface of the first insulating film 4. That is, the first conductive film 6 is disposed on the lower surface 2B of the semiconductor substrate 2 through the first insulating film 4. In other words, the semiconductor substrate 2, the first insulating film 4, and the first conductive film 6 are disposed sequentially.

[0035] In detail, the first conductive film 6 is disposed below the second through-hole 41 of the first insulating film 4. The first conductive film 6 covers the second opening 212 of the first through-hole 21 of the semiconductor substrate 2 via the second through-hole 41.

[0036] The first conductive film 6 is electrically connected to a circuit (not shown) disposed on the lower surface 2B of the semiconductor substrate 2 via wiring (not shown). The first conductive film 6 is used as an electrode pad for connecting the circuit to the outside of the semiconductor device 1.

[0037] In this embodiment, the first conductive film 6 is made of aluminum. However, the material constituting the first conductive film 6 is not limited to aluminum. For example, the first conductive film 6 may also be made of copper or the like.

[0038] The second insulating film 8 extends from the upper surface 2A of the semiconductor substrate 2 to the end of the side surface 213 of the first through hole 21 near the upper surface 2A. In other words, the second insulating film 8 is disposed to cover the shoulder 25 of the first through hole 21. The shoulder 25 is the corner where the upper surface 2A of the semiconductor substrate 2 intersects with the side surface 213 of the first through hole 21.

[0039] In this embodiment, the second insulating film 8 is made of silicon oxide. However, the material constituting the second insulating film 8 is not limited to silicon oxide. For example, the second insulating film 8 may also be made of silicon nitride or the like.

[0040] An organic insulating film 10 is continuously disposed on the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, the side surface 413 of the second through hole 41, and the upper surface 6A of the first conductive film 6, which serves as the surface of the first conductive film 6. A second insulating film 8 is disposed between the organic insulating film 10 and the upper surface 2A of the semiconductor substrate 2, and between the organic insulating film 10 and the end of the side surface 213 of the first through hole 21 near the upper surface 2A.

[0041] The organic insulating film 10 has an opening 101 on the surface that is connected to the upper surface 6A of the first conductive film 6.

[0042] Furthermore, the organic insulating film 10 has a surface 111, which is the side on which the second conductive film 12 (described later) is disposed, and is the side opposite to the surface facing the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, and the side surface 413 of the second through hole 41, respectively. The surface 111 of the organic insulating film 10 has a first surface 112, a second surface 113, and a third surface 114. The first surface 112 and the second surface 113 are the surfaces 111 of the organic insulating film 10 inside the first through hole 21. The third surface 114 is the surface 111 of the organic insulating film 10 outside the first through hole 21.

[0043] The first surface 112 is the region of the organic insulating film 10 on the surface 111, extending from the opening 101 of the organic insulating film 10 toward the upper surface 2A of the semiconductor substrate 2. The second surface 113 is the region of the organic insulating film 10 on the surface 111, located above the first surface 112 and extending from the first opening 211 of the first through-hole 21 toward the lower surface 2B of the semiconductor substrate 2. The third surface 114 is the region of the organic insulating film 10 on the surface 111, disposed on the upper surface 2A of the semiconductor substrate 2.

[0044] The third surface 114 is connected to the end of the second surface 113 near the first opening 211. The end of the second surface 113 near the lower surface 2B of the semiconductor substrate 2 is connected to the end of the first surface 112 near the upper surface 2A of the semiconductor substrate 2. The end of the first surface 112 near the opening 101 is connected to the upper surface 6A of the first conductive film 6.

[0045] In this embodiment, the first surface 112 and the second surface 113 of the organic insulating film 10 are continuously connected. Furthermore, the first surface 112 and the second surface 113 of the organic insulating film 10 are tapered shapes that gradually narrow from the upper surface 2A of the semiconductor substrate 2 towards the lower surface 2B. That is, the surface 111 of the organic insulating film 10 inside the first through-hole 21, i.e., the first surface 112 and the second surface 113 of the organic insulating film 10, are tapered shapes that gradually narrow from the upper surface 2A of the semiconductor substrate 2 towards the lower surface 2B.

[0046] Furthermore, the surface 111 of the organic insulating film 10 may also have a relay surface (not shown) between the first surface 112 and the second surface 113 inside the first through hole 21. That is, the first surface 112 and the second surface 113 may also be connected via the relay surface disposed between the first surface 112 and the second surface 113. In addition, the relay surface may not be tapered. For example, the relay surface may be parallel to the thickness direction of the semiconductor substrate 2.

[0047] In this embodiment, the organic insulating film 10 is made of epoxy resin. However, the resin material constituting the organic insulating film 10 is not limited to epoxy resin. For example, the organic insulating film 10 may also be made of polyimide resin, acrylic resin, or the like.

[0048] The second conductive film 12 is disposed on the surface 111 of the organic insulating film 10 and the upper surface 6A of the first conductive film 6. The second conductive film 12 and the first conductive film 6 are electrically connected on the upper surface 6A of the first conductive film 6.

[0049] In detail, the second conductive film 12 is arranged inside the first through-hole 21 in a manner that covers the first surface 112 and the second surface 113 of the organic insulating film 10 and the upper surface 6A of the first conductive film 6 exposed from the opening 101 of the organic insulating film 10. The first surface 112 and the second surface 113 of the organic insulating film 10 and the upper surface 6A of the first conductive film 6 are covered by the second conductive film 12, thereby forming a recess 121 surrounded by the second conductive film 12 inside the first through-hole 21. The recess 121 has an opening on the upper surface 2A side of the semiconductor substrate 2. In addition, the second conductive film 12 is arranged outside the first through-hole 21 in a manner that covers the third surface 114 of the organic insulating film 10. In this way, the second conductive film 12 functions as a through electrode 100 penetrating the semiconductor substrate 2.

[0050] In this embodiment, the second conductive film 12 is a metal film having a barrier layer (not shown) and a metal layer (not shown) stacked on the barrier layer. The barrier layer is made of an alloy of titanium and tungsten. The metal layer is made of copper. Furthermore, the materials constituting the second conductive film 12 are not limited to the materials described above. For example, the barrier layer may be made of an alloy of titanium and nickel, and the metal layer may be made of aluminum, etc. Alternatively, the barrier layer may be omitted.

[0051] In addition, in this embodiment, the semiconductor device 1 has a third insulating film 14.

[0052] The third insulating film 14 is disposed on the lower surface of the first insulating film 4, with the first conductive film 6 in between. In this embodiment, the third insulating film 14 is made of silicon oxide. However, the material constituting the third insulating film 14 is not limited to silicon oxide. For example, the third insulating film 14 may also be made of silicon nitride or the like.

[0053] This concludes the description of semiconductor device 1.

[0054] Next, refer to Figures 2-13 The manufacturing method of the semiconductor device 1 of this embodiment will be described. Figures 2-13 The processes shown are performed, for example, by a manufacturing apparatus not shown.

[0055] like Figure 2As shown, the manufacturing method of semiconductor device 1 includes the following steps: step S1 of depositing a first insulating film 4 and a first conductive film 6 on a semiconductor substrate 2; step S2 of forming a first through hole 21 on the semiconductor substrate 2; step S3 of forming a second insulating film 8 on the semiconductor substrate 2; step S4 of depositing a photoresist 53 on the surface of the second insulating film 8; step S5 of wet etching the first insulating film 4 and the second insulating film 8; step S6 of covering the semiconductor substrate 2 and the first conductive film 6 with an organic insulating film 10; step S7 of forming an opening 101 in the organic insulating film 10; and step S8 of forming a second conductive film 12 on the surface 111 of the organic insulating film 10 and the surface of the first conductive film 6.

[0056] Step S1 is a process of depositing a first insulating film 4 and a first conductive film 6 on a semiconductor substrate 2. More specifically, step S1 is a process of sequentially depositing the first insulating film 4 and the first conductive film 6 on the lower surface 2B of a semiconductor substrate 2 having an upper surface 2A and a lower surface 2B.

[0057] like Figure 3 As shown, in process S1, a first insulating film 4 and a first conductive film 6 are sequentially disposed on the lower surface 2B of the semiconductor substrate 2. Specifically, a circuit (not shown) is provided on the lower surface 2B of the semiconductor substrate 2, and the first insulating film 4 is disposed on the lower surface 2B to cover this circuit. Furthermore, the first conductive film 6 is disposed on the lower surface 2B of the semiconductor substrate 2, with the first insulating film 4 in between.

[0058] In addition, in this embodiment, the third insulating film 14 is disposed on the lower surface of the first insulating film 4 through the first conductive film 6.

[0059] As described above, in this embodiment, the semiconductor substrate 2 is made of silicon, the first insulating film 4 and the third insulating film 14 are made of silicon oxide, and the first conductive film 6 is made of aluminum.

[0060] Step S2 is the process of forming a first through hole 21 in the semiconductor substrate 2. Specifically, it is the process of forming a first through hole 21 that extends from the upper surface 2A to the lower surface 2B of the semiconductor substrate 2, and exposing the first insulating film 4 disposed on the lower surface 2B through the first through hole 21.

[0061] like Figure 4 As shown, in process S2, a first through hole 21 is formed on the semiconductor substrate 2, extending from its upper surface 2A to its lower surface 2B. The first through hole 21 is formed on the semiconductor substrate 2 using known photolithography and etching techniques.

[0062] In this embodiment, firstly, a silicon oxide film 51 having an opening corresponding to the first through-hole 21 is formed on the upper surface 2A of the semiconductor substrate 2. Using this silicon oxide film 51 as a mask, the semiconductor substrate 2 is etched, thereby forming the first through-hole 21. Furthermore, the mask used to form the first through-hole 21 is not limited to a silicon oxide film 51. For example, the mask used to form the first through-hole 21 may also be a photoresist having an opening corresponding to the first through-hole 21.

[0063] Furthermore, in this embodiment, the first through-hole 21 is formed by dry etching the semiconductor substrate 2. Specifically, the first through-hole 21 is formed using the Bosch method.

[0064] The Bosch process alternates between an etching step using etching gas and a deposition step forming a protective film on the side 213 of the first through-hole 21. Thus, the Bosch process enables etching with a high aspect ratio.

[0065] like Figure 5 As shown, on the side 213 of the first through-hole 21 formed using the Bosch method, a fan-shaped notch 23 is formed due to the isotropic etching of the etching process, which is the number of times the etching process has been performed. The fan-shaped notch 23 is a recessed portion that is recessed towards the outside of the first through-hole 21 along a plane that intersects the thickness direction of the semiconductor substrate 2.

[0066] Thus, the surface shape of the side 213 of the first through hole 21 becomes a concave-convex shape formed by a series of fan-shaped notches 23.

[0067] By forming a first through hole 21 that extends from the upper surface 2A to the lower surface 2B of the semiconductor substrate 2, the first insulating film 4 disposed on the lower surface 2B of the semiconductor substrate 2 is exposed through the first through hole 21.

[0068] In addition, Figure 4 as well as Figure 5 For ease of explanation, the diagram shows a silicon oxide film 51 used as a mask for forming the first through hole 21, but in step S2, the silicon oxide film 51 is removed after the first through hole 21 is formed.

[0069] Step S3 is the process of forming a second insulating film 8 on the semiconductor substrate 2. Specifically, it is the process of forming the second insulating film 8 on the upper surface 2A of the semiconductor substrate 2 and the side surface 213 of the first through hole 21.

[0070] like Figure 6As shown, in step S3, a second insulating film 8 is formed on the upper surface 2A of the semiconductor substrate 2 and the side surface 213 of the first through hole 21. Furthermore, in step S3, a second insulating film 8 is also formed on the upper surface of the first insulating film 4 exposed from the first through hole 21 through the second opening 212 of the first through hole 21.

[0071] In this embodiment, the second insulating film 8 is formed using CVD (Chemical Vapor Deposition). However, the method for forming the second insulating film 8 is not limited to CVD. For example, the second insulating film 8 can also be formed using sputtering.

[0072] As described above, in this embodiment, the second insulating film 8 is made of silicon oxide.

[0073] like Figure 7 As shown, the second insulating film 8 formed on the side surface 213 of the first through hole 21 is formed along the surface shape of the side surface 213. As a result, the second insulating film 8 has a recess 81 corresponding to the fan-shaped notches 23 formed on the side surface 213, and the surface shape of the second insulating film 8 becomes a concave-convex shape in which a plurality of recesses 81 corresponding to a plurality of fan-shaped notches 23 are continuously formed.

[0074] Step S4 is the process of depositing photoresist 53 on the surface of the second insulating film 8. Specifically, it is the process of depositing photoresist 53 on the surface of the second insulating film 8 from the upper surface 2A of the semiconductor substrate 2 to the end of the side surface 213 of the first through hole 21 near the upper surface 2A of the semiconductor substrate 2. The surface of the second insulating film 8 is the side opposite to the surfaces of the upper surface 2A of the semiconductor substrate 2 and the side surface 213 of the first through hole 21.

[0075] In process S4, firstly, resist 53 is applied to the surface of the second insulating film 8, and then the resist 53 applied to the surface of the second insulating film 8 is patterned.

[0076] like Figure 8 As shown, resist 53 is coated on the surface of the second insulating film 8. Specifically, resist 53 is coated on the surfaces of both the second insulating film 8 formed on the upper surface 2A of the semiconductor substrate 2 and the second insulating film 8 formed on the side surface 213 of the first through-hole 21, at the end disposed near the upper surface 2A side of the semiconductor substrate 2. The first opening 211 of the first through-hole 21 is blocked by resist 53. In this embodiment, the resist 53 is coated onto the second insulating film 8 using a spin-coating method.

[0077] Next, the resist 53 coated on the second insulating film 8 is patterned. The patterning of the resist 53 is performed using a known photolithography technique. Specifically, the region 55 of the resist 53 that forms the first opening 211 of the first through-hole 21, when viewed from the thickness direction of the semiconductor substrate 2, is removed. Thus, the resist 53 becomes... Figure 9 That way.

[0078] like Figure 9 As shown, a photoresist 53 is disposed on the surface of the second insulating film 8 formed on the upper surface 2A of the semiconductor substrate 2 and on the surface of the second insulating film 8 formed on the side surface 213 of the first through hole 21, at the end disposed near the upper surface 2A of the semiconductor substrate 2. That is, the photoresist 53 is disposed on the surface of the second insulating film 8 from the upper surface 2A of the semiconductor substrate 2 to the end of the side surface 213 of the first through hole 21 near the upper surface 2A of the semiconductor substrate 2. In other words, the photoresist 53 is disposed in such a way that it covers the shoulder 25 of the first through hole 21.

[0079] Step S5 is a wet etching process for the first insulating film 4 and the second insulating film 8. Specifically, it is a process in which the first insulating film 4 and the second insulating film 8 are wet etched using the resist 53 as a mask, forming a second through hole 41 in the first insulating film 4 that is continuous with the first through hole 21.

[0080] like Figure 10 As shown, in process S5, firstly, the second insulating film 8 is wet-etched using the resist 53 as a mask. As a result, the portion of the second insulating film 8 disposed inside the first through-hole 21, excluding the end portion near the upper surface 2A of the semiconductor substrate 2, is removed. Here, the portion of the second insulating film 8 disposed inside the first through-hole 21, excluding the end portion near the upper surface 2A of the semiconductor substrate 2, refers to: the second insulating film 8 formed in the side surface 213 of the first through-hole 21; the second insulating film 8 disposed near the lower surface 2B of the semiconductor substrate 2; and the second insulating film 8 formed on the upper surface of the first insulating film 4 through the second opening 212 of the first through-hole 21.

[0081] By removing the second insulating film 8 formed on the upper surface of the first insulating film 4, the first insulating film 4 is exposed through the first through-hole 21. In this embodiment, the first insulating film 4 and the second insulating film 8 are made of silicon oxide. Therefore, in step S5, the first insulating film 4 exposed through the first through-hole 21 is also etched along with the second insulating film 8 formed on the upper surface of the first insulating film 4. Thus, in step S5, the first insulating film 4 and the second insulating film 8 are etched together, forming a second through-hole 41 continuous with the first through-hole 21 on the first insulating film 4. By forming the second through-hole 41, the upper surface 6A of the first conductive film 6 is exposed through the second through-hole 41 toward the first through-hole 21.

[0082] Furthermore, in step S5, the second insulating film 8 formed on the side surface 213 of the first through hole 21, which is disposed on the side adjacent to the lower surface 2B of the semiconductor substrate 2, is removed, but the second insulating film 8 disposed on the end adjacent to the upper surface 2A of the semiconductor substrate 2 is not removed. Thus, the second insulating film 8 is disposed from the upper surface 2A of the semiconductor substrate 2 all the way to the end of the side surface 213 of the first through hole 21 on the side adjacent to the upper surface 2A of the semiconductor substrate 2.

[0083] Here, for example, if the second insulating film 8 formed on the side surface 213 of the first through hole 21, which is disposed on the side adjacent to the lower surface 2B of the semiconductor substrate 2, is not removed, the yield of the semiconductor device 1 may be reduced, as in the prior art.

[0084] The reason is that the second insulating film 8 disposed on the side 213 of the first through hole 21 near the lower surface 2B of the semiconductor substrate 2 is prone to detaching from the side 213 during the manufacturing process of the semiconductor device 1. Moreover, if the second insulating film 8 detached from the side 213 adheres to the upper surface 6A of the first conductive film 6 exposed in the first through hole 21, the electrical connection between the first conductive film 6 and the second conductive film 12 formed in the later process S8 becomes unstable, and the yield of the semiconductor device 1 decreases.

[0085] However, in this embodiment, as described above, the second insulating film 8 formed on the side surface 213 of the first through hole 21, which is disposed on the side adjacent to the lower surface 2B of the semiconductor substrate 2, is removed. Therefore, the shedding of the second insulating film 8 from the side surface 213 of the first through hole 21 is reduced. As a result, the electrical connection between the first conductive film 6 and the second conductive film 12 is stable, and the yield of the semiconductor device 1 is improved.

[0086] Furthermore, in this embodiment, the first insulating film 4 and the second insulating film 8 are etched by a wet etching method. Compared with dry etching, which processes the semiconductor substrate 2 on a single substrate, the semiconductor device 1 can be manufactured efficiently by using wet etching, which can process multiple semiconductor substrates 2 in batches at the same time.

[0087] Furthermore, in this embodiment, the first insulating film 4 is over-etched at its side surface 413 in the direction along the lower surface 2B of the semiconductor substrate 2. As a result, the opening width 41D of the second through hole 41 formed in the first insulating film 4 is larger than the opening width 21D of the first through hole 21 on the lower surface 2B side.

[0088] In addition, in this embodiment, the second insulating film 8 disposed on the end of the side surface 213 of the first through hole 21 near the upper surface 2A of the semiconductor substrate 2 is over-etched at its end face 83 in the direction along the side surface 213 toward the upper surface 2A.

[0089] Thus, in process S5, the first insulating film 4 and the second insulating film 8 are over-etched respectively. By setting the etching conditions of the wet etching so that the first insulating film 4 and the second insulating film 8 are over-etched respectively, the second insulating film 8 disposed on the side surface 213 of the first through hole 21 near the lower surface 2B of the semiconductor substrate 2 can be reliably removed. As a result, the yield of the semiconductor device 1 is further improved.

[0090] In addition, Figure 10 For ease of illustration, the resist 53 is shown in the figure, but in process S5, the resist 53 is removed after the first insulating film 4 and the second insulating film 8 are etched.

[0091] Step S6 is the process of covering the semiconductor substrate 2 and the first conductive film 6 with the organic insulating film 10. In detail, step S6 is the process of covering the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, the side surface 413 of the second through hole 41, and the upper surface 6A of the first conductive film 6 exposed from the second through hole 41 with the organic insulating film 10.

[0092] like Figure 11 As shown, the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, the side surface 413 of the second through hole 41, and the upper surface 6A of the first conductive film 6 exposed from the second through hole 41 are covered by an organic insulating film 10. Specifically, the ends of the upper surface 2A of the semiconductor substrate 2 and the side surface 213 of the first through hole 21 near the upper surface 2A of the semiconductor substrate 2 are covered by the organic insulating film 10 via the second insulating film 8.

[0093] In step S6, an organic insulating film 10 is formed by applying a coating containing a resin material that forms the organic insulating film 10 to the surface to be coated. The surface to be coated is the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, the side surface 413 of the second through hole 41, and the upper surface 6A of the first conductive film 6 exposed from the second through hole 41. Specifically, in step S6, firstly, a pre-wetting treatment is performed on the surface to be coated, and then a coating containing a resin material that forms the organic insulating film 10 is applied to the surface to be coated.

[0094] Pre-wetting treatment refers to the process of wetting the surface to be coated with a solvent of the coating before applying a coating containing a resin material that forms the organic insulating film 10. Pre-wetting treatment improves the wettability of the coated surface to the coating containing the resin material that forms the organic insulating film 10. In this embodiment, the pre-wetting treatment is performed as follows: first, the coated surface is activated by irradiating it with ultraviolet light; then, propylene glycol monomethyl ether acetate is applied to the coated surface as a solvent.

[0095] After the pre-wetting treatment, a coating containing the resin material forming the organic insulating film 10 is applied to the coated surface. In this embodiment, a spin coating method is used to apply the coating containing the resin material forming the organic insulating film 10 to the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, the side surface 413 of the second through hole 41, and the upper surface 6A of the first conductive film 6 exposed from the second through hole 41.

[0096] In this embodiment, the resin material forming the organic insulating film 10 is a positive photosensitive resin. However, the resin material forming the organic insulating film 10 is not limited to a positive photosensitive resin. For example, it could also be a negative photosensitive resin.

[0097] As described above, in this embodiment, the organic insulating film 10 is made of epoxy resin.

[0098] In addition, such as Figure 11 As shown, in process S6, the organic insulating film 10 is formed to completely fill the second through-hole 41, and also fills the side of the first through-hole 21 above the second through-hole 41 that is adjacent to the lower surface 2B of the semiconductor substrate 2. The organic insulating film 10 has a recess 103 formed inside the first through-hole 21, recessed towards the lower surface 2B of the semiconductor substrate 2. The recess 103 has a side surface 105 and a bottom surface 106. The side surface 105 has a tapered shape that gradually narrows towards the lower surface 2B of the semiconductor substrate 2. The bottom surface 106 has a meniscus shape that is recessed towards the lower surface 2B of the semiconductor substrate 2.

[0099] Step S7 is the step of forming an opening 101 in the organic insulating film 10 that exposes the first conductive film 6.

[0100] like Figure 12 As shown, by forming an opening 101 in the organic insulating film 10, the upper surface 6A of the first conductive film 6 is exposed from the opening 101.

[0101] In this embodiment, as described above, the organic insulating film 10 is formed of a positive photosensitive resin. Therefore, firstly, using a mask (not shown), the portion of the organic insulating film 10 corresponding to the opening 101 is exposed from the upper surface 2A side of the semiconductor substrate 2. Next, the exposed organic insulating film 10 is developed. As a result, the portion of the organic insulating film 10 corresponding to the opening 101 is removed, and the opening 101 is formed in the organic insulating film 10.

[0102] Furthermore, by exposing and developing the organic insulating film 10 formed from the positive photosensitive resin from the upper surface 2A side of the semiconductor substrate 2, the surface 111 of the organic insulating film 10 inside the first through hole 21, namely the first surface 112 and the second surface 113 of the organic insulating film 10, are formed into a cone shape that gradually narrows from the upper surface 2A of the semiconductor substrate 2 toward the lower surface 2B.

[0103] In this embodiment, when the portion corresponding to the opening 101 is exposed using a mask (not shown), the exposure area 57 is located inside the outer edge of the second opening 212 of the first through-hole 21. Therefore, the organic insulating film 10 located between the outer edge of the exposure area 57 and the outer edge of the second opening 212 of the first through-hole 21 is not exposed. In other words, the organic insulating film 10 located between the outer edge of the exposure area 57 and the outer edge of the second opening 212 of the first through-hole 21 is not removed in step S7. The surface 111 of the organic insulating film 10 located between the outer edge of the exposure area 57 and the outer edge of the second opening 212 of the first through-hole 21 is mainly... Figure 11 The side surface 105 of the recess 103 shown corresponds to this. Therefore, the surface 111 of the organic insulating film 10 located between the outer edge of the exposure area 57 and the outer edge of the second opening 212 of the first through hole 21 is formed into a tapered shape that gradually narrows toward the lower surface 2B side of the semiconductor substrate 2.

[0104] Furthermore, in the exposure area 57, the light irradiating the organic insulating film 10 from the upper surface 2A side of the semiconductor substrate 2 attenuates as it moves towards the lower surface 2B side of the semiconductor substrate 2. Consequently, the light irradiating the organic insulating film 10 from the upper surface 2A side of the semiconductor substrate 2 passes through... Figure 11The bottom surface 106 of the recess 103 shown diffracts light in a crescent shape. Due to the light attenuation and diffraction generated in the exposure area 57, when the exposed organic insulating film 10 is developed, the surface 111 of the organic insulating film 10 in the exposure area 57 is easily formed into a cone shape that gradually narrows toward the lower surface 2B side of the semiconductor substrate 2.

[0105] In addition, in the developed organic insulating film 10, the surface 111 of the organic insulating film 10 located between the outer edge of the exposure area 57 and the outer edge of the second opening 212 of the first through hole 21 is continuously connected to the surface 111 of the organic insulating film 10 in the exposure area 57.

[0106] Thus, the surfaces 111 of the organic insulating film 10 inside the first through hole 21, namely the first surface 112 and the second surface 113 of the organic insulating film 10, are formed into a tapered shape that gradually narrows from the upper surface 2A of the semiconductor substrate 2 toward the lower surface 2B.

[0107] That is, in step S7, a first surface 112 and a second surface 113 of the organic insulating film 10 are formed together with the opening 101. The first surface 112 and the second surface 113 of the organic insulating film 10 are continuously connected. Furthermore, the first surface 112 and the second surface 113 of the organic insulating film 10 form a tapered shape that gradually narrows from the upper surface 2A of the semiconductor substrate 2 toward the lower surface 2B.

[0108] In this embodiment, a first surface 112 of the organic insulating film 10 is formed in the exposure region 57, but a relay surface (not shown) may also be formed in the exposure region 57 together with the first surface 112. As described above, the relay surface is disposed between the first surface 112 and the second surface 113. By appropriately adjusting the exposure conditions in the exposure region 57, Figure 11 The shape of the bottom surface 106 of the recess 103 shown can, for example, form a relay surface parallel to the thickness direction of the semiconductor substrate 2.

[0109] In addition, such as Figure 13 As shown, a plurality of fan-shaped recesses 23 are formed on the side surface 213 of the first through hole 21, and a plurality of recesses 81 corresponding to the fan-shaped recesses 23 are formed on the second insulating film 8 formed on the side surface 213 of the first through hole 21. The fan-shaped recesses 23 and the recesses 81 are filled by the organic insulating film 10 disposed on the side surface 213 of the first through hole 21. As a result, the second surface 113 of the organic insulating film 10 disposed on the side surface 213 of the first through hole 21 becomes a smooth surface. Although in Figure 13Although not shown in the figure, the first surface 112 of the organic insulating film 10 is also a smooth surface, just like the second surface 113. Therefore, in the later step S8, the second conductive film 12 can be stably formed on the first surface 112 and the second surface 113 of the organic insulating film 10.

[0110] Step S8 is a step of forming a second conductive film 12 on the surface 111 of the organic insulating film 10 and on the upper surface 6A, which serves as the surface of the first conductive film 6. More specifically, it is a step of forming the second conductive film 12 on the first surface 112, the second surface 113, and the third surface 114 of the organic insulating film 10 and on the upper surface 6A of the first conductive film 6 exposed from the opening 101 formed in the organic insulating film 10.

[0111] In this embodiment, the second conductive film 12 is formed using a sputtering method. However, the method for forming the second conductive film 12 is not limited to sputtering. For example, the second conductive film 12 can also be formed using a vapor deposition method.

[0112] As described above, in this embodiment, the second conductive film 12 is a metal film having a barrier layer (not shown) and a metal layer (not shown) stacked on the barrier layer. The barrier layer is made of an alloy of titanium and tungsten. The metal layer is made of copper.

[0113] In step S8, a second conductive film 12 is manufactured by forming a second conductive film 12 on the first surface 112, the second surface 113, and the third surface 114 of the organic insulating film 10 and on the upper surface 6A of the first conductive film 6. Figure 1 Semiconductor device 1 is shown.

[0114] Thus, through the aforementioned processes S1-S8, semiconductor device 1 is manufactured.

[0115] As described above, when the second insulating film 8, which detaches from the side surface 213 of the first through-hole 21, adheres to the upper surface 6A of the first conductive film 6, the electrical connection between the second conductive film 12 formed in step S8 and the first conductive film 6 becomes unstable, potentially reducing the yield of the semiconductor device 1. However, in this embodiment, step S5 reduces the detachment of the second insulating film 8 from the side surface 213 of the first through-hole 21, thereby stabilizing the electrical connection between the second conductive film 12 formed in step S8 and the first conductive film 6, and improving the yield of the semiconductor device 1.

[0116] Here, for example, in order to reduce the detachment of the second insulating film 8 from the side surface 213 of the first through hole 21, it is considered to omit step S3 and not form the second insulating film 8, and to remove all the second insulating film 8 disposed on the side surface 213 of the first through hole 21 in step S5. However, if the second insulating film 8 is not formed, or if all the second insulating film 8 disposed on the side surface 213 of the first through hole 21 is removed, in Figure 1 The shoulder 25 shown may not be able to ensure the insulation between the semiconductor substrate 2 and the second conductive film 12.

[0117] The reason is that the thickness of the organic insulating film 10 tends to thin at the shoulder 25. That is, without forming the second insulating film 8, or when the second insulating film 8 disposed on the side 213 of the first through hole 21 is completely removed, the electrical insulation between the semiconductor substrate 2 and the second conductive film 12 at the shoulder 25 is achieved solely through the organic insulating film 10. However, at the shoulder 25, the thickness of the organic insulating film 10 tends to thin, which may prevent the insulation between the semiconductor substrate 2 and the second conductive film 12 from being guaranteed.

[0118] On the other hand, in this embodiment, as described above, the second insulating film 8 is configured to cover the shoulder 25 of the first through hole 21. That is, the shoulder 25 is covered by the second insulating film 8 and the organic insulating film 10. Therefore, even if the thickness of the organic insulating film 10 becomes thinner at the shoulder 25, the insulation between the semiconductor substrate 2 and the second conductive film 12 can be ensured.

[0119] In addition, in this embodiment, such as Figure 12 As shown, the surfaces 111 of the organic insulating film 10 inside the first through-hole 21, namely the first surface 112 and the second surface 113 of the organic insulating film 10, form a tapered shape that gradually narrows from the upper surface 2A of the semiconductor substrate 2 toward the lower surface 2B. Therefore, in process S8, when the second conductive film 12 is formed by sputtering or the like, the second conductive film 12 can be stably formed on the first surface 112 and the second surface 113 of the organic insulating film 10.

[0120] Furthermore, in this embodiment, since the first surface 112 connected to the upper surface 6A of the first conductive film 6 is conical, the electrical connection between the second conductive film 12 formed on the first surface 112 and the second conductive film 12 formed on the upper surface 6A of the first conductive film 6 can be reliably established.

[0121] Furthermore, in this embodiment, since the second surface 113 connected to the third surface 114 is conical, the electrical connection between the second conductive film 12 formed on the third surface 114 and the second conductive film 12 formed on the second surface 113 can be reliably established.

[0122] In addition, in this embodiment, such as Figure 13 As shown, the second surface 113 of the organic insulating film 10 is a smooth surface. Similarly, the first surface 112 is also a smooth surface. Therefore, in step S8, a second conductive film 12 can be stably formed on both the first surface 112 and the second surface 113 of the organic insulating film 10.

[0123] As described above, the following effects can be obtained according to this embodiment.

[0124] A method for manufacturing a semiconductor device 1 includes: sequentially disposing a first insulating film 4 and a first conductive film 6 on the lower surface 2B of a semiconductor substrate 2 having an upper surface 2A as a first surface and a lower surface 2B as a second surface; forming a first through-hole 21 extending from the upper surface 2A to the lower surface 2B of the semiconductor substrate 2, exposing the first insulating film 4 disposed on the lower surface 2B through the first through-hole 21; forming a second insulating film 8 on the upper surface 2A and the side surface 213 of the first through-hole 21 of the semiconductor substrate 2; and disposing a photoresist on the surface of the second insulating film 8 from the upper surface 2A of the semiconductor substrate 2 to the end of the side surface 213 of the first through-hole 21 near the upper surface 2A of the semiconductor substrate 2. 53; Using resist 53 as a mask, wet etching is performed on the first insulating film 4 and the second insulating film 8 to form a second through hole 41 continuous with the first through hole 21 in the first insulating film 4; the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, the side surface 413 of the second through hole 41, and the upper surface 6A of the first conductive film 6 exposed from the second through hole 41 are covered with an organic insulating film 10; an opening 101 is formed in the organic insulating film 10 to expose the first conductive film 6; and a second conductive film 12 is formed on the surface 111 of the organic insulating film 10 and on the upper surface 6A of the first conductive film 6 exposed from the opening 101 formed in the organic insulating film 10.

[0125] This reduces the likelihood of the second insulating film 8 detaching from the side 213 of the first through-hole 21 during the manufacturing process of the semiconductor device 1. Consequently, the electrical connection between the first conductive film 6 and the second conductive film 12 is stable, and the yield of the semiconductor device 1 is improved.

[0126] 2. Implementation Method 2

[0127] Next, refer to Figure 14 The manufacturing method of the semiconductor device 1a according to Embodiment 2 will be described. The manufacturing method of the semiconductor device 1a is the same as that in Embodiment 1, except that in step S7 of Embodiment 1, a fourth surface 115 as a relay surface is formed between the first surface 112 and the second surface 113 together with the first surface 112 of the organic insulating film 10.

[0128] Furthermore, structures identical to those in Embodiment 1 described above are labeled with the same reference numerals, and their descriptions are omitted.

[0129] like Figure 14 As shown, the semiconductor device 1a has an organic insulating film 10. The surface 111 of the organic insulating film 10 has a first surface 112, a second surface 113, a third surface 114, and a fourth surface 115.

[0130] A fourth surface 115 is disposed between the first surface 112 and the second surface 113. The first surface 112 and the second surface 113 are connected via the fourth surface 115.

[0131] In this embodiment, if manufacturing deviations are ignored, the fourth surface 115 is formed parallel to the thickness direction of the semiconductor substrate 2. However, although the fourth surface 115 is formed parallel to the thickness direction of the semiconductor substrate 2 in this embodiment, it may not be parallel to the thickness direction of the semiconductor substrate 2. For example, the fourth surface 115 may be conical. Furthermore, for example, as long as the second conductive film 12 is formed on the first surface 112 and the fourth surface 115 of the organic insulating film 10 in step S8, the fourth surface 115 may also be an inverted conical shape that gradually widens from the upper surface 2A of the semiconductor substrate 2 towards the lower surface 2B.

[0132] The method for manufacturing semiconductor device 1a includes Figure 2 The processes shown are S1 to S8.

[0133] In detail, in step S7 of the manufacturing method of semiconductor device 1a, a fourth surface 115 is formed between the first surface 112 and the second surface 113, together with the first surface 112 of the organic insulating film 10, to serve as a relay surface.

[0134] In step S7, in order to form the fourth surface 115 into the desired shape, for example, adjustments can be made in step S6. Figure 11 The shape of the bottom surface 106 of the recess 103 shown can also be adjusted in process S7. Figure 12 The exposure conditions for the exposure area 57 are shown. The exposure conditions for the exposure area 57 can be adjusted, for example, by using a gradient mask. A gradient mask is a mask with a 2D distribution of light transmittance.

[0135] As described above, the same effects as in Embodiment 1 can be obtained according to this embodiment.

[0136] 3. Implementation Method 3

[0137] Next, refer to Figure 15 The manufacturing method of the semiconductor device 1b according to Embodiment 3 will be described. The manufacturing method of the semiconductor device 1b is the same as that of Embodiment 1, except that it includes the step of embedding the recess 121 surrounded by the second conductive film 12 with a metal material 123. That is, the manufacturing method of the semiconductor device 1b includes, in addition to steps S1-S8 in Embodiment 1, the step of embedding the recess 121 surrounded by the second conductive film 12 with a metal material 123.

[0138] Furthermore, structures identical to those in Embodiment 1 described above are labeled with the same reference numerals, and their descriptions are omitted.

[0139] like Figure 15 As shown, a recess 121 surrounded by a second conductive film 12 is formed in the semiconductor device 1b. Furthermore, the recess 121 is filled with a metal material 123. Thus, inside the first through hole 21, the second conductive film 12 and the metal material 123 embedded in the recess 121 function as a through electrode 100b.

[0140] In this embodiment, the metal material 123 is copper. However, the metal material 123 is not limited to copper. The metal material 123 can be any conductive metal; there is no particular limitation.

[0141] In addition to the manufacturing method of semiconductor device 1b Figure 2 In addition to the steps S1-S8 shown, the process also includes embedding the recess 121 surrounded by the second conductive film 12 with metal material 123. Furthermore, in the following description, the process of embedding the recess 121 with metal material 123 is sometimes referred to as the "metal embedding process".

[0142] The metal embedding process is carried out after process S8.

[0143] In the metal embedding process, the recess 121 surrounded by the second conductive film 12 is embedded using metal material 123.

[0144] In this embodiment, during the metal embedding process, a conductive paste containing metal material 123 is printed from the upper surface 2A side of the semiconductor substrate 2. As a result, the recess 121 is filled with the metal material 123. Furthermore, the method for embedding the metal material 123 in the recess 121 is not limited to the printing method of conductive paste. For example, a plating method can also be used to fill the recess 121 with the metal material 123.

[0145] In this embodiment, by embedding a metal material 123 in the recess 121, the second conductive film 12 and the metal material 123 embedded in the recess 121 function as a through electrode 100b inside the first through hole 21. When the coverage of the second conductive film 12 formed in step S8 is low, the electrical connection of the second conductive film 12 may become unstable, but by using the metal material 123 to enhance the coverage of the second conductive film 12, the reliability of the through electrode 100b is improved.

[0146] As described above, according to this embodiment, in addition to the effects of Embodiment 1, the following effects can also be obtained.

[0147] According to this embodiment, by embedding the recess 121 surrounded by the second conductive film 12 inside the first through hole 21 with a metal material 123, the second conductive film 12 and the metal material 123 embedded in the recess 121 can function as a through electrode 100b. As a result, the reliability of the electrical connection in the through electrode 100b is improved.

[0148] 4. Implementation Method 4

[0149] Next, refer to Figure 16 The manufacturing method of the semiconductor device 1c according to Embodiment 4 will be described. The manufacturing method of the semiconductor device 1c is the same as that of Embodiment 1, except that it includes the step of depositing the third conductive film 16 on the surface of the second conductive film 12. That is, the manufacturing method of the semiconductor device 1c includes, in addition to steps S1-S8 in Embodiment 1, the step of depositing the third conductive film 16 on the surface of the second conductive film 12.

[0150] Furthermore, structures identical to those in Embodiment 1 described above are labeled with the same reference numerals, and their descriptions are omitted.

[0151] like Figure 16 As shown, the semiconductor device 1c has a third conductive film 16.

[0152] The third conductive film 16 is disposed on the surface of the second conductive film 12. The surface of the second conductive film 12 is the opposite side of the surfaces of the second conductive film 12 that are opposite to the surface 111 of the organic insulating film 10 and the upper surface 6A of the first conductive film 6, respectively. Inside the first through hole 21, the second conductive film 12 and the third conductive film 16 disposed on the surface of the second conductive film 12 function as a through electrode 100c.

[0153] In this embodiment, the third conductive film 16 is made of copper. However, the material constituting the third conductive film 16 is not limited to copper. For example, nickel or aluminum may also be used.

[0154] In addition to the manufacturing method of semiconductor device 1c Figure 2 In addition to steps S1-S8 shown, the process also includes a step of depositing a third conductive film 16 on the surface of the second conductive film 12. Furthermore, in the following description, the step of depositing the third conductive film 16 on the surface of the second conductive film 12 is sometimes referred to as the "third conductive film depositing step".

[0155] The third conductive film preparation process is carried out after process S8.

[0156] In the third conductive film preparation process, a third conductive film 16 is prepared on the surface of the second conductive film 12.

[0157] In this embodiment, the third conductive film 16 is formed using a plating method in the third conductive film preparation step. However, the method for forming the third conductive film 16 is not limited to plating. For example, sputtering can also be used to form the third conductive film 16.

[0158] In this embodiment, by disposing a third conductive film 16 on the surface of the second conductive film 12, the second conductive film 12 and the third conductive film 16 disposed on the surface of the second conductive film 12 function as a through electrode 100c inside the first through hole 21. When the coverage of the second conductive film 12 formed in step S8 is low, the electrical connection of the second conductive film 12 may become unstable, but by using the third conductive film 16 to enhance the coverage of the second conductive film 12, the reliability of the through electrode 100c is improved.

[0159] As described above, according to this embodiment, in addition to the effects of Embodiment 1, the following effects can also be obtained.

[0160] According to this embodiment, by disposing of a third conductive film 16 on the surface of the second conductive film 12 inside the first through hole 21, the second conductive film 12 and the third conductive film 16 can function as a through electrode 100c. This improves the reliability of the electrical connection in the through electrode 100c.

[0161] The manufacturing method of the semiconductor device of the present invention has been described above based on the embodiments. However, the present invention is not limited thereto, and the structure of each part can be replaced with any structure having the same function. In addition, other arbitrary components may be added to the present invention. Furthermore, the various embodiments may be appropriately combined.

Claims

1. A method for manufacturing a semiconductor device, The method for manufacturing the semiconductor device includes: A first insulating film and a first conductive film are sequentially disposed on the second side of a semiconductor substrate having a first side and a second side; A first through hole is formed from the first surface of the semiconductor substrate to the second surface, so that the first insulating film disposed on the second surface is exposed from the first through hole; A second insulating film is formed on the first surface of the semiconductor substrate and on the side of the first through hole; A photoresist is disposed on the surface of the second insulating film from the first surface of the semiconductor substrate to the end of the side of the first through hole near the first surface. Using the resist as a mask, wet etching is performed on the first insulating film and the second insulating film to form a second through hole that is continuous with the first through hole in the first insulating film. An organic insulating film is used to cover the first surface of the semiconductor substrate, the side surface of the first through hole, the side surface of the second through hole, and the surface of the first conductive film exposed from the second through hole. An opening is formed in the organic insulating film to expose the first conductive film; as well as A second conductive film is formed on the surface of the organic insulating film and on the surface of the first conductive film exposed from the opening formed in the organic insulating film.

2. The method for manufacturing a semiconductor device according to claim 1, wherein, The opening formed by the organic insulating film to expose the first conductive film includes: inside the first through hole, the surface of the organic insulating film is formed into a tapered shape that gradually narrows from the first surface toward the second surface.

3. The method for manufacturing a semiconductor device according to claim 1, wherein, The organic insulating film is formed from a positive photosensitive resin. The formation of the opening in the organic insulating film that exposes the first conductive film involves: exposing and developing the portion of the organic insulating film corresponding to the opening from the first side of the semiconductor substrate to form the opening.

4. A method for manufacturing a semiconductor device according to any one of claims 1-3, wherein, The method of manufacturing the semiconductor device includes embedding a recess surrounded by the second conductive film using a metallic material.

5. A method for manufacturing a semiconductor device according to any one of claims 1-3, wherein, The method of manufacturing the semiconductor device includes: depositing a third conductive film on the surface of the second conductive film.

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