Common-mode voltage general suppression method and system for odd-phase ac motor

Abstract

The application discloses a common-mode voltage general suppression method and system of an odd-phase alternating-current motor and belongs to the field of motor control. Based on the principle of pulse phase shift cancellation, all pulses are connected head to tail by aligning the falling edge of one pulse with the rising edge of another pulse, so that the amplitude and frequency of the common-mode voltage are reduced. The method can realize the reduction of the common-mode voltage amplitude and constant amplitude control through appropriate zero-sequence voltage injection, and the size of the zero-sequence voltage considers the improvement of voltage utilization. Finally, the sawtooth carrier comparison method is adopted to generate asymmetric pulses, and the common-mode voltage amplitude suppression of the odd-phase alternating-current motor is finally realized. The application does not need to increase hardware, has strong universality, reduces the system common-mode electromagnetic interference and improves the system reliability. Meanwhile, the method considers the improvement of the system voltage utilization while realizing the reduction of the common-mode voltage amplitude and frequency, and the maximum modulation ratio can be the same as that of the traditional SVPWM.

Description

Technical Field

[0001] This invention belongs to the field of motor control, and more specifically, relates to a general method and system for suppressing common-mode voltage in odd-phase AC motors. Background Technology

[0002] In recent years, multiphase motor drive systems have been widely researched and applied in industrial applications. Compared with traditional three-phase motors, multiphase AC motors have advantages such as phase redundancy, low torque ripple, high torque density, and lower voltage and current stress on switching devices, and are widely used in electric vehicles, aerospace, and marine propulsion. Multiphase motors are often driven by multiphase voltage source inverters, with windings connected in a Y-type configuration and having a neutral point.

[0003] In multiphase motor drive systems, the inverter, under pulse width modulation (PWM) technology, can only operate in discrete switching states, thus generating high-frequency common-mode voltage in the motor system. Under common-mode voltage excitation, a large common-mode leakage current is generated in the motor drive system due to the presence of the common-mode loop. This leakage current flowing through the system causes additional losses, increases stress on the switching devices, and induces shaft voltage on the shaft, potentially causing bearing damage. Furthermore, the high dv / dt of the common-mode voltage also generates common-mode electromagnetic interference in the common-mode loop. Common-mode voltage suppression methods can be divided into hardware and software suppression methods. Hardware suppression methods suppress the propagation path by adding external passive or active filters, while software suppression suppresses the common-mode voltage source by changing the modulation strategy or topology. Software suppression is widely used due to its lower cost and higher power density.

[0004] For even-phase motors, common-mode voltage elimination can be achieved simply by simultaneously outputting the same positive and negative voltage levels, a method that has been extensively studied. However, for odd-phase motors, common-mode voltage cannot be eliminated; only its peak value and frequency can be reduced. Reducing the peak value of the common-mode voltage lowers the shaft voltage, effectively preventing harmful bearing currents. Lowering the frequency of the common-mode voltage reduces dv / dt, effectively suppressing common-mode noise interference and common-mode current.

[0005] Current common-mode voltage suppression (CMV) methods for odd-phase motors mainly fall into two categories: vector selection based on SVPWM and carrier phase shift based on carrier comparison PWM, and are applied in five-phase and seven-phase motors, respectively. SVPWM-based CMV suppression synthesizes a reference voltage by selecting a vector with a lower common-mode voltage amplitude. While this reduces the common-mode voltage amplitude, the vector synthesis process becomes extremely complex with increasing phase number, making it unsuitable for higher-phase motors, and it doesn't consider common-mode voltage frequency suppression. Carrier PWM-based CMV suppression primarily avoids the use of zero vectors through carrier phase shifting, thereby reducing the peak value of the common-mode voltage. However, the peak value cannot be suppressed to its minimum at all times, and it doesn't consider common-mode voltage frequency suppression. Furthermore, this method often only considers the carrier phase shift of the SVPWM algorithm, resulting in a maximum modulation ratio of only 1. Summary of the Invention

[0006] In view of the shortcomings of the prior art, the purpose of this invention is to provide a universal suppression method and system for odd-phase AC motors, which aims to solve the electromagnetic interference caused by the common-mode voltage of various odd-phase motors and reduce the peak value and frequency of the common-mode voltage.

[0007] To achieve the above objectives, the present invention provides a general method for suppressing common-mode voltage in odd-phase AC motors, comprising the following steps:

[0008] Step 1: Sample the n-phase current i of the odd-phase AC motor x (x = a, b, c, ..., n-1, n), DC bus voltage V dc And the rotor position angle θ.

[0009] Step 2: The n-phase current is converted into the sampling current in the dq coordinate system by coordinate transformation. The motor is controlled by the rotor flux orientation. The obtained dq-axis reference voltage is then converted back to the n-phase coordinate system by coordinate inverse transformation to obtain the n-phase reference voltage.

[0010] Step 3: Reduce the amplitude and frequency of the common-mode voltage by pulse phase shift cancellation. Inject a suitable zero-sequence voltage into the n-phase reference voltage to achieve common-mode voltage reduction and constant amplitude control. The magnitude of the zero-sequence voltage is considered to improve voltage utilization.

[0011] Step 4: Use sawtooth carrier comparison PWM to realize asymmetric PWM, and finally reduce the common mode voltage amplitude and frequency of the n-phase system.

[0012] Furthermore, the coordinate transformation method in step two is as follows:

[0013] The sampled current signal undergoes a vector space decoupling transformation, the principle of which is given by the following equation. Any parameter X (X = u, I, ψ…) of an odd-phase motor can be decomposed into a new set of n variables using the following equation, where… The fundamental wave and the (2nk±1)th harmonic are mapped onto the α-β plane, and the (2nk±(2l±1))th harmonic is mapped onto the x-β plane. 2l+1 -y 2l+1 A plane, where k = 1, 2, 3…, l = 1, 2, … (n-3) / 2.

[0014]

[0015] The above formula allows for vector decomposition of the n-phase current, thus yielding the two-phase stationary coordinate system current i. α and i β Then, the stationary two-phase coordinate system is transformed into the rotating orthogonal coordinate system dq using the following formula.

[0016]

[0017] The common-mode voltage suppression method for odd-phase AC motors of this invention can be applied to both synchronous and asynchronous motors; therefore, this invention will only analyze asynchronous motors as an example. Asynchronous motors employ traditional rotor flux orientation control, including an outer flux loop, an outer speed loop, and an inner current loop. The outer flux loop obtains the reference current i along the d-axis. * d The outer ring of rotational speed obtains the q-axis reference current i. * q The inner current loop obtains the reference voltage u along the dq axis. * d and u * d Then, the n-phase reference voltage is obtained through the coordinate inverter, and the n-phase PWM signal of the control system is obtained through the common-mode voltage suppression algorithm.

[0018] Furthermore, the principle behind the pulse phase-shift cancellation method in step three for reducing the common-mode voltage amplitude is as follows:

[0019] To suppress additional losses caused by harmonic voltages, the modulation wave of the n-phase voltage should contain only the fundamental voltage and the zero-sequence voltage. When the modulation ratio m is defined as the fundamental voltage relative to V... dc When the ratio is 1 / 2, the modulation wave of the n-phase motor is as shown in the following formula, where u z Zero-sequence voltage:

[0020]

[0021] The relationship between duty cycle and modulation ratio satisfies d x =0.5(u x+1), then the sum of the high-level duty cycles of the n phases d sum+ The sum of the low-level duty cycle and d sum- They are respectively:

[0022]

[0023] As can be seen from the above formula, the sum of the duty cycles of the high and low levels is determined solely by the zero-sequence voltage u. z The only determining factor. The following formula defines the common-mode voltage of an n-phase motor, where the switching function S... i When = 1, this phase bridge arm outputs a high level, and the switching function S i When the voltage is -1, the output of this phase bridge arm is low. Since the bridge arm output voltage can only be V... dc / 2 and -V dc / 2, therefore the common-mode voltage waveform of the system is a step waveform. The sum of the switching functions satisfies Therefore, the maximum peak value of the common-mode voltage is ±V. dc / 2, the minimum peak value of the common-mode voltage is ±V dc / 2n.

[0024]

[0025] If high-level pulses are connected end-to-end according to the winding sequence, low-level pulses will also be connected end-to-end accordingly. After all pulses are connected end-to-end, the common-mode voltage peak value will be minimized, and the common-mode voltage will only operate once per switching cycle. To minimize the common-mode voltage amplitude, the zero-sequence voltage u... z The range of values ​​for is:

[0026]

[0027] When the zero-sequence voltage u z When the above equation is satisfied, the common-mode voltage amplitude is only at its minimum value after pulse shifting and alignment. The steps to reduce the common-mode voltage peak value are as follows:

[0028] 1. Limit the zero-sequence voltage of the n-phase motor to satisfy the above formula, and control the zero-sequence voltage to improve the maximum modulation ratio.

[0029] 2. Arrange all phase pulses according to the winding order, and use the high level of phase a PWM signal as the starting point.

[0030] 3. Phase shift the b-phase pulse so that its rising edge aligns with the falling edge of the a-phase pulse. Then, phase shift the next pulse so that its rising edge aligns with the falling edge of the previous pulse. Finally, connect all the pulses sequentially to achieve phase shifting and alignment of all pulses.

[0031] The above steps achieve a reduction in both the peak value and frequency of the common-mode voltage. Furthermore, based on the magnitude of the zero-sequence voltage, the common-mode voltage suppression method of this invention utilizes three modes: CMVR1, CMVR2, and CMVR3. CMVR1 refers to the common-mode voltage amplitude being the minimum positive or negative amplitude, i.e., ±V. dc / 2n, and it only changes once in one switching cycle; CMVR2 refers to the minimum amplitude at which the common-mode voltage is constantly positive, i.e., V dc / 2n; CMVR3 refers to the minimum amplitude at which the common-mode voltage is constantly negative, i.e., -V dc / 2n. Define u max and u min Let u be the maximum and minimum values ​​of the modulation wave of the n-phase motor, respectively. Then, the zero-sequence voltage u of the three common-mode voltage amplitude reduction modes is... z1 u z2 and u z3 They are respectively:

[0032]

[0033]

[0034]

[0035] Among them, u osum The sum of the fundamental voltages in the modulated signal, and the zero-sequence voltage u SVM Satisfy u SVM =-0.5(u max +u min ).

[0036] Define M max This represents the maximum modulation ratio in the three modes. The modulation ratio is defined by the phase voltage relative to V. dc The ratio of / 2, then M max for:

[0037]

[0038] Furthermore, the method for comparing the sawtooth carrier with the PWM equivalent space vector PWM in step four is as follows:

[0039] Because the pulses are no longer symmetrical after phase shifting, it becomes difficult to implement using traditional triangular carrier comparison PWM. This invention proposes sawtooth carrier PWM, which first calculates the rising edge R of each pulse according to the pulse phase shifting alignment method. x and falling edge F x Location, according to R x and F xThe magnitude is selected by choosing between a high level in the middle and high levels on both sides, and then compared with the sawtooth carrier wave to obtain the control signal PWM1-n for the n-phase motor. This ultimately achieves common-mode voltage amplitude and frequency suppression for the system.

[0040] For n-phase motors, this invention proposes three common-mode voltage reduction modes: CMVR1, CMVR2, and CMVR3. CMVR1 refers to the common-mode voltage amplitude being the minimum positive or negative amplitude, i.e., ±V. dc / 2n, and it changes only once in one switching cycle; CMVR2 refers to the minimum amplitude at which the common-mode voltage of the motor is kept constantly positive, i.e., V dc / 2n; CMVR3 refers to the minimum amplitude at which the common-mode voltage of the motor is kept constant and negative, i.e., -V dc / 2n. The maximum modulation ratio of CMVR1 is 1 / cos(π / 2n), which is consistent with the traditional SVPWM modulation ratio. The maximum modulation ratio of CMVR2 and CMVR3 is 1-1 / n. Although the modulation ratio is reduced, the common-mode voltage is constant in this mode, and the common-mode voltage suppression effect of the system is the best.

[0041] The present invention also provides a common-mode voltage suppression system for odd-phase AC motors, comprising:

[0042] The sampling module is used to sample the n-phase current i of an odd-phase AC motor. x DC bus voltage V dc And the rotor position angle θ; where x = a, b, c, ..., n-1, n;

[0043] The reference voltage acquisition module is used to convert the n-phase current into the dq coordinate system sampling current by coordinate transformation, control the motor by rotor flux orientation, and then transform the obtained dq axis reference voltage back to the n-phase coordinate system through coordinate inverse transformation to obtain the n-phase reference voltage.

[0044] The common-mode voltage suppression module is used to reduce the amplitude and frequency of the common-mode voltage by pulse phase shift cancellation. It injects a preset zero-sequence voltage into the n-phase reference voltage to achieve common-mode voltage reduction and constant amplitude control. It uses sawtooth carrier comparison PWM to realize asymmetric PWM, and finally achieves the reduction of common-mode voltage amplitude and frequency of the n-phase system.

[0045] Compared with the prior art, the present invention does not require additional hardware and can achieve common-mode voltage suppression of odd-phase motors by improving the software algorithm. It has strong versatility, can protect motor bearings, reduce system common-mode electromagnetic interference, and improve system reliability. Furthermore, the method proposed in this invention reduces the amplitude and frequency of common-mode voltage while also considering the improvement of system voltage utilization. The maximum modulation ratio can be the same as that of traditional SVPWM. Attached Figure Description

[0046] Figure 1 This is the topology and winding structure diagram of an odd-phase motor;

[0047] Figure 2 This is a flowchart of the common-mode voltage general suppression method of the present invention;

[0048] Figure 3 The common-mode voltage universal suppression method of the present invention relates to a signal flow diagram;

[0049] Figure 4(a) shows the relationship between the zero-sequence voltage and the common-mode voltage waveform of a five-phase motor.

[0050] Figure 4(b) shows the relationship between the zero-sequence voltage and the common-mode voltage waveform of the seven-phase motor.

[0051] Figure 5(a) is an example of the common-mode voltage waveform of a five-phase motor under traditional SVPWM.

[0052] Figure 5(b) shows an example of common-mode voltage amplitude suppression for a five-phase motor under pulse phase shifting alignment.

[0053] Figure 6(a) is an example of the common-mode voltage waveform of a five-phase motor under traditional SVPWM.

[0054] Figure 6(b) shows an example of common-mode voltage amplitude suppression for a five-phase motor under pulse phase shifting alignment.

[0055] Figure 7 This represents the maximum modulation ratio of the three common-mode voltage rejection modes of this invention;

[0056] Figure 8 This is a schematic diagram of the PWM generation using a sawtooth carrier wave in this invention. Detailed Implementation

[0057] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0058] The odd-phase motor topology and winding structure diagram used in this invention are shown below. Figure 1 As shown, the odd-numbered phase windings are a, b, c, ..., n-1, n, and all are connected in a Y-type configuration; O is the neutral point of the DC power supply, and N is the neutral point of the motor windings; the bridge arm output voltage is v. x (x = a, b, c, ..., n-1, n), corresponding to V dc / 2 and -V dc / 2, the bridge arm output current is i x (x = a, b, c, ..., n-1, n).

[0059] like Figure 2 As shown, this invention provides a universal common-mode voltage suppression method for odd-phase AC motors, comprising the following steps:

[0060] Step 1: Sample the n-phase current i of the odd-phase AC motor x (x = a, b, c, ..., n-1, n), DC bus voltage V dc And the rotor position angle θ.

[0061] Step 2: Convert the n-phase variables into dq coordinate system variables using coordinate transformation, control the motor through rotor flux orientation, and then convert the obtained dq axis reference voltage back to the n-phase coordinate system through inverse coordinate transformation to obtain the n-phase reference voltage.

[0062] Step 3: Reduce the amplitude and frequency of the common-mode voltage by pulse phase shift cancellation. Inject a preset zero-sequence voltage into the n-phase reference voltage to achieve common-mode voltage reduction and constant amplitude control. The magnitude of the zero-sequence voltage is taken into account to improve voltage utilization.

[0063] Step 4: Use sawtooth carrier comparison PWM to realize asymmetric PWM, and finally reduce the common mode voltage amplitude and frequency of the n-phase system.

[0064] The specific implementation method for step two is as follows:

[0065] The sampled current signal undergoes a vector space decoupling transformation, and Equation (1) illustrates the decoupling transformation principle. Any parameter X (X = u, I, ψ…) of an odd-phase motor can be decomposed into a new set of n variables using Equation (1), where… The fundamental wave and the (2nk±1)th harmonic are mapped onto the α-β plane, and the (2nk±(2l±1))th harmonic is mapped onto the x-β plane. 2l+1 -y 2l+1 A plane, where k = 1, 2, 3…, l = 1, 2, … (n-3) / 2.

[0066]

[0067] Equation (1) allows for the vector decomposition of the n-phase sampled currents, thereby obtaining the two-phase stationary coordinate system currents i. α and i β Then, the stationary two-phase coordinate system is transformed into the rotating orthogonal coordinate system dq using equation (2).

[0068]

[0069] The common-mode voltage suppression method for odd-phase AC motors of the present invention can be used for both synchronous and asynchronous motors. Figure 3 This is a system signal control diagram using an asynchronous motor as an example. The motor employs traditional rotor flux orientation control, including an outer flux loop, an outer speed loop, and an inner current loop. The outer flux loop obtains the reference current i along the d-axis. * d The outer ring of rotational speed obtains the q-axis reference current i. * q The inner current loop obtains the reference voltage u along the dq axis. * d and u * d Then, the n-phase reference voltage is obtained through the coordinate inverter, and the n-phase PWM signal of the control system is obtained through the common-mode voltage suppression algorithm.

[0070] The specific implementation method for step three is as follows:

[0071] According to equation (1), in order to suppress the additional losses caused by harmonic voltages, the modulation wave of the n-phase voltage should only contain the fundamental voltage and the zero-sequence voltage. When the modulation ratio m is defined as the fundamental voltage relative to V... dc When the ratio is 1 / 2, the modulation wave of the n-phase motor is as shown in equation (3), where u z Zero-sequence voltage:

[0072]

[0073] The relationship between duty cycle and modulation ratio satisfies d x =(u x +1)*0.5, then the sum of the high-level duty cycles of the n phases is d sum+ The sum of the low-level duty cycle and d sum- They are respectively:

[0074]

[0075] As shown in (4), the sum of the duty cycles of the high and low levels is affected by the zero-sequence voltage u. z The only decision. Equation (5) defines the common-mode voltage of an n-phase motor, where the switching function S i When = 1, the output is high level, and the switching function S i When the value is -1, the output is low. Since the bridge arm output voltage can only be V... dc / 2 and -V dc / 2, therefore the common-mode voltage waveform of the system is a step waveform. The sum of the switching functions satisfies Therefore, the maximum peak value of the common-mode voltage is ±V. dc / 2, the minimum peak value of the common-mode voltage is ±V dc / 2n.

[0076]

[0077] If the high-level pulses are connected end-to-end according to the winding sequence, the low-level pulses will also be connected end-to-end accordingly. After all pulses are connected end-to-end, the common-mode voltage peak value will be the minimum peak value, and the common-mode voltage will only operate once per switching cycle. As shown in Figures 4(a) and 4(b), when all pulses are connected end-to-end, the common-mode voltage peak value of both five-phase and seven-phase motors is only the minimum peak value ±V. dc / 2n, and it only pulses once per switching cycle, and the common-mode voltage waveform is also uniquely determined by the zero-sequence voltage. In order to minimize the peak value of the common-mode voltage, the zero-sequence voltage u z The range of values ​​for is:

[0078]

[0079] When the zero-sequence voltage u z When equation (6) is satisfied, the common-mode voltage amplitude reaches its minimum after the pulse shift phase is aligned.

[0080] The steps to reduce the peak common-mode voltage are as follows:

[0081] 4. Limit the zero-sequence voltage of the n-phase motor to satisfy equation (6) and control the zero-sequence voltage to improve the maximum modulation ratio.

[0082] 5. Arrange the pulses of all phases in the winding order, and use the maximum duty cycle as the pulse alignment start point.

[0083] 6. Align the falling edge of the current pulse with the rising edge of the next pulse, and connect them end-to-end in sequence.

[0084] Ultimately, the shifts of all pulses are aligned.

[0085] Figures 5(a) and 5(b) compare the common-mode voltage waveforms of a five-phase motor using traditional SVPWM and pulse phase shifting, respectively. In the traditional SVPWM of Figure 5(a), all pulses are centered and aligned, and the common-mode voltage amplitude ranges from -V dc / 2 step transformation to V dc / 2, the maximum peak value of the common-mode voltage appears at the two zero-voltage vectors. In Figure 5(b), the five-phase pulses are connected in the winding sequence, and the pulse phase shifting steps are as follows: ① Starting with the a-phase pulse, align the rising edge of the b-phase pulse with its falling edge; ② Compare the rising edge of the c-phase pulse with the falling edge of the b-phase pulse; ③ Compare the rising edge of the d-phase pulse with the falling edge of the c-phase pulse; ④ Compare the rising edge of the d-phase pulse with the falling edge of the d-phase pulse; ⑤ End the phase shifting at the falling edge of the d-phase pulse. After all pulses are phase shifted and aligned, the duty cycle of the minimum positive peak value of the common-mode voltage is given by equation (4) where d sum+ The negative minimum peak duty cycle of the common-mode voltage is given by d in equation (4). sum-In one switching cycle, the positive and negative minimum peak values ​​switch only once. Figures 6(a) and 6(b) are comparison diagrams of common-mode voltage of the traditional SVPWM algorithm and the pulse phase shifting alignment method, respectively, taking a seven-phase motor as an example. Both the seven-phase motor and the five-phase motor follow the same pulse phase shifting method, so the common-mode voltage is reduced to the minimum peak value, and the common-mode voltage peak value switches only once in one switching cycle.

[0086] Based on the common-mode voltage waveforms in Figures 4(a) and 4(b), it can be seen that there are three modes of common-mode voltage suppression methods that can be obtained from zero-sequence voltage: CMVR1, CMVR2, and CMVR3. CMVR1 refers to the common-mode voltage amplitude being the minimum positive and negative amplitude, i.e., ±V. dc / 2n, and it only changes once in one switching cycle; CMVR2 refers to the minimum amplitude that controls the common-mode voltage to remain constant and positive, i.e., V dc / 2n; CMVR3 refers to the minimum amplitude that controls the common-mode voltage to remain constant and negative, i.e., -V dc / 2n. Define u max and u min Let the maximum and minimum modulation ratios of the n-phase motor be respectively. Then, the zero-sequence voltages for the three common-mode voltage amplitude reduction modes are:

[0087]

[0088] Among them, u osum The sum of the fundamental voltages in the modulated signal, and the zero-sequence voltage u SVM Satisfy u SVM =-0.5(u max +u min ).

[0089] Define M max This represents the maximum modulation ratio in the three modes. The modulation ratio is defined by the phase voltage relative to V. dc The ratio of / 2, then M max As shown in equation (8), and the relationship between the three maximum modulation ratios and the number of phases is presented in... Figure 7 Draw in the middle.

[0090]

[0091] The method for generating the sawtooth carrier comparison PWM in step four is as follows:

[0092] Because the pulses are no longer symmetrical after phase shifting, it becomes difficult to implement using traditional triangular carrier comparison PWM. This invention proposes a sawtooth carrier PWM, the implementation method of which is as follows: Figure 8 As shown. First, the rising edge R of each pulse is calculated using the phase shifting alignment method. x and falling edge F x Location, according to R x and Fx The magnitude is selected as either a high level in the middle or high levels on both sides, and then... Figure 8 After comparing the sawtooth carrier signals, the control signals PWM1-n for the n-phase motor can be obtained. This ultimately achieves common-mode voltage amplitude and frequency suppression for the system.

[0093] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A universal method for suppressing common-mode voltage in an odd-phase AC motor, characterized in that, Includes the following steps: Step 1: Sample the n-phase current of the odd-phase AC motor i x DC bus voltage V dc and rotor position angle θ ; in, x= a,b,c,…,n-1,n ; Step 2: The n-phase current is converted into the dq coordinate system sampling current by coordinate transformation. The motor is controlled by rotor flux orientation. The rotor flux orientation motor control includes flux outer loop, speed outer loop and current inner loop control. The obtained dq axis reference voltage is then converted to the n-phase coordinate system by coordinate inverse transformation to obtain the n-phase reference voltage. in φ=2π / n ; Step 3: Reduce the amplitude and frequency of the common-mode voltage by pulse phase shift cancellation. Inject a preset zero-sequence voltage into the n-phase reference voltage to achieve common-mode voltage reduction and constant amplitude control. The pulse phase shift cancellation includes: aligning the high level of the PWM signal of phase a to the center according to the winding sequence, shifting the phase of the PWM pulse of phase b to align the rising edge of phase b with the falling edge of phase a, and shifting the phases sequentially to align the rising edge of the remaining phase PWM pulse with the falling edge of the previous phase. Step 4: Use sawtooth carrier comparison PWM to realize asymmetric PWM, and finally reduce the common mode voltage amplitude and frequency of the n-phase system.

2. The method according to claim 1, characterized in that, The coordinate transformation method in step two is as follows: 。 3. The method according to claim 1, characterized in that, In step two, the reference current i along the d-axis is obtained from the outer loop of the magnetic flux linkage. * d The outer ring of rotational speed obtains the q-axis reference current i. * q The inner current loop obtains the reference voltage u along the dq axis. * d and u * d Then, the n-phase reference voltage is obtained through the coordinate inverter, and the n-phase PWM signal of the control system is obtained through the common-mode voltage suppression algorithm.

4. A universal common-mode voltage suppression system for odd-phase AC motors, characterized in that, include: The sampling module is used to sample the n-phase current of an odd-phase AC motor. i x DC bus voltage V dc and rotor position angle θ ; in, x=a,b,c,…,n-1,n ; The reference voltage acquisition module is used to convert the n-phase current into the dq coordinate system sampling current by coordinate transformation, and to control the motor by rotor flux orientation. The rotor flux orientation control of the motor includes flux outer loop, speed outer loop and current inner loop control. The obtained dq axis reference voltage is then transformed back to the n-phase coordinate system by coordinate inverse transformation to obtain the n-phase reference voltage. in φ=2π / n ; The common-mode voltage suppression module is used to reduce the amplitude and frequency of the common-mode voltage through pulse phase shift cancellation. A preset zero-sequence voltage is injected into the n-phase reference voltage to achieve common-mode voltage reduction and constant amplitude control. A sawtooth carrier comparison PWM is used to realize asymmetric PWM, ultimately reducing the amplitude and frequency of the common-mode voltage of the n-phase system. The pulse phase shift cancellation includes: centering the high level of the PWM signal of phase a according to the winding sequence, shifting the phase of the PWM pulse of phase b so that the rising edge of phase b is aligned with the falling edge of phase a, and shifting the phases sequentially so that the rising edge of each remaining phase PWM is aligned with the falling edge of the previous phase.

5. The system according to claim 4, characterized in that, The coordinate transformation is as follows: 。 6. The system according to claim 4, characterized in that, The outer loop of the magnetic flux obtains the reference current i along the d-axis. * d The outer ring of rotational speed obtains the q-axis reference current i. * q The inner current loop obtains the reference voltage u along the dq axis. * d and u * d Then, the n-phase reference voltage is obtained through the coordinate inverter, and the n-phase PWM signal of the control system is obtained through the common-mode voltage suppression algorithm.

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