Synchronization method, apparatus and device for non-coherent spread spectrum and storage medium

Abstract

Embodiments of the present application provide a non-coherent spread spectrum synchronization method, device, equipment and storage medium, the method comprising: obtaining the synchronization capture result corresponding to the received signal; determining the target local pseudo code aligned with the pseudo code phase of the received signal and the target signal having the maximum correlation with the target local pseudo code by the pseudo code tracking loop; adjusting the integration start and end time of the early gate integrator / late gate integrator in the bit synchronization loop until it is aligned with the start and end time of the symbol in the received signal to complete the lock, and output the in-phase and quadrature signal components; determining the phase word corresponding to the phase error of the in-phase and quadrature signal components and adjusting the phase error based on the carrier synchronization loop until the carrier synchronization loop determines that the phase discrimination result is 0 degrees or 180 degrees, and obtaining the synchronization result of the received signal. The method provided by the present application is simple to implement, strong in portability, stable and reliable, and suitable for signal synchronization tracking in satellite communication systems with fixed bandwidth and variable data rate.

Description

Technical Field

[0001] This invention relates to the field of satellite communication technology, and in particular to a noncoherent spread spectrum synchronization method, apparatus, device, and storage medium. Background Technology

[0002] Spread spectrum systems are widely used in global navigation satellite systems and aerospace telemetry and control due to their strong anti-interference capabilities, low interception rate, strong concealment, and code division multiple access (CDMA) capability. Direct sequence spread spectrum can be divided into coherent direct sequence spread spectrum and incoherent direct sequence spread spectrum. In incoherent spread spectrum, the spreading code (pseudocode) and data are driven by two non-coherent clocks. Compared with coherent spread spectrum, there is no fixed relationship between the phase of the spreading code and the phase of the data. Therefore, the limitation of the pseudocode period on the data rate can be removed. Theoretically, incoherent spread spectrum systems can be compatible with any data rate. The independence between the pseudocode phase and the data phase in an incoherent spread spectrum system makes incoherent spread spectrum have a wider range of applications than coherent spread spectrum.

[0003] Incoherent spread spectrum signals have advantages such as strong anti-interference capability, low interception, code division multiple access capability, and flexible data rate adjustment according to service requirements. However, due to the randomness of the relative relationship between the data bit transition edge and the pseudo-code phase in the received signal, a coherent integration interval may contain data bit polarity transitions. Data bit polarity transitions can cause positive and negative data to cancel each other out during coherent accumulation, resulting in a deterioration and reduction of the correlation peak-to-peak value and the appearance of a split double-peak phenomenon. Furthermore, the relationship between the pseudo-code phase and the symbol transition edge is unclear in incoherent spread spectrum systems. Traditional incoherent spread spectrum systems do not provide a synchronization scheme to solve the problem of data bit transitions occurring within an integration interval (one pseudo-code period).

[0004] Therefore, determining the pseudocode phase and bit synchronization of the symbol transition edge in noncoherent spread spectrum systems has become a technical problem that urgently needs to be solved in the industry. Summary of the Invention

[0005] In view of the technical problems existing in the prior art, the present invention provides a noncoherent spread spectrum synchronization method, apparatus, device and storage medium.

[0006] In a first aspect, the present invention provides a synchronization method for noncoherent spread spectrum, comprising:

[0007] Obtain the synchronization acquisition result corresponding to the received signal, and use it as the first signal;

[0008] Based on the first signal and the pseudocode tracking loop, a target local pseudocode that is phase-aligned with the pseudocode of the received signal and a target signal that has the greatest correlation with the target local pseudocode are determined; the target signal is any signal in the candidate signal set, which includes the leading signal, the instantaneous signal and the lagging signal generated by the pseudocode tracking loop corresponding to the first signal;

[0009] Based on the target signal and the bit synchronization loop, adjust the start and end times of integration of the early gate integrator / late gate integrator in the bit synchronization loop until the start and end times of integration are aligned with the start and end times of the symbols in the received signal to complete the locking, and output in-phase signal components and quadrature signal components.

[0010] Based on the in-phase signal component, the quadrature signal component, and the carrier synchronization loop, the phase word corresponding to the phase error of the in-phase signal component and the quadrature signal component is determined, and the phase error is adjusted until the carrier synchronization loop determines the phase detection result to be 0 degrees or 180 degrees, thereby completing the locking and obtaining the synchronization result of the received signal.

[0011] Optionally, determining the target local pseudocode phase-aligned with the received signal and the target signal having the greatest correlation with the target local pseudocode based on the first signal and the pseudocode tracking loop includes:

[0012] Based on a preset oversampling factor, the first signal is oversampled to obtain the second signal;

[0013] Based on the second signal and the code length corresponding to the second signal, multiple leading signals, multiple lagging signals and instantaneous signals corresponding to the second signal are generated as candidate signals;

[0014] Based on the local pseudocode signal, the despreading signal corresponding to each candidate signal is determined; the local pseudocode signal is a pseudocode signal generated by the pseudocode generator based on the initial value of the pseudocode phase corresponding to the first signal, and the number of pseudocode signals is the same as that of the candidate signals.

[0015] Each symbol in the despread signal is divided into two half-symbols, and coherent accumulation of the half-symbols is performed, as well as incoherent accumulation of the odd-numbered segments corresponding to the first half-symbol and incoherent accumulation of the even-numbered segments corresponding to the second half-symbol, to obtain the accumulation result corresponding to each despread signal.

[0016] Based on the cumulative results corresponding to each of the despread signals, the despread signal corresponding to the cumulative result with the largest value is determined to be a signal that is phase-synchronized with the first signal, and is used as the target signal.

[0017] Optionally, the step of adjusting the integration start and end times of the early gate integrator / late gate integrator in the bit synchronization loop based on the target signal and the bit synchronization loop, until the integration start and end times are aligned with the start and end times of the symbols in the received signal to complete the locking, and outputting in-phase signal components and quadrature signal components, includes:

[0018] An early-gate integrator and a late-gate integrator are used to integrate the energy of the first half of the symbol and the energy of the second half of the symbol in the target signal, respectively, to determine the early-gate integration result and the late-gate integration result, which are then used as the output in-phase signal component and the quadrature signal component.

[0019] Bit error identification is performed on the early gate integration result and the late gate integration result to obtain the bit synchronization error;

[0020] The bit synchronization error is filtered to obtain the filtered bit synchronization error;

[0021] Based on the phase accumulation result of the filtered bit synchronization error, the start and end times of integration of the early gate integrator and the late gate integrator are adjusted until the start and end times of integration are aligned with the start and end times of each symbol in the target signal, and the output in-phase signal component and the quadrature signal component are updated.

[0022] Optionally, the step of using an early-gate integrator and a late-gate integrator to integrate the energy of the first half of the symbol and the energy of the second half of the symbol in the target signal, respectively, to determine the early-gate integration result and the late-gate integration result, includes:

[0023] Obtain the start and end times of integration for the early gate integrator and the late gate integrator, as well as the number of accumulated points and the truncation bit width;

[0024] Based on the start and end times of integration and the number of accumulated points of the symbols, the early gate integrator and the late gate integrator are used respectively to coherently accumulate the first half and the second half of each symbol in the target signal to determine the early gate integration result and the late gate integration result.

[0025] According to the truncation width, the early gate integration result and the late gate integration result are truncated to obtain the in-phase signal component and the quadrature signal component;

[0026] The number of accumulated symbol points and the truncation width are controlled by the symbol rate control module, which adjusts the truncation width according to the symbol rate of the target signal.

[0027] Optionally, adjusting the integration start and end times of the early gate integrator and the late gate integrator based on the phase accumulation result of the filtered bit synchronization error, until the integration start and end times are aligned with the start and end times of each symbol in the target signal, and updating the output in-phase signal component and the quadrature signal component, includes:

[0028] Based on a preset amplitude threshold, the amplitude of the filtered bit synchronization error is adjusted to obtain a third signal; the third signal is the result of filtering and amplitude adjustment of the bit synchronization error.

[0029] Based on the third signal and the preset adjustment rule, the integration clock adjustment parameters for the integration start and end times of the early gate integrator and the late gate integrator are determined; the preset adjustment rule is used to represent the correspondence between the third signal and the integration clock adjustment parameters when the symbol rate of the first signal is different.

[0030] Based on the integration clock adjustment parameter, adjust the integration start and end times of the early gate integrator and the late gate integrator until the integration start and end times are aligned with the start and end times of each symbol in the target signal.

[0031] Based on the adjusted start and end times of integration, as well as the early gate integrator and the late gate integrator, the updated in-phase signal component and the quadrature signal component are determined.

[0032] Optionally, the step of determining the phase word corresponding to the phase error of the in-phase signal component and the quadrature signal component based on the in-phase signal component, the quadrature signal component, and the carrier synchronization loop, adjusting the phase error until the carrier synchronization loop determines the phase detection result to be 0 degrees or 180 degrees, completing the locking, and obtaining the synchronization result of the received signal includes:

[0033] Phase discrimination is performed on the in-phase signal component and the quadrature signal component to determine the phase error between the in-phase signal component and the quadrature signal component;

[0034] The phase error is filtered to obtain the filtered phase error;

[0035] Based on the phase accumulation result of the filtered phase error, the frequency offset estimate corresponding to the filtered phase error is determined;

[0036] Based on the frequency offset estimate, frequency offset correction is performed on the in-phase signal component and the quadrature signal component until the filtered phase error is 0 degrees or 180 degrees.

[0037] Optionally, the step of performing phase discrimination on the in-phase signal component and the quadrature signal component to determine the phase error between the in-phase signal component and the quadrature signal component includes:

[0038] Based on the arctangent phase detection algorithm, the phase error of the in-phase signal component and the quadrature signal component is determined;

[0039] The phase error is

[0040] Among them, e kLet I(k) represent the phase error at time k, I(k) represent the in-phase signal component at time k, and Q(k) represent the quadrature signal component at time k.

[0041] Secondly, the present invention also provides a noncoherent spread spectrum synchronization device, comprising:

[0042] The acquisition module is used to acquire the synchronization acquisition result corresponding to the received signal, which is used as the first signal;

[0043] The pseudocode tracking module is used to determine, based on the first signal and the pseudocode tracking loop, a target local pseudocode that is phase-aligned with the pseudocode of the received signal, and a target signal that has the greatest correlation with the target local pseudocode; the target signal is any signal in a candidate signal set, which includes a leading signal, an instantaneous signal, and a lagging signal generated by the pseudocode tracking loop corresponding to the first signal;

[0044] The bit synchronization module is used to adjust the start and end times of integration of the early gate integrator / late gate integrator in the bit synchronization loop based on the target signal and the bit synchronization loop, until the start and end times of integration are aligned with the start and end times of the symbols in the received signal to complete the locking, and output in-phase signal components and quadrature signal components.

[0045] The carrier synchronization module is used to determine the phase word corresponding to the phase error of the in-phase signal component and the quadrature signal component based on the in-phase signal component, the quadrature signal component and the carrier synchronization loop, adjust the phase error until the carrier synchronization loop determines the phase detection result to be 0 degrees or 180 degrees, complete the locking, and obtain the synchronization result of the received signal.

[0046] Thirdly, the present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the noncoherent spread spectrum synchronization method described in the first aspect above.

[0047] Fourthly, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the non-coherent spread spectrum synchronization method as described in the first aspect above.

[0048] Fifthly, the present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the noncoherent spread spectrum synchronization method as described in the first aspect above.

[0049] The noncoherent spread spectrum synchronization method, apparatus, device, and storage medium provided by this invention generate a candidate signal set consisting of leading, instantaneous, and lagging signals corresponding to the synchronization acquisition result of the received signal through a pseudocode tracking loop, and determine a local pseudocode that is phase-aligned with the pseudocode of the received signal. Simultaneously, a target signal with the highest correlation to the target local pseudocode is selected from the candidate signal set. Based on a bit synchronization loop, the half-symbol accumulation result between phases is determined, and the integration interval of the accumulation is adjusted to achieve symbol synchronization between the received signal and the pseudocode. Based on a carrier synchronization loop, the carrier of the received signal is synchronized. Through the combined action of the pseudocode tracking loop, bit synchronization loop, and carrier synchronization loop, the noncoherent spread spectrum synchronization method provided by this invention overcomes the influence of data bit transitions in the received signal, achieving faster synchronization. It is simple to implement, highly portable, stable, and reliable, and is particularly suitable for signal synchronization tracking with fixed bandwidth and variable data rate in satellite communication systems. Attached Figure Description

[0050] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0051] Figure 1 This is a flowchart illustrating the synchronization method for noncoherent spread spectrum provided in an embodiment of the present invention.

[0052] Figure 2 This is a schematic diagram illustrating the implementation of the pseudocode tracking loop in the noncoherent spread spectrum synchronization method provided in this embodiment of the invention.

[0053] Figure 3 This is a schematic diagram of the 11-channel signal provided in an embodiment of the present invention;

[0054] Figure 4 This is one of the schematic diagrams of the bit synchronization loop in the non-coherent spread spectrum synchronization method provided in the embodiments of the present invention;

[0055] Figure 5 This is the second schematic diagram of the implementation of the synchronization loop in the non-coherent spread spectrum synchronization method provided in this embodiment of the invention;

[0056] Figure 6 This is one of the schematic diagrams illustrating the implementation of the carrier synchronization loop in the noncoherent spread spectrum synchronization method provided in this embodiment of the invention;

[0057] Figure 7 This is the second schematic diagram of the carrier synchronization loop implementation in the noncoherent spread spectrum synchronization method provided in this embodiment of the invention;

[0058] Figure 8 This is a schematic diagram of the structure of the noncoherent spread spectrum synchronization device provided in an embodiment of the present invention;

[0059] Figure 9 This is a schematic diagram of the physical structure of the electronic device provided in an embodiment of the present invention. Detailed Implementation

[0060] In this embodiment of the invention, the term "and / or" describes the relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. The character " / " generally indicates that the preceding and following associated objects have an "or" relationship.

[0061] In this embodiment of the invention, the term "multiple" refers to two or more, and other quantifiers are similar.

[0062] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0063] Figure 1 This is a flowchart illustrating the synchronization method for noncoherent spread spectrum provided in an embodiment of the present invention, as shown below. Figure 1 As shown, the method includes:

[0064] Step 101: Obtain the synchronization acquisition result corresponding to the received signal, and use it as the first signal;

[0065] Step 102: Based on the first signal and the pseudocode tracking loop, determine the target local pseudocode that is phase-aligned with the pseudocode of the received signal, and the target signal that has the greatest correlation with the target local pseudocode; the target signal is any signal in the candidate signal set, which includes the leading signal, the instantaneous signal, and the lagging signal generated by the pseudocode tracking loop corresponding to the first signal;

[0066] Step 103: Based on the target signal and the bit synchronization loop, adjust the start and end times of integration of the early gate integrator / late gate integrator in the bit synchronization loop until the start and end times of integration are aligned with the start and end times of the symbols in the received signal to complete the locking, and output the in-phase signal component and the quadrature signal component.

[0067] Step 104: determining, based on the in-phase signal component, the quadrature signal component and a carrier synchronization loop, a phase word corresponding to the phase error of the in-phase signal component and the quadrature signal component, adjusting the phase error until the phase discrimination result determined by the carrier synchronization loop is 0 degrees or 180 degrees to complete locking, and obtaining a synchronization result of the received signal.

[0068] Specifically, after a spread spectrum system receives a signal transmitted by an opposite end, it performs synchronous acquisition on the received signal to obtain a synchronous acquisition result corresponding to the received signal, that is, a first signal.

[0069] The pseudo-code tracking loop provided by the present invention expands the first signal, and based on the first signal, generates multiple early signals and multiple late signals of the first signal according to different time delays. For example, with 1 / P of the code length of the first signal as a time delay, Q early signals and Q late signals are generated, where Q < P, and both P and Q are positive integers. In this way, 2Q+1 candidate signals are obtained, and the pseudo-code phases corresponding to the candidate signals are the same. Then, each candidate signal is despread according to local pseudo-codes, and for each despread candidate signal, one candidate signal having the maximum correlation with the local pseudo-code is determined as the current channel, that is, a local pseudo-code aligned with the pseudo-code phase of the received signal is determined as the target local pseudo-code, and the candidate signal corresponding to the local pseudo-code is determined as the target signal. The screened target signal is input into a bit synchronization loop for bit synchronization of the received signal.

[0070] After the bit synchronization loop receives the target signal, each symbol of the target signal is divided into two half-symbols, which are accumulated (integrated) by an early gate integrator and a late gate integrator in the bit synchronization loop respectively, to determine the energy corresponding to the first half symbol and the energy corresponding to the second half symbol, further determine the bit error existing between the two, and adjust the start and end time of the integration processing of the early gate integrator and the late gate integrator until the integration start and end time of the early gate integrator and the late gate integrator are aligned with the start and end time corresponding to each symbol, that is, the synchronization between the starting chip edge of the pseudo-code period and the symbol bit transition edge of the symbols in the target signal is realized, which means that symbol synchronization (bit synchronization) is completed. Then the in-phase signal component and quadrature signal component after bit synchronization are output to the carrier synchronization loop.

[0071] After receiving the in-phase and quadrature signal components, the carrier synchronization loop determines the phase error between them using a phase discriminator. This error is then filtered to remove high-frequency components and noise, eliminating interference from invalid signals. The carrier phase accumulator (carrier NCO) in the carrier synchronization loop then determines the phase word corresponding to the filtered phase error. Based on this phase word, the phase error is adjusted until the carrier synchronization loop determines the phase discriminator result to be 0 degrees or 180 degrees, completing the lock and obtaining the synchronization result of the received signal.

[0072] The synchronization method for uncorrelated spread spectrum provided by this invention features a pseudocode tracking loop, a bit synchronization loop, and a carrier synchronization loop that are serially interconnected and independent of each other, reducing the coupling between units. After each unit locks the result, it is sequentially transmitted to the next level unit for processing, resulting in fast convergence and high stability.

[0073] The noncoherent spread spectrum synchronization method provided by this invention generates a candidate signal set consisting of a leading signal, an instantaneous signal, and a lagging signal corresponding to the synchronization acquisition result of the received signal through a pseudocode tracking loop, and determines a local pseudocode that is phase-aligned with the pseudocode of the received signal. Simultaneously, it selects a target signal with the highest correlation to the target local pseudocode from the candidate signal set. Based on a bit synchronization loop, it determines the interphase half-symbol accumulation result and adjusts the integration interval of the accumulation to achieve symbol synchronization between the received signal and the pseudocode. Based on a carrier synchronization loop, it synchronizes the carrier of the received signal. Through the combined action of the pseudocode tracking loop, the bit synchronization loop, and the carrier synchronization loop, the noncoherent spread spectrum synchronization method provided by this invention overcomes the influence of data bit transitions in the received signal, achieving faster synchronization. It is simple to implement, highly portable, stable, and reliable, and is particularly suitable for signal synchronization tracking with fixed bandwidth and variable data rate in satellite communication systems.

[0074] Optionally, determining the target local pseudocode phase-aligned with the received signal and the target signal having the greatest correlation with the target local pseudocode based on the first signal and the pseudocode tracking loop includes:

[0075] Based on a preset oversampling factor, the first signal is oversampled to obtain the second signal;

[0076] Based on the second signal and the code length corresponding to the second signal, multiple leading signals, multiple lagging signals and instantaneous signals corresponding to the second signal are generated as candidate signals;

[0077] Based on the local pseudocode signal, the despreading signal corresponding to each candidate signal is determined; the local pseudocode signal is a pseudocode signal generated by the pseudocode generator based on the initial value of the pseudocode phase corresponding to the first signal, and the number of pseudocode signals is the same as that of the candidate signals.

[0078] Each symbol in the despread signal is divided into two half-symbols, and coherent accumulation of the half-symbols is performed, as well as incoherent accumulation of the odd-numbered segments corresponding to the first half-symbol and incoherent accumulation of the even-numbered segments corresponding to the second half-symbol, to obtain the accumulation result corresponding to each despread signal.

[0079] Based on the cumulative results corresponding to each of the despread signals, the despread signal corresponding to the cumulative result with the largest value is determined to be a signal that is phase-synchronized with the first signal, and is used as the target signal.

[0080] Specifically, Figure 2 This is a schematic diagram illustrating the implementation of the pseudocode tracking loop in the noncoherent spread spectrum synchronization method provided in this embodiment of the invention. Figure 2 As shown, after receiving the first signal, the pseudocode tracking loop oversamples the first signal according to a preset oversampling factor and combines it with M symbols to obtain the oversampled first signal, i.e., the second signal. Oversampling is to improve tracking accuracy; naturally, the higher the oversampling factor, the better. However, a higher oversampling factor requires more resources for implementation. A preset oversampling factor of 8 is usually an empirical value. The M symbols represent the number of symbols coherently accumulated.

[0081] Next, based on the second signal and its corresponding code length, multiple lead signals, multiple lag signals, and instantaneous signals corresponding to the second signal are generated as candidate signals. For example, if the clock rate corresponding to the first signal is 163.76MHz and the chip rate is 81.88 megachips per second (Mcps), then the clock rate corresponding to the second signal is also 163.76MHz and the chip rate is 81.88Mcps. The following description mainly uses 8x oversampling as an example. The generated multiple lead signals may be 6, 5, or 4, and similarly, the multiple lag signals may also be 6, 5, or 4. The number of multiple lead signals and multiple lag signals can be generated according to specific needs and hardware support capabilities. For example, in a pseudocode tracking loop, 11 parallel candidate signals are generated, including the second signal (the oversampled first signal) and the multiple lead signals and multiple lag signals corresponding to the second signal. Figure 3 This is a schematic diagram of the 11-channel signal provided in an embodiment of the present invention.

[0082] Using a pseudocode generator, multiple pseudocode signals with the same phase are generated based on the initial pseudocode phase value corresponding to the first signal, and the number of pseudocode signals is the same as the number of candidate signals. Each candidate signal is then despread based on these pseudocode signals, and each candidate signal corresponds to a despreading result, i.e., a despread signal.

[0083] The despread signal is sent to the half-symbol coherent accumulation module. This module divides each symbol of the received data signal into a first half and a second half, accumulating the data according to the length of each half. The accumulated result is then divided into two parts for incoherent accumulation: the odd-numbered segments corresponding to the first half and the even-numbered segments corresponding to the second half. The MAX module compares the results of the two incoherent accumulations and outputs the larger value. The peak decision module compares the magnitudes of the 11 signals and feeds back the branch number containing the maximum value to the pseudo-code generator. The pseudo-code generator adjusts the code phase of its local pseudo-code based on the feedback result, thus selecting the signal synchronized with the first signal phase as the target signal, i.e., the despread signal (data) of the current channel. Dividing each symbol of the data signal into a first half and a second half and performing segmented coherent accumulation on both halves results in a segment without data bit transitions. Therefore, this invention selects the larger value for output to ensure that the odd or even segments are not affected by incoherent data bit modulation.

[0084] Optionally, the step of adjusting the integration start and end times of the early gate integrator / late gate integrator in the bit synchronization loop based on the target signal and the bit synchronization loop, until the integration start and end times are aligned with the start and end times of the symbols in the received signal to complete the locking, and outputting in-phase signal components and quadrature signal components, includes:

[0085] An early-gate integrator and a late-gate integrator are used to integrate the energy of the first half of the symbol and the energy of the second half of the symbol in the target signal, respectively, to determine the early-gate integration result and the late-gate integration result, which are then used as the output in-phase signal component and the quadrature signal component.

[0086] Bit error identification is performed on the early gate integration result and the late gate integration result to obtain the bit synchronization error;

[0087] The bit synchronization error is filtered to obtain the filtered bit synchronization error;

[0088] Based on the phase accumulation result of the filtered bit synchronization error, the start and end times of integration of the early gate integrator and the late gate integrator are adjusted until the start and end times of integration are aligned with the start and end times of each symbol in the target signal, and the output in-phase signal component and the quadrature signal component are updated.

[0089] Specifically, the target signal obtained from the above screening, i.e., the despread data of the current channel, is integrated using an early-gate integrator and a late-gate integrator in the bit synchronization loop, respectively, to integrate the energy of the first half and the second half of each symbol in the target signal. That is, the first half of each symbol is input into the early-gate integrator, which integrates the energy of all the first half of the symbols to obtain the early-gate integration result. Similarly, the late-gate integrator integrates the energy of all the second half of the symbols to obtain the late-gate integration result. These early-gate and late-gate integration results are then used as the output in-phase signal component and the quadrature signal component. The early-gate and late-gate integrators are two identical integrators.

[0090] The bit synchronization error is obtained by using a bit error discriminator in the bit synchronization loop to discriminate the bit error between the early gate integration result and the late gate integration result. This bit synchronization error is then input into a bit loop filter, which filters out noise and high-frequency components, resulting in a filtered bit synchronization error. Next, the phase accumulator (bit synchronization NCO module) in the bit synchronization loop determines the phase accumulation result of the filtered bit synchronization error. Based on this phase accumulation result, the start and end times of integration for the early gate integrator and the late gate integrator are adjusted. Specifically, the integration clock generated by the phase accumulator is adjusted to control the start and end times of integration until these times are aligned with the start and end times of each symbol in the target signal. The output in-phase and quadrature signal components are then updated. For a detailed implementation process, please refer to [link to implementation details]. Figure 4 , Figure 4 This is one of the schematic diagrams of the bit synchronization loop in the noncoherent spread spectrum synchronization method provided in the embodiments of the present invention.

[0091] Optionally, the step of using an early-gate integrator and a late-gate integrator to integrate the energy of the first half of the symbol and the energy of the second half of the symbol in the target signal, respectively, to determine the early-gate integration result and the late-gate integration result, includes:

[0092] Obtain the start and end times of integration for the early gate integrator and the late gate integrator, as well as the number of accumulated points and the truncation bit width;

[0093] Based on the start and end times of integration and the number of accumulated points of the symbols, the early gate integrator and the late gate integrator are used respectively to coherently accumulate the first half and the second half of each symbol in the target signal to determine the early gate integration result and the late gate integration result.

[0094] According to the truncation width, the early gate integration result and the late gate integration result are truncated to obtain the in-phase signal component and the quadrature signal component;

[0095] The number of accumulated symbol points and the truncation width are controlled by the symbol rate control module, which adjusts the truncation width according to the symbol rate of the target signal.

[0096] Specifically, using an early gate integrator and a late gate integrator, the energy of the first half of the symbol and the energy of the second half of the symbol in the target signal are integrated, including:

[0097] Obtain the initial configuration of the integration start and end times of the early gate integrator and the late gate integrator, as well as the number of symbol accumulation points output by the symbol rate control module. Perform coherent accumulation on the first half and the second half of each symbol in the target signal according to the initial configuration of the integration start and end times to determine the early gate integration result and the late gate integration result. Similarly, obtain the truncation bit width output by the symbol rate control module, and perform truncation processing on the early gate integration result and the late gate integration result respectively to obtain the in-phase signal component and the quadrature signal component.

[0098] The sum of the accumulated points of the symbols corresponding to the early gate integration results is the quotient of the sampling rate of the target symbol and the symbol rate corresponding to the target symbol; the sum of the accumulated points of the symbols corresponding to the late gate integration results is the quotient of the sampling rate of the target symbol and the symbol rate corresponding to the target symbol.

[0099] The number of accumulated points and the truncation width are controlled by the symbol rate control module. The symbol rate control module adjusts the truncation width according to the symbol rate of the target signal. The truncation width specifically includes a truncation start bit and a bit width length. A higher symbol rate results in fewer accumulated points, leading to lower energy in the integral result of the target symbol. Therefore, the truncation width needs to be dynamically adjusted when the symbol rate changes. It is necessary to ensure that for every doubling of the symbol rate, the truncation start bit shifts one bit to the lower bit, while the bit width length remains unchanged. This keeps the energy of the integral result of the target symbol constant, ensuring that the amplitude of the target symbol remains unchanged at different rates, thus guaranteeing the stability of the pseudocode tracking loop, bit synchronization loop, and carrier synchronization loop.

[0100] In addition, the start and end times of integration of the early gate integrator and the late gate integrator can be adjusted according to the integration clock output by the bit synchronization NCO in the bit synchronization loop.

[0101] Optionally, adjusting the integration start and end times of the early gate integrator and the late gate integrator based on the phase accumulation result of the filtered bit synchronization error, until the integration start and end times are aligned with the start and end times of each symbol in the target signal, and updating the output in-phase signal component and the quadrature signal component, includes:

[0102] Based on a preset amplitude threshold, the amplitude of the filtered bit synchronization error is adjusted to obtain a third signal; the third signal is the result of filtering and amplitude adjustment of the bit synchronization error.

[0103] Based on the third signal and the preset adjustment rule, the integration clock adjustment parameters for the integration start and end times of the early gate integrator and the late gate integrator are determined; the preset adjustment rule is used to represent the correspondence between the third signal and the integration clock adjustment parameters when the symbol rate of the first signal is different.

[0104] Based on the integration clock adjustment parameter, adjust the integration start and end times of the early gate integrator and the late gate integrator until the integration start and end times are aligned with the start and end times of each symbol in the target signal.

[0105] Based on the adjusted start and end times of integration, as well as the early gate integrator and the late gate integrator, the updated in-phase signal component and the quadrature signal component are determined.

[0106] Specifically, after obtaining the signal after the above truncation processing, the bit error discriminator in the bit synchronization loop is input to obtain the bit synchronization error corresponding to the integration results of the early gate integrator and the late gate integrator. That is, the bit synchronization error is obtained by subtracting the integration result of the late gate integrator from the integration result of the early gate integrator.

[0107] The aforementioned bit synchronization error is input into the loop filter in the bit synchronization loop. The loop filter is set with a preset amplitude threshold. Based on the preset amplitude threshold, the amplitude of the aforementioned bit synchronization error is limited. The part with an amplitude greater than the preset amplitude threshold is changed to the preset amplitude threshold to avoid the adjustment step being too large due to noise, which would make the loop difficult to converge, thus obtaining the third signal.

[0108] For cases where the symbol rate of the first signal takes different values, the integration clock adjustment parameter is adjusted according to the different values ​​of the third signal. The bit synchronization error of the integration result obtained by the early gate integrator and the late gate integrator conforms to a certain rule or varies within a certain range, thereby obtaining the preset adjustment rule proposed in this invention.

[0109] Next, based on the preset adjustment rules and the aforementioned third signal, the integration clock adjustment parameters for the integration start and end times of the early-gate integrator and the late-gate integrator are determined. Then, based on these integration clock adjustment parameters, the integration start and end times of the early-gate integrator and the late-gate integrator are adjusted until the integration start and end times are aligned with the start and end times of each symbol in the target signal.

[0110] Assuming the third signal is represented by B, and the integral clock adjustment parameter is represented by C, the above preset adjustment rule can be expressed as:

[0111] If the current symbol rate is greater than 64 ksps, then C = B;

[0112] If the current symbol rate is ≤64ksps, calculate C according to the following steps:

[0113] If B ≥ 13, C = 4; if 9 ≤ B ≤ 12, C = 3; if 5 ≤ B ≤ 8, C = 2; if 3 ≤ B ≤ 4, C = 1; if -2 ≤ B ≤ 2, C = 0; if -4 ≤ B ≤ -3, C = -1; if -8 ≤ B ≤ -5, C = -2; if -12 ≤ B ≤ -9, C = -3; if B ≤ -13, C = -4.

[0114] Finally, based on the adjusted start and end times of the integration, and the early-gate integrator and the late-gate integrator, the updated in-phase signal component and the quadrature signal component are determined. For a detailed implementation process, please refer to [reference needed]. Figure 5 , Figure 5 This is the second schematic diagram of the implementation of the synchronization loop in the non-coherent spread spectrum synchronization method provided in this embodiment of the invention.

[0115] Optionally, the step of determining the phase word corresponding to the phase error of the in-phase signal component and the quadrature signal component based on the in-phase signal component, the quadrature signal component, and the carrier synchronization loop, adjusting the phase error until the carrier synchronization loop determines the phase detection result to be 0 degrees or 180 degrees, completing the locking, and obtaining the synchronization result of the received signal includes:

[0116] Phase discrimination is performed on the in-phase signal component and the quadrature signal component to determine the phase error between the in-phase signal component and the quadrature signal component;

[0117] The phase error is filtered to obtain the filtered phase error;

[0118] Based on the phase accumulation result of the filtered phase error, the frequency offset estimate corresponding to the filtered phase error is determined;

[0119] Based on the frequency offset estimate, frequency offset correction is performed on the in-phase signal component and the quadrature signal component until the filtered phase error is 0 degrees or 180 degrees.

[0120] Specifically, Figure 6 This is one of the schematic diagrams illustrating the implementation of the carrier synchronization loop in the noncoherent spread spectrum synchronization method provided in this embodiment of the invention, such as... Figure 6As shown, after bit synchronization of the received signal is completed through the bit synchronization loop, carrier synchronization is also required. Specifically, the phase discriminator in the carrier synchronization loop provided by this invention performs phase discrimination on the in-phase signal component and the quadrature signal component to determine the phase error between the in-phase signal component and the quadrature signal component.

[0121] The aforementioned phase error is input into the carrier loop filter in the carrier synchronization loop to filter out high-frequency components and noise, obtaining the filtered phase error. This carrier loop filter consists of two multipliers, one accumulator, and one adder. C1 and C2 are the coefficients of the carrier loop filter. In the implementation process, the high-order signal can be directly extracted without placing a multiplier unit. The filtered phase error, denoted as NCO_In, is input into the carrier NCO in the carrier synchronization loop for phase accumulation. The phase accumulation result is determined, and a Doppler residual frequency offset estimate is obtained. This phase accumulation result is used as the phase word, denoted as Theta. The Doppler residual frequency offset estimate is converted into the corresponding frequency word and input into the frequency offset compensation module. Based on the frequency word, the frequency offset of the in-phase signal component and the quadrature signal component is corrected until the filtered phase error is 0 degrees or 180 degrees. The carrier NCO's memory stores sine and cosine waveforms. The ROM storage depth is 1024, and the bit width is 32 bits, with the high 16 bits storing the sine waveform and the low 16 bits storing the cosine waveform. Based on the processing delay during signal acquisition and the delay introduced during the construction of 11 signals, the input signal is delayed to obtain the delayed signal. This delayed signal is then multiplied with sine and cosine signals in a complex multiplier to correct residual frequency offset. The frequency offset-corrected data is then fed into the subsequent demodulation module and simultaneously input to the lock-in detection module to check if the loop is locked. After loop lock-in, the phase detection result tends to 0, and the output of the carrier loop filter in the carrier synchronization loop tends to a constant. For detailed implementation details, please refer to [reference needed]. Figure 7 , Figure 7 This is the second schematic diagram of the carrier synchronization loop implementation in the noncoherent spread spectrum synchronization method provided in this embodiment of the invention.

[0122] Optionally, the step of performing phase discrimination on the in-phase signal component and the quadrature signal component to determine the phase error between the in-phase signal component and the quadrature signal component includes:

[0123] Based on the arctangent phase detection algorithm, the phase error of the in-phase signal component and the quadrature signal component is determined;

[0124] The phase error is

[0125] Among them, e kLet I(k) represent the phase error at time k, I(k) represent the in-phase signal component at time k, and Q(k) represent the quadrature signal component at time k.

[0126] The noncoherent spread spectrum synchronization method provided by this invention generates a candidate signal set consisting of a leading signal, an instantaneous signal, and a lagging signal corresponding to the synchronization acquisition result of the received signal through a pseudocode tracking loop, and determines a local pseudocode that is phase-aligned with the pseudocode of the received signal. Simultaneously, it selects a target signal with the highest correlation to the target local pseudocode from the candidate signal set. Based on a bit synchronization loop, it determines the interphase half-symbol accumulation result and adjusts the integration interval of the accumulation to achieve symbol synchronization between the received signal and the pseudocode. Based on a carrier synchronization loop, it synchronizes the carrier of the received signal. Through the combined action of the pseudocode tracking loop, the bit synchronization loop, and the carrier synchronization loop, the noncoherent spread spectrum synchronization method provided by this invention overcomes the influence of data bit transitions in the received signal, achieving faster synchronization. It is simple to implement, highly portable, stable, and reliable, and is particularly suitable for signal synchronization tracking with fixed bandwidth and variable data rate in satellite communication systems.

[0127] Figure 8 This is a schematic diagram of the structure of the non-coherent spread spectrum synchronization device provided in an embodiment of the present invention, as shown below. Figure 8 As shown, the device includes:

[0128] The acquisition module 801 is used to acquire the synchronization acquisition result corresponding to the received signal, and use it as the first signal;

[0129] The pseudocode tracking module 802 is used to determine, based on the first signal and the pseudocode tracking loop, a target local pseudocode that is phase-aligned with the pseudocode of the received signal, and a target signal that has the greatest correlation with the target local pseudocode; the target signal is any signal in a candidate signal set, which includes a leading signal, an instantaneous signal, and a lagging signal generated by the pseudocode tracking loop corresponding to the first signal;

[0130] The bit synchronization module 803 is used to adjust the start and end times of integration of the early gate integrator / late gate integrator in the bit synchronization loop based on the target signal and the bit synchronization loop, until the start and end times of integration are aligned with the start and end times of the symbols in the received signal to complete the locking, and output the in-phase signal component and the quadrature signal component.

[0131] The carrier synchronization module 804 is used to determine the phase word corresponding to the phase error of the in-phase signal component and the quadrature signal component based on the in-phase signal component, the quadrature signal component and the carrier synchronization loop, adjust the phase error until the carrier synchronization loop determines the phase detection result to be 0 degrees or 180 degrees, complete the locking, and obtain the synchronization result of the received signal.

[0132] The noncoherent spread spectrum synchronization device provided in this embodiment of the invention can execute the noncoherent spread spectrum synchronization method in any of the above embodiments. Its implementation principle and beneficial effects are similar to those of the noncoherent spread spectrum synchronization method. Please refer to the implementation principle and beneficial effects of the noncoherent spread spectrum synchronization method, which will not be repeated here.

[0133] Compared to traditional incoherent synchronization methods, the incoherent spread spectrum synchronization device provided by this invention includes a pseudocode tracking module, a bit synchronization module, and a carrier synchronization module that are serially cascaded and independent of each other. The processing results of the upper-level module are sequentially transmitted to the next-level module for further processing, resulting in fast convergence and high stability.

[0134] Figure 9 This is a schematic diagram of the physical structure of the electronic device provided in the embodiments of the present invention, such as... Figure 9 As shown, the electronic device may include: a processor 910, a communication interface 920, a memory 930, and a communication bus 940, wherein the processor 910, the communication interface 920, and the memory 930 communicate with each other through the communication bus 940. The processor 910 can call logical instructions in the memory 930 to execute a non-coherent spread spectrum synchronization method, which includes:

[0135] Obtain the synchronization acquisition result corresponding to the received signal, and use it as the first signal;

[0136] Based on the first signal and the pseudocode tracking loop, a target local pseudocode that is phase-aligned with the pseudocode of the received signal and a target signal that has the greatest correlation with the target local pseudocode are determined; the target signal is any signal in the candidate signal set, which includes the leading signal, the instantaneous signal and the lagging signal generated by the pseudocode tracking loop corresponding to the first signal;

[0137] Based on the target signal and the bit synchronization loop, adjust the start and end times of integration of the early gate integrator / late gate integrator in the bit synchronization loop until the start and end times of integration are aligned with the start and end times of the symbols in the received signal to complete the locking, and output in-phase signal components and quadrature signal components.

[0138] Based on the in-phase signal component, the quadrature signal component, and the carrier synchronization loop, the phase word corresponding to the phase error of the in-phase signal component and the quadrature signal component is determined, and the phase error is adjusted until the carrier synchronization loop determines the phase detection result to be 0 degrees or 180 degrees, thereby completing the locking and obtaining the synchronization result of the received signal.

[0139] Furthermore, the logical instructions in the aforementioned memory 930 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, essentially, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0140] On the other hand, the present invention also provides a computer program product, the computer program product comprising a computer program that can be stored on a non-transitory computer-readable storage medium, wherein when the computer program is executed by a processor, the computer is able to execute the non-coherent spread spectrum synchronization method provided by the above methods, the method comprising:

[0141] Obtain the synchronization acquisition result corresponding to the received signal, and use it as the first signal;

[0142] Based on the first signal and the pseudocode tracking loop, a target local pseudocode that is phase-aligned with the pseudocode of the received signal and a target signal that has the greatest correlation with the target local pseudocode are determined; the target signal is any signal in the candidate signal set, which includes the leading signal, the instantaneous signal and the lagging signal generated by the pseudocode tracking loop corresponding to the first signal;

[0143] Based on the target signal and the bit synchronization loop, adjust the start and end times of integration of the early gate integrator / late gate integrator in the bit synchronization loop until the start and end times of integration are aligned with the start and end times of the symbols in the received signal to complete the locking, and output in-phase signal components and quadrature signal components.

[0144] Based on the in-phase signal component, the quadrature signal component, and the carrier synchronization loop, the phase word corresponding to the phase error of the in-phase signal component and the quadrature signal component is determined, and the phase error is adjusted until the carrier synchronization loop determines the phase detection result to be 0 degrees or 180 degrees, thereby completing the locking and obtaining the synchronization result of the received signal.

[0145] In another aspect, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements a synchronization method for non-coherent spread spectrum provided by the methods described above, the method comprising:

[0146] Obtain the synchronization acquisition result corresponding to the received signal, and use it as the first signal;

[0147] Based on the first signal and the pseudocode tracking loop, a target local pseudocode that is phase-aligned with the pseudocode of the received signal and a target signal that has the greatest correlation with the target local pseudocode are determined; the target signal is any signal in the candidate signal set, which includes the leading signal, the instantaneous signal and the lagging signal generated by the pseudocode tracking loop corresponding to the first signal;

[0148] Based on the target signal and the bit synchronization loop, adjust the start and end times of integration of the early gate integrator / late gate integrator in the bit synchronization loop until the start and end times of integration are aligned with the start and end times of the symbols in the received signal to complete the locking, and output in-phase signal components and quadrature signal components.

[0149] Based on the in-phase signal component, the quadrature signal component, and the carrier synchronization loop, the phase word corresponding to the phase error of the in-phase signal component and the quadrature signal component is determined, and the phase error is adjusted until the carrier synchronization loop determines the phase detection result to be 0 degrees or 180 degrees, thereby completing the locking and obtaining the synchronization result of the received signal.

[0150] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0151] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0152] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A noncoherent spread spectrum synchronization method, characterized in that, include: Obtain the synchronization acquisition result corresponding to the received signal, and use it as the first signal; Based on the first signal and the pseudocode tracking loop, a target local pseudocode that is phase-aligned with the pseudocode of the received signal and a target signal that has the greatest correlation with the target local pseudocode are determined; the target signal is any signal in the candidate signal set, which includes the leading signal, the instantaneous signal and the lagging signal generated by the pseudocode tracking loop corresponding to the first signal; Based on the target signal and the bit synchronization loop, the start and end times of integration of the early gate integrator / late gate integrator in the bit synchronization loop are adjusted until the start and end times of integration are aligned with the start and end times of the symbols in the received signal to complete the locking, and output in-phase signal components and quadrature signal components; the start and end times of integration of the early gate integrator and late gate integrator in the bit synchronization loop are adjusted according to the integration clock output by the bit synchronization NCO in the bit synchronization loop, or according to the phase accumulation result of the bit synchronization error corresponding to the target signal; Based on the in-phase signal component, the quadrature signal component, and the carrier synchronization loop, the phase word corresponding to the phase error of the in-phase signal component and the quadrature signal component is determined, and the phase error is adjusted until the carrier synchronization loop determines the phase detection result to be 0 degrees or 180 degrees, thereby completing the locking and obtaining the synchronization result of the received signal.

2. The synchronization method for noncoherent spread spectrum according to claim 1, characterized in that, The step of determining the target local pseudocode phase-aligned with the received signal and the target signal with the maximum correlation to the target local pseudocode based on the first signal and the pseudocode tracking loop includes: Based on a preset oversampling factor, the first signal is oversampled to obtain the second signal; Based on the second signal and the code length corresponding to the second signal, multiple leading signals, multiple lagging signals and instantaneous signals corresponding to the second signal are generated as candidate signals; Based on the local pseudocode signal, the despreading signal corresponding to each candidate signal is determined; the local pseudocode signal is a pseudocode signal generated by the pseudocode generator based on the initial value of the pseudocode phase corresponding to the first signal, and the number of pseudocode signals is the same as that of the candidate signals. Each symbol in the despread signal is divided into two half-symbols, and coherent accumulation of the half-symbols is performed, as well as incoherent accumulation of the odd-numbered segments corresponding to the first half-symbol and incoherent accumulation of the even-numbered segments corresponding to the second half-symbol, to obtain the accumulation result corresponding to each despread signal. Based on the cumulative results corresponding to each of the despread signals, the despread signal corresponding to the cumulative result with the largest value is determined to be a signal that is phase-synchronized with the first signal, and is taken as the target signal. The local pseudocode signal corresponding to the target signal is taken as the target local pseudocode that is phase-aligned with the pseudocode of the received signal.

3. The synchronization method for noncoherent spread spectrum according to claim 2, characterized in that, The step of adjusting the integration start and end times of the early gate integrator / late gate integrator in the bit synchronization loop based on the target signal and the bit synchronization loop until the integration start and end times are aligned with the start and end times of the symbols in the received signal to complete the locking, and outputting in-phase signal components and quadrature signal components, includes: An early-gate integrator and a late-gate integrator are used to integrate the energy of the first half of the symbol and the energy of the second half of the symbol in the target signal, respectively, to determine the early-gate integration result and the late-gate integration result, which are then used as the output in-phase signal component and the quadrature signal component. Bit error identification is performed on the early gate integration result and the late gate integration result to obtain the bit synchronization error; The bit synchronization error is filtered to obtain the filtered bit synchronization error; Based on the phase accumulation result of the filtered bit synchronization error, the start and end times of integration of the early gate integrator and the late gate integrator are adjusted until the start and end times of integration are aligned with the start and end times of each symbol in the target signal, and the output in-phase signal component and the quadrature signal component are updated.

4. The synchronization method for noncoherent spread spectrum according to claim 3, characterized in that, The method of integrating the energy of the first half of the symbol and the energy of the second half of the symbol in the target signal using early-gate integrators and late-gate integrators respectively, and determining the early-gate integration result and the late-gate integration result, includes: Obtain the start and end times of integration for the early gate integrator and the late gate integrator, as well as the number of accumulated points and the truncation bit width; Based on the start and end times of integration and the number of accumulated points of the symbols, the early gate integrator and the late gate integrator are used respectively to coherently accumulate the first half and the second half of each symbol in the target signal to determine the early gate integration result and the late gate integration result. According to the truncation width, the early gate integration result and the late gate integration result are truncated to obtain the in-phase signal component and the quadrature signal component; The number of accumulated symbol points and the truncation width are controlled by the symbol rate control module, which adjusts the truncation width according to the symbol rate of the target signal.

5. The synchronization method for noncoherent spread spectrum according to claim 3, characterized in that, Based on the phase accumulation result of the filtered bit synchronization error, the start and end times of integration of the early gate integrator and the late gate integrator are adjusted until the start and end times of integration are aligned with the start and end times of each symbol in the target signal, and the output in-phase signal component and quadrature signal component are updated, including: Based on a preset amplitude threshold, the amplitude of the filtered bit synchronization error is adjusted to obtain a third signal; the third signal is the result of filtering and amplitude adjustment of the bit synchronization error. Based on the third signal and the preset adjustment rule, the integration clock adjustment parameters for the integration start and end times of the early gate integrator and the late gate integrator are determined; the preset adjustment rule is used to represent the correspondence between the third signal and the integration clock adjustment parameters when the symbol rate of the first signal is different. Based on the integration clock adjustment parameter, adjust the integration start and end times of the early gate integrator and the late gate integrator until the integration start and end times are aligned with the start and end times of each symbol in the target signal. Based on the adjusted start and end times of integration, as well as the early gate integrator and the late gate integrator, the updated in-phase signal component and the quadrature signal component are determined.

6. The synchronization method for noncoherent spread spectrum according to claim 1, characterized in that, The process involves determining the phase word corresponding to the phase error of the in-phase signal component and the quadrature signal component based on the in-phase signal component, the quadrature signal component, and the carrier synchronization loop; adjusting the phase error until the carrier synchronization loop determines the phase detection result to be 0 degrees or 180 degrees; completing the locking; and obtaining the synchronization result of the received signal, including: Phase discrimination is performed on the in-phase signal component and the quadrature signal component to determine the phase error between the in-phase signal component and the quadrature signal component; The phase error is filtered to obtain the filtered phase error; Based on the phase accumulation result of the filtered phase error, the frequency offset estimate corresponding to the filtered phase error is determined; Based on the frequency offset estimate, frequency offset correction is performed on the in-phase signal component and the quadrature signal component until the filtered phase error is 0 degrees or 180 degrees.

7. The synchronization method for noncoherent spread spectrum according to claim 6, characterized in that, The step of performing phase discrimination on the in-phase signal component and the quadrature signal component to determine the phase error between the in-phase signal component and the quadrature signal component includes: Based on the arctangent phase detection algorithm, the phase error between the in-phase signal component and the quadrature signal component is determined; The phase error is ; in, The phase error at time k is represented by the given value. This represents the in-phase signal component at time k. Let represent the orthogonal signal component at time k.

8. A non-coherent spread spectrum synchronization device, characterized in that, include: The acquisition module is used to acquire the synchronization acquisition result corresponding to the received signal, which is used as the first signal. The pseudocode tracking module is used to determine, based on the first signal and the pseudocode tracking loop, a target local pseudocode that is phase-aligned with the pseudocode of the received signal, and a target signal that has the greatest correlation with the target local pseudocode; the target signal is any signal in a candidate signal set, which includes a leading signal, an instantaneous signal, and a lagging signal generated by the pseudocode tracking loop corresponding to the first signal; The bit synchronization module is used to adjust the integration start and end times of the early gate integrator / late gate integrator in the bit synchronization loop based on the target signal and the bit synchronization loop, until the integration start and end times are aligned with the start and end times of the symbols in the received signal to complete the locking, and output in-phase signal components and quadrature signal components; the integration start and end times of the early gate integrator and late gate integrator in the bit synchronization loop are adjusted according to the integration clock output by the bit synchronization NCO in the bit synchronization loop, or according to the phase accumulation result of the bit synchronization error corresponding to the target signal; The carrier synchronization module is used to determine the phase word corresponding to the phase error of the in-phase signal component and the quadrature signal component based on the in-phase signal component, the quadrature signal component and the carrier synchronization loop, adjust the phase error until the carrier synchronization loop determines the phase detection result to be 0 degrees or 180 degrees, complete the locking, and obtain the synchronization result of the received signal.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the synchronization method of noncoherent spread spectrum as described in any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the synchronization method of noncoherent spread spectrum as described in any one of claims 1 to 7.

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