Delay compensation value determination method, apparatus, and computer-readable storage medium
Patent Information
- Application Number
- CN202311338268.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-10-16
- Publication Date
- 2026-09-25
- Estimated Expiration
- 2043-10-16
AI Technical Summary
[0004]然而,在分布式massive MIMO通信系统中,天线的时延受到多个方面的影响,仅确定射频通道的时延补偿值,并不能保证各个信号在时域上一致,因而,现有的方案确定的时延补偿值的准确性较低,各个信号在时域上的一致性较差
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Figure CN117319263B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communications, and in particular to a method, apparatus and computer-readable storage medium for determining delay compensation values. Background Technology
[0002] Figure 1 This is a schematic diagram of the structure of a distributed massive multiple-in multiple-out (MIMO) communication system, as shown below. Figure 1 As shown, the baseband device is connected to two aggregation devices, and each aggregation device is connected to two pico base stations (pRRUs). Each pRRU covers one physical cell. By merging four pRRUs into one pRRU, four physical cells can be merged into one logical cell, and users can then access the logical cell for communication.
[0003] To ensure that the signals received by the baseband equipment from each antenna of the pRRU are consistent in the time domain, the existing approach is to determine the time delay compensation value of the RF channel of each antenna of the pRRU, and then perform time delay calibration on each antenna of the pRRU based on the time delay compensation value.
[0004] However, in distributed massive MIMO communication systems, antenna delay is affected by multiple factors. Determining only the delay compensation value of the radio frequency channel cannot guarantee the consistency of each signal in the time domain. Therefore, the accuracy of the delay compensation value determined by the existing scheme is low, and the consistency of each signal in the time domain is poor. Summary of the Invention
[0005] This application provides a method, apparatus, and computer-readable storage medium for determining delay compensation values, which can improve the accuracy of the determined delay compensation values in a distributed massive MIMO communication system and enhance the consistency of various signals in the time domain.
[0006] To achieve the above objectives, this application adopts the following technical solution:
[0007] In a first aspect, a method for determining a time delay compensation value is provided. The method includes: acquiring a first time delay compensation value for each antenna of each pRRU in a plurality of pRRUs, and the received signal of each pRRU; the plurality of pRRUs are located in a distributed massive MIMO communication system, and the first time delay compensation value is a compensation value for the time delay of the radio frequency channel of the antenna; for each pRRU, based on the first time delay compensation value of each antenna of the pRRU and the received signal of the pRRU, determining a second time delay compensation value for the pRRU; the second time delay compensation value is a compensation value for the time delay between the pRRU and the baseband device, excluding the first time delay compensation value; and the sum of the first time delay compensation value of each antenna of the pRRU and the second time delay compensation value of the pRRU is taken as the total time delay compensation value of each antenna of the pRRU.
[0008] Based on this scheme, by obtaining the first delay compensation value of each antenna of each pRRU in multiple pRRUs, and the received signal of each pRRU, a second delay compensation value of the pRRU is determined for each pRRU based on the first delay compensation value of each antenna and the received signal of the pRRU. Finally, the sum of the first delay compensation value and the second delay compensation value of each antenna of the pRRU is taken as the total delay compensation value of each antenna of the pRRU. In the scheme of this application, the second delay compensation value is the compensation value for the delay between the pRRU and the baseband device, excluding the first delay compensation value. Therefore, the scheme of this application considers multiple factors affecting the antenna delay, thereby improving the accuracy of the determined delay compensation value in the distributed massive MIMO communication system and improving the consistency of each signal in the time domain.
[0009] In conjunction with the first aspect, in some embodiments of the first aspect, obtaining a first delay compensation value for each antenna of each pRRU in a plurality of pRRUs includes: obtaining a plurality of first delay values for each antenna of each pRRU; the first delay value is the delay value of the radio frequency channel of the antenna; for each pRRU, determining a first reference delay value for the pRRU; the first reference delay value is the minimum value among the average first delay values of the plurality of antennas of the pRRU, and the average first delay value is the average value of the plurality of first delay values; for each antenna in the pRRU, using the difference between the average first delay value of the antenna and the first reference delay value as the first delay compensation value of the antenna.
[0010] Based on this scheme, since the first delay value is the delay value of the antenna's radio frequency channel, by obtaining multiple first delay values for each antenna of each pRRU and determining the first reference delay value for each pRRU, and finally using the difference between the average first delay value of each antenna and the first reference delay value of the pRRU where each antenna is located as the first delay compensation value for each antenna, the first delay compensation value for each antenna of each pRRU in multiple pRRUs can be obtained.
[0011] In conjunction with the first aspect, in some embodiments of the first aspect, determining a second delay compensation value for the pRRU based on a plurality of first delay compensation values of the pRRU and the received signal of the pRRU includes: performing delay compensation on the received signal of the pRRU based on the plurality of first delay compensation values of the pRRU to obtain a second delay value of the received signal of the pRRU; and determining the second delay compensation value of the pRRU based on the plurality of second delay values of the pRRU.
[0012] Based on this scheme, the received signal of the pRRU is delayed by multiple first delay compensation values of each pRRU to obtain the second delay value of the received signal of the pRRU. Based on the second delay value of the pRRU, the second delay compensation value of the pRRU is determined. This scheme can realize the determination of the second delay compensation value of the pRRU based on multiple first delay compensation values of the pRRU and the received signal of the pRRU.
[0013] In conjunction with the first aspect, in some embodiments of the first aspect, determining a second delay compensation value for a pRRU based on the second delay values of a plurality of pRRUs includes: determining a second reference delay value for a plurality of pRRUs; the second reference delay value being the minimum value among the second delay values of the plurality of pRRUs; and using the difference between the second delay value of the pRRU and the second reference delay value as the second delay compensation value for the pRRU.
[0014] Based on this scheme, by determining the second reference delay value of multiple pRRUs, and using the difference between the second delay value of the pRRU and the second reference delay value as the second delay compensation value of the pRRU, it is possible to determine the second delay compensation value of the pRRU based on the second delay values of multiple pRRUs.
[0015] Secondly, a delay compensation value determination apparatus is provided for implementing the delay compensation value determination method of the first aspect described above. This delay compensation value determination apparatus includes modules, units, or means corresponding to the above method. These modules, units, or means can be implemented in hardware, software, or by hardware executing corresponding software. The hardware or software includes one or more modules or units corresponding to the above functions.
[0016] In conjunction with the second aspect, in some embodiments of the second aspect, the delay compensation value determination device includes: a transceiver module and a processing module; the transceiver module is configured to acquire a first delay compensation value for each antenna of each pRRU in a plurality of pRRUs, and the received signal of each pRRU; the plurality of pRRUs are located in a distributed massive MIMO communication system, and the first delay compensation value is a compensation value for the delay of the radio frequency channel of the antenna; the processing module is configured to determine a second delay compensation value for each pRRU based on the first delay compensation value for each antenna of the pRRU and the received signal of the pRRU; the second delay compensation value is a compensation value for the delay between the pRRU and the baseband device, excluding the first delay compensation value; the processing module is further configured to sum the first delay compensation value for each antenna of the pRRU and the second delay compensation value of the pRRU as the total delay compensation value for each antenna of the pRRU.
[0017] In conjunction with the second aspect, in some embodiments of the second aspect, the transceiver module is configured to acquire a first delay compensation value for each antenna of each of the plurality of pRRUs, including: acquiring a plurality of first delay values for each antenna of each pRRU; the first delay value is the delay value of the radio frequency channel of the antenna; for each pRRU, determining a first reference delay value for the pRRU; the first reference delay value is the minimum value among the average first delay values of the plurality of antennas of the pRRU, and the average first delay value is the average value of the plurality of first delay values; for each antenna in the pRRU, using the difference between the average first delay value of the antenna and the first reference delay value as the first delay compensation value of the antenna.
[0018] In conjunction with the second aspect, in some embodiments of the second aspect, the processing module is configured to determine a second delay compensation value for the pRRU based on a plurality of first delay compensation values of the pRRU and the received signal of the pRRU, including: performing delay compensation on the received signal of the pRRU based on the plurality of first delay compensation values of the pRRU to obtain a second delay value of the received signal of the pRRU; and determining the second delay compensation value of the pRRU based on the plurality of second delay values of the pRRU.
[0019] In conjunction with the second aspect, in some embodiments of the second aspect, the processing module is further configured to determine a second delay compensation value for the pRRU based on the second delay values of the plurality of pRRUs, including: determining a second reference delay value for the plurality of pRRUs; the second reference delay value being the minimum value among the second delay values of the plurality of pRRUs; and using the difference between the second delay value of the pRRU and the second reference delay value as the second delay compensation value for the pRRU.
[0020] Thirdly, a delay compensation value determination apparatus is provided, comprising: at least one processor and a memory for storing processor-executable instructions; wherein the processor is configured to execute instructions to implement the method provided by the first aspect and any possible implementation thereof.
[0021] Fourthly, a computer-readable storage medium is provided, which, when instructions in the computer-readable storage medium are executed by a processor of a delay compensation value determination device, enables the delay compensation value determination device to perform the method provided by the first aspect and any possible implementation thereof.
[0022] Fifthly, a computer program product containing instructions is provided that, when run on a computer, enables the computer to perform the methods provided in the first aspect and any possible implementation thereof.
[0023] In a sixth aspect, a chip system is provided, comprising: a processor and an interface circuit; the interface circuit being configured to receive a computer program or instructions and transmit them to the processor; the processor being configured to execute the computer program or instructions to cause the chip system to perform the methods provided in the first aspect and any of its possible embodiments.
[0024] The technical effects of any one of the second to sixth aspects can be found in the technical effects of the different embodiments of the first aspect described above, and will not be repeated here. Attached Figure Description
[0025] Figure 1 This application provides a schematic diagram of the structure of a distributed massive MIMO communication system;
[0026] Figure 2 A schematic diagram of the architecture of a delay compensation value determination system provided in this application;
[0027] Figure 3 A flowchart illustrating a method for determining a time delay compensation value provided in this application;
[0028] Figure 4 A flowchart illustrating another method for determining the time delay compensation value provided in this application;
[0029] Figure 5 A flowchart illustrating another method for determining the time delay compensation value provided in this application;
[0030] Figure 6 A flowchart illustrating another method for determining the time delay compensation value provided in this application;
[0031] Figure 7 A flowchart illustrating another method for determining the time delay compensation value provided in this application;
[0032] Figure 8 A schematic diagram of a time delay compensation value determination device provided in this application;
[0033] Figure 9 A schematic diagram of another time delay compensation value determination device provided in this application. Detailed Implementation
[0034] In the description of this application, unless otherwise stated, "multiple" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of a single item or a plurality of items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.
[0035] Furthermore, to facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.
[0036] In this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being better or more advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.
[0037] It is understood that the term "embodiment" used throughout the specification means that a specific feature, structure, or characteristic related to an embodiment is included in at least one embodiment of this application. Therefore, various embodiments throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.
[0038] It is understood that in this application, "when," "if," and "if" all refer to the corresponding processing that will be carried out under certain objective circumstances, and are not limited to a specific time, nor do they require that there must be a judgment action when implemented, nor do they imply any other limitations.
[0039] It is understood that some optional features in the embodiments of this application can be implemented independently in certain scenarios without relying on other features, such as the current solution on which they are based, to solve the corresponding technical problems and achieve the corresponding effects. Alternatively, they can be combined with other features as needed in certain scenarios. Correspondingly, the apparatus given in the embodiments of this application can also implement these features or functions, which will not be elaborated here.
[0040] In this application, unless otherwise specified, the same or similar parts between the various embodiments can be referred to each other. In the various embodiments and implementation methods of the various embodiments in this application, unless otherwise specified or logically conflicting, the terminology and / or descriptions between different embodiments and between the implementation methods of the various embodiments are consistent and can be mutually referenced. The technical features in different embodiments and between the implementation methods of the various embodiments can be combined according to their inherent logical relationships to form new embodiments, implementation methods, implementation methods, or implementation approaches. The following embodiments of this application do not constitute a limitation on the scope of protection of this application.
[0041] In distributed massive MIMO communication systems, such as indoor distributed massive MIMO communication systems, in order to ensure that the signals received by the baseband equipment from each antenna of the pRRU are consistent in the time domain, the existing approach is usually to determine the time delay compensation value of the radio frequency channel of each antenna of the pRRU, and then perform time delay calibration on each antenna of the pRRU based on the time delay compensation value.
[0042] However, antenna delay is affected by many factors in addition to the delay of the radio frequency channel. Determining only the delay compensation value of the radio frequency channel cannot guarantee that all signals are consistent in the time domain. Therefore, the accuracy of the delay compensation value determined by the existing scheme is low, and the consistency of all signals in the time domain is poor.
[0043] To solve the above problems, Figure 2 This is a schematic diagram of the architecture of a delay compensation value determination system provided in this application. The technical solution of the embodiments of this application can be applied to... Figure 2 The system for determining the time delay compensation value shown is as follows: Figure 2 As shown, the delay compensation value determination system 20 includes a delay compensation value determination device 21 and an electronic device 22.
[0044] The delay compensation value determination device 21 is directly or indirectly connected to the electronic device 22. This connection can be wired or wireless, and this application embodiment does not limit this.
[0045] The delay compensation value determination device 21 can be used to receive data from the electronic device 22.
[0046] Electronic device 22 can be used to send data to delay compensation value determination device 21.
[0047] Electronic device 22 can be a data transceiver device, and electronic device 22 can send any data required by delay compensation value determination device 21 to delay compensation value determination device 21.
[0048] It should be noted that the delay compensation value determination device 21 and the electronic device 22 can be independent devices or integrated into the same device; this application does not make specific limitations in this regard.
[0049] When the time delay compensation value determination device 21 and the electronic device 22 are integrated into the same device, the communication method between the time delay compensation value determination device 21 and the electronic device 22 is the communication between internal modules of the device. In this case, the communication process between the two is the same as the communication process between the time delay compensation value determination device 21 and the electronic device 22 when they are independent of each other.
[0050] In the following embodiments provided in this application, the delay compensation value determination device 21 and electronic device 22 are described as being set up independently of each other.
[0051] In practical applications, the delay compensation value determination method provided in this application embodiment can be applied to the delay compensation value determination device 21, or to the devices included in the delay compensation value determination device 21.
[0052] The following description, with reference to the accompanying drawings, uses the application of the delay compensation value determination method to the delay compensation value determination device 21 as an example to illustrate the delay compensation value determination method provided in this application embodiment.
[0053] Figure 3 A flowchart illustrating a method for determining a time delay compensation value provided in this application is shown below. Figure 3 As shown, the method includes the following steps:
[0054] S301, the delay compensation value determination device acquires the first delay compensation value of each antenna of each pRRU in the plurality of pRRUs, and the received signal of each pRRU.
[0055] In this system, multiple pRRUs are located in a distributed massive MIMO communication system, and the first delay compensation value is the compensation value for the delay of the antenna's radio frequency channel.
[0056] It should be noted that the received signal can be a time delay calibration signal, or it can be a time delay correction signal; this application does not impose specific limitations on this. As one possible implementation, combined with... Figure 1The delay compensation value determination device receives a message from an electronic device, which includes a first delay compensation value for each antenna of each pRRU in a plurality of pRRUs, and the received signal of each pRRU. The delay compensation value determination device obtains the first delay compensation value for each antenna of each pRRU in a plurality of pRRUs, and the received signal of each pRRU from the message.
[0057] As one possible implementation method, combined Figure 1 The delay compensation value determination device receives a message from an electronic device, which includes multiple first delay values for each antenna of each pRRU in a plurality of pRRUs, and the received signal of each pRRU. The delay compensation value determination device obtains the multiple first delay values for each antenna of each pRRU and the received signal of each pRRU from the message.
[0058] The delay compensation value determination device determines a first delay compensation value for each antenna of each pRRU based on multiple first delay values for each antenna of the pRRU.
[0059] It should be noted that for a detailed description of this possible implementation method, please refer to the relevant description in the subsequent sections of the specific implementation method of this application, which will not be described here.
[0060] S302, The delay compensation value determination device determines the second delay compensation value of each pRRU based on the first delay compensation value of each antenna of the pRRU and the received signal of the pRRU.
[0061] The second delay compensation value is the compensation value for the delay between pRRU and baseband equipment, excluding the first delay compensation value.
[0062] It should be noted that the second delay compensation value can be the sum of the delay compensation value generated by the hardware in the pRRU other than the radio frequency channel, and the delay compensation value generated by the aggregation device connected to the pRRU.
[0063] The hardware in a pRRU, excluding the radio frequency channel, can include a power amplifier, transceiver, etc.
[0064] As one possible implementation, the delay compensation value determination device performs delay compensation on the received signal of the pRRU based on multiple first delay compensation values of the pRRU to obtain a second delay value of the received signal of the pRRU, and then determines the second delay compensation value of the pRRU based on the second delay value of the pRRU.
[0065] It should be noted that for a detailed description of this possible implementation method, please refer to the relevant description in the subsequent sections of the specific implementation method of this application, which will not be described here.
[0066] S303, The delay compensation value determination device uses the sum of the first delay compensation value of each antenna of the pRRU and the second delay compensation value of the pRRU as the total delay compensation value of each antenna of the pRRU.
[0067] As one possible implementation, the delay compensation value determination device uses the sum of the first delay compensation value of the first antenna of the first pRRU and the second delay compensation value of the first pRRU as the total delay compensation value of the first antenna.
[0068] The delay compensation value determination device uses the sum of the first delay compensation value of the second antenna of the first pRRU and the second delay compensation value of the first pRRU as the total delay compensation value of the second antenna.
[0069] The delay compensation value determination device uses the sum of the first delay compensation value of the third antenna of the first pRRU and the second delay compensation value of the first pRRU as the total delay compensation value of the third antenna.
[0070] By analogy, the total delay compensation value for each antenna of the first pRRU is obtained.
[0071] Furthermore, the delay compensation value determination device performs the above processing logic for each pRRU to obtain the total delay compensation value for each antenna of each pRRU.
[0072] Based on this scheme, by obtaining the first delay compensation value of each antenna of each pRRU in multiple pRRUs, and the received signal of each pRRU, a second delay compensation value of the pRRU is determined for each pRRU based on the first delay compensation value of each antenna and the received signal of the pRRU. Finally, the sum of the first delay compensation value and the second delay compensation value of each antenna of the pRRU is taken as the total delay compensation value of each antenna of the pRRU. In the scheme of this application, the second delay compensation value is the compensation value for the delay between the pRRU and the baseband device, excluding the first delay compensation value. Therefore, the scheme of this application considers multiple factors affecting the antenna delay, thereby improving the accuracy of the determined delay compensation value in the distributed massive MIMO communication system and improving the consistency of each signal in the time domain.
[0073] The above is a general description of the method for determining the delay compensation value provided in this application. The following will provide a further explanation of the method for determining the delay compensation value provided in this application in conjunction with the accompanying drawings.
[0074] In one design, Figure 4 A flowchart illustrating another method for determining the time delay compensation value provided in this application is shown below. Figure 4As shown in the specific embodiment of this application, the delay compensation value determination device obtains the first delay compensation value of each antenna of each pRRU in a plurality of pRRUs, which may specifically include the following steps:
[0075] S401, The delay compensation value determination device acquires multiple first delay values for each antenna of each pRRU.
[0076] The first delay value is the delay value of the antenna's radio frequency channel.
[0077] The j-th first delay value of the i-th antenna of the pRRU can be expressed as T. i , j , where i = 0, 1, 2, ..., n-1, n represents the number of antennas in the pRRU, j = 0, 1, 2, ..., m-1, m represents the total number of antennas in multiple pRRUs.
[0078] As one possible implementation method, combined with Figure 1 The delay compensation value determination device receives a message from an electronic device, which includes multiple first delay values for each antenna of each pRRU. The delay compensation value determination device obtains multiple first delay values for each antenna of each pRRU from the message.
[0079] As another possible implementation, the delay compensation value determination device sends a first indication message to the first antenna of the first pRRU, so that the radio frequency channel of the first antenna is in the receiving state; sends a second indication message to the target antenna among the other antennas of the plurality of pRRUs, so that the radio frequency channel of the target antenna is in the transmitting state; sends a third indication message to each antenna among the other antennas of the plurality of pRRUs except the target antenna, so that each antenna is in the off state; and then the delay compensation device determines a first delay value for the first antenna.
[0080] By analogy, the delay compensation value determination device keeps the radio frequency channel of the first antenna in the receiving state at all times, and makes the other antennas of the multiple pRRUs serve as target antennas with the radio frequency channel in the transmitting state in turn, thereby obtaining multiple first delay values of the first antenna.
[0081] Furthermore, the delay compensation value determination device performs the above processing logic for each antenna of each pRRU to obtain multiple first delay values for each antenna of each pRRU.
[0082] For example, taking a pRRU with a quantity of 2, where the first pRRU includes two antennas (antenna 1 and antenna 2) and the second pRRU includes two antennas (antenna 3 and antenna 4), the delay compensation value determination device sends a first indication message to antenna 1, putting its RF channel into a receiving state. Using antenna 2 as the target antenna, it sends a second indication message to antenna 2, putting its RF channel into a transmitting state. Then, it sends third indication messages to antennas 3 and 4, respectively, putting both their RF channels into a closed state. Finally, the delay compensation value determination device determines a first delay value T for antenna 1. 1,1 .
[0083] The delay compensation value determination device uses antenna 3 as the target antenna and sends a second indication message to antenna 3, putting its radio frequency channel into a transmitting state. It then sends third indication messages to antennas 2 and 4 respectively, putting their radio frequency channels into a closed state. Finally, the delay compensation value determination device determines another first delay value T for antenna 1. 1,2 .
[0084] The delay compensation value determination device uses antenna 4 as the target antenna and sends a second indication message to antenna 4, putting its radio frequency channel into a transmitting state. It then sends third indication messages to antennas 3 and 2 respectively, putting their radio frequency channels into a closed state. Finally, the delay compensation value determination device determines another first delay value T for antenna 1. 1,3 .
[0085] Ultimately, the delay compensation value determination device obtains three first delay values for antenna No. 1.
[0086] Similarly, the delay compensation value determination device performs the above processing logic for antennas 2, 3, and 4 to obtain multiple first delay values for each antenna of each pRRU.
[0087] It should be noted that the possible implementation method and the specific scheme for determining the first time delay value of the antenna in this example can refer to existing schemes, and will not be described in this application.
[0088] S402, The delay compensation value determination device determines the first reference delay value of each pRRU.
[0089] The first reference delay value is the minimum of the average first delay values among the multiple antennas of the pRRU, and the average first delay value is the average of the multiple first delay values.
[0090] It should be noted that the first reference delay value of the i-th pRRU can be expressed as:
[0091] Alternatively, if the average first delay value of the 0th antenna of the 0th pRRU is The average first delay value of the first antenna is The first reference delay value of the 0th pRRU can also be expressed as:
[0092] As one possible implementation, the delay compensation value determination device determines the average of multiple first delay values of the first antenna of the first pRRU to obtain the average first delay value of the first antenna.
[0093] The delay compensation value determination device determines the average of multiple first delay values of the second antenna of the first pRRU to obtain the average first delay value of the second antenna.
[0094] Similarly, the delay compensation value determination device obtains the average first delay value of the multiple antennas of the first pRRU, and determines the minimum value among the average first delay values of the multiple antennas as the first reference delay value of the first pRRU.
[0095] Furthermore, the delay compensation value determination device performs the above processing logic for each pRRU to obtain a first reference delay value for each pRRU.
[0096] S403, The delay compensation value determination device uses the difference between the average first delay value of the antenna and the first reference delay value as the first delay compensation value of the antenna for each antenna in the pRRU.
[0097] As one possible implementation, the delay compensation value determination device uses the difference between the average first delay value of the first antenna of the first pRRU and the first reference delay value of the first pRRU as the first delay compensation value of the first antenna.
[0098] The delay compensation value determination device uses the difference between the average first delay value of the second antenna of the first pRRU and the first reference delay value of the first pRRU as the first delay compensation value of the second antenna.
[0099] Similarly, the delay compensation value determination device determines the first delay compensation value for each antenna in the first pRRU.
[0100] Furthermore, the delay compensation value determination device performs the above processing logic for each pRRU to obtain the first delay compensation value for each antenna of each pRRU.
[0101] Based on this scheme, since the first delay value is the delay value of the antenna's radio frequency channel, by obtaining multiple first delay values for each antenna of each pRRU and determining the first reference delay value for each pRRU, and finally using the difference between the average first delay value of each antenna and the first reference delay value of the pRRU where each antenna is located as the first delay compensation value for each antenna, the first delay compensation value for each antenna of each pRRU in multiple pRRUs can be obtained.
[0102] In one design, Figure 5 A flowchart illustrating another method for determining the time delay compensation value provided in this application is shown below. Figure 5 As shown, S302 provided in the specific embodiments of this application may specifically include the following steps:
[0103] S501, the delay compensation value determination device performs delay compensation on the received signal of the pRRU based on multiple first delay compensation values of the pRRU, and obtains the second delay value of the received signal of the pRRU.
[0104] It should be noted that the second delay value of the received signal of the 0th pRRU can be represented as T0.
[0105] As one possible implementation, the delay compensation value determination device processes multiple first delay compensation values of the first pRRU and the received signal of the first pRRU using a digital signal processor or a field-programmable gate array to obtain a second delay value of the received signal of the first pRRU.
[0106] Furthermore, the delay compensation value determination device performs the above processing logic for each pRRU to obtain a second delay value of the received signal for each pRRU.
[0107] It should be noted that the specific implementation scheme of this possible method can refer to existing schemes, and will not be described in this application.
[0108] S502, The delay compensation value determination device determines the second delay compensation value of the pRRU based on the second delay values of multiple pRRUs.
[0109] As one possible implementation, the delay compensation value determination device determines a second reference delay value for a plurality of pRRUs; the difference between the second delay value of the pRRU and the second reference delay value is used as the second delay compensation value of the pRRU. The second reference delay value is the minimum value among the second delay values of the plurality of pRRUs.
[0110] It should be noted that for a detailed description of this possible implementation method, please refer to the relevant description in the subsequent sections of the specific implementation method of this application, which will not be described here.
[0111] Based on this scheme, the received signal of the pRRU is delayed by multiple first delay compensation values of each pRRU to obtain the second delay value of the received signal of the pRRU. Based on the second delay value of the pRRU, the second delay compensation value of the pRRU is determined. This scheme can realize the determination of the second delay compensation value of the pRRU based on multiple first delay compensation values of the pRRU and the received signal of the pRRU.
[0112] In one design, Figure 6 A flowchart illustrating another method for determining the time delay compensation value provided in this application is shown below. Figure 6 As shown, S502 provided in the specific embodiments of this application may specifically include the following steps:
[0113] S601, the delay compensation value determination device determines the second reference delay value of multiple pRRUs.
[0114] The second reference delay value is the minimum value among the second delay values of multiple pRRUs.
[0115] It should be noted that if the second delay value of the received signal of the 0th pRRU can be expressed as T0, and the second delay value of the received signal of the 1st pRRU can be expressed as T1, then the second reference delay value can be expressed as min(T0, T1).
[0116] As one possible implementation, the delay compensation value determination device determines the minimum value among the second delay values of multiple pRRUs as the second reference delay value of the multiple pRRUs.
[0117] S602, The delay compensation value determination device uses the difference between the second delay value of pRRU and the second reference delay value as the second delay compensation value of pRRU.
[0118] As one possible implementation, the delay compensation value determination device uses the difference between the second delay value of the first pRRU and the second reference delay value as the second delay compensation value of the first pRRU.
[0119] Furthermore, the delay compensation value determination device performs the above processing logic for each pRRU to obtain a second delay compensation value for each pRRU.
[0120] Based on this scheme, by determining the second reference delay value of multiple pRRUs, and using the difference between the second delay value of the pRRU and the second reference delay value as the second delay compensation value of the pRRU, it is possible to determine the second delay compensation value of the pRRU based on the second delay values of multiple pRRUs.
[0121] In one design, Figure 7 A flowchart illustrating another method for determining the time delay compensation value provided in this application is shown below. Figure 7 As shown, the method for determining the delay compensation value may include the following steps:
[0122] S701, the delay compensation value determination device acquires multiple first delay values for each antenna of each pRRU.
[0123] It should be noted that for detailed explanations of S701, please refer to the relevant explanations of S401 above.
[0124] S702, The delay compensation value determination device determines the first reference delay value of each pRRU.
[0125] It should be noted that for detailed explanations of S702, please refer to the relevant explanations of S402 above.
[0126] S703, the delay compensation value determination device uses the difference between the average first delay value of the antenna and the first reference delay value as the first delay compensation value of the antenna for each antenna in the pRRU.
[0127] It should be noted that for detailed explanations of S703, please refer to the relevant explanations of S403 mentioned above.
[0128] S704, the delay compensation value determination device acquires the received signal of each pRRU.
[0129] It should be noted that for detailed explanations of S704, please refer to the relevant explanations of S301 above.
[0130] S705, the delay compensation value determination device determines a second delay compensation value for each pRRU based on the first delay compensation value of each antenna of the pRRU and the received signal of the pRRU.
[0131] It should be noted that for detailed explanations of S705, please refer to the relevant explanations of S302 above.
[0132] Then, the delay compensation value determination device adds the first delay compensation value of one antenna of the pRRU and the second delay compensation value of the pRRU to obtain the total delay compensation value of that antenna of the pRRU.
[0133] The above mainly describes the solution provided by the embodiments of this application from the perspective of the delay compensation value determination method executed by the delay compensation value determination device. To achieve the above functions, the delay compensation value determination device includes hardware structures and / or software modules corresponding to each function. Those skilled in the art should readily recognize that, in conjunction with the units and algorithm steps of the various examples described in the embodiments disclosed herein, the embodiments of this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0134] This application embodiment can divide the delay compensation value determination device into functional modules according to the above method example. For example, each function can be divided into its own functional modules, or two or more functions can be integrated into one processing module. The integrated modules can be implemented in hardware or as software functional modules. Optionally, the module division in this application embodiment is illustrative and only represents one logical functional division; other division methods may be used in actual implementation. Furthermore, "module" here can refer to an application-specific integrated circuit (ASIC), a circuit, a processor and memory executing one or more software or firmware programs, integrated logic circuits, and / or other devices that can provide the above functions.
[0135] When using functional module division Figure 8 A schematic diagram of a device for determining time delay compensation values is shown. Figure 8 As shown, the delay compensation value determination device 80 includes a transceiver module 801 and a processing module 802.
[0136] In some embodiments, the delay compensation value determination device 80 may further include a storage module. Figure 8 (Not shown in the image) is used to store program instructions and data.
[0137] The transceiver module 801 is used to acquire the first delay compensation value of each antenna of each pRRU in the plurality of pRRUs, and the received signal of each pRRU; the plurality of pRRUs are located in a distributed massive MIMO communication system, and the first delay compensation value is the compensation value of the delay of the radio frequency channel of the antenna; the processing module 802 is used to determine the second delay compensation value of each pRRU based on the first delay compensation value of each antenna of the pRRU and the received signal of the pRRU; the second delay compensation value is the compensation value of the delay between the pRRU and the baseband device, excluding the first delay compensation value; the processing module 802 is also used to sum the first delay compensation value of each antenna of the pRRU and the second delay compensation value of the pRRU as the total delay compensation value of each antenna of the pRRU.
[0138] Optionally, the transceiver module 801 is used to obtain a first delay compensation value for each antenna of each pRRU in a plurality of pRRUs, including: obtaining a plurality of first delay values for each antenna of each pRRU; the first delay value is the delay value of the radio frequency channel of the antenna; for each pRRU, determining a first reference delay value of the pRRU; the first reference delay value is the minimum value among the average first delay values of the plurality of antennas of the pRRU, and the average first delay value is the average value of the plurality of first delay values; for each antenna in the pRRU, taking the difference between the average first delay value of the antenna and the first reference delay value as the first delay compensation value of the antenna.
[0139] Optionally, the processing module 802 is used to determine a second delay compensation value for the pRRU based on multiple first delay compensation values of the pRRU and the received signal of the pRRU, including: performing delay compensation on the received signal of the pRRU based on the multiple first delay compensation values of the pRRU to obtain a second delay value of the received signal of the pRRU; and determining the second delay compensation value of the pRRU based on the multiple second delay values of the pRRU.
[0140] Optionally, the processing module 802 is further configured to determine a second delay compensation value for the pRRU based on the second delay values of the multiple pRRUs, including: determining a second reference delay value for the multiple pRRUs; the second reference delay value being the minimum value among the second delay values of the multiple pRRUs; and using the difference between the second delay value of the pRRU and the second reference delay value as the second delay compensation value for the pRRU.
[0141] All relevant content of each step involved in the above method embodiments can be referenced from the functional description of the corresponding functional module, and will not be repeated here.
[0142] When the functions of the above modules are implemented in hardware... Figure 9 A schematic diagram of a device for determining time delay compensation values is shown. Figure 9As shown, the delay compensation value determination device 90 includes a processor 901, a memory 902, and a bus 903. The processor 901 and the memory 902 can be connected via the bus 903.
[0143] Processor 901 is the control center of delay compensation value determination device 90. It can be a single processor or a collective term for multiple processing elements. For example, processor 901 can be a general-purpose central processing unit (CPU) or other general-purpose processors. Among them, the general-purpose processor can be a microprocessor or any conventional processor.
[0144] As one embodiment, processor 901 may include one or more CPUs, for example Figure 9 CPU 0 and CPU 1 are shown in the diagram.
[0145] The memory 902 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but is not limited thereto.
[0146] As one possible implementation, the memory 902 can exist independently of the processor 901. The memory 902 can be connected to the processor 901 via a bus 903 and is used to store instructions or program code. When the processor 901 calls and executes the instructions or program code stored in the memory 902, it can implement the delay compensation value determination method provided in the embodiments of this application.
[0147] In another possible implementation, the memory 902 can also be integrated with the processor 901.
[0148] Bus 903 can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus. This bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 9 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.
[0149] It should be pointed out that, Figure 9 The structure shown does not constitute a limitation on the delay compensation value determination device 90. Except... Figure 9 In addition to the components shown, the delay compensation value determining device 90 may include more or fewer components than shown, or combine certain components, or have different component arrangements.
[0150] As an example, combined Figure 8 The transceiver module 801 and processing module 802 in the delay compensation value determination device 80 perform the same functions as... Figure 9 The processor 901 in it has the same function.
[0151] Optional, such as Figure 9 As shown, the delay compensation value determination device 90 provided in this application embodiment may further include a communication interface 904.
[0152] Communication interface 904 is used to connect with other devices via a communication network. This communication network can be Ethernet, a wireless access network, a wireless local area network (WLAN), etc. Communication interface 904 may include a receiving unit for receiving data and a transmitting unit for transmitting data.
[0153] In one possible implementation, the communication interface 904 in the delay compensation value determination device 90 provided in this application embodiment can also be integrated into the processor 901, and this application embodiment does not specifically limit this.
[0154] As a possible product form, the delay compensation value determination device of this application embodiment can also be implemented using the following: one or more field programmable gate arrays (FPGAs), programmable logic devices (PLDs), controllers, state machines, gate logic, discrete hardware components, any other suitable circuits, or any combination of circuits capable of performing the various functions described throughout this application.
[0155] Through the above description of the embodiments, those skilled in the art will clearly understand that, for the sake of convenience and brevity, only the division of the above functional units is used as an example. In practical applications, the above functions can be assigned to different functional units as needed, that is, the internal structure of the device can be divided into different functional units to complete all or part of the functions described above. The specific working process of the system, device, and unit described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.
[0156] This application also provides a computer-readable storage medium storing a computer program or instructions thereon, which, when executed, causes a computer to perform the various steps in the method flow shown in the above method embodiments.
[0157] Embodiments of this application provide a computer program product containing instructions that, when executed on a computer, cause the computer to perform the various steps in the method flow shown in the above-described method embodiments.
[0158] This application provides a chip system, including: a processor and an interface circuit; the interface circuit is used to receive computer programs or instructions and transmit them to the processor; the processor is used to execute the computer programs or instructions so that the chip system performs each step in the method flow shown in the above method embodiments.
[0159] The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), registers, hard disks, optical fibers, compact disc read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing, or any other form of computer-readable storage medium in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and the storage medium may reside in a purpose-specific ASIC. In the embodiments of this application, the computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.
[0160] Since the delay compensation value determination device, computer-readable storage medium, and computer program product provided in this embodiment can be applied to the delay compensation value determination method provided in this embodiment, the technical effects they can achieve can also be referred to the above method embodiments. The embodiments of this application will not be repeated here.
[0161] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, the disclosure, and the appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple instances. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.
[0162] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the spirit and scope of this application. Accordingly, this specification and drawings are merely exemplary illustrations of this application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and modifications.
Claims
1. A method for determining a time delay compensation value, characterized in that, The method includes: The first delay compensation value of each antenna of each pRRU in a plurality of pRRUs is obtained, as well as the received signal of each pRRU; the plurality of pRRUs are located in a distributed massive MIMO communication system, and the first delay compensation value is the compensation value of the delay of the radio frequency channel of the antenna. For each pRRU, a second delay compensation value is determined based on multiple first delay compensation values of the pRRU and the received signal of the pRRU; the second delay compensation value is the compensation value for the delay between the pRRU and the baseband device, excluding the first delay compensation value. The sum of the first delay compensation value and the second delay compensation value of each antenna of the pRRU is taken as the total delay compensation value of each antenna of the pRRU.
2. The method according to claim 1, characterized in that, The step of obtaining the first time delay compensation value for each antenna of each pRRU in the plurality of pRRUs includes: Obtain multiple first delay values for each antenna of each pRRU; the first delay values are the delay values of the radio frequency channel of the antenna; For each pRRU, a first reference delay value is determined for the pRRU; the first reference delay value is the minimum of the average first delay values of a plurality of antennas of the pRRU, and the average first delay value is the average of the plurality of first delay values of the antennas; For each antenna in the pRRU, the difference between the average first delay value of the antenna and the first reference delay value is used as the first delay compensation value of the antenna.
3. The method according to claim 1 or 2, characterized in that, The step of determining a second delay compensation value for the pRRU based on multiple first delay compensation values of the pRRU and the received signal of the pRRU includes: Based on the multiple first delay compensation values of the pRRU, delay compensation is performed on the received signal of the pRRU to obtain the second delay value of the received signal of the pRRU. The second delay compensation value of the pRRU is determined based on the second delay values of the plurality of pRRUs.
4. The method according to claim 3, characterized in that, The step of determining the second delay compensation value of the pRRU based on the second delay values of the plurality of pRRUs includes: Determine a second reference delay value for the plurality of pRRUs; the second reference delay value is the minimum value among the second delay values of the plurality of pRRUs; The difference between the second delay value of the pRRU and the second reference delay value is used as the second delay compensation value of the pRRU.
5. A device for determining time delay compensation value, characterized in that, The delay compensation value determination device includes: a transceiver module and a processing module; The transceiver module is used to acquire the first delay compensation value of each antenna of each pRRU in a plurality of pRRUs, and the received signal of each pRRU; the plurality of pRRUs are located in a distributed massive MIMO communication system, and the first delay compensation value is the compensation value of the delay of the radio frequency channel of the antenna. The processing module is configured to determine a second delay compensation value for each pRRU based on multiple first delay compensation values of the pRRU and the received signal of the pRRU; the second delay compensation value is a compensation value for the delay between the pRRU and the baseband device, excluding the first delay compensation value. The processing module is further configured to use the sum of the first delay compensation value of each antenna of the pRRU and the second delay compensation value of the pRRU as the total delay compensation value of each antenna of the pRRU.
6. The time delay compensation value determination device according to claim 5, characterized in that, The transceiver module is used to obtain the first delay compensation value for each antenna of each pRRU in the plurality of pRRUs, including: Obtain multiple first delay values for each antenna of each pRRU; the first delay values are the delay values of the radio frequency channel of the antenna; For each pRRU, a first reference delay value is determined for the pRRU; the first reference delay value is the minimum of the average first delay values of a plurality of antennas of the pRRU, and the average first delay value is the average of the plurality of first delay values of the antennas; For each antenna in the pRRU, the difference between the average first delay value of the antenna and the first reference delay value is used as the first delay compensation value of the antenna.
7. The time delay compensation value determination device according to claim 5 or 6, characterized in that, The processing module is configured to determine a second delay compensation value for the pRRU based on multiple first delay compensation values of the pRRU and the received signal of the pRRU, including: Based on the multiple first delay compensation values of the pRRU, delay compensation is performed on the received signal of the pRRU to obtain the second delay value of the received signal of the pRRU. The second delay compensation value of the pRRU is determined based on the second delay values of the plurality of pRRUs.
8. The time delay compensation value determination device according to claim 7, characterized in that, The processing module is further configured to determine a second delay compensation value for the pRRU based on the second delay values of the plurality of pRRUs, including: Determine a second reference delay value for the plurality of pRRUs; the second reference delay value is the minimum value among the second delay values of the plurality of pRRUs; The difference between the second delay value of the pRRU and the second reference delay value is used as the second delay compensation value of the pRRU.
9. A device for determining time delay compensation value, characterized in that, The delay compensation value determination device includes: a processor coupled to a memory for storing programs or instructions, which, when executed by the processor, cause the device to perform the method as described in any one of claims 1 to 4.
10. A computer-readable storage medium having a computer program or instructions stored thereon, characterized in that, When the computer program or instructions are executed, they cause the computer to perform the method as described in any one of claims 1 to 4.
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