Circuit board with embedded components and method of manufacturing the same

Abstract

The application provides a manufacturing method of a circuit board with embedded elements, comprising the following steps: providing a circuit substrate, comprising a substrate layer and a first conductive circuit layer, and a receiving hole is formed in the circuit substrate; adhering a peelable adhesive on the surface of the substrate layer away from the first conductive circuit layer; arranging a first electronic element in the receiving hole, the first electronic element comprising a first electrode facing the peelable adhesive; removing the peelable adhesive, arranging a second conductive circuit layer on the surface away from the first conductive circuit layer, and electrically connecting the second conductive circuit layer to the first electronic element; pressing a first inner substrate on the second conductive circuit layer; forming a slot on the first inner substrate, and part of the second conductive circuit layer is exposed from the bottom of the slot; arranging a second electronic element in the slot to be electrically connected to the second conductive circuit layer; pressing a first outer substrate on the first inner substrate and the second electronic element to obtain a circuit board. The application also provides a circuit board with embedded elements.

Description

Technical Field

[0001] This application relates to the field of circuit board technology, and in particular to a circuit board with embedded components and a method for manufacturing the same. Background Technology

[0002] To achieve circuit board integration and thinning, multiple electronic components are typically embedded within the circuit board. Existing methods for simultaneously placing multiple electronic components (active and passive) on a circuit board usually include: embedding multiple electronic components in the same dielectric layer of the circuit board; or embedding some electronic components in the dielectric layer of the circuit board while placing others on the surface of the circuit board. The former method, embedding multiple electronic components in the same layer, can easily affect the overall rigidity of the circuit board; the latter method results in long signal transmission distances between electronic components, slow response times, and high losses. Furthermore, placing electronic components on the surface of the circuit board occupies wiring area and is detrimental to achieving a thinner circuit board. Summary of the Invention

[0003] In view of this, this application provides a method for manufacturing a circuit board with embedded components that is beneficial for reducing signal transmission loss.

[0004] In addition, this application also provides a circuit board with embedded components manufactured using the above-described manufacturing method.

[0005] One embodiment of this application provides a method for manufacturing a circuit board with embedded components, comprising the following steps:

[0006] A circuit board is provided, the circuit board including a substrate layer and a first conductive circuit layer formed on a surface of the substrate layer, and a receiving hole is formed through the circuit board.

[0007] A peelable adhesive is attached to the surface of the substrate layer away from the first conductive circuit layer.

[0008] The first electronic component is disposed in the receiving hole;

[0009] Remove the peelable adhesive and form a second conductive circuit layer on the surface of the substrate layer opposite to the first conductive circuit layer. One side of the first electronic component is electrically connected to one side of the second conductive circuit layer.

[0010] A first inner substrate is laminated onto the second conductive line layer, and a second inner substrate is laminated onto the first conductive line layer.

[0011] A slot is formed through the first inner substrate, and a portion of the second conductive circuit layer is exposed from the bottom of the slot;

[0012] A second electronic component is disposed in the slot, and the second electronic component is electrically connected to the other side of the second conductive circuit layer;

[0013] A first outer substrate is pressed onto the surface of the first inner substrate and the second electronic component away from the first electronic component to obtain a circuit board with embedded components.

[0014] In some embodiments, the first electronic component is an active component, and the second electronic component is a passive component.

[0015] In some embodiments, the first electronic component includes a first body and a first electrode and a second electrode electrically connected to the first body, wherein the first electrode and the second electrode are located on opposite sides of the first body.

[0016] The step "attaching a peelable adhesive to the surface of the substrate layer away from the first conductive line layer" includes:

[0017] The peelable adhesive is disposed on the first electrode;

[0018] The step "removing the peelable adhesive and forming a second conductive line layer on the surface of the substrate layer opposite to the first conductive line layer" includes:

[0019] The second conductive line layer is disposed on the first electrode.

[0020] In some embodiments, the first inner substrate includes at least one first dielectric layer and at least one first inner circuit layer, the first dielectric layer and the first inner circuit layer being stacked sequentially on the second conductive circuit layer; at least one first conductor is disposed through the first dielectric layer, the first conductor being electrically connected to the first inner circuit layer and the second conductive circuit layer.

[0021] The second inner substrate includes at least one second dielectric layer and at least one second inner circuit layer, wherein the second dielectric layer and the second inner circuit layer are stacked sequentially on the first conductive circuit layer; at least two second conductors are disposed through the second dielectric layer, wherein one second conductor is electrically connected to the second inner circuit layer and the first conductive circuit layer, and the other second conductor is electrically connected to the second inner circuit layer and the second electrode of the first electronic component.

[0022] In some embodiments, the second electronic component includes a second body and a third electrode electrically connected to the second body, one end of the third electrode being electrically connected to the second conductive circuit layer, thereby the second electronic component being electrically connected to the first electronic component.

[0023] In some embodiments, the first outer substrate includes at least a third dielectric layer and at least a first outer circuit layer, wherein the third dielectric layer and the first outer circuit layer are sequentially stacked on the first inner substrate and the second electronic component;

[0024] At least two third conductors are provided through the third dielectric layer, wherein one of the third conductors is electrically connected to the other end of the first outer circuit layer and the third electrode, and the other third conductor is electrically connected to the first outer circuit layer and the first inner circuit layer.

[0025] In some embodiments, after the step of "pressing the first outer substrate onto the first inner substrate and the second electronic component", the method further includes:

[0026] A second outer substrate is pressed onto the second inner substrate;

[0027] The second outer substrate includes at least one fourth dielectric layer and at least one second outer circuit layer, wherein the fourth dielectric layer and the second outer circuit layer are sequentially stacked on the second inner substrate;

[0028] At least one fourth conductor is provided through the fourth dielectric layer, and the fourth conductor is electrically connected to the second outer circuit layer and the second inner circuit layer.

[0029] In some embodiments, after the step of "pressing the second outer substrate onto the second inner substrate", the method further includes:

[0030] A first protective layer is formed on the first outer circuit layer, and a second protective layer is formed on the second outer circuit layer.

[0031] This application also provides a circuit board with embedded components, comprising:

[0032] A circuit board, the circuit board including a substrate layer and a first conductive circuit layer formed on one surface of the substrate layer, and a receiving hole is formed through the circuit board.

[0033] A first electronic component is disposed in the receiving hole;

[0034] A second conductive circuit layer is disposed on the surface of the substrate layer opposite to the first conductive circuit layer and on the surface of the first electronic component, and the second conductive circuit layer is electrically connected to the first electronic component.

[0035] A first inner substrate is disposed on the second conductive line layer. A slot is formed through the first inner substrate, and a portion of the second conductive line layer is exposed from the bottom of the slot.

[0036] A second electronic component is disposed in the slot, and the second electronic component is electrically connected to the second conductive circuit layer;

[0037] The second inner substrate is disposed on the first conductive line layer;

[0038] A first outer substrate is disposed on a surface of the first inner substrate opposite to the circuit substrate and on a surface of the second electronic component opposite to the first electronic component. The first outer substrate includes at least one third dielectric layer and at least one first outer circuit layer stacked sequentially. The first outer circuit layer is electrically connected to the second electronic component.

[0039] In some embodiments, the first electronic component includes a first body and a first electrode and a second electrode electrically connected to the first body. The first electrode and the second electrode are located on opposite sides of the first body, and the first electrode and the second electrode are electrically connected. The second conductive line layer is electrically connected to the first electrode.

[0040] The second inner substrate includes at least one second dielectric layer and at least one second inner circuit layer stacked sequentially on the first conductive circuit layer. At least two second conductors are disposed through the second dielectric layer, wherein one second conductor is electrically connected to the second inner circuit layer and the first conductive circuit layer, and the other second conductor is electrically connected to the second inner circuit layer and the second electrode of the first electronic component.

[0041] The method for manufacturing a circuit board with embedded components provided in this application effectively saves component mounting space by embedding the first electronic component and the second electronic component sequentially, and placing the first electronic component and the second electronic component in different layers of the circuit board. This avoids the impact of embedding multiple components in the same layer on board rigidity, facilitates the thinning of the circuit board, and allows for flexible selection of the types of the first electronic component and the second electronic component. Furthermore, by setting the second conductive line layer to directly electrically connect the first electronic component and the second electronic component, the connection distance between them is greatly shortened, reducing signal transmission loss and accelerating response speed. Attached Figure Description

[0042] Figure 1 This is a cross-sectional view of a circuit board provided in an embodiment of this application.

[0043] Figure 2 Is Figure 1 The diagram shows a cross-sectional view of the circuit board after a receiving hole has been made.

[0044] Figure 3 Is Figure 2 The cross-sectional view shown is of the substrate layer after the peelable adhesive has been applied.

[0045] Figure 4 Is Figure 3 A cross-sectional view showing the placement of the first electronic component in the receiving hole.

[0046] Figure 5 Is Figure 4 The cross-sectional view shown is of the substrate layer and the first electronic component after the second conductive line layer has been disposed thereon.

[0047] Figure 6 Is Figure 5 The diagram shows a cross-sectional view of a first inner substrate disposed on a first conductive line layer and a second inner substrate disposed on a second conductive line layer.

[0048] Figure 7 Is Figure 6 The cross-sectional view shown is of the first inner substrate after a slot has been made.

[0049] Figure 8 Is Figure 7 The cross-sectional view shown is after the second electronic component is installed in the slot.

[0050] Figure 9 Is Figure 8 The cross-sectional view shown is provided on the first inner substrate and the second electronic component after the first outer substrate is disposed thereon.

[0051] Figure 10 Is Figure 9 The cross-sectional view shown is of the first outer substrate after the first protective layer has been applied.

[0052] Explanation of main component symbols

[0053] Circuit Board 100

[0054] Circuit board 10

[0055] Substrate layer 11

[0056] First conductive circuit layer 12

[0057] Reception Hole 20

[0058] Peelable adhesive 30

[0059] First electronic component 40

[0060] First ontology 401

[0061] First electrode 402

[0062] Second electrode 403

[0063] Second conductive circuit layer 42

[0064] First solder pad 421

[0065] First inner substrate 50

[0066] First dielectric layer 501

[0067] First inner circuit layer 502

[0068] First conductor 503

[0069] Second inner substrate 52

[0070] Second dielectric layer 521

[0071] Second inner circuit layer 522

[0072] Second conductor 523

[0073] Grooving 60

[0074] Second electronic component 70

[0075] Second Body 71

[0076] Third electrode 72

[0077] Adhesive 73

[0078] First outer substrate 80

[0079] Third dielectric layer 801

[0080] First outer circuit layer 802

[0081] Third conductor 803

[0082] Second solder pad 804

[0083] Second outer substrate 82

[0084] Fourth dielectric layer 821

[0085] Second outer circuit layer 822

[0086] Fourth conductor 823

[0087] Third solder pad 824

[0088] First protective layer 90

[0089] First opening 901

[0090] Second protective layer 92

[0091] Second opening 921

[0092] The following detailed description, in conjunction with the accompanying drawings, will further illustrate this application. Detailed Implementation

[0093] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0094] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0095] To further illustrate the technical means and effects adopted by this application in achieving its intended purpose, the following detailed description of this application is provided in conjunction with the accompanying drawings and preferred embodiments.

[0096] One embodiment of this application provides a method for manufacturing a circuit board with embedded components, comprising the following steps:

[0097] Step S11, please refer to Figure 1 , and provides circuit board 10.

[0098] In this embodiment, the circuit board 10 includes a substrate layer 11 and a first conductive circuit layer 12 formed on one surface of the substrate layer 11.

[0099] The substrate layer 11 can be made of one of the following resins: epoxy resin, ABF resin, polypropylene (PP), BT resin, polyphenylene oxyether (PPO), polyimide (PI), polyethylene terephthalate (PET), and polyethylene naphthalate (PEN). In this embodiment, the substrate layer 11 is made of ABF resin.

[0100] Step S12, please refer to Figure 2 A receiving hole 20 is formed in the circuit board 10.

[0101] The receiving hole 20 penetrates the circuit board 10.

[0102] Step S13, please refer to Figure 3 A peelable adhesive 30 is attached to the surface of the substrate layer 11 away from the first conductive line layer 12.

[0103] The peelable adhesive 30 seals one end of the receiving hole 20.

[0104] Step S14, please refer to Figure 4 The first electronic component 40 is placed in the receiving hole 20.

[0105] The first electronic component 40 is also located on the peelable adhesive 30.

[0106] In this embodiment, the first electronic component 40 includes a first body 401 and a first electrode 402 and a second electrode 403 electrically connected to the first body 401. The first electrode 402 and the second electrode 403 are located on opposite sides of the first body 401, and the first electrode 402 and the second electrode 403 are electrically connected. The first electrode 402 faces the side of the peelable adhesive 30.

[0107] The first body 401 is provided with the first electrode 402 and the second electrode 403, the two opposing surfaces of which are approximately flush with the two opposing surfaces of the substrate layer 11.

[0108] In this embodiment, the first electronic component 40 is an active component, specifically a TSV chip, and the first electrode 402 and the second electrode 403 are connected through a TSV (Through-Silicon Via).

[0109] Step S15, please refer to Figure 5 Remove the peelable adhesive 30, and form a second conductive line layer 42 on the surface of the substrate layer 11 opposite to the first conductive line layer 12. The second conductive line layer 42 includes a first solder pad 421.

[0110] The second conductive line layer 42 is also disposed on the surface of the first electronic component 40 on which the first electrode 402 is disposed, and the first electrode 402 is electrically connected to the first pad 421.

[0111] In this embodiment, copper paste (not shown) can be printed on the surface of the substrate layer 11 opposite to the first conductive circuit layer 12 and on the surface of the first electronic component 40 where the first electrode 402 is disposed. Part of the copper paste fills the receiving hole 20 and, after curing, is used to fix the first electronic component 40. Then, the copper paste is laser-cast to form the second conductive circuit layer 42. This method of forming the second conductive circuit layer 42 by printing copper paste and then laser-casting it effectively improves the heat dissipation of the first electronic component 40 and increases the size of the first electrode 402, which is beneficial for improving the flexibility and accuracy of subsequent electrical connections.

[0112] In other embodiments, the second conductive layer 42 may also be formed using a semi-additive process (SAP).

[0113] Step S16, please refer to Figure 6 A first inner substrate 50 is laminated onto the second conductive line layer 42, and a second inner substrate 52 is laminated onto the first conductive line layer 12.

[0114] The first inner substrate 50 includes at least one first dielectric layer 501 and at least one first inner circuit layer 502, which are sequentially stacked on the second conductive circuit layer 42. At least one first conductor 503 is disposed through the first dielectric layer 501, and the first conductor 503 is electrically connected to the first inner circuit layer 502 and the second conductive circuit layer 42. The second inner substrate 52 includes at least one second dielectric layer 521 and at least one second inner circuit layer 522, which are sequentially stacked on the first conductive circuit layer 12. At least two second conductors 523 are disposed through the second dielectric layer 521, one of which is electrically connected to the second inner circuit layer 522 and the first conductive circuit layer 12, and the other is electrically connected to the second inner circuit layer 522 and the second electrode 403 of the first electronic component 40.

[0115] In this embodiment, the first inner substrate 50 includes two first dielectric layers 501 and two first inner circuit layers 502, which are alternately stacked on the second conductive circuit layer 42. The second inner substrate 52 includes two second dielectric layers 521 and two second inner circuit layers 522, which are alternately stacked on the first conductive circuit layer 12.

[0116] In this embodiment, the materials of the first dielectric layer 501 and the second dielectric layer 521 can be selected from one of the following resins: epoxy resin, ABF resin, polypropylene (PP), BT resin, polyphenylene ether (PPO), polyimide (PI), polyethylene terephthalate (PET), and polyethylene naphthalate (PEN). In this embodiment, both the first dielectric layer 501 and the second dielectric layer 521 are made of ABF resin.

[0117] Step S17, please refer to Figure 7 A slot 60 is formed in the first inner substrate 50.

[0118] The slot 60 penetrates the first inner substrate 50, and a portion of the first solder pad 421 is exposed from the bottom of the slot 60. In this embodiment, the slot 60 is positioned corresponding to the location of the first electronic component 40.

[0119] Step S18, please refer to Figure 8 and Figure 9 At least one second electronic component 70 is disposed in the slot 60.

[0120] The second electronic component 70 includes a second body 71 and a third electrode 72 electrically connected to the second body 71. The third electrode 72 is electrically connected to the first pad 421, thereby the second electronic component 70 is electrically connected to the first electronic component 40 through the second conductive line layer 42.

[0121] In this embodiment, there are two second electronic components 70, which are spaced apart in the slot 60. Each second electronic component 70 includes two third electrodes 72, which are respectively disposed on opposite sides of the second body 71. One end of each third electrode 72 is electrically connected to the first solder pad 421, and the other end is substantially flush with a surface of the first inner substrate 50 opposite to the second conductive line layer 42. In this embodiment, the second electronic component 70 is a passive component, specifically a capacitor.

[0122] In this embodiment, an adhesive body 73 can be formed by filling the slot 60 with insulating adhesive (see [link]). Figure 9 This fixes the second electronic component 70 in the slot 60. The adhesive 73 may be made of the same material as the first dielectric layer 501.

[0123] Step S19, please refer to Figure 9 A first outer substrate 80 is pressed onto the first inner substrate 50 and the second electronic component 70, and a second outer substrate 82 is pressed onto the second inner substrate 52.

[0124] The first outer substrate 80 includes at least one third dielectric layer 801 and at least one first outer circuit layer 802, wherein the first outer circuit layer 802 includes a second solder pad 804. The third dielectric layer 801 and the first outer circuit layer 802 are sequentially stacked on the first inner substrate 50 and the second electronic component 70. At least two third conductors 803 are provided through the third dielectric layer 801, wherein one third conductor 803 is electrically connected to the third electrode 72 of the first outer circuit layer 802 and the second electronic component 70, and the other third conductor 803 is electrically connected to the first outer circuit layer 802 and the first inner circuit layer 502.

[0125] The second outer substrate 82 includes at least one fourth dielectric layer 821 and at least one second outer circuit layer 822, the second outer circuit layer 822 including a third solder pad 824. The fourth dielectric layer 821 and the second outer circuit layer 822 are sequentially stacked on the second inner substrate 52. At least one fourth conductor 823 is provided through the fourth dielectric layer 821, the fourth conductor 823 being electrically connected to the second outer circuit layer 822 and the second inner circuit layer 522.

[0126] In this embodiment, the number of the third dielectric layer 801, the first outer circuit layer 802, the fourth dielectric layer 821, and the second outer circuit layer 822 is one. The materials of the third dielectric layer 801 and the fourth dielectric layer 821 can be the same as the materials of the first dielectric layer 501 and the second dielectric layer 521.

[0127] Step S20, please refer to Figure 10 A first protective layer 90 is formed on the first outer circuit layer 802, and a second protective layer 92 is formed on the second outer circuit layer 822, thereby obtaining the circuit board 100.

[0128] In this embodiment, the first protective layer 90 includes a plurality of first openings 901, and a portion of the second solder pads 804 of the first outer circuit layer 802 are exposed from the bottom of the first openings 901. The second protective layer 92 includes a plurality of second openings 921, and a portion of the third solder pads 824 of the second outer circuit layer 822 are exposed from the bottom of the second openings 921.

[0129] Both the first protective layer 90 and the second protective layer 92 can be made of solder resist ink, such as solder resist green oil. The first protective layer 90 is used to protect the first outer circuit layer 802, and the second protective layer 92 is used to protect the second outer circuit layer 822.

[0130] The method for manufacturing a circuit board with embedded components provided in this application effectively saves component mounting space by embedding the first electronic component 40 and the second electronic component 70 sequentially, and placing the first electronic component 40 and the second electronic component 70 in different layers of the circuit board 100. This avoids the impact of embedding multiple components in the same layer on the board surface rigidity, facilitates the thinning of the circuit board 100, and allows for flexible selection of the types of the first electronic component 40 and the second electronic component 70. Furthermore, by providing the second conductive line layer 42 to directly electrically connect the first electronic component 40 and the second electronic component 70, the connection distance between them is greatly shortened, reducing signal transmission loss and accelerating response speed.

[0131] Please see Figure 10 An embodiment of this application also provides a circuit board 100 with embedded components manufactured using the above-described manufacturing method. The circuit board 100 includes a circuit substrate 10, a first electronic component 40, a second conductive circuit layer 42, a first inner substrate 50, a second inner substrate 52, a second electronic component 70, a first outer substrate 80, a second outer substrate 82, a first protective layer 90, and a second protective layer 92.

[0132] The circuit board 10 includes a substrate layer 11 and a first conductive circuit layer 12 formed on one surface of the substrate layer 11. A receiving hole 20 is formed through the circuit board 10, and the first electronic component 40 is disposed in the receiving hole 20. The first electronic component 40 includes a first body 401 and a first electrode 402 and a second electrode 403 electrically connected to the first body 401. The first electrode 402 and the second electrode 403 are respectively located on opposite sides of the first body 401. The opposite surfaces of the first body 401 where the first electrode 402 and the second electrode 403 are disposed are approximately flush with the opposite surfaces of the substrate layer 11, and the first electrode 402 and the second electrode 403 are electrically connected. The second electrode 403 and the first conductive circuit layer 12 are located on the same side.

[0133] The second conductive circuit layer 42 is disposed on the surface of the substrate layer 11 opposite to the first conductive circuit layer 12 and on the surface of the first electronic component 40 on which the first electrode 402 is disposed. The second conductive circuit layer 42 includes a first solder pad 421, and the first electrode 402 is electrically connected to the first solder pad 421.

[0134] The first inner substrate 50 is disposed on the second conductive circuit layer 42, and the second inner substrate 52 is disposed on the first conductive circuit layer 12. A slot 60 is formed through the first inner substrate 50, and a portion of the first solder pad 421 is exposed from the bottom of the slot 60. The second electronic component 70 is disposed in the slot 60. The second electronic component 70 includes a second body 71 and a third electrode 72 electrically connected to the second body 71. The third electrode 72 is electrically connected to the first solder pad 421, thereby the second electronic component 70 is electrically connected to the first electronic component 40 through the second conductive circuit layer 42.

[0135] The first inner substrate 50 includes at least one first dielectric layer 501 and at least one first inner circuit layer 502, which are sequentially stacked on the second conductive circuit layer 42. At least one first conductor 503 is disposed through the first dielectric layer 501, and the first conductor 503 is electrically connected to the first inner circuit layer 502 and the second conductive circuit layer 42. The second inner substrate 52 includes at least one second dielectric layer 521 and at least one second inner circuit layer 522, which are sequentially stacked on the first conductive circuit layer 12. At least two second conductors 523 are disposed through the second dielectric layer 521, one of which is electrically connected to the second inner circuit layer 522 and the first conductive circuit layer 12, and the other is electrically connected to the second inner circuit layer 522 and the second electrode 403 of the first electronic component 40.

[0136] In this embodiment, the first inner substrate 50 includes two first dielectric layers 501 and two first inner circuit layers 502, which are alternately stacked on the second conductive circuit layer 42. The second inner substrate 52 includes two second dielectric layers 521 and two second inner circuit layers 522, which are alternately stacked on the first conductive circuit layer 12.

[0137] In this embodiment, there are two second electronic components 70, which are spaced apart in the slot 60. Each second electronic component 70 includes two third electrodes 72, which are respectively disposed on opposite sides of the second body 71. One end of each third electrode 72 is electrically connected to the first solder pad 421, and the other end is substantially flush with a surface of the first inner substrate 50 opposite to the second conductive line layer 42. In this embodiment, the second electronic component 70 is a passive component, specifically a capacitor.

[0138] In this embodiment, an adhesive 73 is also provided in the slot 60 for fixing the second electronic component 70 in the slot 60.

[0139] The first outer substrate 80 is disposed on a surface of the first inner substrate 50 opposite to the circuit substrate 10 and on a surface of the second electronic component 70 opposite to the first electronic component 40. The second outer substrate 82 is disposed on the second inner substrate 52. The first outer substrate 80 includes at least one third dielectric layer 801 and at least one first outer circuit layer 802, the first outer circuit layer 802 including a second solder pad 804. The third dielectric layer 801 and the first outer circuit layer 802 are sequentially stacked on the first inner substrate 50 and the second electronic component 70. At least two third conductors 803 are provided through the third dielectric layer 801, one of which is electrically connected to the third electrode 72 of the first outer circuit layer 802 and the second electronic component 70, and the other is electrically connected to the first outer circuit layer 802 and the first inner circuit layer 502.

[0140] The second outer substrate 82 includes at least one fourth dielectric layer 821 and at least one second outer circuit layer 822, the second outer circuit layer 822 including a third solder pad 824. The fourth dielectric layer 821 and the second outer circuit layer 822 are sequentially stacked on the second inner substrate 52. At least one fourth conductor 823 is provided through the fourth dielectric layer 821, the fourth conductor 823 being electrically connected to the second outer circuit layer 822 and the second inner circuit layer 522.

[0141] The first protective layer 90 is disposed on the first outer circuit layer 802, and the second protective layer 92 is disposed on the second outer circuit layer 822. The first protective layer 90 includes a plurality of first openings 901, and a portion of the second solder pads 804 of the first outer circuit layer 802 are exposed from the bottom of the first openings 901. The second protective layer 92 includes a plurality of second openings 921, and a portion of the third solder pads 824 of the second outer circuit layer 822 are exposed from the bottom of the second openings 921.

[0142] The above description is merely an optimized implementation of this application, but in actual applications, it should not be limited to this implementation.

Claims

1. A method for manufacturing a circuit board with embedded components, characterized in that, Including the following steps: A circuit board is provided, the circuit board including a substrate layer and a first conductive circuit layer formed on a surface of the substrate layer, and a receiving hole is formed through the circuit board. A peelable adhesive is attached to the surface of the substrate layer away from the first conductive circuit layer. The first electronic component is disposed in the receiving hole; Remove the peelable adhesive and form a second conductive circuit layer on the surface of the substrate layer opposite to the first conductive circuit layer. One side of the first electronic component is electrically connected to one side of the second conductive circuit layer. A first inner substrate is laminated onto the second conductive line layer, and a second inner substrate is laminated onto the first conductive line layer. A slot is formed through the first inner substrate, and a portion of the second conductive circuit layer is exposed from the bottom of the slot; A second electronic component is disposed in the slot, and the second electronic component is electrically connected to the other side of the second conductive circuit layer; A first outer substrate is pressed onto the surface of the first inner substrate and the second electronic component away from the first electronic component to obtain a circuit board with embedded components.

2. The method for manufacturing a circuit board as described in claim 1, characterized in that, The first electronic component is an active component, and the second electronic component is a passive component.

3. The method for manufacturing a circuit board as described in claim 1, characterized in that, The first electronic component includes a first body and a first electrode and a second electrode electrically connected to the first body, wherein the first electrode and the second electrode are located on opposite sides of the first body. The step "attaching a peelable adhesive to the surface of the substrate layer away from the first conductive circuit layer" includes: The peelable adhesive is disposed on the first electrode; The step "removing the peelable adhesive and forming a second conductive layer on the surface of the substrate layer opposite to the first conductive layer" includes: The second conductive line layer is disposed on the first electrode.

4. The method for manufacturing a circuit board as described in claim 3, characterized in that, The first inner substrate includes at least one first dielectric layer and at least one first inner circuit layer, wherein the first dielectric layer and the first inner circuit layer are stacked sequentially on the second conductive circuit layer; at least one first conductor is disposed through the first dielectric layer, wherein the first conductor is electrically connected to the first inner circuit layer and the second conductive circuit layer. The second inner substrate includes at least one second dielectric layer and at least one second inner circuit layer, wherein the second dielectric layer and the second inner circuit layer are stacked sequentially on the first conductive circuit layer; at least two second conductors are disposed through the second dielectric layer, wherein one second conductor is electrically connected to the second inner circuit layer and the first conductive circuit layer, and the other second conductor is electrically connected to the second inner circuit layer and the second electrode.

5. The method for manufacturing a circuit board as described in claim 4, characterized in that, The second electronic component includes a second body and a third electrode electrically connected to the second body, one end of the third electrode being electrically connected to the second conductive circuit layer.

6. The method for manufacturing a circuit board as described in claim 5, characterized in that, The first outer substrate includes at least one third dielectric layer and at least one first outer circuit layer, wherein the third dielectric layer and the first outer circuit layer are sequentially stacked on the first inner substrate and the second electronic component; At least two third conductors are provided through the third dielectric layer, wherein one of the third conductors is electrically connected to the other end of the first outer circuit layer and the third electrode, and the other third conductor is electrically connected to the first outer circuit layer and the first inner circuit layer.

7. The method for manufacturing a circuit board as described in claim 6, characterized in that, After step "pressing the first outer substrate onto the surfaces of the first inner substrate and the second electronic component opposite to the first electronic component", the method further includes: A second outer substrate is pressed onto the second inner substrate; The second outer substrate includes at least one fourth dielectric layer and at least one second outer circuit layer, wherein the fourth dielectric layer and the second outer circuit layer are sequentially stacked on the second inner substrate; At least one fourth conductor is provided through the fourth dielectric layer, and the fourth conductor is electrically connected to the second outer circuit layer and the second inner circuit layer.

8. The method for manufacturing a circuit board as described in claim 7, characterized in that, After the step of "pressing the second outer substrate onto the second inner substrate", the method further includes: A first protective layer is formed on the first outer circuit layer, and a second protective layer is formed on the second outer circuit layer.

9. A circuit board with embedded components, characterized in that, include: A circuit board, the circuit board including a substrate layer and a first conductive circuit layer formed on one surface of the substrate layer, and a receiving hole is formed through the circuit board. A first electronic component is disposed in the receiving hole; A second conductive circuit layer is disposed on the surface of the substrate layer opposite to the first conductive circuit layer and on the surface of the first electronic component, and the second conductive circuit layer is electrically connected to the first electronic component. A first inner substrate is disposed on the second conductive line layer, and a slot is formed through the first inner substrate, with a portion of the second conductive line layer exposed from the bottom of the slot. A second electronic component is disposed in the slot, and the second electronic component is electrically connected to the second conductive circuit layer; The second inner substrate is disposed on the first conductive line layer; A first outer substrate is disposed on a surface of the first inner substrate opposite to the circuit substrate and on a surface of the second electronic component opposite to the first electronic component. The first outer substrate includes at least one third dielectric layer and at least one first outer circuit layer stacked sequentially. The first outer circuit layer is electrically connected to the second electronic component.

10. The circuit board as described in claim 9, characterized in that, The first electronic component includes a first body and a first electrode and a second electrode electrically connected to the first body. The first electrode and the second electrode are located on opposite sides of the first body, and the first electrode and the second electrode are electrically connected. The second conductive line layer is electrically connected to the first electrode. The second inner substrate includes at least one second dielectric layer and at least one second inner circuit layer stacked sequentially on the first conductive circuit layer. At least two second conductors are disposed through the second dielectric layer, wherein one second conductor is electrically connected to the second inner circuit layer and the first conductive circuit layer, and the other second conductor is electrically connected to the second inner circuit layer and the second electrode of the first electronic component.

Images