Circuit board leakage current detection methods, test fixtures, equipment and media

Abstract

This application provides a circuit board leakage current detection method, test fixture, device, and medium, including: responding to sending a test command, triggering the microcontroller unit of the test fixture to receive the test command, and reading the test voltage of the pin headers at one or more test points received by the pin headers and recording the corresponding test time until the power-on operation ends; receiving the test voltage and test time, which are the test voltage and test time corresponding to one or more test points read by the test fixture through a serial communication module within the test fixture; and analyzing whether leakage current has occurred at the test point according to preset analysis rules and the uploaded one or more test voltages and test times. By using the uploaded test voltage and test time for analysis, it is possible to directly determine whether leakage current has occurred at the test point. Furthermore, the actual test point where leakage current has occurred can be determined based on the uploaded test address.

Description

Technical Field

[0001] This application relates to the server field, and in particular to a method, test fixture, equipment and medium for detecting leakage current in circuit boards. Background Technology

[0002] In the server field, the power supply section is a crucial part of the circuit board, converting the voltage input from the power supply to the board into the voltages required by various chips and signals. Due to the complexity of voltage conversion and connections in the power supply section, it's often observed that some power supplies exhibit voltage even when they shouldn't be. This phenomenon is called leakage current in circuit board testing. Depending on the server's operating state, power supplies can be divided into two categories: STBY power (basic power), which continues to operate even when the server is off, as long as the server's AC power is on; and CORE power, which only operates when the server is on. The same applies to signals. For STBY power, leakage current refers to a low voltage appearing before the required power-on timing, which can be identified by a step on the waveform. For CORE power, leakage current refers to a voltage that is not 0V even when the server is off, which can be identified by waveform analysis or a multimeter. The presence of leakage current affects the judgment of logic signals, leading to errors in monitoring chips and abnormal power-on / off cycles for other power supplies and signals. When a leaky power source is used as an input for other power supplies or chips, it may cause the power supply or chip to turn on prematurely or turn off delayed, disrupting the power-on sequence, or timing disorder. This can affect the normal operation of the circuit board or even the server and the stability of the system. Therefore, once a leakage occurs, engineers need to investigate the source of the leakage.

[0003] Existing methods deduce potential leakage sources based on the connection relationships between power supplies and between power supplies and signals during the design phase. Then, an oscilloscope is used to capture the power-on waveforms of the potential leakage sources and the power supply exhibiting the leakage, and the waveforms are compared for consistency. If the waveforms match, the source of leakage is identified. If the waveforms do not match, it is necessary to continue investigating each power supply and signal from largest to smallest based on their correlation with the power supply exhibiting leakage. However, existing techniques have the following drawbacks: leakage may exist outside the test coverage area but cannot be detected due to insufficient test coverage; some board power supply circuits are complex, requiring a significant amount of time to investigate all possible leakage sources; the investigation process is cumbersome; and deducing potential leakage sources based on design principles involves guesswork and trial and error, resulting in low efficiency.

[0004] Therefore, there is an urgent need for a circuit board leakage detection method to solve the above-mentioned technical problems. Summary of the Invention

[0005] Therefore, it is necessary to provide a circuit board leakage current detection method to solve the above-mentioned technical problems.

[0006] In a first aspect, this application provides a method for detecting leakage current in a circuit board. The method is applied to an established test environment, which includes a test fixture and a circuit board under test. One or more headers within the test fixture are connected to pin headers located at one or more test points on the circuit board under test. The method includes:

[0007] In response to sending a test command, the microcontroller unit of the test fixture is triggered to receive the test command, and read the test voltage of the pin header at one or more test points received by the pin header and record the corresponding test time until the power-on operation ends;

[0008] The test voltage and the test time are received by the test fixture through the serial communication module within the test fixture, which reads the test voltage and test time corresponding to one or more test points.

[0009] Based on preset analysis rules and one or more uploaded test voltages and test times, analyze whether leakage occurs at the test point.

[0010] In some embodiments, the method further includes:

[0011] One or more of the aforementioned busbars transmit the test voltage received from the test points to the pins of the microcontroller unit;

[0012] In this embodiment, only one of the aforementioned female connectors is connected to any pin of the microcontroller unit;

[0013] Before receiving the test voltage and the test time, the method further includes:

[0014] Send a pre-defined table of pre-set test addresses and test points to the test fixture;

[0015] The test fixture is triggered to query the preset relationship table to obtain the corresponding test address based on the test point corresponding to the pin on the microcontroller unit, and then the test fixture is triggered to assign the test address to the corresponding pin.

[0016] In some embodiments, the method includes;

[0017] The test fixture receives the test voltage, test time, and corresponding pin test address of the test point from one or more pins via the serial communication module within the test fixture.

[0018] The test voltage is transmitted from the busbar to the pin of the microcontroller unit in the test fixture, and the test voltage and test time of each pin are recorded in the microcontroller unit.

[0019] In some embodiments, the method includes;

[0020] The test fixture receives the test voltage, test time, and corresponding pin test address of the test point from one or more pins via the serial communication module within the test fixture.

[0021] After analyzing the leakage at the test point, the actual location of the test point is determined by querying a preset relationship table between the test point and the test address based on the test address of the pin corresponding to the test point.

[0022] The test voltage is transmitted from the busbar to the pin of the microcontroller unit in the test fixture, and the test voltage and test time of each pin are recorded in the microcontroller unit.

[0023] In some embodiments, the method further includes:

[0024] The parity bit of the serial communication module in the test fixture is preset to determine whether to use even parity or odd parity.

[0025] The number of odd numbers in the binary code corresponding to the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module in the test fixture is counted.

[0026] If the received test voltage, test time, and parity check bit corresponding to the test address of the test point are consistent with the preset parity check bit, then the parity check is passed.

[0027] If the serial communication module transmits data using even parity, it determines whether the number of odd numbers in the binary code corresponding to the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module within the test fixture is even. If it is even, the parity check passes; otherwise, the parity check fails, and the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module within the test fixture are received again.

[0028] If the serial communication module uses odd parity to transmit data, it determines whether the number of odd numbers in the binary code corresponding to the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module in the test fixture is odd. If it is odd, the parity check passes; otherwise, the parity check fails, and the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module in the test fixture are received again.

[0029] In some embodiments, the step of analyzing whether leakage occurs at the test point based on preset analysis rules and one or more uploaded test voltages and test times includes:

[0030] If the power supply for the test board is the core power supply, then determine whether there is a non-zero test voltage at the test point;

[0031] If leakage exists, it is determined that leakage has occurred at the test point; otherwise, it is determined that leakage has occurred at the test point.

[0032] Secondly, this application provides a test fixture, which includes: a busbar, a microcontroller unit, and a serial communication module, wherein...

[0033] The header is used to connect to the header pins on one or more test points on the board under test to receive the test voltage corresponding to one or more test points.

[0034] The microcontroller unit is used to respond to the issued test command, read the test voltage of the pin header at one or more test points received by the pin header and record the corresponding test time until the power-on operation ends;

[0035] The serial communication module is used to upload the test voltage and test time corresponding to one or more test points.

[0036] In some embodiments, the microcontroller unit is further configured to read multiple test voltages to be processed from the pin headers at one or more test points continuously received by the pin headers;

[0037] The microcontroller unit is also used to filter the test voltages to be processed from the plurality of test voltages except for the maximum and minimum values ​​as test voltages to be determined.

[0038] The microcontroller unit is also used to calculate the arithmetic mean of the multiple test voltages to be determined as the test voltage.

[0039] Thirdly, this application provides an electronic device, the electronic device comprising:

[0040] One or more processors;

[0041] and a memory associated with the one or more processors, the memory storing program instructions that, when read and executed by the one or more processors, perform the following operations:

[0042] In response to sending a test command, the microcontroller unit of the test fixture is triggered to receive the test command, and read the test voltage of the pin header at one or more test points received by the pin header and record the corresponding test time until the power-on operation ends;

[0043] The test voltage and the test time are received by the test fixture through the serial communication module within the test fixture, which reads the test voltage and test time corresponding to one or more test points.

[0044] Based on preset analysis rules and one or more uploaded test voltages and test times, analyze whether leakage occurs at the test point.

[0045] Fourthly, this application also provides a computer-readable storage medium storing a computer program that causes a computer to perform the following operations:

[0046] In response to sending a test command, the microcontroller unit of the test fixture is triggered to receive the test command, and read the test voltage of the pin header at one or more test points received by the pin header and record the corresponding test time until the power-on operation ends;

[0047] The test voltage and the test time are received by the test fixture through the serial communication module within the test fixture, which reads the test voltage and test time corresponding to one or more test points.

[0048] Based on preset analysis rules and one or more uploaded test voltages and test times, analyze whether leakage occurs at the test point.

[0049] The beneficial effects achieved by this application are as follows:

[0050] This application provides a method for detecting circuit board leakage, applied to an established test environment. The established test environment includes a test fixture and a circuit board under test (DUT). One or more header pins within the test fixture are connected to one or more test points on the DUT. The method includes: responding to a test command, triggering the microcontroller unit of the test fixture to receive the test command, and reading the test voltage of the pins at the test points received by one or more header pins and recording the corresponding test time until the power-on operation ends; receiving the test voltage and the test time, wherein the test voltage and the test time are the test voltage and test time corresponding to one or more test points read by the test fixture through a serial communication module within the test fixture; and analyzing whether leakage has occurred at the test points according to preset analysis rules and the uploaded one or more test voltages and test times. This eliminates the need to check each power supply and signal sequentially; results are obtained simply by powering on. It also eliminates the need for waveform measurements using oscilloscopes or other equipment; only powering on the fixture is required, reducing equipment requirements, simplifying operation steps, and expanding the test coverage.

[0051] Furthermore, in this application, each pin of the test fixture is connected to only one pin of the microcontroller unit, ensuring the accuracy of data transmission and facilitating subsequent tracking of the uploaded test voltage.

[0052] Furthermore, this application proposes to pre-set the correspondence between test points and test addresses, and assign the test addresses to the pins of the microcontroller unit. When uploading data, the test addresses are also uploaded to the host computer for further analysis, which facilitates determining the location of the test point where leakage occurs after leakage is confirmed. Attached Figure Description

[0053] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein:

[0054] Figure 1 This is a test system architecture diagram provided in an embodiment of this application;

[0055] Figure 2 This is a schematic diagram illustrating the connection between a test fixture and a board under test, as provided in an embodiment of this application.

[0056] Figure 3 This is a schematic diagram of a leakage current detection process provided in an embodiment of this application;

[0057] Figure 4 This is a diagram of a test fixture architecture provided in an embodiment of this application;

[0058] Figure 5 This is another test fixture architecture diagram provided in the embodiments of this application;

[0059] Figure 6 This is a functional schematic diagram of a test fixture provided in an embodiment of this application;

[0060] Figure 7 This is a schematic diagram of a host computer function provided in an embodiment of this application;

[0061] Figure 8 This is a schematic diagram of a board testing method provided in an embodiment of this application;

[0062] Figure 9 This is a structural diagram of an electronic device provided in an embodiment of this application. Detailed Implementation

[0063] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0064] It should be understood that, in the description of this application, unless the context explicitly requires it, the words "comprising," "including," and similar terms throughout the specification and claims should be interpreted as encompassing rather than being exclusive or exhaustive; that is, meaning "including but not limited to."

[0065] It should also be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0066] It should be noted that the terms "S1," "S2," etc., are used only for descriptive purposes and do not specifically refer to the order or sequence, nor are they intended to limit this application. They are merely for the convenience of describing the method of this application and should not be construed as indicating the sequential order of the steps. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0067] As described in the background section, current methods for detecting circuit board leakage involve using an oscilloscope to capture potential leakage sources and compare them with the power-on waveform of the power supply where leakage occurs. The consistency of the waveforms is then used to determine if leakage has occurred. This approach suffers from problems such as insufficient test coverage, time-consuming troubleshooting, cumbersome procedures, and low efficiency.

[0068] Therefore, this application proposes a method for detecting circuit board leakage. A test fixture is connected to all power outputs and signals on the circuit board to monitor the test voltage and test time of all power supplies and signals, and upload the data to a host computer. The data is then compared according to certain rules to determine whether leakage exists. This method eliminates the need to check each power supply and signal sequentially; results are obtained simply by powering on the board. Furthermore, it eliminates the need for waveform measurements using equipment such as oscilloscopes; only the fixture, host computer, and power-on operation are required, reducing equipment requirements, simplifying operation steps, and expanding the test coverage.

[0069] Understandably, this method can be applied to host computers or any other electronic devices with analytical capabilities.

[0070] Example 1

[0071] This application provides a method for testing circuit board leakage current, such as... Figure 1 As shown, this method is applied to a testing system consisting of a test fixture, a host computer, and a board under test. Specifically, the method disclosed in this application is used to determine whether a board is leaking current and to identify the location and source of the leakage, including the following:

[0072] S1. The test fixture responds to the test command issued by the host computer, reads the test voltage of each test point on the board under test collected by one or more of the busbars, and records the corresponding test time until the power-on operation ends.

[0073] To achieve the acquisition of test voltages at various test points on the board under test (BoD) using a test fixture, a test environment needs to be set up: the test fixture and the BoD are connected via headers and pin headers. The BoD is a single-layer test board. Before leakage current detection, test points are pre-determined on the BoD based on the power supply and signals to be tested, and headers are installed at each test point. The test board can be powered by a power board, power supply, or DC power supply. The test fixture can be a test board the same size as the BoD, customized according to Gerber files, including headers, a microcontroller unit, and a serial communication module. Gerber files are computer software, a collection of document formats describing the images and drill / milling data of circuit boards (line layers, solder mask layers, character layers, etc.) in the PCB industry, and are a standard format for image conversion in the PCB industry. The test fixture has headers at the corresponding positions on the BoD where the headers are set, such as... Figure 2As shown, the circuit board under test (DUT) is connected to the test fixture via a connector and pin headers. The test fixture then collects the test voltage at the test points via the connector. No other tools are required; voltage measurement can be achieved via the pin headers, and the data is then uploaded to the test fixture. The operation is simple and cost-effective. The host computer can be any intelligent electronic device capable of analysis according to fixed rules.

[0074] The test fixture collects the test voltage at various test points on the board under test, specifically by responding to test commands issued by the host computer, which are initiated when the test board is powered on. The test fixture reads the test voltage measured on the pins corresponding to the pins of one or more headers on the test fixture until the power-on operation ends, recording the voltage changes throughout the power-on process. The power-on operation is considered complete when the read test voltage remains stable for a preset time period. The preset time period is preferably set to 5 seconds, which is a result of considering both efficiency and accuracy: the chip power-on time is approximately 10ms, the number of STBY power supplies is less than 20; the time from input to output and then to the next power supply stage is generally no more than 20ms; the voltage transmission speed along the path is extremely short and negligible; the power-on time of the PSU (Power Supply Unit) is the primary consideration, with Great Wall Power's maximum power-on time being 70ms (slight variations exist for different PSU models and specifications, and a margin should be allowed). The overall calculation time is no more than 1 second, but to ensure accuracy and handle special cases, the judgment time is set to 5 seconds. Of course, this preset time period can be changed according to the actual situation, and this application does not limit it.

[0075] The test voltage acquired from the busbar is then received via the pins of the microcontroller unit. It's understood that one busbar is connected to one pin on the microcontroller unit, and only one busbar is connected to any pin within the microcontroller unit. Therefore, each pin within the microcontroller unit corresponds one-to-one with a test point. It's worth noting that while the microcontroller unit can use chips like the STM32, its pin voltage range is 0-3.3V. The test voltage at the test point is likely to exceed 3.3V. Therefore, to ensure pin safety, the transmitted test voltage needs to be divided. Specifically, this can be done by connecting a voltage divider resistor in the line between the busbar and the pin to reduce the transmitted test voltage to the voltage range required by the microcontroller unit pin. Then, after A / D conversion within the microcontroller unit, the divided test voltage is re-superimposed to restore the original voltage. In addition, to eliminate the influence of noise on the detection results when the test voltage is input to the microcontroller unit, this application embodiment also proposes to perform filtering processing on the read data in the microcontroller unit. This can be done by using the median average filtering method, continuously sampling N test voltages to be processed, then filtering the maximum and minimum values ​​among the test voltages to be processed, and taking the multiple test voltages to be processed after removing one maximum and one minimum value as the test voltages to be determined. Then, the arithmetic mean of the remaining test voltages to be determined is calculated as the final test voltage for output.

[0076] Furthermore, to facilitate locating the actual test point where leakage occurs, this application proposes pre-assigning a test address to each test point, i.e., pre-setting a preset relationship table between test points and test addresses. As mentioned above, each pin of the microcontroller unit is connected to only one female connector, meaning each pin of the microcontroller unit corresponds to a single test point. Therefore, the test fixture proposed in this application can query the preset relationship table based on the test point corresponding to the pin on the microcontroller unit to obtain the test address corresponding to that test point, and assign the test address to the corresponding pin. Thus, after determining that leakage has occurred at a test point, the preset relationship table between the test point and the test address can be queried based on the test address of the pin corresponding to the test point to determine the actual location of the test point.

[0077] Furthermore, the test fixture receives the test voltage of the corresponding test point from the corresponding busbar through the pins on the microcontroller unit; the test fixture records the test time corresponding to the test voltage received by each pin through the microcontroller unit; finally, the test fixture uploads the test voltage, test time, and test address of the corresponding pin to the host computer through the serial communication module.

[0078] S2. The host computer analyzes whether leakage occurs at the test point based on preset analysis rules and one or more uploaded test voltages and test times.

[0079] like Figure 3 As shown, the host computer determines the power supply type based on the Gerber file; and performs different analysis processes according to different power supply types and preset analysis rules. If the power supply providing power to the test board is a basic power supply, it checks whether there are any abnormal test voltage values ​​at the test points. Abnormal values ​​are those outside the design voltage fluctuation range, preferably 3%, which can be appropriately relaxed according to actual conditions. The design voltage value is the design voltage value defined in the Gerber file. If such a value exists, the corresponding test point is determined to have leakage; otherwise, no leakage is determined. If the power supply providing power to the board under test is a core power supply, it checks whether there are any non-zero test voltage values ​​at the test points before or after the power supply providing power to the test point is powered on or off. If such a value exists, the test point corresponding to the non-zero test voltage value is determined to have leakage; otherwise, no leakage is determined.

[0080] Specifically, the power supplies corresponding to each test point on the test board have a power-on sequence. Regardless of whether the power supply for the test board is a basic power supply or a core power supply, this embodiment records the power-on time of each test point and the power-on time of the power supply providing power to the test point. The power-on time of the power supply corresponding to each test point is compared with the power-on time of the test point. If the power-on time of the test point is earlier than the power-on time of the power supply actually corresponding to the test point, it is determined that the test point also has leakage. For example, power supply A supplies power to the first test point, power supply B supplies power to the second test point, and power supply C supplies power to the third test point, and the power-on sequence is power supply A earlier than power supply B, and power supply B earlier than power supply C. The collected power-on time of the second test point is 09:59, but the power-on time of power supply B corresponding to the second test point is 10:00. At this time, it can be determined that the second test point has leakage. Record the power-off time of each power supply and analyze whether there is a non-zero value in the test voltage corresponding to the test point after the power-off time of that power supply. If there is a non-zero value in the test voltage corresponding to the test time after the power-off time of that power supply, it is determined that leakage has occurred at that test point. In addition, regarding the power supply time of the base power supply to the test board, this application also proposes to analyze the test voltage of the test point during the test time between the power-on time and power-off time of the power supply corresponding to the test point. If the test voltage of the test point is at an abnormal value during this period and the holding time exceeds a preset threshold, for example, the test voltage is held at an abnormal voltage for more than 1ms, it is determined that leakage has occurred at the test point corresponding to that pin. Here, according to this application, the preset threshold is not limited and can be customized according to the actual situation.

[0081] After identifying the test point where leakage occurred, this application further proposes to find the power source or signal that was simultaneously powered on based on the recorded power-on time corresponding to that test point. The power source and signal that were simultaneously powered on with that test point are the sources of leakage. For example, based on the recorded power-on time of the second test point (09:59), the power-on times of power sources A, B, and C are analyzed. Power source C has the same power-on time (09:59). In this case, power source C is determined to be the source of leakage at the second test point.

[0082] Furthermore, after determining that a test point corresponding to a pin has experienced leakage, the host computer can determine the actual test point where leakage occurred based on the test address corresponding to that pin.

[0083] This embodiment connects the test fixture to all power outputs and signals on the circuit board to monitor the test voltage and test time of all power supplies and signals (i.e., test points) and uploads the data to a host computer. The host computer then compares these data according to certain rules to determine if leakage occurs. There is no need to check each power supply and signal sequentially; results are obtained simply by powering on. Furthermore, there is no need to use equipment such as oscilloscopes for waveform measurement; only the fixture, host computer, and power-on operation are required, reducing equipment requirements, simplifying operation steps, and expanding the test coverage.

[0084] Example 2

[0085] Corresponding to Embodiment 1 above, this application also provides a test fixture 400, whose size can be customized through design documents. It can be directly connected to the board under test to read the test voltage and transmit the test voltage to a host computer. For example... Figure 4 The architecture diagram shown specifically includes: a busbar, a microcontroller unit, and a serial communication module.

[0086] The header 410 is used to connect to the header pins on one or more test points on the board under test to receive the test voltage corresponding to one or more test points.

[0087] The microcontroller unit 420 is used to respond to a test command by reading the test voltage of the pin header at one or more test points received by the header and recording the corresponding test time until the power-on operation ends. The serial communication module 430 is used to upload the test voltage and test time corresponding to one or more test points. One or more header headers 410 transmit the received test voltage of the test point to the pin of the microcontroller unit 420.

[0088] In some implementation scenarios, the voltage range of microcontroller pins is typically 0-3.3V, while the test voltage at the test point may exceed 3.3V. Therefore, to ensure pin safety, the transmitted test voltage needs to be divided. Specifically, for example... Figure 5 As shown, the transmitted test voltage can be reduced to the voltage range required by the microcontroller unit 420 pin by connecting a voltage divider resistor R on the line between the busbar 410 and the pin.

[0089] In some implementation scenarios, the test fixture 400 receives a preset relationship table of test addresses and test points sent by the host computer; the test fixture queries the preset relationship table to obtain the corresponding test address according to the test point corresponding to the pin on the microcontroller unit, and assigns the test address to the corresponding pin.

[0090] In some implementation scenarios, the test fixture 400 receives the test voltage of the corresponding test point received by the busbar 410 through the pins on the microcontroller unit 410; the test fixture records the test time corresponding to the test voltage received by each pin through the microcontroller unit 420; the test fixture uploads the test voltage, test time and test address of the test point received by one or more pins through the serial communication module 430.

[0091] In some implementation scenarios, the microcontroller unit 410 is also used to read multiple test voltages to be processed from the pin headers of one or more test points continuously received by the header; the microcontroller unit 410 is also used to filter the multiple test voltages to be processed except for the maximum and minimum values ​​as test voltages to be determined; the microcontroller unit 410 is also used to calculate the arithmetic mean of the multiple test voltages to be determined as the test voltage.

[0092] In conclusion, as follows: Figure 6 As shown in the functional block diagram of the test fixture, after receiving the test command from the host computer, the test fixture 400 uses the busbar 410 to sample the test time and test voltage of the test points on the board under test. Then, it performs ADC conversion in the microcontroller unit 420 to convert the received analog signal into a digital signal, records the test voltage and test time of each test point, and finally sends the test voltage and test time to the host computer through the serial communication module 430.

[0093] Example 3

[0094] Corresponding to Embodiment 1 and Embodiment 2 above, this application also provides a host computer, such as... Figure 7 As shown, the specific functions of the host computer include:

[0095] The host computer connects to the test fixture via a data cable, specifically through an RS232 serial port. After the test begins, the host computer sends test commands to the test fixture, instructing it to sample the test voltage and test time. The host computer then receives the measured test voltage and test time from the test fixture. The host computer continuously receives test data from the test fixture, including test voltage, test time, and test address. To ensure data transmission accuracy, parity checking is performed using the parity bit of the serial port connecting the host computer and the test fixture. If the parity check passes, the uploaded test voltage, test time, and test address are further analyzed. If the parity check fails, data is re-acquired and uploaded until the parity check passes. Specifically, the parity bit of the serial communication module of the test fixture can be pre-set to determine whether odd or even parity is used, ensuring that the number of "1"s in the transmitted data code is odd or even. Verification is performed based on whether the number of "1"s in the transmitted binary code is odd or even. If odd parity is used, when the receiving end receives this code, it checks whether the number of "1"s is odd to determine the correctness of the transmitted code. If even parity is used, when the receiving end receives this code, it checks whether the number of "1"s is even to determine the correctness of the transmitted code. Specifically, in this application, the number of odd numbers in the binary code corresponding to the test voltage, test time, and corresponding pin test address of the test point received by one or more pins sent by the serial communication module in the receiving test fixture is counted. If the parity bit corresponding to the test voltage, test time, and corresponding pin test address of the received test point is consistent with the preset parity bit, then the parity check passes. If the serial communication module transmits data using even parity, it determines whether the number of odd numbers in the binary code corresponding to the test voltage, test time, and corresponding pin test address of the test point received by one or more pins sent by the serial communication module in the receiving test fixture is even. If it is even, the parity check passes. Conversely, if the parity check fails, the test voltage, test time, and corresponding pin test address of the test point received by one or more pins sent by the serial communication module in the test fixture must be received again. If the serial communication module uses odd parity to transmit data, it is determined whether the number of odd numbers in the binary code corresponding to the test voltage, test time, and corresponding pin test address of the test point received by one or more pins sent by the serial communication module in the test fixture is odd. If it is odd, the parity check passes; otherwise, the parity check fails, and the test voltage, test time, and corresponding pin test address of the test point received by one or more pins sent by the serial communication module in the test fixture must be received again.

[0096] After receiving the test data from the test fixture, the host computer analyzes whether leakage has occurred at any test point according to preset analysis rules. Specifically, the host computer determines the power supply type based on the Gerber file and performs different analysis processes according to different power supply types and preset analysis rules. If the power supply powering the test board is a basic power supply, it checks whether there is an abnormal test voltage at any test point that is maintained for a duration exceeding a preset threshold; if so, it determines that leakage has occurred at the corresponding test point; otherwise, it determines that no leakage has occurred. If the power supply powering the test board is a core power supply, it checks whether there is a non-zero test voltage at any test point; if so, it determines that leakage has occurred at that test point; otherwise, it determines that no leakage has occurred.

[0097] Example 4

[0098] Corresponding to all the above embodiments, such as Figure 8 As shown in the figure, this application embodiment also provides a method for detecting circuit board leakage current. The method is applied to an established test environment, which includes a test fixture and a circuit board under test. One or more headers in the test fixture are connected to header pins disposed on one or more test points on the circuit board under test. The method includes:

[0099] 8100. In response to sending a test command, the microcontroller unit of the test fixture is triggered to receive the test command, and read the test voltage of the pin header at one or more test points received by the pin header and record the corresponding test time until the power-on operation ends.

[0100] Preferably, one or more of the busbars transmit the test voltage received from the test point to the pin of the microcontroller; wherein, only one busbar is connected to any pin of the microcontroller.

[0101] Preferably, before receiving the test voltage and the test time, the method further includes:

[0102] 8110. Send a pre-set table of pre-defined test addresses and test points to the test fixture;

[0103] 8120. Trigger the test fixture to query the preset relationship table to obtain the corresponding test address according to the test point corresponding to the pin on the microcontroller unit, and trigger the test fixture to assign the test address to the corresponding pin.

[0104] 8200. Receive the test voltage and the test time, wherein the test voltage and the test time are the test voltage and test time corresponding to one or more test points read by the test fixture through the serial communication module inside the test fixture;

[0105] Preferably, before receiving the test voltage and the test time, the method further includes:

[0106] 8210. Send a pre-set table of pre-defined test addresses and test points to the test fixture;

[0107] 8220. Trigger the test fixture to query the preset relationship table to obtain the corresponding test address according to the test point corresponding to the pin on the microcontroller unit, and trigger the test fixture to assign the test address to the corresponding pin.

[0108] Preferably, the method includes:

[0109] 8230. Receive the test voltage, test time, and corresponding pin test address of the test point from one or more pins sent by the serial communication module in the test fixture;

[0110] 8240. After analyzing the leakage at the test point, according to the test address of the pin corresponding to the test point, query the preset relationship table between the test point and the test address to determine the actual location of the test point;

[0111] The test voltage is transmitted from the busbar to the pin of the microcontroller unit in the test fixture, and the test voltage and test time of each pin are recorded in the microcontroller unit.

[0112] Preferably, the method further includes:

[0113] 8250. Pre-set the parity bit of the serial communication module in the test fixture to determine whether to use even parity or odd parity;

[0114] 8260. Count the number of odd numbers in the binary code corresponding to the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module in the test fixture.

[0115] 8270. If the received test voltage, test time, and parity check bit corresponding to the test address of the test point are consistent with the preset parity check bit, then the parity check is passed.

[0116] 8280. If the serial communication module transmits data using even parity, then determine whether the number of odd numbers in the binary code corresponding to the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module in the test fixture is even. If it is even, the parity check passes; otherwise, the parity check fails, and the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module in the test fixture are received again.

[0117] 8290. If the serial communication module uses odd parity to transmit data, then determine whether the number of odd numbers in the binary code corresponding to the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module in the test fixture is odd. If it is odd, the parity check passes; otherwise, the parity check fails, and the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module in the test fixture are received again.

[0118] 8300. Analyze whether leakage occurs at the test point based on preset analysis rules and one or more uploaded test voltages and test times.

[0119] Preferably, the step of analyzing whether leakage occurs at the test point based on preset analysis rules and one or more uploaded test voltages and test times includes:

[0120] 8310. If the power supply of the test board is a basic power supply, then determine whether there is a test voltage with an abnormal value and a holding time exceeding a preset threshold at the test point.

[0121] 8320. If leakage occurs, the test point is determined to have leakage; otherwise, the test point is determined to have leakage.

[0122] Preferably, the step of analyzing whether leakage occurs at the test point based on preset analysis rules and one or more uploaded test voltages and test times includes:

[0123] 8330. If the power supply for the test board is the core power supply, then determine whether there is a non-zero test voltage at the test point;

[0124] 8340. If leakage occurs, the test point is determined to have leakage; otherwise, the test point is determined to have leakage.

[0125] Example 5

[0126] Corresponding to all the above embodiments, this application provides an electronic device, including:

[0127] One or more processors; and memory associated with the one or more processors, the memory storing program instructions that, when read and executed by the one or more processors, perform the following operations:

[0128] In response to sending a test command, the microcontroller unit of the test fixture is triggered to receive the test command, and read the test voltage of the pin header at one or more test points received by the pin header and record the corresponding test time until the power-on operation ends;

[0129] The test voltage and the test time are received by the test fixture through the serial communication module within the test fixture, which reads the test voltage and test time corresponding to one or more test points.

[0130] Based on preset analysis rules and one or more uploaded test voltages and test times, analyze whether leakage occurs at the test point.

[0131] in, Figure 9 An exemplary architecture of an electronic device is shown, which may include a processor 910, a video display adapter 911, a disk drive 912, an input / output interface 913, a network interface 914, and a memory 920. The processor 910, video display adapter 911, disk drive 912, input / output interface 913, network interface 914, and memory 920 can communicate with each other via a bus 930.

[0132] The processor 910 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to achieve the technical solution provided in this application.

[0133] The memory 920 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 920 can store the operating system 921 used to control the execution of the electronic device 900, and the basic input / output system (BIOS) 922 used to control the low-level operations of the electronic device 900. Additionally, it can store a web browser 923, a data storage management system 924, and an icon font processing system 925, etc. The aforementioned icon font processing system 925 can be the application program that specifically implements the aforementioned steps in this embodiment. In summary, when the technical solution provided in this application is implemented through software or firmware, the relevant program code is stored in the memory 920 and is called and executed by the processor 910.

[0134] Input / output interface 913 is used to connect input / output modules to realize information input and output. Input / output modules can be configured as components in the device (not shown in the figure) or externally connected to the device to provide corresponding functions. Input devices may include keyboards, mice, touch screens, microphones, various sensors, etc., and output devices may include displays, speakers, vibrators, indicator lights, etc.

[0135] Network interface 914 is used to connect a communication module (not shown in the figure) to enable communication between this device and other devices. The communication module can communicate via wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).

[0136] Bus 930 includes a pathway for transmitting information between various components of the device, such as processor 910, video display adapter 911, disk drive 912, input / output interface 913, network interface 914, and memory 920.

[0137] In addition, the electronic device 900 can also obtain information on specific claim conditions from the virtual resource object claim condition information database for condition judgment, etc.

[0138] It should be noted that although the above-described device only shows the processor 910, video display adapter 911, disk drive 912, input / output interface 913, network interface 914, memory 920, bus 930, etc., in specific implementations, the device may also include other components necessary for normal operation. Furthermore, those skilled in the art will understand that the above-described device may only include the components necessary for implementing the solution of this application, and does not necessarily include all the components shown in the figures.

[0139] As can be seen from the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented by means of software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, a cloud server, or a network device, etc.) to execute the methods described in various embodiments or some parts of the embodiments of this application.

[0140] Example 6

[0141] Corresponding to all the above embodiments, this application also provides a computer-readable storage medium, characterized in that it stores a computer program that causes a computer to perform the following operations:

[0142] In response to sending a test command, the microcontroller unit of the test fixture is triggered to receive the test command, and read the test voltage of the pin header at one or more test points received by the pin header and record the corresponding test time until the power-on operation ends;

[0143] The test voltage and the test time are received by the test fixture through the serial communication module within the test fixture, which reads the test voltage and test time corresponding to one or more test points.

[0144] Based on preset analysis rules and one or more uploaded test voltages and test times, analyze whether leakage occurs at the test point.

[0145] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, for system or system embodiments, since they are basically similar to method embodiments, the description is relatively simple, and relevant parts can be referred to the descriptions in the method embodiments. The systems and system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0146] The above description is only a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for detecting leakage current in circuit boards, characterized in that, The method is applied to an established test environment, which includes a test fixture and a board under test (BUT). One or more headers within the test fixture are connected to header pins located at one or more test points on the BUT. The method includes: In response to sending a test command, the microcontroller unit of the test fixture is triggered to receive the test command, and read the test voltage of the pin header at one or more test points received by the pin header and record the corresponding test time until the power-on operation ends; The test voltage and the test time are received by the test fixture through the serial communication module within the test fixture, which reads the test voltage and test time corresponding to one or more test points. Analyze whether leakage occurs at the test point based on preset analysis rules and one or more uploaded test voltages and test times; The parity bit of the serial communication module in the test fixture is preset to determine whether to use even parity or odd parity. The number of odd numbers in the binary code corresponding to the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module in the test fixture is counted. If the received test voltage, test time, and parity check bit corresponding to the test address of the test point are consistent with the preset parity check bit, then the parity check is passed. If the serial communication module transmits data using even parity, it determines whether the number of odd numbers in the binary code corresponding to the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module within the test fixture is even. If it is even, the parity check passes; otherwise, the parity check fails, and the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module within the test fixture are received again. If the serial communication module uses odd parity to transmit data, it determines whether the number of odd numbers in the binary code corresponding to the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module in the test fixture is odd. If it is odd, the parity check passes; otherwise, the parity check fails, and the test voltage, test time, and test address of the test point received by one or more pins of the serial communication module in the test fixture are received again.

2. The method according to claim 1, characterized in that, The method further includes: One or more of the aforementioned busbars transmit the test voltage received from the test points to the pins of the microcontroller unit; In this embodiment, only one of the aforementioned female connectors is connected to any pin of the microcontroller unit; Before receiving the test voltage and the test time, the method further includes: Send a pre-defined table of pre-set test addresses and test points to the test fixture; The test fixture is triggered to query the preset relationship table to obtain the corresponding test address based on the test point corresponding to the pin on the microcontroller unit, and then the test fixture is triggered to assign the test address to the corresponding pin.

3. The method according to claim 2, characterized in that, The method includes; The test fixture receives the test voltage, test time, and corresponding pin test address of the test point from one or more pins via the serial communication module within the test fixture. After analyzing the leakage at the test point, the actual location of the test point is determined by querying a preset relationship table between the test point and the test address based on the test address of the pin corresponding to the test point. The test voltage is transmitted from the busbar to the pin of the microcontroller unit in the test fixture, and the test voltage and test time of each pin are recorded in the microcontroller unit.

4. The method according to any one of claims 1-3, characterized in that, The step of analyzing whether leakage occurs at the test point based on preset analysis rules and one or more uploaded test voltages and test times includes: If the power supply of the board under test is a basic power supply, then determine whether there is an abnormal test voltage at the test point; If leakage exists, it is determined that leakage has occurred at the test point; otherwise, it is determined that leakage has occurred at the test point.

5. The method according to any one of claims 1-3, characterized in that, The step of analyzing whether leakage occurs at the test point based on preset analysis rules and one or more uploaded test voltages and test times includes: If the power supply of the board under test is the core power supply, then determine whether there is a non-zero test voltage at the test point between the power-on time and the power-off time of the power supply. If leakage exists, it is determined that leakage has occurred at the test point; otherwise, it is determined that leakage has occurred at the test point.

6. A test fixture for implementing the method according to any one of claims 1-5, characterized in that, include: The busbar, microcontroller unit, and serial communication module, among which, The header is used to connect to the header pins on one or more test points on the board under test to receive the test voltage corresponding to one or more test points. The microcontroller unit is used to respond to the issued test command, read the test voltage of the pin header at one or more test points received by the pin header and record the corresponding test time until the power-on operation ends; The serial communication module is used to upload the test voltage and test time corresponding to one or more test points.

7. The test fixture according to claim 6, characterized in that, The microcontroller unit is also used to read multiple test voltages to be processed from the pin headers at one or more test points continuously received by the pin headers; The microcontroller unit is also used to filter the test voltages to be processed from the plurality of test voltages except for the maximum and minimum values ​​as test voltages to be determined. The microcontroller unit is also used to calculate the arithmetic mean of the multiple test voltages to be determined as the test voltage.

8. An electronic device, characterized in that, The electronic device includes: One or more processors; And a memory associated with the one or more processors, the memory being used to store program instructions that, when read and executed by the one or more processors, perform the method of any one of claims 1-5.

9. A computer-readable storage medium, characterized in that, It stores a computer program that causes the computer to perform the method described in any one of claims 1-5.

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