A gallium nitride device and method of manufacture
Patent Information
- Application Number
- CN202311356549.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-10-18
- Publication Date
- 2026-09-18
- Estimated Expiration
- 2043-10-18
AI Technical Summary
[0004]上述氮化镓通孔的制备流程复杂,耗时时间长,制备成本过高,且良率不高
[0026] The technical solution provided in this invention simultaneously fabricates a groove within the insulating layer during the fabrication of the conductive via for transmitting electrical signals from the barrier layer. In subsequent fabrication of gallium nitride vias, only the semiconductor layers (channel layer and barrier layer) need to be etched, reducing the etching depth of the gallium nitride vias. Furthermore, it eliminates the need for two etching steps, requiring only one, thus simplifying the fabrication process and reducing fabrication time and cost. Because the above fabrication method reduces the etching depth of the gallium nitride vias, it also reduces the aspect ratio of the gallium nitride vias. This avoids the lower step coverage when depositing the top metal layer using physical vapor deposition. Additionally, if the sidewalls of the gallium nitride vias are too smooth, it will severely affect the deposition quality of the top metal layer. For example, the top metal layer deposited on vertical sidewalls is thinner. Therefore, it is usually necessary to adjust the sidewalls of the gallium nitride vias to a more inclined angle, which can easily lead to more material accumulation on the sidewalls. This reduces the difficulty of defect control in gallium nitride vias and improves the yield of gallium nitride vias and gallium nitride devices.
Smart Images

Figure CN117334637B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and more particularly to a gallium nitride device and its fabrication method. Background Technology
[0002] Gallium nitride (GaN) devices are characterized by high breakdown electric field, high electron mobility, and high electron saturation drift, making them promising for applications in power electronics and radio frequency microwaves.
[0003] In gallium nitride (GaN) devices, including through-GaN vias (TGVs), GaN vias can be used as grounding vias. In existing technologies, the fabrication of GaN vias requires first etching an insulating layer above the GaN layer, and then etching the GaN layer down to the substrate. This forms a large-sized via that penetrates the top insulating layer to the substrate. A top metal layer is then formed, ultimately achieving interconnection between the top metal layer and the substrate.
[0004] The above-mentioned gallium nitride via fabrication process is complex, time-consuming, costly, and has a low yield. Summary of the Invention
[0005] This invention provides a gallium nitride device and its fabrication method, which simplifies the fabrication process of gallium nitride vias, reduces the fabrication time of gallium nitride vias, lowers the fabrication cost, and improves the yield.
[0006] According to one aspect of the present invention, a method for fabricating a gallium nitride device is provided, comprising: A semiconductor functional layer is prepared, wherein the semiconductor functional layer includes at least a substrate, a channel layer and a barrier layer, and a conductive structure is formed on the surface of the barrier layer; An insulating layer is formed on the side of the barrier layer away from the channel layer, and conductive holes and grooves are formed in the insulating layer at intervals. The conductive holes penetrate the insulating layer and are electrically connected to the conductive structure, and the grooves are exposed on the barrier layer. Gallium nitride vias are formed in the barrier layer and the channel layer, and the gallium nitride vias are connected to the groove and exposed to the substrate; A top metal layer is formed on the sidewalls of the gallium nitride via and the sidewalls of the groove, the top metal layer extending to the surface of the insulating layer away from the barrier layer and covering the conductive via.
[0007] Optionally, forming a groove within the insulating layer includes: A groove is formed within the insulating layer, with the opening tending to increase in size in the direction perpendicular to the barrier layer on the substrate.
[0008] Optionally, forming a groove within the insulating layer includes: A first sub-groove is formed within the insulating layer, the first sub-groove exposing the barrier layer; A second sub-groove is formed within the insulating layer. The second sub-groove is connected to the first sub-groove, and the opening of the second sub-groove is larger than the opening of the first sub-groove.
[0009] Optionally, forming the first sub-groove within the insulating layer includes: A first sub-groove is formed within the insulating layer, with an obtuse angle between the sidewall and the bottom surface.
[0010] Optionally, forming a second sub-groove within the insulating layer includes: A second sub-groove is formed within the insulating layer, with an obtuse angle between the sidewall and the bottom surface.
[0011] Optionally, forming a second sub-groove within the insulating layer includes: A second sub-groove with a step is formed at the connection between the first sub-groove and the insulating layer.
[0012] Optionally, before forming gallium nitride vias in the barrier layer and the channel layer, the method further includes: A third sub-groove is formed at the opening of the groove, the third sub-groove is connected to the second sub-groove, and the opening of the third sub-groove is larger than the opening of the second sub-groove.
[0013] Optionally, the insulating layer includes a first sub-insulating layer and a second sub-insulating layer, and the groove includes a first sub-groove and a second sub-groove; Forming an insulating layer on the side of the barrier layer away from the channel layer, and forming spaced conductive holes and grooves within the insulating layer, includes: A first sub-insulating layer is formed on the side of the barrier layer away from the channel layer; A first through-hole is formed in the first sub-insulating layer, and the first through-hole exposes the conductive structure; A first sub-groove is formed in the first sub-insulating layer, and the first sub-groove exposes the barrier layer; The first through hole is filled with a first conductive filler layer, and the first conductive filler layer remains on the sidewall of the first sub-groove; A first metal layer is formed on the side of the first conductive fill layer away from the conductive structure, the first metal layer covers the first conductive fill layer, and the first metal layer remains on the sidewall of the first sub-groove. A second sub-insulating layer is formed on the side of the first sub-insulating layer away from the barrier layer, and the second sub-insulating layer covers the first metal layer and the first sub-groove. A second through-hole is formed in the second sub-insulating layer, and the second through-hole exposes the first metal layer; A second sub-groove is formed in the second sub-insulating layer, and the second sub-groove is connected to the first sub-groove. The second through hole is filled with a second conductive filler layer, and the second conductive filler layer remains at the connection between the second sub-groove and the first sub-groove.
[0014] Optionally, before the first through-hole is filled with the first conductive filler layer, the method further includes: A first sidewall conductive layer is formed on the sidewall of the first through hole, and the first sidewall conductive layer remains on the sidewall of the first sub-groove.
[0015] Optionally, before the second via is filled with the second conductive filler layer, the method further includes: A second sidewall conductive layer is formed on the sidewall of the second through hole, the second sidewall conductive layer remains on the sidewall of the first sub-groove, and the second sidewall conductive layer remains at the connection between the second sub-groove and the first sub-groove.
[0016] According to another aspect of the present invention, a gallium nitride device is provided, comprising: A semiconductor functional layer, wherein the semiconductor functional layer includes at least a substrate, a channel layer and a barrier layer, and the surface of the barrier layer is provided with a conductive structure; An insulating layer is located on the side of the barrier layer away from the channel layer. The insulating layer has simultaneously formed, spaced conductive holes and grooves. The conductive holes penetrate the insulating layer and are electrically connected to the conductive structure. The grooves are exposed on the barrier layer. Gallium nitride vias are formed after the conductive vias and the grooves are formed. The gallium nitride vias are located within the barrier layer and the channel layer. The gallium nitride vias are connected to the grooves and exposed on the substrate. A top metal layer is located on the sidewall of the gallium nitride via and the sidewall of the groove. The top metal layer extends to the surface of the insulating layer away from the barrier layer and covers the conductive via.
[0017] Optionally, the opening of the groove tends to increase in the direction perpendicular to the barrier layer from the substrate.
[0018] Optionally, the groove includes a first sub-groove and a second sub-groove; The first sub-groove is located within the insulating layer, and the first sub-groove exposes the barrier layer; The second sub-groove is connected to the first sub-groove, and the opening of the second sub-groove is larger than the opening of the first sub-groove.
[0019] Optionally, the angle between the sidewall and the bottom surface of the first sub-groove is an obtuse angle.
[0020] Optionally, the angle between the sidewall and the bottom surface of the second sub-groove is an obtuse angle.
[0021] Optionally, a step is provided at the connection between the first sub-groove and the second sub-groove.
[0022] Optionally, the groove further includes a third sub-groove located at the opening of the groove, the third sub-groove communicating with the second sub-groove, and the opening of the third sub-groove being larger than the opening of the second sub-groove.
[0023] Optionally, the insulating layer includes a first sub-insulating layer and a second sub-insulating layer, and the groove includes a first sub-groove and a second sub-groove; The first sub-insulating layer is located on the side of the barrier layer away from the channel layer; A first through hole is formed simultaneously with the first sub-groove and is located in the first sub-insulating layer, and the first through hole exposes the conductive structure. The first sub-groove is located in the first sub-insulating layer and exposes the barrier layer; A first conductive filling layer is filled in the first through hole, and the first conductive filling layer remains on the sidewall of the first sub-groove. A first metal layer is located on the side of the first conductive fill layer away from the conductive structure. The first metal layer covers the first conductive fill layer, and the first metal layer remains on the sidewall of the first sub-groove. A second sub-insulating layer is located on the side of the first sub-insulating layer away from the barrier layer, and the second sub-insulating layer covers the first metal layer and the first sub-groove. The second through hole is located in the second sub-insulating layer and exposes the first metal layer; The second sub-groove is located in the second sub-insulating layer and is connected to the first sub-groove. The second conductive filler layer fills the second through hole, and the second conductive filler layer remains at the connection between the second sub-groove and the first sub-groove.
[0024] Optionally, it also includes: It also includes a first sidewall conductive layer, which is present on the sidewall of the first through hole and remains on the sidewall of the first sub-groove.
[0025] Optionally, it further includes a second sidewall conductive layer, which is located on the sidewall of the second through hole, and the second sidewall conductive layer remains on the sidewall of the first sub-groove, and the second sidewall conductive layer remains at the connection between the second sub-groove and the first sub-groove.
[0026] The technical solution provided in this invention simultaneously fabricates a groove within the insulating layer during the fabrication of the conductive via for transmitting electrical signals from the barrier layer. In subsequent fabrication of gallium nitride vias, only the semiconductor layers (channel layer and barrier layer) need to be etched, reducing the etching depth of the gallium nitride vias. Furthermore, it eliminates the need for two etching steps, requiring only one, thus simplifying the fabrication process and reducing fabrication time and cost. Because the above fabrication method reduces the etching depth of the gallium nitride vias, it also reduces the aspect ratio of the gallium nitride vias. This avoids the lower step coverage when depositing the top metal layer using physical vapor deposition. Additionally, if the sidewalls of the gallium nitride vias are too smooth, it will severely affect the deposition quality of the top metal layer. For example, the top metal layer deposited on vertical sidewalls is thinner. Therefore, it is usually necessary to adjust the sidewalls of the gallium nitride vias to a more inclined angle, which can easily lead to more material accumulation on the sidewalls. This reduces the difficulty of defect control in gallium nitride vias and improves the yield of gallium nitride vias and gallium nitride devices.
[0027] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description
[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0029] Figure 1 This is a flowchart of a gallium nitride device fabrication method provided by existing technology; Figures 2-5 yes Figure 1 A structural diagram corresponding to each step in the process; Figure 6 This is a flowchart of a method for fabricating a gallium nitride device according to an embodiment of the present invention; Figures 7-10 yes Figure 6 A structural diagram corresponding to each step in the process; Figure 11 yes Figure 6A schematic diagram of a process included in S220; Figure 12 yes Figure 6 Another process diagram included in S220; Figures 13-20 yes Figure 12 A structural diagram corresponding to each step in the process; Figure 21 This is a schematic diagram of another gallium nitride device provided according to an embodiment of the present invention. Detailed Implementation
[0030] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0031] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that includes a series of steps or apparatuses is not necessarily limited to those explicitly listed, but may include other steps or apparatuses not explicitly listed or inherent to such processes, methods, products, or apparatuses.
[0032] As described in the background section above, the fabrication process for gallium nitride through-holes is complex, time-consuming, and prohibitively expensive. For example... Figures 1-5As shown, the inventors, through careful research, discovered that the existing method for fabricating gallium nitride (GaN) devices includes the following steps: S110, fabricating a semiconductor functional layer, wherein the semiconductor functional layer includes at least a substrate 10, a gallium nitride layer 20, a gallium aluminum nitride layer 30, and an insulating layer 40, with a conductive connection structure 41 disposed within the insulating layer 40. S120, forming a photoresist layer 50 on the surface of the insulating layer 40, and patterning the photoresist layer 50 using a photolithography process to finally form a mask. S130, forming a via VIA1 within the insulating layer 40 using dry etching, the insulating layer 40 including an interlayer insulating layer (IMD layer) and an etch stop layer (ILD oxide layer). S140, etching the gallium aluminum nitride layer 30 and the gallium nitride layer 20 to form a via VIA2 until the substrate is exposed. Vias VIA1 and VIA2 constitute gallium nitride vias. S150, forming a top metal layer to achieve interconnection between the top metal layer and the substrate. The above-mentioned gallium nitride via fabrication process requires first etching the insulating layer above the gallium nitride layer, and then etching the gallium nitride layer down to the substrate. This forms a large-sized via that penetrates the top insulating layer to the substrate. Then, the top metal layer is formed, and finally, the interconnect between the top metal layer and the substrate is achieved.
[0033] The challenge of the above-described fabrication method lies in the relatively thick thickness of the insulating layer 40, which includes the interlayer insulating layer (IMD layer) and the etch stop layer (ILD oxide layer), plus the relatively thick thickness of the gallium nitride layer 20 and the gallium nitride aluminum layer 30, resulting in a large etching depth for the gallium nitride vias. Because the insulating layer 40 and the semiconductor layers (gallium nitride layer 20 and gallium nitride aluminum layer 30) are made of different materials, the etching of the insulating layer 40 and the etching of the semiconductor layers are performed separately. The large overall etching depth and the need for two-step etching of the gallium nitride vias lead to a complex fabrication process, long processing time, and excessively high fabrication costs.
[0034] Furthermore, the gallium nitride vias VIA1 and VIA2 have a high aspect ratio. Considering the low step coverage capability when depositing the top metal layer 60 using physical vapor deposition (PVD) in the later stage, and the fact that the sidewalls of the gallium nitride vias are too smooth, it will seriously affect the deposition quality of the top metal layer 60. For example, the top metal layer 60 deposited with vertical sidewalls is relatively thin. Therefore, it is usually necessary to adjust the sidewalls of the gallium nitride vias to a more inclined angle. However, this will easily generate more deposited material on the sidewalls, increasing the difficulty of defect control of gallium nitride vias and thus reducing the yield of gallium nitride vias.
[0035] To address the aforementioned technical problems, the embodiments of the present invention provide the following technical solutions: like Figure 6 As shown, Figure 6 This is a flowchart of a method for fabricating a gallium nitride device according to an embodiment of the present invention. The method for fabricating a gallium nitride device includes the following steps: S210. Prepare a semiconductor functional layer, wherein the semiconductor functional layer includes at least a substrate, a channel layer and a barrier layer, and a conductive structure is formed on the surface of the barrier layer.
[0036] like Figure 7 As shown, a semiconductor functional layer is fabricated, comprising at least a substrate 01, a channel layer 02, and a barrier layer 03. A conductive structure 04 is formed on the surface of the barrier layer 03. In other embodiments, the semiconductor functional layer may further include a buffer layer located between the substrate 01 and the channel layer 02. In this embodiment, the channel layer 02 may be a gallium nitride layer, and the barrier layer 03 may be a gallium aluminum nitride layer. A large amount of two-dimensional electron gas exists within the channel layer 02 and the barrier layer 03, which is used to achieve the device performance of gallium nitride devices, including high breakdown electric field, high electron mobility, and high electron saturation drift. The conductive structure 04 can derive the electrical signal from the barrier layer 03.
[0037] S220. An insulating layer is formed on the side of the barrier layer away from the channel layer, and conductive holes and grooves are formed in the insulating layer at intervals. The conductive holes penetrate the insulating layer and are electrically connected to the conductive structure, and the grooves are exposed in the barrier layer.
[0038] like Figure 8 As shown, an insulating layer 05 is formed on the side of the barrier layer 03 away from the channel layer 02. Conductive holes T1 and grooves V1 are formed at intervals within the insulating layer 05. The conductive holes T1 penetrate the insulating layer 05 and are electrically connected to the conductive structure 04, while the grooves V1 expose the barrier layer 03. In this embodiment, during the fabrication of the conductive holes T1 that lead out the electrical signal from the barrier layer 03, the grooves V1 are simultaneously fabricated within the insulating layer 05. During the subsequent fabrication of the gallium nitride via (TGV), only the semiconductor layers (channel layer 02 and barrier layer 03) need to be etched. Since both the channel layer 02 and the barrier layer 03 are semiconductor layers, only one etching step is required.
[0039] S230. Gallium nitride vias are formed in the barrier layer and the channel layer. The gallium nitride vias are connected to the grooves and exposed to the substrate.
[0040] like Figure 9 As shown, gallium nitride vias (TGVs) are formed in the barrier layer 03 and the channel layer 02 by an etching process. The gallium nitride vias (TGVs) are connected to the groove V1 and exposed on the substrate 01.
[0041] S240. A top metal layer is formed on the sidewall of the gallium nitride via and the sidewall of the groove. The top metal layer extends to the surface of the insulating layer away from the barrier layer and covers the conductive via.
[0042] like Figure 10As shown, a top metal layer 06 is formed on the sidewalls of the gallium nitride via TGV and the sidewalls of the groove V1 by physical vapor deposition (PVD). The top metal layer 06 extends to the surface of the insulating layer 05 away from the barrier layer 03 and covers the conductive hole T1, thus realizing the interconnection between the top metal layer 06 and the substrate 01.
[0043] The technical solution provided in this invention involves simultaneously fabricating a groove V1 within the insulating layer 05 during the fabrication of the conductive hole T1 that leads out the electrical signal from the barrier layer 03. In the subsequent fabrication of the gallium nitride via (TGV), only the semiconductor layers (channel layer 02 and barrier layer 03) need to be etched, reducing the etching depth of the TGV. Furthermore, it eliminates the need for two etching steps, requiring only one etching step, thus simplifying the fabrication process and reducing fabrication time and cost. Furthermore, since the above-mentioned preparation method reduces the etching depth of the gallium nitride via, it reduces the aspect ratio of the gallium nitride via. This avoids the low step coverage when depositing the top metal layer 06 using physical vapor deposition (PVD) in the later stage. In addition, if the sidewalls of the gallium nitride via (TGV) are too smooth, it will seriously affect the deposition quality of the top metal layer 06. For example, the top metal layer 06 deposited on vertical sidewalls is relatively thin. Therefore, it is usually necessary to adjust the sidewalls of the gallium nitride via to a more inclined angle. However, this can easily lead to more material accumulation on the sidewalls. This reduces the difficulty of defect control in gallium nitride via (TGV) and improves the yield of gallium nitride via (TGV) and gallium nitride devices.
[0044] Optionally, based on the above technical solution, S220 forming a groove in the insulating layer includes: A groove is formed within the insulating layer in a direction perpendicular to the substrate and pointing towards the barrier layer, with the opening tending to increase in size.
[0045] like Figure 8 As shown, a groove V1 with an increasing opening is formed in the insulating layer 05 in the direction perpendicular to the substrate 01 and pointing to the barrier layer 03.
[0046] Specifically, in the direction perpendicular to the barrier layer 03 from the substrate 01, the opening of the groove V1 tends to increase, which can increase the inclination of the sidewall of the groove V1, reduce the difficulty of depositing the top metal layer 06 using physical vapor deposition (PVD) process in the later stage, improve the deposition quality, and thus improve the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0047] Optionally, based on the above technical solutions, such as Figure 11 As shown, S220 forming a groove in the insulating layer includes: S2201. A first sub-groove is formed within the insulating layer, and the first sub-groove exposes the barrier layer.
[0048] like Figure 8 As shown, a first sub-groove V10 is formed within the insulating layer 05, and the first sub-groove V10 exposes the barrier layer 03.
[0049] S2202. A second sub-groove is formed in the insulating layer. The second sub-groove is connected to the first sub-groove, and the opening of the second sub-groove is larger than the opening of the first sub-groove.
[0050] like Figure 8 As shown, a second sub-groove V11 is formed in the insulating layer 05. The second sub-groove V11 is connected to the first sub-groove V10, and the opening of the second sub-groove V11 is larger than the opening of the first sub-groove V10.
[0051] Specifically, a first sub-groove V10 and a second sub-groove V11 are formed within the insulating layer 05. The first sub-groove V10 exposes the barrier layer 03, and the second sub-groove V11 is connected to the first sub-groove V10. The opening of the second sub-groove V11 is larger than the opening of the first sub-groove V10, so that the opening of the groove V1 tends to increase in the direction perpendicular to the barrier layer 03 from the substrate 01. This can increase the inclination of the sidewall of the groove V1, reduce the difficulty of depositing the top metal layer 06 using physical vapor deposition (PVD) in the later stage, improve the deposition quality, and thus improve the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0052] Optionally, based on the above technical solution, S220 forming the first sub-groove within the insulating layer includes: A first sub-groove is formed within the insulating layer, with an obtuse angle between the sidewall and the bottom surface.
[0053] like Figure 8 As shown, a first sub-groove V10 with an obtuse angle between the sidewall and the bottom surface is formed in the insulating layer 05, which reduces the difficulty of depositing the top metal layer 06 on the sidewall of the first sub-groove V10 using the physical vapor deposition (PVD) process in the later stage, improves the deposition quality, and thus improves the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0054] Optionally, based on the above technical solution, S220 forming a second sub-groove within the insulating layer includes: A second sub-groove is formed within the insulating layer, with an obtuse angle between the sidewall and the bottom surface.
[0055] like Figure 8 As shown, a second sub-groove V11 with an obtuse angle between the sidewall and the bottom surface is formed in the insulating layer 05, which reduces the difficulty of depositing the top metal layer 06 on the sidewall of the second sub-groove V11 using physical vapor deposition (PVD) process in the later stage, improves the deposition quality, and thus improves the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0056] Optionally, based on the above technical solution, S220 forming a second sub-groove within the insulating layer includes: A second sub-groove with a step is formed at the connection between the first sub-groove and the insulating layer.
[0057] like Figure 8 As shown, a second sub-groove V11 with a step S1 is formed at the connection between the insulating layer 05 and the first sub-groove V10.
[0058] Specifically, the presence of step S1 buffers the overall vertical slope of the sidewall of the second sub-groove V11, reducing the difficulty of depositing the top metal layer 06 on the sidewall of the second sub-groove V11 using physical vapor deposition (PVD) process, improving the deposition quality, and thus improving the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0059] Optionally, based on the above technical solution, S230 further includes the following before forming gallium nitride vias in the barrier layer and channel layer: A third sub-groove is formed at the opening of the groove. The third sub-groove is connected to the second sub-groove, and the opening of the third sub-groove is larger than the opening of the second sub-groove.
[0060] like Figure 8 As shown, a third sub-groove V12 is formed at the opening of groove V1. The third sub-groove V12 is connected to the second sub-groove V11, and the opening of the third sub-groove V12 is larger than the opening of the second sub-groove V11. Optionally, the angle between the sidewall and the bottom surface of the third sub-groove V12 is an obtuse angle.
[0061] The opening of the third sub-groove V12 is larger than the opening of the second sub-groove V11, and the opening of the second sub-groove V11 is larger than the opening of the first sub-groove V10. This makes the opening of the groove V1 tend to increase in the direction perpendicular to the substrate 01 and pointing to the barrier layer 03. This can increase the inclination of the sidewall of the groove V1, reduce the difficulty of depositing the top metal layer 06 using physical vapor deposition (PVD) process in the later stage, improve the deposition quality, and thus improve the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0062] Optionally, based on the above technical solution, the insulating layer 05 includes a first sub-insulating layer 051 and a second sub-insulating layer 052, and the groove V1 includes a first sub-groove V10 and a second groove V11; as shown Figure 12 As shown, S220 forms an insulating layer on the side of the barrier layer away from the channel layer, and forms spaced conductive holes and grooves within the insulating layer, including: S2201A, a first sub-insulating layer is formed on the side of the barrier layer away from the channel layer.
[0063] like Figure 13As shown, a first sub-insulating layer 051 is formed on the side of the barrier layer 03 away from the channel layer 02.
[0064] S2201B: A first through-hole is formed in the first sub-insulating layer, exposing the conductive structure.
[0065] like Figure 13 and Figure 14 As shown, a photoresist layer 07 is formed on the surface of the first sub-insulating layer 051. (As illustrated...) Figure 14 As shown, after patterning the photoresist layer 07, it is used as a mask to etch the first sub-insulating layer 051, forming a first through hole T01 in the first sub-insulating layer 051, exposing the conductive structure 04.
[0066] S2201C, A first sub-groove is formed in the first sub-insulating layer, and the first sub-groove exposes the barrier layer.
[0067] like Figure 14 As shown, the first sub-insulating layer 051 is etched, forming the first through-hole T01 and the first sub-groove V10 simultaneously. In subsequent gallium nitride via (TGV) fabrication, the first sub-insulating layer 051 does not need to be etched, reducing the etching depth of the TGV, simplifying the fabrication process, reducing fabrication time and cost, and lowering the difficulty of defect control in the TGV, thus improving the yield of both the TGV and gallium nitride devices.
[0068] S2201D: The first through hole is filled with a first conductive filler layer, and the sidewall of the first sub-groove retains the first conductive filler layer.
[0069] like Figure 15 As shown, after the first via T01 is filled with a first conductive filler layer T02, the sidewall of the first sub-groove V10 retains the first conductive filler layer T02, which buffers the overall vertical slope of the sidewall of the first sub-groove V10. This reduces the difficulty of depositing the top metal layer 06 on the sidewall of the first sub-groove V10 using physical vapor deposition (PVD) and improves the deposition quality, thereby improving the yield of gallium nitride vias (TGVs) and gallium nitride devices. Before filling the first via T01 with the first conductive filler layer T02, forming a first sidewall conductive layer T03 can improve the surface quality of the sidewall of the first via T01 and increase the filling yield of the first conductive filler layer T02. Figure 16As shown, the first conductive filling layer T02 and the first sidewall conductive layer T03 are formed as a whole. The first conductive filling layer T02 and the first sidewall conductive layer T03 in the first sub-groove V10 need to be removed by etching process. It should be noted that the first conductive filling layer T02 and the first sidewall conductive layer T03 remain on the sidewall of the first sub-groove V10, which further buffers the overall vertical slope of the sidewall of the first sub-groove V10 and reduces the deposition difficulty of the top metal layer 06.
[0070] S2201E, a first metal layer is formed on the side of the first conductive filling layer away from the conductive structure, the first metal layer covers the first conductive filling layer, and the first metal layer remains on the sidewall of the first sub-groove.
[0071] like Figure 17 As shown, a first metal layer M1 is formed on the side of the first conductive filling layer T02 away from the conductive structure 04. The first metal layer M1 covers the first conductive filling layer T02, and the first metal layer M1 remains on the sidewall of the first sub-recess V10. The first metal layer M1 is used to extract the electrical signal of the conductive structure 04 through the first conductive filling layer T02. The presence of the first metal layer M1 on the sidewall of the first sub-recess V10 buffers the overall vertical slope of the sidewall of the first sub-recess V10, reduces the difficulty of depositing the top metal layer 06 on the sidewall of the first sub-recess V10 using the subsequent physical vapor deposition (PVD) process, improves the deposition quality, and thus improves the yield of gallium nitride through-hole (TGV) devices and gallium nitride devices.
[0072] S2201F, a second sub-insulating layer is formed on the side of the first sub-insulating layer away from the barrier layer, and the second sub-insulating layer covers the first metal layer and the first sub-groove.
[0073] like Figure 18 As shown, a second sub-insulating layer 052 is formed on the side of the first sub-insulating layer 051 away from the barrier layer 03, and the second sub-insulating layer 052 covers the first metal layer M1 and the first sub-groove V10.
[0074] S2201G: A second through-hole is formed in the second sub-insulating layer, exposing the first metal layer.
[0075] like Figure 18 As shown, a photoresist layer 08 is formed on the surface of the second sub-insulating layer 052. After patterning the photoresist layer 08, as shown... Figure 19 As shown, using this as a mask, the second sub-insulating layer 052 is etched to form a second through hole T04 in the second sub-insulating layer 052, and the second through hole T04 exposes the first metal layer M1.
[0076] S2201H, a second sub-groove is formed in the second sub-insulating layer, and the second sub-groove is connected to the first sub-groove.
[0077] like Figure 19 As shown, the second sub-insulating layer 052 is etched to form the second via T04, and simultaneously forms the second sub-groove V11, which is connected to the first sub-groove V10. In subsequent fabrication of gallium nitride vias (TGVs), the second sub-insulating layer 052 does not need to be etched, reducing the etching depth of the TGV, simplifying the fabrication process, reducing fabrication time and cost, and lowering the difficulty of defect control in TGVs, thus improving the yield of both TGVs and gallium nitride devices.
[0078] S2201I, the second through hole is filled with a second conductive filler layer, and the second conductive filler layer remains at the connection between the second sub-groove and the first sub-groove.
[0079] like Figure 20 As shown, the second conductive filler layer T05 is filled into the second via T04. The second conductive filler layer T05 remains at the connection between the second sub-groove V11 and the first sub-groove V10, buffering the overall vertical slope at the connection. This reduces the difficulty of depositing the top metal layer 06 at the connection between the second sub-groove V11 and the first sub-groove V10 using physical vapor deposition (PVD) technology, improving deposition quality and thus increasing the yield of gallium nitride via (TGV) and gallium nitride devices. Forming the second sidewall conductive layer T06 before filling the second via T04 with the second conductive filler layer T05 improves the surface quality of the sidewalls of the second via T04 and increases the filling yield of the second conductive filler layer T05. Furthermore, the presence of the second sidewall conductive layer T06 at the connection between the second sub-groove V11 and the first sub-groove V10 further buffers the overall vertical slope at the connection, reducing the deposition difficulty of the top metal layer 06.
[0080] Specifically, the above technical solution has the following beneficial effects: Firstly, the first sub-insulating layer 051 is etched to form a first through-hole T01 while simultaneously forming a first sub-groove V10. Simultaneously, the second sub-insulating layer 052 forms a second through-hole T04 while simultaneously forming a second sub-groove V11, which is connected to the first sub-groove V10. In subsequent fabrication of gallium nitride through-hole (TGV), it is unnecessary to etch the first and second sub-insulating layers 051 and 052, reducing the etching depth of the TGV, simplifying the fabrication process, reducing fabrication time and cost, and lowering the difficulty of defect control in the TGV, thereby improving the yield of both the TGV and gallium nitride devices. Secondly, the sidewalls of the first sub-groove V10 retain a first sidewall conductive layer T03, a first conductive filling layer T02, and a first metal layer M1. This buffers the overall vertical slope of the sidewalls of the first sub-groove V10, reducing the difficulty of depositing the top metal layer 06 on the sidewalls of the first sub-groove V10 using physical vapor deposition (PVD) and improving the deposition quality. This, in turn, improves the yield of gallium nitride vias (TGVs) and gallium nitride devices. Furthermore, the first metal layer M1 is used to extract electrical signals from the conductive structure 04 through the first conductive filling layer T02. Thirdly, the second sidewall conductive layer T06 and the second conductive filling layer T05 remain at the connection between the second sub-groove V11 and the first sub-groove V10, which buffers the overall vertical slope at the connection between the second sub-groove V11 and the first sub-groove V10, reduces the difficulty of depositing the top metal layer 06 at the connection between the second sub-groove V11 and the first sub-groove V10 using physical vapor deposition (PVD) process, improves the deposition quality, and thus improves the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0081] Optionally, the preparation process of the third sub-groove V12 is as follows: Figure 21 As shown, a photoresist layer 09 is formed on the surface of the second sub-insulating layer 052. After patterning the photoresist layer 09, and using it as a mask, as shown... Figure 8 As shown, a third sub-groove V12 is formed at the opening of groove V1. The third sub-groove V12 is connected to the second sub-groove V11, and the opening of the third sub-groove V12 is larger than the opening of the second sub-groove V11. Optionally, the angle between the sidewall and the bottom surface of the third sub-groove V12 is an obtuse angle.
[0082] The opening of the third sub-groove V12 is larger than the opening of the second sub-groove V11, and the opening of the second sub-groove V11 is larger than the opening of the first sub-groove V10. This makes the opening of the groove V1 tend to increase in the direction perpendicular to the substrate 01 and pointing to the barrier layer 03. This can increase the inclination of the sidewall of the groove V1, reduce the difficulty of depositing the top metal layer 06 using physical vapor deposition (PVD) process in the later stage, improve the deposition quality, and thus improve the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0083] This invention also provides a gallium nitride device. For example... Figure 10 As shown, the gallium nitride device includes: a semiconductor functional layer, wherein the semiconductor functional layer includes at least a substrate 01, a channel layer 02, and a barrier layer 03, and a conductive structure 04 is formed on the surface of the barrier layer 03; an insulating layer 05, the insulating layer 05 being located on the side of the barrier layer 03 away from the channel layer 02, and a conductive hole T1 and a groove V1 formed simultaneously and spaced apart within the insulating layer 05, the conductive hole T1 penetrating the insulating layer 05 and electrically connected to the conductive structure 04, and the groove V1 exposing the barrier layer 03; a gallium nitride via TGV, the gallium nitride via TGV being formed after the formation of the conductive hole T1 and the groove V1, the gallium nitride via TGV being located within the barrier layer 03 and the channel layer 02, the gallium nitride via TGV being connected to the groove V1 and exposing the substrate 01; and a top metal layer 06, the top metal layer 06 being located on the sidewall of the gallium nitride via TGV and the sidewall of the groove V1, the top metal layer 06 extending to the surface of the insulating layer 05 away from the barrier layer 03, and covering the conductive hole T1.
[0084] The technical solution provided in this invention involves simultaneously fabricating a groove V1 within the insulating layer 05 during the fabrication of the conductive hole T1 that leads out the electrical signal from the barrier layer 03. In the subsequent fabrication of the gallium nitride via (TGV), only the semiconductor layers (channel layer 02 and barrier layer 03) need to be etched, reducing the etching depth of the TGV. Furthermore, it eliminates the need for two etching steps, requiring only one etching step, thus simplifying the fabrication process and reducing fabrication time and cost. Furthermore, since the above-mentioned preparation method reduces the etching depth of the gallium nitride via, it reduces the aspect ratio of the gallium nitride via. This avoids the low step coverage when depositing the top metal layer 06 using physical vapor deposition (PVD) in the later stage. In addition, if the sidewalls of the gallium nitride via (TGV) are too smooth, it will seriously affect the deposition quality of the top metal layer 06. For example, the top metal layer 06 deposited on vertical sidewalls is relatively thin. Therefore, it is usually necessary to adjust the sidewalls of the gallium nitride via to a more inclined angle. However, this can easily lead to more material accumulation on the sidewalls. This reduces the difficulty of defect control in gallium nitride via (TGV) and improves the yield of gallium nitride via (TGV) and gallium nitride devices.
[0085] Optionally, based on the above technical solutions, such as Figure 10 As shown, in the direction perpendicular to the barrier layer 03 from the substrate 01, the opening of the groove V1 tends to increase.
[0086] Specifically, in the direction perpendicular to the barrier layer 03 from the substrate 01, the opening of the groove V1 tends to increase, which can increase the inclination of the sidewall of the groove V1, reduce the difficulty of depositing the top metal layer 06 using physical vapor deposition (PVD) process in the later stage, improve the deposition quality, and thus improve the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0087] Optionally, based on the above technical solutions, such as Figure 10 As shown, the groove V1 includes a first sub-groove V10 and a second sub-groove V11; the first sub-groove V10 is located inside the insulating layer 05 and exposes the barrier layer 03; the second sub-groove V11 is connected to the first sub-groove V10, and the opening of the second sub-groove V11 is larger than the opening of the first sub-groove V10.
[0088] Specifically, a first sub-groove V10 and a second sub-groove V11 are formed within the insulating layer 05. The first sub-groove V10 exposes the barrier layer 03, and the second sub-groove V11 is connected to the first sub-groove V10. The opening of the second sub-groove V11 is larger than the opening of the first sub-groove V10, so that the opening of the groove V1 tends to increase in the direction perpendicular to the barrier layer 03 from the substrate 01. This can increase the inclination of the sidewall of the groove V1, reduce the difficulty of depositing the top metal layer 06 using physical vapor deposition (PVD) in the later stage, improve the deposition quality, and thus improve the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0089] Optionally, based on the above technical solutions, such as Figure 10 As shown, the angle between the sidewall and bottom surface of the first sub-groove V10 is an obtuse angle, which reduces the difficulty of depositing the top metal layer 06 on the sidewall of the first sub-groove V10 using physical vapor deposition (PVD) process, improves the deposition quality, and thus improves the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0090] Optionally, based on the above technical solutions, such as Figure 10 As shown, the angle between the sidewall and bottom surface of the second sub-groove V11 is an obtuse angle, which reduces the difficulty of depositing the top metal layer 06 on the sidewall of the second sub-groove V11 using physical vapor deposition (PVD) process, improves the deposition quality, and thus improves the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0091] Optionally, based on the above technical solutions, such as Figure 10 As shown, a step S1 is provided at the connection between the first sub-groove V10 and the second sub-groove V11.
[0092] Specifically, the presence of step S1 buffers the overall vertical slope of the sidewall of the second sub-groove V11, reducing the difficulty of depositing the top metal layer 06 on the sidewall of the second sub-groove V11 using physical vapor deposition (PVD) process, improving the deposition quality, and thus improving the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0093] Optionally, based on the above technical solutions, such as Figure 10 As shown, the groove V1 also includes a third sub-groove V12, which is located at the opening of the groove V1. The third sub-groove V12 is connected to the second sub-groove V11, and the opening of the third sub-groove V12 is larger than the opening of the second sub-groove V11. Optionally, the angle between the sidewall and the bottom surface of the third sub-groove V12 is an obtuse angle.
[0094] Specifically, the opening of the third sub-groove V12 is larger than the opening of the second sub-groove V11, and the opening of the second sub-groove V11 is larger than the opening of the first sub-groove V10. This makes the opening of the groove V1 tend to increase in the direction perpendicular to the substrate 01 and pointing to the barrier layer 03. This can increase the inclination of the sidewall of the groove V1, reduce the difficulty of depositing the top metal layer 06 using physical vapor deposition (PVD) process in the later stage, improve the deposition quality, and thus improve the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0095] Optionally, based on the above technical solutions, such as Figure 10 as well as Figures 13-21As shown, insulating layer 05 includes a first sub-insulating layer 051 and a second sub-insulating layer 052, and groove V1 includes a first sub-groove V10 and a second sub-groove V11; the first sub-insulating layer 051 is located on the side of barrier layer 03 away from channel layer 02; a first through hole T01 is formed simultaneously with the first sub-groove V10 and is located on the first sub-insulating layer 051, and the first through hole T01 exposes conductive structure 04; the first sub-groove V10 is located on the first sub-insulating layer 051 and exposes barrier layer 03; a first conductive filling layer T02 is filled in the first through hole T01, and the sidewall of the first sub-groove V10 retains the first conductive filling layer T02; a first metal layer M1 is located on the side of the first conductive filling layer T02 away from conductive structure 04. The first metal layer M1 covers the first conductive filling layer T02, and the first metal layer M1 remains on the sidewall of the first sub-groove V10; the second sub-insulating layer 052 is located on the side of the first sub-insulating layer 051 away from the barrier layer 03, and the second sub-insulating layer 052 covers the first metal layer M1 and the first sub-groove V10; the second through hole T04 is located in the second sub-insulating layer 052 and exposes the first metal layer M1; the second sub-groove V11 is located in the second sub-insulating layer 052 and is connected to the first sub-groove V10; the second conductive filling layer T05 fills the second through hole T04, and the second conductive filling layer T05 remains at the connection between the second sub-groove V11 and the first sub-groove V10.
[0096] Specifically, the above technical solution has the following beneficial effects: Firstly, the first sub-insulating layer 051 is etched to form a first through-hole T01 while simultaneously forming a first sub-groove V10. Simultaneously, the second sub-insulating layer 052 forms a second through-hole T04 while simultaneously forming a second sub-groove V11, which is connected to the first sub-groove V10. In subsequent fabrication of gallium nitride through-hole (TGV), it is unnecessary to etch the first and second sub-insulating layers 051 and 052, reducing the etching depth of the TGV, simplifying the fabrication process, reducing fabrication time and cost, and lowering the difficulty of defect control in the TGV, thereby improving the yield of both the TGV and gallium nitride devices. Secondly, the sidewalls of the first sub-recess V10 retain a first conductive filling layer T02 and a first metal layer M1, which buffers the overall vertical slope of the sidewalls of the first sub-recess V10, reducing the difficulty of depositing the top metal layer 06 on the sidewalls of the first sub-recess V10 using physical vapor deposition (PVD) process, improving deposition quality, and thus improving the yield of gallium nitride via (TGV) and gallium nitride devices. Furthermore, the first metal layer M1 is used to lead out the electrical signal of the conductive structure 04 through the first conductive filling layer T02. Thirdly, the junction of the second sub-recess V11 and the first sub-recess V10 retains a second conductive filling layer T05, which buffers the overall vertical slope of the junction of the second sub-recess V11 and the first sub-recess V10, reducing the difficulty of depositing the top metal layer 06 at the junction of the second sub-recess V11 and the first sub-recess V10 using physical vapor deposition (PVD) process, improving deposition quality, and thus improving the yield of gallium nitride via (TGV) and gallium nitride devices.
[0097] Optionally, based on the above technical solutions, such as Figure 10 as well as Figures 13-21 As shown, it also includes: a first sidewall conductive layer T03, which remains on the sidewall of the first through hole T01 and the sidewall of the first sub-groove V10.
[0098] Specifically, the sidewalls of the first sub-groove V10 retain a first sidewall conductive layer T03, a first conductive filling layer T02, and a first metal layer M1. This buffers the overall vertical slope of the sidewalls of the first sub-groove V10, reducing the difficulty of depositing the top metal layer 06 on the sidewalls of the first sub-groove V10 using physical vapor deposition (PVD) and improving the deposition quality. This, in turn, improves the yield of gallium nitride vias (TGVs) and gallium nitride devices. Furthermore, the first metal layer M1 is used to extract electrical signals from the conductive structure 04 through the first conductive filling layer T02.
[0099] Optionally, based on the above technical solutions, such as Figure 10As shown, it also includes a second sidewall conductive layer T06, which is located on the sidewall of the second through hole T04. The sidewall of the first sub-groove V10 has the second sidewall conductive layer T06 remaining, and the connection between the second sub-groove V11 and the first sub-groove V10 has the second sidewall conductive layer T06 remaining.
[0100] Specifically, the connection between the second sub-groove V11 and the first sub-groove V10 has a second sidewall conductive layer T06 and a second conductive filling layer T05, which buffers the overall vertical slope of the connection between the second sub-groove V11 and the first sub-groove V10. This reduces the difficulty of depositing the top metal layer 06 at the connection between the second sub-groove V11 and the first sub-groove V10 using physical vapor deposition (PVD) process, improves the deposition quality, and thus improves the yield of gallium nitride through-hole (TGV) and gallium nitride devices.
[0101] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and no limitation is imposed herein.
[0102] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. A method for fabricating a gallium nitride device, characterized in that, include: A semiconductor functional layer is prepared, wherein the semiconductor functional layer includes at least a substrate, a channel layer and a barrier layer, and a conductive structure is formed on the surface of the barrier layer; An insulating layer is formed on the side of the barrier layer away from the channel layer, and conductive holes and grooves are formed in the insulating layer at intervals. The conductive holes penetrate the insulating layer and are electrically connected to the conductive structure, and the grooves are exposed on the barrier layer. Gallium nitride vias are formed in the barrier layer and the channel layer, and the gallium nitride vias are connected to the groove and exposed to the substrate; A top metal layer is formed on the sidewall of the gallium nitride via and the sidewall of the groove, the top metal layer extending to the surface of the insulating layer away from the barrier layer and covering the conductive via; Forming grooves within the insulating layer includes: A groove is formed within the insulating layer, the size of which tends to increase in the direction perpendicular to the barrier layer on the substrate; Forming grooves within the insulating layer includes: A first sub-groove is formed within the insulating layer, the first sub-groove exposing the barrier layer; A second sub-groove is formed within the insulating layer. The second sub-groove is connected to the first sub-groove, and the angle between the inner sidewall of the opening of the second sub-groove and the bottom surface is greater than the angle between the inner sidewall of the opening of the first sub-groove and the bottom surface. The method further includes the following steps before forming gallium nitride vias in the barrier layer and the channel layer: A third sub-groove is formed at the opening of the groove, the third sub-groove is connected to the second sub-groove, and the angle between the inner sidewall of the opening of the third sub-groove and the bottom surface is greater than the angle between the inner sidewall of the opening of the second sub-groove and the bottom surface.
2. The method for fabricating a gallium nitride device according to claim 1, characterized in that, Forming the first sub-groove within the insulating layer includes: A first sub-groove is formed within the insulating layer, with an obtuse angle between the sidewall and the bottom surface.
3. The method for fabricating a gallium nitride device according to claim 1, characterized in that, Forming a second sub-groove within the insulating layer includes: A second sub-groove is formed within the insulating layer, with an obtuse angle between the sidewall and the bottom surface.
4. The method for fabricating a gallium nitride device according to claim 1, characterized in that, Forming a second sub-groove within the insulating layer includes: A second sub-groove with a step is formed at the connection between the first sub-groove and the insulating layer.
5. The method for fabricating a gallium nitride device according to any one of claims 1-4, characterized in that, The insulating layer includes a first sub-insulating layer and a second sub-insulating layer, and the groove includes a first sub-groove and a second groove; Forming an insulating layer on the side of the barrier layer away from the channel layer, and forming spaced conductive holes and grooves within the insulating layer, includes: A first sub-insulating layer is formed on the side of the barrier layer away from the channel layer; A first through-hole is formed in the first sub-insulating layer, and the first through-hole exposes the conductive structure; A first sub-groove is formed in the first sub-insulating layer, and the first sub-groove exposes the barrier layer; The first through hole is filled with a first conductive filler layer, and the first conductive filler layer remains on the sidewall of the first sub-groove; A first metal layer is formed on the side of the first conductive fill layer away from the conductive structure, the first metal layer covers the first conductive fill layer, and the first metal layer remains on the sidewall of the first sub-groove. A second sub-insulating layer is formed on the side of the first sub-insulating layer away from the barrier layer, and the second sub-insulating layer covers the first metal layer and the first sub-groove. A second through-hole is formed in the second sub-insulating layer, and the second through-hole exposes the first metal layer; A second sub-groove is formed in the second sub-insulating layer, and the second sub-groove is connected to the first sub-groove. The second through hole is filled with a second conductive filler layer, and the second conductive filler layer remains at the connection between the second sub-groove and the first sub-groove.
6. The method for fabricating a gallium nitride device according to claim 5, characterized in that, Before the first through-hole is filled with the first conductive filler layer, the following is also included: A first sidewall conductive layer is formed on the sidewall of the first through hole, and the first sidewall conductive layer remains on the sidewall of the first sub-groove.
7. The method for fabricating a gallium nitride device according to claim 5, characterized in that, Before the second conductive filler layer is filled into the second through-hole, the following is also included: A second sidewall conductive layer is formed on the sidewall of the second through hole, the second sidewall conductive layer remains on the sidewall of the first sub-groove, and the second sidewall conductive layer remains at the connection between the second sub-groove and the first sub-groove.
8. A gallium nitride device, fabricated by the method for fabricating a gallium nitride device according to any one of claims 1-7, characterized in that, include: A semiconductor functional layer, wherein the semiconductor functional layer includes at least a substrate, a channel layer and a barrier layer, and the surface of the barrier layer is provided with a conductive structure; An insulating layer is located on the side of the barrier layer away from the channel layer. The insulating layer has simultaneously formed, spaced conductive holes and grooves. The conductive holes penetrate the insulating layer and are electrically connected to the conductive structure. The grooves are exposed on the barrier layer. Gallium nitride vias are formed after the conductive vias and the grooves are formed. The gallium nitride vias are located within the barrier layer and the channel layer. The gallium nitride vias are connected to the grooves and exposed on the substrate. A top metal layer is located on the sidewall of the gallium nitride via and the sidewall of the groove. The top metal layer extends to the surface of the insulating layer away from the barrier layer and covers the conductive via.
9. The gallium nitride device according to claim 8, characterized in that, In the direction perpendicular to the barrier layer from the substrate, the size of the opening of the groove tends to increase.
10. The gallium nitride device according to claim 8, characterized in that, The groove includes a first sub-groove and a second sub-groove; The first sub-groove is located within the insulating layer, and the first sub-groove exposes the barrier layer; The second sub-groove is connected to the first sub-groove, and the angle between the inner sidewall of the opening of the second sub-groove and the bottom surface is greater than the angle between the inner sidewall of the opening of the first sub-groove and the bottom surface.
11. The gallium nitride device according to claim 10, characterized in that, The angle between the sidewall and bottom surface of the first sub-groove is an obtuse angle.
12. The gallium nitride device according to claim 10, characterized in that, The angle between the sidewall and bottom surface of the second sub-groove is an obtuse angle.
13. The gallium nitride device according to claim 10, characterized in that, A step is provided at the connection between the first sub-groove and the second sub-groove.
14. The gallium nitride device according to claim 10, characterized in that, The groove also includes a third sub-groove, which is located at the opening of the groove. The third sub-groove is connected to the second sub-groove, and the angle between the inner sidewall of the opening of the third sub-groove and the bottom surface is greater than the angle between the inner sidewall of the opening of the second sub-groove and the bottom surface.
15. The gallium nitride device according to any one of claims 8-14, characterized in that, The insulating layer includes a first sub-insulating layer and a second sub-insulating layer, and the groove includes a first sub-groove and a second groove; The first sub-insulating layer is located on the side of the barrier layer away from the channel layer; A first through hole is formed simultaneously with the first sub-groove and is located in the first sub-insulating layer, and the first through hole exposes the conductive structure. The first sub-groove is located in the first sub-insulating layer and exposes the barrier layer; A first conductive filling layer is filled in the first through hole, and the first conductive filling layer remains on the sidewall of the first sub-groove. A first metal layer is located on the side of the first conductive fill layer away from the conductive structure. The first metal layer covers the first conductive fill layer, and the first metal layer remains on the sidewall of the first sub-groove. A second sub-insulating layer is located on the side of the first sub-insulating layer away from the barrier layer, and the second sub-insulating layer covers the first metal layer and the first sub-groove. The second through hole is located in the second sub-insulating layer and exposes the first metal layer; The second sub-groove is located in the second sub-insulating layer and is connected to the first sub-groove. The second conductive filler layer fills the second through hole, and the second conductive filler layer remains at the connection between the second sub-groove and the first sub-groove.
16. The gallium nitride device according to claim 15, characterized in that, Also includes: A first sidewall conductive layer is present on the sidewall of the first through hole, and the first sidewall conductive layer remains on the sidewall of the first sub-groove.
17. The gallium nitride device according to claim 15, characterized in that, It also includes a second sidewall conductive layer, which is located on the sidewall of the second through hole. The sidewall of the first sub-groove retains the second sidewall conductive layer, and the connection between the second sub-groove and the first sub-groove retains the second sidewall conductive layer.
Citation Information
Patent Citations
3D through-hole super-structure LED chip and preparation method thereof
CN108365078A
Nitride-based bidirectional switching device for battery management and method of manufacturing same
CN114793468A