Si substrate GaN epitaxial structure and preparation method

CN117334736BActive Publication Date: 2026-08-07NANJING GUOSHENG ELECTRONICS +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
NANJING GUOSHENG ELECTRONICS
Filing Date
2023-09-28
Publication Date
2026-08-07

AI Technical Summary

Technical Problem

[0003]Si基GaN相比于SiC外延GaN衬底和GaN自支撑衬底具有较大的成本优势,但Si衬底与GaN存在较大的晶格失配、热失配问题,严重阻碍了GaN在高功率密度工作条件下的电学性能和可靠度

Benefits of technology

[0024]有益效果:与现有技术相比,本发明的显著效果是:本发明通过设计三维岛状的外延生长方式来解决Si衬底与GaN间晶格失配较大导致的外延质量问题,即在低温条件下生长AlN缓冲层,而后生长的GaN层在升温后缩聚成核,随着生长进行,应变逐渐积累,最终形成三维岛状结构来释放Si衬底与GaN外延层之间的应力,而非形成位错来释放应变,提高了GaN外延片在磊晶过程中的晶体质量,有效地降低了外延片生长时的边缘缺陷和位错密度,提升了外延片的整体质量和良品率。

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Abstract

The application discloses a GaN epitaxial structure of a Si substrate and a preparation method thereof. The epitaxial structure comprises, from bottom to top, a three-dimensional island-shaped laminated layer, a Si-doped GaN epitaxial layer, a Si x N y amorphous atom mask layer, an AlGaN superlattice layer and a GaN epitaxial layer which are sequentially stacked on the Si substrate. The epitaxial growth mode of the three-dimensional island shape is designed, that is, an AlN buffer layer is grown under low-temperature conditions, and then the GaN layer grown after the temperature is raised is condensed and nucleated, the strain is gradually accumulated with the growth, and finally the three-dimensional island structure is formed to release the stress between the Si substrate and the GaN epitaxial layer instead of forming dislocations to release the strain, so that the problem of large lattice mismatch between the Si substrate and the GaN is solved, the crystal quality of the GaN epitaxial wafer in the epitaxial process is improved, the edge defect and dislocation density during the growth of the epitaxial wafer are effectively reduced, and the overall quality and yield of the epitaxial wafer are improved.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, specifically to a GaN epitaxial structure on a Si substrate and its preparation method. Background Technology

[0002] Compared to traditional semiconductor materials, GaN, a third-generation semiconductor material, possesses significant advantages such as a high bandgap, high saturation carrier velocity, high breakdown electric field, high temperature resistance, and radiation resistance. It is suitable for manufacturing next-generation high-speed, high-efficiency power devices and has broad application prospects in wireless charging, fast charging, cloud computing, 5G communication, LiDAR, and new energy vehicles. Meanwhile, Si-based GaN materials offer a significant cost advantage; by using large-size silicon wafers as epitaxial substrates, low-cost manufacturing comparable to traditional silicon-based power devices can be achieved. Therefore, Si-based GaN technology is also considered a mainstream technology for new power electronic devices, with broad application prospects.

[0003] Si-based GaN has a significant cost advantage over SiC epitaxial GaN substrates and GaN self-supporting substrates. However, Si substrates and GaN have significant lattice mismatch and thermal mismatch problems, which seriously hinder the electrical performance and reliability of GaN under high power density operating conditions.

[0004] Reducing the defect density of epitaxial GaN on Si substrates, combined with mature Si-based semiconductor fabrication technology, can achieve a trade-off between cost and performance. Designing buffer layers and epitaxial structures to reduce lattice mismatch and thermal mismatch, thereby improving the quality of Si-based GaN, is key to optimizing the application of GaN materials in radio frequency and power fields. Summary of the Invention

[0005] Purpose of the invention: The purpose of this invention is to provide a GaN epitaxial structure on a Si substrate and its preparation method.

[0006] Technical solution: The present invention discloses a Si substrate GaN epitaxial structure, comprising a Si substrate and a three-dimensional island-shaped stack, a Si-doped GaN epitaxial layer, and a Si substrate sequentially stacked on the Si substrate. x N y The three-dimensional island stack comprises an amorphous atomic mask layer, an AlGaN superlattice layer, and a GaN epitaxial layer; the three-dimensional island stack includes a first AlN buffer layer, a Si-doped GaN nucleation layer, and a second AlN buffer layer stacked sequentially.

[0007] Preferably, the thickness of the first AlN buffer layer is 10–30 nm.

[0008] Preferably, the thickness of the Si-doped GaN nucleation layer is 10–30 nm.

[0009] Preferably, the thickness of the second AlN buffer layer is 10–30 nm.

[0010] A method for fabricating a GaN epitaxial structure on a Si substrate includes the following specific steps:

[0011] (1) In the MOCVD reaction chamber, hydrogen gas is introduced to perform high-temperature surface purification treatment on the Si substrate surface.

[0012] (2) Ammonia and trimethylaluminum are introduced to grow the first AlN buffer layer on the Si substrate;

[0013] (3) Introduce ammonia, trimethylgallium and silane to grow a Si-doped GaN nucleation layer on the basis of the first AlN buffer layer;

[0014] (4) Ammonia and trimethylaluminum are introduced to grow a second AlN buffer layer on the basis of the Si-doped GaN nucleation layer, which together with the first AlN buffer layer and the Si-doped GaN nucleation layer form a three-dimensional island stack.

[0015] (5) Introduce ammonia, trimethylgallium and silane to grow a Si-doped GaN epitaxial layer on the basis of a three-dimensional island stack;

[0016] (6) Nitrogen gas is introduced to grow Si in situ on the surface of the Si-doped GaN epitaxial layer. x N y Amorphous atomic mask layer;

[0017] (7) Ammonia, trimethylgallium, and trimethylaluminum are introduced into the Si... x N y An AlGaN superlattice layer is grown on an amorphous atomic mask layer;

[0018] (8) Introduce ammonia and trimethylgallium to grow a GaN epitaxial layer on the basis of the AlGaN superlattice layer.

[0019] Furthermore, the growth temperature of the first AlN buffer layer is 600–700°C, and the growth pressure is 100 mbar.

[0020] Furthermore, the growth temperature of the Si-doped GaN nucleation layer is 1000–1200 °C, and the growth pressure is 600 mbar.

[0021] Furthermore, the growth temperature of the second AlN buffer layer is 600–700°C, and the growth pressure is 100 mbar.

[0022] Furthermore, the growth temperature of the Si-doped GaN epitaxial layer is 1000–1200 °C, and the growth pressure is 600 mbar.

[0023] Furthermore, the Six N y The growth temperature of the amorphous atomic mask layer is 900–1000℃, and the growth pressure is 300 mbar.

[0024] Beneficial effects: Compared with the prior art, the significant effect of this invention is that it solves the epitaxial quality problem caused by large lattice mismatch between Si substrate and GaN by designing a three-dimensional island-shaped epitaxial growth method. Specifically, an AlN buffer layer is grown at low temperature, and the subsequently grown GaN layer condenses and nucleates after heating. As growth proceeds, strain gradually accumulates, eventually forming a three-dimensional island-shaped structure to release the stress between the Si substrate and the GaN epitaxial layer, rather than forming dislocations to release strain. This improves the crystal quality of GaN epitaxial wafers during the epitaxial process, effectively reduces edge defects and dislocation density during epitaxial wafer growth, and improves the overall quality and yield of epitaxial wafers. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of the Si substrate GaN epitaxial structure of the present invention.

[0026] Figure 2 This is the XRD test pattern of the present invention. Detailed Implementation

[0027] The present invention will be further explained below with reference to the accompanying drawings and specific embodiments.

[0028] In this embodiment of the invention, the epitaxial structure growth equipment is a metal-organic chemical vapor deposition (MOCVD) system. The carrier gases for the organometallic source are hydrogen and nitrogen; the silicon source is silane (SiH4); the nitrogen source is ammonia (NH3); the gallium source is trimethylgallium (TMGa); and the aluminum source is trimethylaluminum (TMAl). The Si substrate is selected... <111> The n-type Si substrate with the desired crystal orientation was etched using H2SO4:H2O2:H2O (3:1:1) and HF (5%) before growth. <111> Substrate.

[0029] Please see Figure 1 , Figure 1 The diagram shows the Si substrate GaN epitaxial structure of the present invention, including a Si substrate 1, a first AlN buffer layer 2, a Si-doped GaN nucleation layer 3, a second AlN buffer layer 4, a Si-doped GaN epitaxial layer 5, and a Si substrate 6. x N y 6. Amorphous atomic mask layer; 7. AlGaN superlattice layer; 8. GaN epitaxial layer.

[0030] The thickness of the first AlN buffer layer 2 is 10–30 nm; the thickness of the Si-doped GaN nucleation layer 3 is 10–30 nm; the thickness of the second AlN buffer layer 4 is 10–30 nm; the thickness of the Si-doped GaN epitaxial layer 5 is 100–300 nm; the thickness of the Si… x N y The amorphous atomic mask layer 6 is an atomic-level mask layer; the AlGaN superlattice layer 7 has a thickness of approximately 1 μm; and the GaN epitaxial layer 8 has a thickness of approximately 2 μm.

[0031] The first AlN buffer layer 2, the Si-doped GaN nucleation layer 3, and the second AlN buffer layer 4 together form a three-dimensional island stack. By changing the growth conditions such as temperature and pressure, the epitaxial layer material is wetted with the substrate at the beginning of growth. The first AlN buffer layer 2 is grown at a lower temperature, then the Si-doped GaN nucleation layer 3 is grown at a higher temperature, and finally the second AlN buffer layer 4 is grown at a lower temperature. As growth proceeds, strain gradually accumulates and finally releases stress in the form of a three-dimensional island structure. Since the strain energy is not released by forming dislocations, there are very few dislocations in the three-dimensional island structure.

[0032] The fabrication process of GaN epitaxial structures on Si substrates includes the following steps:

[0033] Step 1: Raise the temperature of the MOCVD reaction chamber to 1100℃, maintain the pressure of the reaction chamber at 100mbar, introduce hydrogen gas, and purify the surface of Si substrate 1.

[0034] Step 2: Maintain the pressure in the reaction chamber constant, set the temperature to 600-700℃, introduce ammonia gas for pre-nitriding treatment, and then introduce trimethylaluminum to grow the first AlN buffer layer 2.

[0035] Step 3: Increase the pressure in the reaction chamber to 600 mbar and the temperature in the reaction chamber to 1000-1200℃. Introduce ammonia, trimethylgallium, and silane to grow the Si-doped GaN nucleation layer 3.

[0036] Step 4: Reduce the pressure in the reaction chamber to 100 mbar, reduce the temperature in the reaction chamber to 600-700℃ and keep it constant, introduce ammonia and trimethylaluminum to grow the second AlN buffer layer 4, at which point a three-dimensional island-like stacked structure is formed.

[0037] Step 5: Increase the pressure in the reaction chamber to 600 mbar, increase the temperature in the reaction chamber to 1000-1200℃ and maintain it, introduce ammonia, silane and trimethylgallium, and grow a Si-doped GaN epitaxial layer 5.

[0038] Step 6: Reduce the reaction chamber pressure to 300 mbar, reduce the reaction chamber temperature to 900–1000 °C, introduce nitrogen gas, and grow Si. xN y Amorphous atomic mask layer 6;

[0039] Step 7: Reduce the reaction chamber pressure to 200 mbar, increase the reaction chamber temperature to 1200℃, and introduce ammonia, trimethylgallium, and trimethylaluminum to grow an AlGaN superlattice graded layer 7 with Al molar content gradually decreasing from 0.5 to 0.2.

[0040] Step 8: Increase the pressure in the reaction chamber to 600 mbar, decrease the temperature in the reaction chamber to 1100℃, introduce ammonia and trimethylgallium, and grow the GaN epitaxial layer 8.

[0041] This invention selected three sets of processes for testing. Unless otherwise specified, the conditions for each process remained consistent, as follows:

[0042] Process 1: The temperature is set to 600℃ in step 2, 1000℃ in step 3, 600℃ in step 4, 1000℃ in step 5, and 900℃ in step 6. The Si substrate GaN epitaxial wafer produced under these process conditions has a full width at half maximum (FWHM) of 216 arcsec on the 002 plane according to XRD testing.

[0043] Process 2: The temperature is set to 650℃ in step 2, 1100℃ in step 3, 650℃ in step 4, 1100℃ in step 5, and 950℃ in step 6. The Si substrate GaN epitaxial wafer produced under these process conditions has a half-width at half-maximum (FWHM) of 234 arcsec on the 002 plane according to XRD testing.

[0044] Process 3: The temperature is set to 650℃ in step 2, 1100℃ in step 3, 650℃ in step 4, 1100℃ in step 5, and 950℃ in step 6. The Si substrate GaN epitaxial wafer produced under these process conditions has a half-width at half-maximum (FWHM) of 269 arcsec on the 002 plane according to XRD testing.

[0045] Please see Figure 2 The figure shown is an XRD 002 plane rocking curve diagram of the third process of the Si substrate GaN epitaxial wafer embodiment of the present invention. The XRD test results of the above processes one, two and three show that the full width at half maximum (FWHM) of the XRD curve is in the range of 200 to 300 arcsec, and the obtained crystal quality is good.

[0046] Further testing was conducted on the Si substrate GaN epitaxial wafers obtained using the above process: the dislocation density test results were all within 10. 8The quality is order of magnitude superior, placing it at a leading level. The edge slip line is less than 2mm. In comparison, conventional processes show that the edge slip line length exceeds 5mm when GaN epitaxy is grown on a 15.24cm silicon single-wafer produced by Institute 46 using conventional methods; and the edge slip line length is approximately 3mm when GaN epitaxy is grown on a 15.24cm silicon single-wafer imported from Japan using conventional methods. The above tests demonstrate that the Si substrate GaN epitaxial wafers produced under the embodiments of this invention all have excellent crystal quality.

[0047] Meanwhile, under the embodiments of the present invention, Si substrate GaN epitaxial wafers with different epitaxial thicknesses under the same production conditions were tested, and the results are shown in Table 1.

[0048]

[0049] The thicknesses of the layers not recorded in Table 1 remain consistent, which shows that the yield of GaN epitaxial wafers on Si substrates with different epitaxial thicknesses is improved in this invention.

Claims

1. A GaN epitaxial structure on a Si substrate, characterized in that, Includes a Si substrate and a three-dimensional island-shaped stacked layer, a Si-doped GaN epitaxial layer, and a Si substrate sequentially stacked on the Si substrate. x N y The three-dimensional island stack comprises an amorphous atomic mask layer, an AlGaN superlattice layer, and a GaN epitaxial layer; the three-dimensional island stack includes a first AlN buffer layer, a Si-doped GaN nucleation layer, and a second AlN buffer layer stacked sequentially.

2. The Si substrate GaN epitaxial structure according to claim 1, characterized in that: The thickness of the first AlN buffer layer is 10~30nm.

3. The Si substrate GaN epitaxial structure according to claim 1, characterized in that: The thickness of the Si-doped GaN nucleation layer is 10~30 nm.

4. The Si substrate GaN epitaxial structure according to claim 1, characterized in that: The thickness of the second AlN buffer layer is 10~30nm.

5. A method for preparing a GaN epitaxial structure on a Si substrate, characterized in that, Includes the following steps: (1) In the MOCVD reaction chamber, hydrogen gas is introduced to perform high-temperature surface purification treatment on the Si substrate surface; (2) Ammonia and trimethylaluminum are introduced to grow the first AlN buffer layer on the Si substrate; (3) Introduce ammonia, trimethylgallium, and silane to grow a Si-doped GaN nucleation layer on the basis of the first AlN buffer layer; (4) Ammonia and trimethylaluminum are introduced to grow a second AlN buffer layer on the basis of the Si-doped GaN nucleation layer, which together with the first AlN buffer layer and the Si-doped GaN nucleation layer form a three-dimensional island stack. (5) Introduce ammonia, trimethylgallium, and silane to grow a Si-doped GaN epitaxial layer on the basis of a three-dimensional island stack; (6) Nitrogen gas is introduced to grow Si in situ on the surface of the Si-doped GaN epitaxial layer. x N y Amorphous atomic mask layer; (7) Ammonia, trimethylgallium, and trimethylaluminum are introduced into the Si... x N y An AlGaN superlattice layer is grown on an amorphous atomic mask layer; (8) Introduce ammonia and trimethylgallium to grow a GaN epitaxial layer on the basis of the AlGaN superlattice layer.

6. The method for preparing a GaN epitaxial structure on a Si substrate according to claim 5, characterized in that: The growth temperature of the first AlN buffer layer is 600~700℃, and the growth pressure is 100mbar.

7. The method for preparing a GaN epitaxial structure on a Si substrate according to claim 5, characterized in that: The Si-doped GaN nucleation layer is grown at a temperature of 1000~1200℃ and a growth pressure of 600mbar.

8. The method for preparing a GaN epitaxial structure on a Si substrate according to claim 5, characterized in that: The second AlN buffer layer was grown at a temperature of 600-700℃ and a growth pressure of 100mbar.

9. The method for preparing a GaN epitaxial structure on a Si substrate according to claim 5, characterized in that: The growth temperature of the Si-doped GaN epitaxial layer is 1000~1200℃, and the growth pressure is 600mbar.

10. The method for preparing a GaN epitaxial structure on a Si substrate according to claim 5, characterized in that: The Si x N y The growth temperature of the amorphous atomic mask layer is 900~1000℃, and the growth pressure is 300mbar.

Citation Information

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