An online monitoring device for SiC MOSFET junction temperature unaffected by aging

Abstract

This invention discloses an online monitoring device and method for SiC MOSFET junction temperature unaffected by aging. The device includes a main circuit, a turn-on delay time monitoring circuit, and a gate charging time monitoring circuit. The main circuit is used to implement DC-DC voltage conversion. The turn-on delay time monitoring circuit is used to obtain the turn-on delay time of the device during rapid turn-on. The gate charging time monitoring circuit is used to charge the gate capacitance of the device during turn-off to obtain the gate charging time at a specific voltage. This invention acquires the turn-on delay time and gate charging time of the device under test online, selects an appropriate relationship from the twin device curve cluster based on the gate charging time, and accurately monitors the junction temperature of the device under test online based on the turn-on delay time and the relationship. This enables accurate online monitoring of SiC MOSFET junction temperature without stopping the operation of the original power conversion device, providing assistance for accurate online monitoring of junction temperature throughout the entire lifespan of devices in power converters.

Description

Technical Field

[0001] This invention belongs to the field of SiC MOSFET devices, and more specifically, relates to an online monitoring device for SiC MOSFET junction temperature that is unaffected by aging. Background Technology

[0002] The University of Texas at Dallas proposed T d,on Online measurement of SiC MOSFET junction temperature is proposed, and junction temperature correction is achieved by measuring the threshold voltage and case temperature of the aged chip after chip aging. However, this method requires the aged chip to be taken out of operation, the power converter to be stopped, and the ambient temperature to be measured.

[0003] Aalborg University in Denmark proposed an online junction temperature correction method based on temperature-sensitive electrical parameters. This research focuses on SiIGBTs. However, unlike Si IGBTs, SiC MOSFET chips age, causing interference with this method, making it unsuitable for SiC MOSFETs. Furthermore, this method requires stopping the power converter from operation.

[0004] The Polytechnic University of Turin in Italy has proposed a self-calibration method for estimating the junction temperature of SiC MOSFETs. This method requires the power converter to be stopped, the heat dissipation method to be natural cooling, and the on-resistance and heat sink temperature to be measured. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides an online monitoring device for SiC MOSFET junction temperature that is unaffected by aging. Its purpose is to achieve online monitoring of the junction temperature of SiC MOSFET throughout its entire lifespan without stopping the operation of the power converter or measuring the ambient temperature.

[0006] This invention provides an online monitoring device for SiC MOSFET junction temperature that is unaffected by aging, comprising: a main circuit, a turn-on delay time monitoring circuit, and a gate charging time monitoring circuit; the main circuit is used to realize DC voltage conversion, during which the SiC MOSFET device generates power loss through load current, resulting in temperature rise; the turn-on delay time monitoring circuit is used to obtain the turn-on delay time of the device during the rapid turn-on period of the SiC MOSFET device; the gate charging time monitoring circuit is used to charge the gate capacitance of the device during the turn-off period of the SiC MOSFET device to obtain the gate charging time at a specific voltage.

[0007] Furthermore, the conduction delay time T d,onThe monitoring circuit includes: a first voltage follower, a first comparator, a first latch, a first AND gate, and a first digital isolator connected in sequence; the non-inverting input of the first voltage follower is connected to one end of the parasitic inductance of the main circuit bus; both the inverting input and output of the first voltage follower are connected to the inverting input of the first comparator; and the non-inverting input of the first comparator is connected to the first reference voltage V. ref_L The first input terminal of the first latch is connected to the output terminal R2 of the first comparator, and the second input terminal of the first latch is connected to the gate charging time t. c The inverting output S2 of the second comparator in the monitoring circuit; the first input of the first AND gate is connected to the output of the NAND gate in the main circuit; the second input of the first AND gate is connected to the output Q2 of the first latch; and the third input of the first AND gate is connected to the gate charging time t. c The inverting output S2 of the second comparator in the monitoring circuit; the input of the first digital isolator is connected to the output of the first AND gate, and the output of the first digital isolator is used to output the turn-on delay time T. d,on .

[0008] Among them, the first reference voltage V ref_L The value ranges from -100 mV to 0V, and the specific value depends on the model of the component used. The specific value can be obtained through simulation software.

[0009] Furthermore, the gate charging time t c The monitoring circuit includes: a second voltage follower, a second comparator, a second digital isolator, a second latch, and a second AND gate connected in sequence; the non-inverting input of the second voltage follower is connected to the gate terminal of a SiC MOSFET device, and both the inverting input and output of the second voltage follower are connected to the inverting input of the second comparator; the non-inverting input of the second comparator is connected to a second reference voltage V. ref The input of the second digital isolator is connected to the output of the second comparator. The first input of the second latch is connected to the output R1 of the second digital isolator. The second input of the second latch is connected to the controller output signal S1. The first input of the second AND gate is connected to the output of the second latch. The second input of the second AND gate is connected to the controller output signal S1. The output of the second AND gate is connected to the input of the OR gate in the main circuit. The second AND gate is used to output the gate charging time t. c .

[0010] Among them, the second reference voltage V ref The value ranges from a few negative V to 0 V, and the specific value depends on the model of the component used. The specific value can be obtained through simulation software.

[0011] The present invention also provides a method for online monitoring of SiC MOSFET junction temperature based on the above-mentioned SiC MOSFET junction temperature online monitoring device, comprising the following steps:

[0012] When the SiC MOSFET is in a healthy state, it is calibrated via T j1 -T d,on1 Relational monitoring of the junction temperature of the device under test (DUT);

[0013] The DUT is heated to different steady-state temperatures using heating plates;

[0014] T0 of healthy DUTs was measured at different junction temperatures using a double-pulse test. d,on1 T j1 -T d,on1 The relationship was obtained using linear regression with least squares.

[0015] By monitoring T online d,on1 Substitute it into T j1 -T d,on1 Relationship to obtain the T of DUT j1 ;

[0016] via t c1 Monitor the degree of gate oxide degradation of the DUT. As the DUT ages, t c1 Gradually changes: if t c1 Change (Δt) c1 () less than the time measurement resolution threshold (t) th ), then T j1 -T d,on1 If the relationship remains unchanged, it indicates a low degree of gate oxide degradation; otherwise, the correction T... j1 -T d,on1 The relationship.

[0017] Furthermore, correct T j1 -T d,on1 The specific steps include:

[0018] At different junction temperatures, multiple devices of the same model as the DUT were subjected to double-pulse testing to obtain multiple T values. d,on2 and T j2 Data points;

[0019] For multiple devices with the same model as the DUT, the least squares method is used to calibrate multiple Ts via linear regression. j2 -T d,on2 relation;

[0020] To avoid the influence of device dispersion on calibration, T was filtered out. j2 -T d,on2 Relationship and Health DUT Tj1 -T d,on1 Different components;

[0021] High-temperature gate bias (HTGB) experiments were conducted to degrade the gate oxide of the twin device (TD); as the gate oxide aged, t c2 and T j2 -T d,on2 Relationships keep drifting;

[0022] According to t c2 By varying the step size, dual-pulse testing was performed on multiple devices with different gate oxide degradation levels to obtain a set of T values ​​related to gate oxide degradation. j2 -T d,on2 Relationship, T j2 -T d,on2 Each element in the relation corresponds to a t. c2 .

[0023] Furthermore, the degradation steps specifically include:

[0024] Gate oxide degradation causes T j1 -T d,on1 Relationships and the t of the DUT c1 Drift; for online correction of the T of the DUT j1 -T d,on1 Relationship, select a TD with the same aging degree as the DUT. j2 -T d,on2 relation;

[0025] In the T of aging DUT j1 -T d,on1 Relationship corrected to T j2 -T d,on2 After establishing a relationship, T is monitored online. d,on1 Obtain the T of the DUT online j1 Then substitute it into T j2 -T d,on2 relation;

[0026] The gate oxide can continue to degrade until the remaining lifetime (RUL) of the DUT is reduced to zero;

[0027] Before RUL drops to zero, the DUT's t c1 It was monitored online again;

[0028] The above steps are repeated to achieve online correction of inaccurate junction temperature monitoring caused by SiC MOSFET aging.

[0029] This does not require damaging the original packaging structure of the device.

[0030] Compared with the prior art, the present invention has the following beneficial technical effects through the above-described technical solutions:

[0031] (1) The present invention does not require the power converter to stop operating, and the SiCMOSFET junction temperature can be accurately monitored online during the operation of the power converter.

[0032] (2) The present invention can achieve accurate online monitoring of junction temperature for SiC MOSFETs in any aging state.

[0033] (3) The present invention can realize online detection function, and the power conversion device does not need to be stopped before and after the detection device performs its function.

[0034] (4) The present invention only needs to perform the detection function once within one cycle of the power conversion device to obtain accurate online monitoring of the junction temperature of SiC MOSFET in the power converter.

[0035] (5) This invention acquires the on-time delay and gate charging time of the device under test online, and uses the gate charging time to obtain the signal from the twin device T. d,on -T j Choosing the appropriate T for the curve family d,on -T j The relationship is based on the conduction delay time and T. d,on -T j The relationship enables accurate online monitoring of the junction temperature of the device under test. Attached Figure Description

[0036] Figure 1 This is a schematic diagram of the voltage and current waveforms during the conduction process;

[0037] Figure 2 This describes the implementation process of the proposed online monitoring method;

[0038] Figure 3 This is a schematic diagram of a dual-parameter monitoring circuit that takes into account the degree of degradation of SiC MOSFETs.

[0039] Figure 4 It is the conduction delay time T d,on and gate charging time t c Measurement timing diagram;

[0040] Figure 5 It is the T of five healthy SiC MOSFETs under 100V DC voltage. j -T d,on Relationship test results diagram;

[0041] Figure 6 It is the T of SiC MOSFETs with different gate oxide degradation j -Td,on Test results: (a) DUT, (b) TD, (c) Comparison of DUT and TD results; where (a) shows the health status of the device under test and the results of high-temperature gate bias aging after 8h, 24h, 48h, and 80h. j -T d,on (a) Relationship curves; (b) T after 8h, 24h, 48h, and 80h of high-temperature gate bias aging of twin devices in health state. j -T d,on Relationship curves; (c) shows the T values ​​for the device under test and the twin device. j -T d,on Comparison chart of relationship curves;

[0042] Figure 7 This is a structural diagram of a Buck converter with a feed circuit.

[0043] Figure 8 This is a curve comparing the junction temperature measured by an infrared camera for health devices with the estimated junction temperature.

[0044] Figure 9 It is an IR camera measuring T j Based on T j -T d,on Device under test T with different gate oxide degradation j Measurement and t c Measurement results are shown in the figure; (a) shows the online monitoring result of junction temperature of the device under test after 8 hours of high-temperature gate bias aging; (b) shows the online monitoring result of junction temperature of the device under test after 24 hours of high-temperature gate bias aging; (c) shows the online monitoring result of junction temperature of the device under test after 48 hours of high-temperature gate bias aging; and (d) shows the online monitoring result of junction temperature of the device under test after 80 hours of high-temperature gate bias aging. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0046] This invention discloses a method for accurately assessing device lifetime in SiC MOSFETs, where junction temperature accounts for a significant portion of failure factors. Junction temperature significantly impacts device aging, and device lifetime prediction is also related to junction temperature fluctuations. Among various junction temperature monitoring methods, the Thermosensitive Electrical Parameter Method (TSEP) is non-invasive and does not damage the device package structure. It utilizes two similar electrical parameters, namely the conduction delay time (T... d,on ) and gate charging time (t c ), respectively, to monitor the device junction temperature and chip aging online. T d,on With junction temperature (T) jThe relationship is not affected by package aging, but is affected by gate oxide degradation. After gate oxide degradation, T d,on -T j The relationship has changed and needs to be corrected online. c It can be used to assess the degree of gate oxide degradation of a chip by measuring t online. c reaction T d,on -T j The degree of offset, and thus the correction of T d,on -T j This invention enables online monitoring of the junction temperature of SiC MOSFETs throughout their entire lifespan without interrupting the operation of the existing power conversion device or measuring the ambient temperature, thus providing assistance for accurate online monitoring of the junction temperature of devices in power converters throughout their entire lifespan.

[0047] Among them, T d,on and t c Measurement diagram as follows Figure 1 As shown, the implementation process of the proposed online correction method is as follows: Figure 2 As shown:

[0048] Health: When the SiC MOSFET is in a healthy state, it is measured by the calibrated T... j1 -T d,on1 The junction temperature of the device under test (DUT) is monitored. The DUT is heated to different steady-state temperatures using a heating plate. The TL of a healthy DUT is measured at these different junction temperatures using a double-pulse test. d,on1 T j1 -T d,on1 The relationship was obtained using linear regression with the least squares method. This was achieved by monitoring T online. d,on1 Substitute it into T j1 -T d,on1 Relationship to obtain the T of DUT j1 Through t c1 Monitor the degree of gate oxide degradation of the DUT. As the DUT ages, t c1 It changes gradually. If t c1 Change (Δt) c1 () less than the time measurement resolution threshold (t) th ), then T j1 -T d,on1 If the relationship remains unchanged, it indicates a low degree of gate oxide degradation; otherwise, the correction T... j1 -T d,on1 The relationship.

[0049] Calibration: Performed using devices of the same model from the same manufacturer as the DUT. Similar to the DUT, multiple devices of the same model as the DUT were subjected to double-pulse testing at different junction temperatures to obtain multiple T values. d,on2 and T j2Data points. For multiple devices of the same model as the DUT, multiple T data points are calibrated using linear regression with the least squares method. j2 -T d,on2 Relationship. To avoid the influence of device dispersion on calibration, T was filtered out. j2 -T d,on2 Relationship and Health DUT T j1 -T d,on1 Different devices are involved. High-temperature gate bias (HTGB) experiments are performed to degrade the gate oxide of the twin device (TD). As the gate oxide ages, t... c2 and T j2 -T d,on2 The relationship keeps shifting. According to t c2 By varying the step size, dual-pulse testing was performed on multiple devices with different gate oxide degradation levels, resulting in a set of T values ​​related to gate oxide degradation. j2 -T d,on2 Relationship, T j2 -T d,on2 Each element in the relation corresponds to a t. c2 .

[0050] Degradation: Gate oxide degradation causes T j1 -T d,on1 Relationships and the t of the DUT c1 Drift. To correct the T of the DUT online. j1 -T d,on1 Relationship, select a TD with the same aging degree as the DUT. j2 -T d,on2 Relationship. The same degree of aging means TD's t c2 equal to t of DUT c1 In the T of aging DUT j1 -T d,on1 Relationship corrected to T j2 -T d,on2 After establishing a relationship, T is monitored online. d,on1 Obtain the T of the DUT online j1 Then substitute it into T j2 -T d,on2 The gate oxide can continue to degrade until the remaining lifetime (RUL) of the DUT decreases to zero. Before the RUL reaches zero, the DUT's t c1 It is then monitored online again. By repeating the above steps, inaccuracies in junction temperature monitoring caused by the aging of the SiC MOSFET can be corrected online.

[0051] This invention proposes, as follows Figure 3The dual-parameter online monitoring circuit shown consists of a gate charging time monitoring circuit and a conduction delay time monitoring circuit, which respectively monitor t c and T d,on This monitoring circuit monitors the power devices of the Buck converter, t c and T d,on Measurement timing as follows Figure 4 As shown. To correct T online. j -T d,on Relationship, t c and T d,on All of these can be monitored by this circuit. c and T d,on The difference in the monitoring circuit is the difference in the comparator reference voltage, t c and T d,on It can be monitored using the same monitoring circuit topology. Due to the high switching speed of SiC MOSFETs, a microcontroller with high time resolution is used; the Texas Instruments C2000 microcontroller is equipped with a High Resolution Pulse Width Capture (HRCAP) module, providing a time resolution of 300 ps. For example... Figure 3 As shown, by comparing the sampled value of the gate voltage with the comparator's reference voltage (V... ref The rise time of the gate voltage is obtained by comparing the sampled value of the parasitic inductance voltage with the comparator reference voltage (V). ref_L The values ​​are obtained through comparison. The SR latch is used to reduce interference from power circuit oscillations on pulse width measurements. The AND gate can process two edge signals into a pulse width signal. The NAND and OR gates are used to reduce the coupling between the monitoring circuit and the main power circuit. Figure 4 As shown, before enabling the detection function, the output signal of the gate charge time monitoring circuit is blocked by the S1 signal, which is set to zero. The input signal for the gate driver of the DUT is provided by G1. The single-pole single-throw (SPST) switch is closed by G2, which means that the gate driver resistance is low.

[0052] When t is detected c At this time, G2 is off, which means the gate driver resistance is high. S1 starts to rise, causing the C of the DUT to... iss Charging. The rise time of S1 can be captured as t. c Start time. When the DUT gate voltage sample value rises to V ref At this time, the gate driver signal of the DUT is forced to zero, and the DUT is turned off. The moment when the gate driver signal is forced to zero is t. c End time.

[0053] When detecting T d,onAt this time, G2 is off and the gate driver resistance is high. The S1 signal is set to zero to avoid interference from the S1-R1 latch. The rise time of the gate-source voltage of the DUT, i.e., the rise time of S2, can be captured as T. d,on Initially, the rise in drain current is reflected by a sudden increase in parasitic inductance voltage. When the sudden increase in drain current causes the sampled value of parasitic inductance voltage to rise to V... ref_L When the S1-R2 latch output Q2 is set to zero, the time of Q2's decrease can be captured as T. d,on End time.

[0054] T was measured based on a double-pulse experiment. j -T d,on The relationship is that HTGB testing is used to accelerate gate oxide degradation. In the verification experiments, the junction temperature of the DUT is controlled by a hot plate. Due to the thermal resistance between the chip and the hot plate, the junction temperature of the chip is lower than that of the hot plate. j It can be directly captured by a thermal imager (IR camera), and the DSP starts measuring T from the rising edge of the second pulse in the DPT. d,on .

[0055] Five healthy SiC MOSFETs were established respectively. j -T d,on Relationships, such as Figure 5 As shown. The T values ​​for devices #5 and #2 are... j -T d,on The relationships are highly similar. Devices #2 and #5 were selected as the DUT and TD, respectively. To degrade the chip gate oxide, HTGB testing was performed with simultaneous application of high electric field stress and high temperature stress. These devices were placed in an oven at a temperature set to 150°C. To accelerate gate oxide degradation and prevent gate oxide breakdown, the gate-source voltage was set to 30V. During the HTGB test, the drain and source electrodes were short-circuited. After the applied stress was removed, the gate, drain, and source were short-circuited for a period of time to prevent recoverable degradation. Four HTGB tests were performed with cumulative aging times of 8 hours, 24 hours, 48 ​​hours, and 80 hours. After each HTGB test, the TT of the TD and DUT was measured. j -T d,on Relationships, such as Figure 6 As shown.

[0056] like Figure 6 As shown in (a) and (b) above, after each HTGB test, T j -T d,on The relationship may drift. After each application of the same HTGB stress to the TD and DUT, the T0 between the TD and DUT may change. j -T d,on The relationship is very close, such as Figure 6 As shown in (c) in the diagram. For the DUT, the degenerate T j -T d,on The relationship is close to that of T under the same aging conditions as TD. j -T d,on Relationship, away from the T of the DUT in its previous aging state j -T d,on Relationship. In each instance of obtaining TD, T... j -T d,on After establishing the relationship, measure t. c To label each T of TD j -T d,on Curve. When measuring the t of the DUT c At that time, t c Used from multiple Ts of TD j -T d,on Choose the curve that best matches the aging state of the DUT.

[0057] To verify the effectiveness of the proposed circuit, an online monitoring experiment was conducted based on the Buck converter. The schematic diagram is shown below. Figure 3 As shown in the photo, the experimental platform is as follows: Figure 7 As shown. Once the converter starts running, the IR camera records the T of the DUT. j ,like Figure 8 As shown. In Figure 8 In the middle, the solid line represents the T-axis of the IR camera on the healthy DUT. j Direct monitoring results. Figure 8 In the middle, the solid square is based on the T of the healthy DUT. j -T d,on T j Monitoring results.

[0058] When the Buck converter had been operating for approximately twelve minutes, the cooling conditions were changed, causing the junction temperature to drop. The DUT's T... d,on Data is collected in 10-second time steps, and T... d,on Substitute T into the healthy DUT j -T d,on The relationship is used to estimate the junction temperature of the DUT. Whether the DUT is in the heating or cooling phase, the T0 of the DUT can be accurately estimated. j After the Buck converter operates for 8 minutes, the DUT reaches thermal stability. Based on the healthy DUT T... j -T d,on The junction temperature was determined to be 68.3℃. The actual TUT was measured using an IR camera. j The accuracy of the proposed method was verified for healthy SiC MOSFETs at a temperature of 67.6 °C.

[0059] As the gate oxide of SiC MOSFETs ages, the estimated junction temperature of the DUT may no longer depend on the T0 of a healthy DUT. j -T d,on Relationship. After 8 hours, 24 hours, 48 ​​hours, and 80 hours of HTGB testing, the junction temperature of the DUT was determined by the TT of the TD with the same aging state as the gate oxide of the DUT. j -T d,on Relationship estimation, such as Figure 9 As shown. In Figure 9 In the diagram, the solid lines represent the T values ​​of DUTs with different gate oxide degradation levels. j Direct monitoring results. Solid squares are based on the T-cell activity of the healthy DUT. j -T d,on T for degenerate DUT j The monitoring results. Solid circles are based on T-type TDs with the same aging degree as the DUT. j -T d,on T of the degenerate DUT j Monitoring results. Solid triangles represent the t-values ​​of a degenerate DUT. c Online monitoring results. The dashed line represents the t-value of a degraded TD with the same degree of degradation as the DUT. c Monitoring results. If the T values ​​of the healthy DUT were not calibrated... j -T d,on Without this relationship, the junction temperature of the degraded DUT cannot be accurately estimated, with an estimation error exceeding 40.5°C. When using a TD with the same aging condition as the DUT's gate oxide... j -T d,on When the relationship is established, the estimated error of the junction temperature of the degraded DUT does not exceed 3.8℃.

[0060] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A SiC MOSFET junction temperature on-line monitoring device that is not affected by aging, characterized by, include: Main circuit, conduction delay time monitoring circuit (1) and gate charging time monitoring circuit (2); The main circuit is used to realize DC voltage conversion. During DC voltage conversion, the SiC MOSFET device generates power loss through load current, which in turn increases the temperature. The conduction delay time monitoring circuit (1) is used to obtain the conduction delay time of the SiC MOSFET device during the rapid turn-on period; the conduction delay time monitoring circuit (1) includes a first comparator (12) and a first latch (13), the non-inverting input of the first comparator is connected to a first reference voltage. V ref_L The first input of the first latch is connected to the output of the first comparator. R 2. The second input terminal of the first latch is connected to the inverting output terminal of the second comparator (22) in the gate charging time monitoring circuit (2). S 2; The first comparator (12) is used to obtain the drain current rise time by comparing the sampled value of the parasitic inductor voltage with the comparator reference voltage; The first latch (13) is used to reduce the interference of power circuit oscillation on pulse width measurement; The gate charging time monitoring circuit (2) is used to charge the gate capacitance of the SiC MOSFET device during the turn-off period to obtain the gate charging time at a specific voltage. The gate charging time t c The monitoring circuit (2) includes a second comparator (22), the non-inverting input of which is connected to a second reference voltage. V ref The second comparator is used to obtain the time of gate voltage rise by comparing the sampled value of the gate voltage with the reference voltage of the comparator.

2. The SiC MOSFET junction temperature on-line monitoring apparatus according to claim 1, wherein The conduction delay time T d,on The monitoring circuit (1) includes: a first voltage follower (11), a first comparator (12), a first latch (13), a first AND gate (14), and a first digital isolator (15) connected in sequence. The non-inverting input of the first voltage follower (11) is connected to one end of the parasitic inductance of the main circuit bus. The inverting input and output of the first voltage follower (11) are both connected to the inverting input of the first comparator (12). The non-inverting input of the first comparator (12) is connected to the first reference voltage. V ref_L The first input terminal of the first latch (13) is connected to the output terminal of the first comparator (12). R 2. The second input terminal of the first latch (13) is connected to the gate charging time. t c The inverting output of the second comparator in the monitoring circuit (2) S 2; The first input terminal of the first AND gate (14) is connected to the output terminal of the NAND gate in the main circuit, and the second input terminal of the first AND gate (14) is connected to the output terminal of the first latch (13). Q 2. The third input terminal of the first AND gate (14) is connected to the gate charging time. t c The inverting output of the second comparator in the monitoring circuit (2) S 2; The input terminal of the first digital isolator (15) is connected to the output terminal of the first AND gate (14), and the output terminal of the first digital isolator (15) is used to output the turn-on delay time. T d,on .

3. The SiC MOSFET junction temperature on-line monitoring apparatus according to claim 2, wherein First reference voltage V ref_L It takes values ​​in the range of negative several hundred mV to 0V.

4. The SiC MOSFET junction temperature on-line monitoring device according to any one of claims 1-3, wherein, The gate charging time t c The monitoring circuit (2) includes: a second voltage follower (21), a second comparator (22), a second digital isolator (23), a second latch (24), and a second AND gate (25) connected in sequence. The non-inverting input of the second voltage follower (21) is connected to the gate terminal of the SiC MOSFET device. The inverting input and output of the second voltage follower (21) are both connected to the inverting input of the second comparator (22). The non-inverting input of the second comparator (22) is connected to the second reference voltage. V ref , The input of the second digital isolator (23) is connected to the output of the second comparator (22). The first input of the second latch (24) is connected to the output of the second digital isolator (23). R 1. The second input terminal of the second latch (24) is connected to the controller output signal S1. The first input terminal of the second AND gate (25) is connected to the output terminal of the second latch (24). The second input terminal of the second AND gate (25) is connected to the controller output signal S1. The output terminal of the second AND gate (25) is connected to the input terminal of the OR gate in the main circuit. The second AND gate (25) is used to output the gate charging time. t c .

5. The SiC MOSFET junction temperature on-line monitoring apparatus according to claim 4, wherein The second reference voltage V ref In the range of negative several V to 0V.

6. A method for online monitoring of SiC MOSFET junction temperature based on the SiC MOSFET junction temperature online monitoring device according to any one of claims 1-5, characterized in that, Includes the following steps: When the SiC MOSFET is in a healthy state, the calibrated T j1 - T d,on1 The relationship monitors the junction temperature of the device under test; The DUT is heated to different steady-state temperatures using heating plates; Healthy DUTs were measured at different junction temperatures using a double-pulse test. T d,on1 , T j1 - T d,on1 The relationship was obtained using linear regression with least squares. by online monitoring T d,on1 and substituting T j1 - T d,on1 obtained from the relationship between T j1 ; pass t c1 Monitor the degree of gate oxide degradation of the DUT as the DUT ages. t c1 Gradually changing: If t c1 Change Δ t c1 Less than the time measurement resolution threshold t th ,but T j1 - T d,on1 If the relationship remains unchanged, it indicates a low degree of gate oxide degradation; otherwise, correction... T j1 - T d,on1 The relationship.

7. The SiC MOSFET junction temperature on-line monitoring method of claim 6, wherein, correction T j1 - T d,on1 The steps specifically include: At different junction temperatures, multiple devices of the same model as the DUT were subjected to double-pulse testing to obtain multiple... T d,on2 and T j2 Data points; For multiple devices of the same model as the DUT, the multiple devices are calibrated by linear regression using least squares T j2 - T d,on2 relationship; To avoid the influence of device dispersion on the correction, the devices with different relationships are filtered out T j2 - T d,on2 devices with different relationships to the healthy DUT T j1 - T d,on1 devices with different relationships High temperature gate bias experiments were performed to degrade the gate oxide of the twin devices; as the gate oxide aged, t c2 and T j2 - T d,on2 the relationship continuously drifts; According to t c2 a set of gate oxide degradation related parameters are obtained T j2 - T d,on2 relationship, T j2 - T d,on2 each of the relationships corresponds to a t c2 .

8. The SiC MOSFET junction temperature on-line monitoring method of claim 6, wherein, The degradation process specifically includes: Gate oxide degradation causes T j1 - T d,on1 Relationships and DUT t c1 Drift; for online correction of the DUT T j1 - T d,on1 Relationship, select TD with the same aging degree as DUT. T j2 - T d,on2 relation; In the aging DUT T j1 - T d,on1 Relationship correction T j2 - T d,on2 After establishing a relationship, online monitoring was conducted. T d,on1 Obtain DUT online T j1 Then substitute it into T j2 - T d,on2 relation; The gate oxide can continue to degrade until the remaining lifetime of the DUT is reduced to zero; the DUT's RUL before it drops to zero t c1 is monitored again online; The above steps are repeated to achieve online correction of inaccurate junction temperature monitoring caused by SiC MOSFET aging.

9. The SiC MOSFET junction temperature on-line monitoring method of any one of claims 6-8, wherein, It does not require damaging the original packaging structure of the device.

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