A high voltage integrated circuit with voltage detection

Abstract

The application provides a high-voltage integrated circuit with voltage detection, comprising a power supply, an HVIC circuit, a voltage detection circuit and an enabling circuit; the HVIC circuit comprises a first Schmitt circuit, a filter, a level conversion circuit, a fault logic control circuit, a first MOS tube and a second Schmitt circuit; the first end of the voltage detection circuit is connected with the power supply, the second end of the voltage detection circuit is connected with the RCIN port of the HVIC circuit, the second end of the voltage detection circuit is also connected with the drain of the first MOS tube and the first end of the second Schmitt circuit respectively, the second end of the second Schmitt circuit is connected with the input end of the fault logic control circuit, the third end of the voltage detection circuit is used for connecting the enabling circuit; and the source of the first MOS tube is grounded. The high-voltage integrated circuit with voltage detection has good integration effect, strong anti-interference ability and high reliability.

Description

Technical Field

[0001] This invention relates to the field of high-voltage integrated circuit technology with voltage detection in PFC, and more particularly to a high-voltage integrated circuit with voltage detection. Background Technology

[0002] High-voltage integrated circuits, or HVICs, are integrated circuit products that convert MCU signals into signals to drive IGBTs. HVICs integrate PMOS transistors, NMOS transistors, bipolar transistors, diodes, Zener diodes, resistors, and capacitors to form circuits such as Schmitt triggers, low-voltage levelshifts, high-voltage levelshifts, pulse generators, delay circuits, filter circuits, overcurrent protection circuits, overheat protection circuits, undervoltage protection circuits, and bootstrap circuits. HVICs receive control signals from the MCU to drive subsequent IGBTs or MOS transistors, and simultaneously send system status detection signals back to the MCU, making them a key chip within the IPM (Integrated Circuit Manager).

[0003] In HVIC applications, the overcurrent detection pin ITRIP triggers the RCIN circuit upon receiving an overcurrent fault signal. This maintains the fault duration and prevents the HVIC output fault signal from being too short, thus ensuring the external MCU can detect the fault. The RCIN circuit is connected to an RC filter circuit. The charging and discharging time constant of the RC filter determines the fault duration; therefore, the value of the RCIN charging voltage is crucial. Too high a voltage results in a long charging and discharging time, while too low a voltage shortens the time. Thus, the voltage affects the length of time the RCIN circuit maintains the fault signal.

[0004] Therefore, the voltage detection effect of the HVIC in the above-mentioned applications is poor and the accuracy is low, resulting in poor reliability of HVIC. Summary of the Invention

[0005] To address the shortcomings of the aforementioned technologies, this invention proposes a high-voltage integrated circuit with voltage detection that triggers a fault signal from the HVIC when the RCIN voltage is detected to be too high or too low, thereby improving the application reliability of the HVIC.

[0006] To address the aforementioned technical problems, this invention provides a high-voltage integrated circuit with voltage detection, comprising: a power supply, an HVIC circuit, a voltage detection circuit, and an enable circuit; the power supply provides power to the HVIC circuit and the voltage detection circuit respectively; the HVIC circuit is electrically connected to the voltage detection circuit.

[0007] The HVIC circuit includes a first Schmitt trigger circuit, a filter, a level shifting circuit, a fault logic control circuit, a first MOSFET, and a second Schmitt trigger circuit. The first terminal of the first Schmitt trigger circuit is connected to the ITRIP port of the HVIC circuit. The second terminal of the first Schmitt trigger circuit is connected to the first terminal of the filter and the gate of the first MOSFET. The second terminal of the filter is connected to the first terminal of the level shifting circuit. The second terminal of the level shifting circuit is connected to the input terminal of the fault logic control circuit. The output terminal of the fault logic control circuit is used to output a fault signal.

[0008] The first terminal of the voltage detection circuit is connected to the power supply, the second terminal of the voltage detection circuit is connected to the RCIN port of the HVIC circuit, the second terminal of the voltage detection circuit is also connected to the drain of the first MOSFET and the first terminal of the second Schmitt trigger circuit, the second terminal of the second Schmitt trigger circuit is connected to the input terminal of the fault logic control circuit, and the third terminal of the voltage detection circuit is used to connect to the enable circuit; the source of the first MOSFET is grounded.

[0009] Preferably, the voltage detection circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first voltage comparator, a second voltage comparator, a second MOSFET, and a third MOSFET;

[0010] The first end of the first resistor is connected to the RCIN port, and the second end of the first resistor is connected to the first end of the second resistor, the positive input terminal of the first voltage comparator, and the negative input terminal of the second voltage comparator. The first end of the third resistor is connected to the power supply, and the second end of the third resistor is connected to the first end of the fourth resistor and the negative input terminal of the first voltage comparator. The second end of the fourth resistor is connected to the first end of the fifth resistor and the positive input terminal of the second voltage comparator. The second ends of the second resistor and the second ends of the fifth resistor are connected and grounded. The output terminal of the first voltage comparator is connected to the gate of the second MOSFET, the source of the second MOSFET is grounded, and the drain of the second MOSFET is connected to the enable circuit and the drain of the third MOSFET. The output terminal of the second voltage comparator is connected to the gate of the third MOSFET, and the source of the third MOSFET is grounded.

[0011] Preferably, the first MOS transistor, the second MOS transistor, and the third MOS transistor are all NMOS transistors.

[0012] Preferably, the HVIC circuit further includes a pulse circuit and a high-voltage zone detection circuit. The input terminal of the pulse circuit is connected to the output terminal of the logic control circuit, and the output terminal of the pulse circuit is connected to the input terminal of the high-voltage zone detection circuit. The output terminal of the high-voltage zone detection circuit is used to output a drive detection signal.

[0013] Preferably, the high-voltage integrated circuit with voltage detection further includes a fourth MOS transistor, the source of which is grounded, the drain of which is connected to the FAULT port of the HVIC circuit, and the gate of which is connected to the output of the fault logic control circuit.

[0014] Preferably, the fourth MOS transistor is an NMOS transistor.

[0015] Compared with related technologies, the high-voltage integrated circuit with voltage detection of the present invention connects the first terminal of the voltage detection circuit to the power supply, the second terminal of the voltage detection circuit to the RCIN port of the HVIC circuit, the second terminal of the voltage detection circuit is also connected to the drain of the first MOSFET and the first terminal of the second Schmitt trigger circuit, the second terminal of the second Schmitt trigger circuit is connected to the input terminal of the fault logic control circuit, and the third terminal of the voltage detection circuit is used to connect to the enable circuit; the source of the first MOSFET is grounded. Integrating the RCIN voltage detection circuit inside the HVIC ensures the accuracy of the RCIN circuit operation; if the RCIN voltage is detected to be too high or too low, the HVIC is triggered to issue a fault signal, improving the application reliability of the HVIC. Attached Figure Description

[0016] The present invention will now be described in detail with reference to the accompanying drawings. The above and other aspects of the present invention will become clearer and more readily understood through the detailed description following the accompanying drawings. In the drawings:

[0017] Figure 1 This is a circuit diagram of the high-voltage integrated circuit with voltage detection according to the present invention;

[0018] Figure 2 This is a circuit diagram of the HVIC circuit of the present invention;

[0019] Figure 3 This is a circuit diagram of the voltage detection circuit of the present invention. Detailed Implementation

[0020] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0021] The specific embodiments / examples described herein are specific implementations of the present invention, used to illustrate the concept of the invention, and are illustrative and exemplary, and should not be construed as limiting the implementation methods or scope of the present invention. In addition to the embodiments described herein, those skilled in the art can employ other obvious technical solutions based on the content disclosed in the claims and specification of this application. These technical solutions include those that make any obvious substitutions and modifications to the embodiments described herein, all of which are within the protection scope of the present invention.

[0022] like Figures 1-3 As shown, this invention provides a high-voltage integrated circuit with voltage detection, comprising: a power supply VCC, an HVIC circuit 2, a voltage detection circuit 1, and an enable circuit 3; the power supply VCC supplies power to both the HVIC circuit 2 and the voltage detection circuit 1; the HVIC circuit 2 is electrically connected to the voltage detection circuit 1. The power supply VCC provides electrical output, the enable circuit 3 outputs an enable signal EN to the voltage detection circuit 1, and the voltage detection circuit 1 detects the voltage signal of the circuit. If the RCIN voltage is detected to be too high or too low, the HVIC is triggered to issue a fault signal, thereby improving the application reliability of the HVIC.

[0023] The HVIC circuit 2 includes a first Schmitt trigger circuit 201, a filter 202, a level shifting circuit 203, a fault logic control circuit 204, a first MOSFET 206, and a second Schmitt trigger circuit 207. The first terminal of the first Schmitt trigger circuit 201 is connected to the ITRIP port of the HVIC circuit 2. The second terminal of the first Schmitt trigger circuit 201 is connected to the first terminal of the filter 202 and the gate of the first MOSFET 206. The second terminal of the filter 202 is connected to the first terminal of the level shifting circuit 203. The second terminal of the level shifting circuit 203 is connected to the input terminal of the fault logic control circuit 204. The output terminal of the fault logic control circuit 204 is used to output a fault signal.

[0024] The first terminal of the voltage detection circuit 1 is connected to the power supply VCC. The second terminal of the voltage detection circuit 1 is connected to the RCIN port of the HVIC circuit 2. The second terminal of the voltage detection circuit 1 is also connected to the drain of the first MOSFET 206 and the first terminal of the second Schmitt trigger circuit 207. The second terminal of the second Schmitt trigger circuit 207 is connected to the input terminal of the fault logic control circuit 204. The third terminal of the voltage detection circuit 1 is used to connect to the enable circuit 3. The source of the first MOSFET 206 is grounded. By integrating the RCIN voltage detection circuit 1 inside the HVIC, the accuracy of the RCIN circuit operation is ensured. If the RCIN voltage is detected to be too high or too low, the HVIC is triggered to issue a fault signal, thereby improving the application reliability of the HVIC.

[0025] In this embodiment, the voltage detection circuit 1 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first voltage comparator Q1, a second voltage comparator Q3, a second MOSFET Q2, and a third MOSFET Q4.

[0026] The first end of the first resistor R1 is connected to the RCIN port, and the second end of the first resistor R1 is connected to the first end of the second resistor R2, the positive input of the first voltage comparator Q1, and the negative input of the second voltage comparator Q3. The first end of the third resistor R3 is connected to the power supply VCC, and the second end of the third resistor R3 is connected to the first end of the fourth resistor R4 and the negative input of the first voltage comparator Q1. The second end of the fourth resistor R4 is connected to the first end of the fifth resistor R5 and the positive input of the second voltage comparator Q3. The second ends of the second resistor R2 and the second ends of the fifth resistor R5 are connected to and grounded. The output of the first voltage comparator Q1 is connected to the gate of the second MOSFET Q2, the source of the second MOSFET Q2 is grounded, and the drain of the second MOSFET Q2 is connected to the enable circuit 3 and the drain of the third MOSFET Q4. The output of the second voltage comparator Q3 is connected to the gate of the third MOSFET Q4, and the source of the third MOSFET Q4 is grounded.

[0027] Specifically, when the RCIN voltage is higher than a certain value, the voltage at point a is greater than the voltage at point b, so the first voltage comparator Q1 outputs a high level and the second MOSFET Q2 is turned on; when the voltage at point a is greater than the voltage at point c, the second voltage comparator Q3 outputs a low level and the third MOSFET Q4 is not turned on and is in the cutoff state.

[0028] When the RCIN voltage is lower than a certain value, the voltage at point a is less than the voltage at point b. Therefore, the first voltage comparator Q1 outputs a low level, and the second MOSFET Q2 is not turned on and is in the cutoff state. When the voltage at point a is less than the voltage at point c, the second voltage comparator Q3 outputs a high level, and the third MOSFET Q4 is turned on.

[0029] In this embodiment, the first MOSFET 206, the second MOSFET Q2, and the third MOSFET Q4 are all NMOS transistors. Optionally, the first MOSFET 206, the second MOSFET Q2, and the third MOSFET Q4 are all PMOS transistors or a combination of PMOS and NMOS transistors.

[0030] In this embodiment, the HVIC circuit 2 further includes a pulse circuit 208 and a high-voltage zone detection circuit 209. The input terminal of the pulse circuit 208 is connected to the output terminal of the logic control circuit, and the output terminal of the pulse circuit 208 is connected to the input terminal of the high-voltage zone detection circuit 209. The output terminal of the high-voltage zone detection circuit 209 is used to output a drive detection signal. The pulse circuit 208 is used to output a corresponding pulse signal according to the control signal output by the fault logic control circuit 204, and the high-voltage zone detection circuit 209 is used to detect the voltage of the circuit.

[0031] In this embodiment, the high-voltage integrated circuit with voltage detection further includes a fourth MOS transistor 205. The source of the fourth MOS transistor 205 is grounded, the drain of the fourth MOS transistor 205 is used to connect to the FAULT port of the HVIC circuit 2, and the gate of the fourth MOS transistor 205 is connected to the output terminal of the fault logic control circuit 204.

[0032] In this embodiment, the fourth MOS transistor 205 is an NMOS transistor. Optionally, the fourth MOS transistor 205 is a PMOS transistor.

[0033] Specifically, the first Schmitt trigger circuit 201 is connected to the ITRIP circuit and is mainly used to correct and detect the ITRIP voltage. When the ITRIP voltage reaches the trigger value of the first Schmitt trigger circuit 201, the Schmitt outputs a square wave, which is then filtered by filter 202 to remove circuit noise, and then level-shifted by level conversion circuit 203 for waveform correction. Another output of the first Schmitt trigger circuit 201 is sent to the first MOSFET 206 of the RCIN circuit, causing the first MOSFET 206 to short-circuit.

[0034] When the fault logic control circuit 204 receives the ITRIP signal, it outputs a high-level Enable signal and a high-level FAULT_G signal. The high-level Enable signal controls the switching of each channel. When Enable is high, the upper and lower bridge drive signals are latched regardless of whether they are high or low, and the corresponding signal output terminals all output low-level signals. Simultaneously, the high-level FAULT_G signal drives the fourth MOSFET 205 to turn on, outputting a low-level FAULT signal. The external MCU detects the low-level FAULT signal and triggers fault protection, setting the drive signals of each channel low for fault protection.

[0035] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any alterations, equivalent substitutions, or improvements made within the spirit and principles of the present invention should be included within the scope of the claims of the present invention.

Claims

1. A high-voltage integrated circuit with voltage detection, characterized in that, include: Power supply, HVIC circuit, voltage detection circuit and enable circuit; The power supply provides power to the HVIC circuit and the voltage detection circuit respectively; The HVIC circuit is electrically connected to the voltage detection circuit. The HVIC circuit includes a first Schmitt trigger circuit, a filter, a level shifting circuit, a fault logic control circuit, a first MOSFET, and a second Schmitt trigger circuit. The first terminal of the first Schmitt trigger circuit is connected to the ITRIP port of the HVIC circuit. The second terminal of the first Schmitt trigger circuit is connected to the first terminal of the filter and the gate of the first MOSFET. The second terminal of the filter is connected to the first terminal of the level shifting circuit. The second terminal of the level shifting circuit is connected to the input terminal of the fault logic control circuit. The output terminal of the fault logic control circuit is used to output a fault signal. The first terminal of the voltage detection circuit is connected to the power supply, the second terminal of the voltage detection circuit is connected to the RCIN port of the HVIC circuit, the second terminal of the voltage detection circuit is also connected to the drain of the first MOSFET and the first terminal of the second Schmitt trigger circuit, the second terminal of the second Schmitt trigger circuit is connected to the input terminal of the fault logic control circuit, and the third terminal of the voltage detection circuit is used to connect to the enable circuit; the source of the first MOSFET is grounded. The voltage detection circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first voltage comparator, a second voltage comparator, a second MOSFET, and a third MOSFET. The first end of the first resistor is connected to the RCIN port, and the second end of the first resistor is connected to the first end of the second resistor, the positive input terminal of the first voltage comparator, and the negative input terminal of the second voltage comparator. The first end of the third resistor is connected to the power supply, and the second end of the third resistor is connected to the first end of the fourth resistor and the negative input terminal of the first voltage comparator. The second end of the fourth resistor is connected to the first end of the fifth resistor and the positive input terminal of the second voltage comparator. The second ends of the second resistor and the second ends of the fifth resistor are connected and grounded. The output terminal of the first voltage comparator is connected to the gate of the second MOSFET, the source of the second MOSFET is grounded, and the drain of the second MOSFET is connected to the enable circuit and the drain of the third MOSFET. The output terminal of the second voltage comparator is connected to the gate of the third MOSFET, and the source of the third MOSFET is grounded.

2. The high-voltage integrated circuit with voltage detection as described in claim 1, characterized in that, The first MOS transistor, the second MOS transistor, and the third MOS transistor are all NMOS transistors.

3. The high-voltage integrated circuit with voltage detection as described in claim 1, characterized in that, The HVIC circuit also includes a pulse circuit and a high-voltage zone detection circuit. The input terminal of the pulse circuit is connected to the output terminal of the logic control circuit, and the output terminal of the pulse circuit is connected to the input terminal of the high-voltage zone detection circuit. The output terminal of the high-voltage zone detection circuit is used to output a drive detection signal.

4. The high-voltage integrated circuit with voltage detection as described in claim 1, characterized in that, The high-voltage integrated circuit with voltage detection also includes a fourth MOS transistor, the source of which is grounded, the drain of which is connected to the FAULT port of the HVIC circuit, and the gate of which is connected to the output of the fault logic control circuit.

5. The high-voltage integrated circuit with voltage detection as described in claim 4, characterized in that, The fourth MOS transistor is an NMOS transistor.

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