Display device

Abstract

A display device includes light emitting circuitry, first control circuitry, second control circuitry, and third control circuitry. The light emitting circuitry is to emit light in accordance with a current. The first control circuitry is to control a length of time that the light emitting circuitry emits light in accordance with the current in accordance with a first data signal. The second control circuitry is to provide the current to the light emitting circuitry when the first data signal has a first voltage level. The third control circuitry is different from the first control circuitry and the second control circuitry. The third control circuitry is to provide the current to the light emitting circuitry when the first data signal has a second voltage level that is different from the first voltage level.

Description

Technical Field

[0001] This disclosure relates to a display technology, and more particularly to a display device. Background Technology

[0002] Pixel circuits can be driven by pulse width modulation (PWM) and pulse amplitude modulation (PAM) circuits to generate the current required for light emission. However, when the pixel circuit is operating at low grayscale, the generated LED driving current may fail to reach the target value due to variations in the current-voltage characteristics (I-V characteristic deviation) of the components, resulting in poor LED luminous efficiency. Therefore, how to design a system to solve this problem is an important issue in this field. Summary of the Invention

[0003] This invention includes a display device. The display device includes a light-emitting circuit, a first control circuit, a second control circuit, and a third control circuit. The light-emitting circuit emits light according to a current. The first control circuit controls the duration for which the light-emitting circuit emits light according to the current based on a first data signal. The second control circuit provides current to the light-emitting circuit when the first data signal has a first voltage level. The third control circuit is different from the first and second control circuits. The third control circuit provides current to the light-emitting circuit when the first data signal has a second voltage level different from the first voltage level.

[0004] This invention includes a display device. The display device includes a light-emitting circuit, a first switch, a second switch, and a third switch. The light-emitting circuit emits light according to current. The first switch provides current to a first node, and its control terminal receives a data signal. The second switch provides current to the first node. The third switch turns off the second switch according to the data signal when the first switch provides current. Attached Figure Description

[0005] Figure 1 This is a schematic diagram of a display device according to an embodiment of the present disclosure.

[0006] Figure 2 This is a schematic diagram of a display device according to an embodiment of the present disclosure.

[0007] Figure 3 This is a timing diagram illustrating the operation of a display device according to an embodiment of the present disclosure.

[0008] Figure 4 This is a schematic diagram of a display device according to an embodiment of the present disclosure.

[0009] Figure 5 This is a timing diagram illustrating the operation of a display device according to an embodiment of the present disclosure.

[0010] Figure 6 This is a schematic diagram of a display device according to an embodiment of the present disclosure.

[0011] Figure 7 This is a timing diagram illustrating the operation of a display device according to an embodiment of the present disclosure.

[0012] Explanation of reference numerals in the attached figures:

[0013] 100, 200, 400, 600: Display devices

[0014] 110, 120, 130, 210, 220, 230, 410, 420, 430, 610, 620, 630: Control circuit

[0015] 140, 240, 440, 640: Switching circuits

[0016] 150, 250, 450, 650: Light-emitting circuits

[0017] I1: Current

[0018] DT1, DT2: Data signals

[0019] T21~T227, T41, T43~T45, T48, T410~T412, T415, T419, T421~T423, T425~T427, T61~T620: Switches

[0020] VPW, SWV, VPA1, VPA2, VRF, VTT, VSS: Reference voltage signals

[0021] N11~N113: Nodes

[0022] EPWM, SP, EPAM, EPAM2, ST1, SW, SA1, SA2: Control signals

[0023] VST: Reset signal

[0024] SWP: Scan Signal

[0025] C21~C24, C41~C44, C61~C64: Capacitors

[0026] L1, L4, L6: Light-emitting elements

[0027] TST: Test signal

[0028] 300: Timing Diagram

[0029] P31~P33, P51~P53, P71~P76: Period

[0030] VH, VL: Voltage levels

[0031] SSL: Voltage signal Detailed Implementation

[0032] In this document, when an element is referred to as a “connection” or “coupled,” it may mean an “electrical connection” or “electrical coupling.” “Connection” or “coupled” can also be used to indicate the operation or interaction between two or more elements. Furthermore, although terms such as “first,” “second,” etc., are used herein to describe different elements, these terms are only used to distinguish elements or operations described using the same technical terms. Unless the context clearly indicates otherwise, these terms do not specifically refer to or imply any order or sequence, nor are they intended to limit this disclosure.

[0033] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the relevant technical context and this disclosure, and will not be interpreted as having idealized or overly formal meanings unless expressly defined herein.

[0034] The terminology used herein is for the purpose of describing particular embodiments only and is not restrictive. As used herein, unless the content clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include the plural forms, including “at least one.” “Or” means “and / or.” As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. It should also be understood that, when used in this specification, the terms “comprising” and / or “including” specify the presence of the stated features, areas, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, areas, integrals, steps, operations, elements, components, and / or combinations thereof.

[0035] The following describes several embodiments of this disclosure with reference to the accompanying drawings. For clarity, many practical details will be described in the following description. However, it should be understood that these practical details should not be used to limit this disclosure. That is, these practical details are not essential in some embodiments of this disclosure. Furthermore, for the sake of simplicity, some conventional structures and elements will be shown in the drawings in a simple schematic manner.

[0036] Figure 1This is a schematic diagram of a display device 100 according to an embodiment of the present disclosure. Figure 1 As shown, the display device 100 includes control circuits 110, 120, and 130, a switching circuit 140, and a light-emitting circuit 150.

[0037] In some embodiments, the light-emitting circuit 150 emits light according to a current I1. The switching circuit 140 controls whether the current I1 flows to the light-emitting circuit 150. The control circuit 110 controls the current I1 according to a data signal DT1 to control the duration of light emission from the light-emitting circuit 150. The control circuit 120 provides current I1 to the light-emitting circuit 150 according to a data signal DT2 when the data signal DT1 has a first voltage level. The control circuit 130 provides current I1 to the light-emitting circuit 150 according to the data signal DT1 when the data signal DT1 has a second voltage level different from the first voltage level.

[0038] In some embodiments, the first voltage level is greater than a preset voltage level, and the second voltage level is less than or equal to the preset voltage level, for example... Figure 2 and Figure 6 The illustrated embodiment. In other embodiments, the first voltage level is less than a preset voltage level, and the second voltage level is greater than or equal to the preset voltage level, for example... Figure 4 The example shown.

[0039] In some embodiments, the preset voltage level is the same as the reference voltage signal received by the control circuit 130 (e.g., ...). Figure 2 The reference voltage signal VPA1 shown) and / or the internal components of the control circuit 130 (e.g., the internal components of the control circuit 130) Figure 2 This relates to the switch T23 shown. In some embodiments, the gray level corresponding to the light emitted by the light-emitting circuit 150 is related to the duration of the light emitted by the light-emitting circuit 150 and the amplitude of the current I1.

[0040] In some embodiments, control circuit 110 corresponds to a pulse width modulation (PWM) circuit. Each of control circuits 120 and 130 corresponds to a pulse amplitude modulation (PAM) circuit. Light-emitting circuit 150 includes a light-emitting diode.

[0041] Figure 2 This is a schematic diagram of a display device 200 according to an embodiment of the present disclosure. Figure 2 As shown, the display device 200 includes control circuits 210, 220, and 230, a switching circuit 240, and a light-emitting circuit 250. Please refer to... Figure 2 and Figure 1The display device 200 is one embodiment of the display device 100. The control circuits 210, 220, 230, the switch circuit 240, and the light-emitting circuit 250 correspond to the control circuits 110, 120, 130, the switch circuit 140, and the light-emitting circuit 150, respectively. Therefore, some details will not be repeated.

[0042] like Figure 2 As shown, the control circuit 210 includes switches T21-T25, T212, T219, and capacitor C21. The first terminal of switch T21 receives the reference voltage signal VPW. The second terminal of switch T21 is coupled to node N11. The control terminal of switch T21 receives the control signal EPWM. The first terminal of switch T22 receives the data signal DT1. The second terminal of switch T22 is coupled to node N11. The control terminal of switch T22 receives the control signal SP. The first terminal of switch T23 is coupled to node N11. The second terminal of switch T23 is coupled to node N12. The control terminal of switch T23 is coupled to node N13. The first terminal of switch T24 is coupled to node N13. The second terminal of switch T24 is coupled to node N12. The control terminal of switch T24 receives the control signal SP. The first terminal of switch T25 is coupled to node N12. The second terminal of switch T25 is coupled to node N14. The control terminal of switch T25 receives the control signal EPWM. The first terminal of switch T212 is coupled to node N13. Both the second terminal and the control terminal of switch T212 receive the reset signal VST. The first terminal of switch T219 receives the scan signal SWP. The second terminal of switch T219 receives the reference voltage signal SWV. The control terminal of switch T219 receives the control signal SP. The first terminal of capacitor C21 is coupled to node N13. The second terminal of capacitor C21 receives the scan signal SWP. In some embodiments, the scan signal SWP is a ramp signal.

[0043] like Figure 2As shown, the control circuit 220 includes capacitor C22, switches T26-T29, T211, and T216-T218. The first terminal of switch T26 receives the reference voltage signal VPA1. The second terminal of switch T26 is coupled to node N15. The control terminal of switch T26 receives the control signal EPWM. The first terminal of switch T27 receives the data signal DT2. The second terminal of switch T27 is coupled to node N15. The control terminal of switch T27 receives the control signal SP. The first terminal of switch T28 is coupled to node N15. The second terminal of switch T28 is coupled to node N16. The control terminal of switch T28 is coupled to node N17. The first terminal of switch T29 is coupled to node N17. The second terminal of switch T29 is coupled to node N16. The control terminal of switch T29 receives the control signal SP. The first terminal of switch T211 is coupled to node N17. Each of the second terminal and the control terminal of switch T211 is used to receive the reset signal VST. The first terminal of switch T216 is coupled to node N18. The second terminal of switch T216 is coupled to node N15. The control terminal of switch T216 is used to receive the control signal EPWM. The first terminal of switch T217 is used to receive the reference voltage signal VPW. The second terminal of switch T217 is coupled to node N18. The control terminal of switch T217 is used to receive the control signal SP. The first terminal of switch T218 is used to receive the reference voltage signal VPW. The second terminal of switch T218 is coupled to node N18. The control terminal of switch T218 is used to receive the reset signal VST. The first terminal of capacitor C22 is coupled to node N18. The second terminal of capacitor C22 is coupled to node N17.

[0044] like Figure 2As shown, the control circuit 230 includes switches T220 to T227 and capacitor C23. The first terminal of switch T220 is coupled to node N111. Each of the second terminal and control terminal of switch T220 is used to receive a reset signal VST. The first terminal of switch T221 is used to receive a reference voltage signal VPA2. The second terminal of switch T221 is coupled to node N19. The control terminal of switch T221 is used to receive a control signal EPAM or EPAM2. The first terminal of switch T222 is used to receive a data signal DT1. The second terminal of switch T222 is coupled to node N19. The control terminal of switch T222 is used to receive a control signal SP. The first terminal of switch T223 is coupled to node N19. The second terminal of switch T223 is coupled to node N110. The control terminal of switch T223 is coupled to node N111. The first terminal of switch T224 is coupled to node N111. The second terminal of switch T224 is coupled to node N110. The control terminal of switch T224 is used to receive the control signal SP. The first terminal of switch T225 is coupled to node N110. The second terminal of switch T225 is coupled to node N112. The control terminal of switch T225 is used to receive the control signal EPAM or EPAM2. The first terminal of switch T226 is coupled to node N113. The second terminal of switch T226 is used to receive the voltage signal VPA2. The control terminal of switch T226 is used to receive the control signal EPWM. The first terminal of switch T227 is coupled to node N113. The second terminal of switch T227 is used to receive the reference voltage signal VRF. The control terminal of switch T227 is used to receive the control signal SP. The first terminal of capacitor C23 is coupled to node N113. The second terminal of capacitor C23 is coupled to node N111.

[0045] like Figure 2 As shown, the switching circuit 240 includes switches T214, T210, T215, and capacitor C24. The first terminal of switch T214 is used to receive the reference voltage signal VTT. The second terminal of switch T214 is coupled to node N14. The control terminal of switch T214 is used to receive the control signal ST1. The first terminal of switch T210 is coupled to node N16. The second terminal of switch T210 is coupled to node N112. The control terminal of switch T210 is coupled to node N14. The first terminal of switch T215 is coupled to node N112. The second terminal of switch T215 is coupled to node N113. The control terminal of switch T215 is used to receive the control signal EPAM. The first terminal of capacitor C24 is coupled to node N14. The second terminal of capacitor C24 is used to receive the reference voltage signal VTT.

[0046] like Figure 2As shown, the light-emitting circuit 250 includes a switch T213 and a light-emitting element L1. A first terminal of switch T213 receives a reference voltage signal VSS. A second terminal of switch T213 is coupled to node N113. A control terminal of switch T213 receives a test signal TST. A first terminal of light-emitting element L1 receives the reference voltage signal VSS. A second terminal of light-emitting element L1 is coupled to node N113. In some embodiments, light-emitting element L1 emits light according to the current I1 flowing through it. In some embodiments, switch T213 is turned on or off according to the test signal TST to test whether light-emitting element L1 and / or other parts of the display device 200 are operating normally.

[0047] In some embodiments, each of switches T21 to T227 may be implemented using a P-type metal-oxide-semiconductor (PMOS) transistor. The voltage level of the reference voltage signal VTT is approximately -3 volts. In some embodiments, the voltage levels of each of the reference voltage signals VPW and VPA1 are greater than the voltage level of the reference voltage signal VPA2. For example, the voltage levels of each of the reference voltage signals VPW and VPA1 are approximately 10 volts, and the voltage level of voltage signal VPA2 is approximately 5 volts. In some embodiments, the voltage level of the reference voltage signal VRF is approximately equal to the voltage level of the reference voltage signal VPA1.

[0048] Figure 3 This is a timing diagram 300 illustrating the operation of a display device 200 according to an embodiment of the present disclosure. For example... Figure 3 As shown, timing diagram 300 includes sequentially arranged periods P31 to P33. During periods P31 to P33, the reset signal VST, control signals SP, EPWM, ST1, EPAM, EPAM2, and scan signal SWP vary between voltage levels VH and VL. In some embodiments, voltage level VH is greater than voltage level VL. Please refer to... Figure 2 and Figure 3 For each of switches T21 to T227, voltage level VL is the enabling voltage level and voltage level VH is the disabling voltage level.

[0049] During period P31, the reset signal VST and control signal ST1 have a voltage level VL, causing each of switches T212, T218, T211, T220, and T214 to be turned on. At this time, switch T212 provides the reset signal VST to node N13 to reset the voltage level of node N13. Switch T218 provides the reference voltage signal VPW to node N18 to reset the voltage level of node N18. Switch T211 provides the reset signal VST to node N17 to reset the voltage level of node N17. Switch T220 provides the reset signal VST to node N111 to reset the voltage level of node N111. Switch T214 provides the reference voltage signal VTT to node N14 to reset the voltage level of node N14. In some embodiments, period P31 is referred to as the reset phase.

[0050] During period P32, control signals SP and ST1 have a voltage level VL, causing each of switches T22, T24, T219, T217, T27, T29, T227, T222, T224, and T214 to be turned on. At this time, switch T217 provides the reference voltage signal VPW to node N18, and switch T227 provides the reference voltage signal VRF to node N113. Switch T219 provides the reference voltage signal SWV to capacitor C21. In some embodiments, the reference voltage signal SWV has a voltage level VH.

[0051] During period P32, data signal DT2 is sequentially written to node N17 via switches T27, T28, and T29. Data signal DT1 is sequentially written to node N13 via switches T22, T23, and T24, causing node N13 to have a voltage level VDT1-|V TH | Where voltage level VDT1 is the voltage level of data signal DT1, and V TH This is the critical voltage level of switch T23. Similarly, data signal DT1 is sequentially written to node N111 via switches T222, T223, and T224, causing node N111 to have a voltage level VDT1-|V TH In some embodiments, P32 is referred to as the procedural phase.

[0052] During period P33, each of the control signals EPWM, EPAM, and EPAM2 has a voltage level VL, causing each of the switches T216, T226, T221, T225, T21, T25, and T215 to conduct. The scan signal SWP gradually decreases from a voltage level VH, causing the voltage level of node N13 to gradually decrease. At this time, depending on the voltage level VDT1 of the data signal DT1, two different situations will occur.

[0053] In the first case, the voltage level VDT1 is relatively large, for example, greater than the preset voltage level VP2-|V TH | where voltage level VP2 is the voltage level of the reference voltage signal VPA2. Correspondingly, during period P33, switch T223 adjusts according to the voltage level VDT1-|V at node N111. TH |Shut down, so that the control circuit 230 will not provide current to the light-emitting element L1.

[0054] During period P33 in the first case, switch T23 operates according to the voltage level VDT1-|V at node N13. TH | Turn off. At this time, switches T26, T28, T210 and T215 form a conductive path, and control circuit 220 is used to generate current I1 that flows sequentially through switches T26, T28, T210 and T215 to the light-emitting element L1, causing the light-emitting element L1 to emit light.

[0055] In the first scenario, after period P33, the scan signal SWP gradually decreases, causing the voltage level at node N13 to gradually decrease and turn on switch T23. At this time, switches T21, T23, and T25 provide the reference voltage signal VPW to node N14, causing switch T210 to turn off to stop current I1, and the light-emitting element L1 to stop emitting light.

[0056] In the second case, the voltage level VDT1 is smaller, for example, less than or equal to the preset voltage level VP2-|V TH Correspondingly, during period P33, switch T223 adjusts according to the voltage level VDT1-|V at node N111. TH When the circuit is turned on, switches T221, T223, T225, and T215 form a conductive path, generating a current I1 that flows sequentially through switches T221, T223, T225, and T215, causing the light-emitting element L1 to emit light. In some embodiments, the voltage level VDT1-|V TH The smaller the voltage level, the larger the current I1. In other words, the control circuit 230 controls the magnitude of the current I1 based on the voltage level VDT1.

[0057] During period P33 in the second case, switch T23 operates according to the voltage level VDT1-|V at node N13. TH | On. At this time, switches T21, T23 and T25 provide the reference voltage signal VPW to node N14, causing switch T210 to turn off, and control circuit 220 will not provide current to light-emitting element L1.

[0058] In some embodiments, the first case corresponds to a brightness of medium to high grayscale, and the grayscale is adjusted by controlling the emission time of the light-emitting element L1. The second case corresponds to a brightness of low grayscale, and the grayscale is adjusted by controlling the magnitude of the current I1.

[0059] In some practices, a large amount of data signals are required to control the low grayscale light emission operation. This requires the integrated circuit (IC) that generates the data signals to have higher specifications and more signal pins and layout space, which increases the cost.

[0060] Compared to the above approach, in this embodiment of the invention, the control circuit 230 controls the low grayscale light emission operation based on the data signal DT1 received by the control circuit 210. This eliminates the need for additional data signals, thus reducing costs.

[0061] In some embodiments, switches T21 and T25 are used to generate current I1 according to control signal EPAM2. Control signal EPAM2 is independent of each of control signals EPAM, EPWM, and scan signal SWP, and the duration of voltage level VL in control signal EPAM2 can be arbitrarily adjusted so that current I1 can be adjusted accordingly to a current value with higher luminous efficiency. For example, while the duration of voltage level VL in control signal EPAM2 is reduced, data signal DT1 can be adjusted to increase the current value of I1. In some embodiments, the duration of voltage level VL in control signal EPAM2 is shorter than the duration of voltage level VL in control signal EPAM.

[0062] Figure 4 This is a schematic diagram of a display device 400 according to an embodiment of the present disclosure. Figure 4 As shown, the display device 400 includes control circuits 410, 420, and 430, a switching circuit 440, and a light-emitting circuit 450. Please refer to... Figure 4 and Figure 1 The display device 400 is one embodiment of the display device 100. The control circuits 410, 420, 430, the switch circuit 440, and the light-emitting circuit 450 correspond to the control circuits 110, 120, 130, the switch circuit 140, and the light-emitting circuit 150, respectively. Therefore, some details will not be repeated.

[0063] like Figure 4As shown, the control circuit 410 includes switches T41, T43, T45, T412, T419, and capacitor C41. The first terminal of switch T41 receives the reference voltage signal VSS. The second terminal of switch T41 is coupled to node N41. The control terminal of switch T41 receives the control signal EPWM. The first terminal of switch T43 is coupled to node N41. The second terminal of switch T43 is coupled to node N42. The control terminal of switch T43 is coupled to node N43. The first terminal of switch T45 is coupled to node N42. The second terminal of switch T45 is coupled to node N44. The control terminal of switch T45 receives the control signal EPWM. The first terminal of switch T412 receives the data signal DT1. The second terminal of switch T412 is coupled to node N43. The control terminal of switch T412 receives the control signal SP. The first terminal of switch T419 receives the scan signal SWP. The second terminal of switch T419 receives the reference voltage signal SWV. The control terminal of switch T419 is used to receive the control signal SP. The first terminal of capacitor C41 is coupled to node N43. The second terminal of capacitor C41 is used to receive the scan signal SWP.

[0064] like Figure 4 As shown, the control circuit 420 includes switches T48, T411, T426, T427, and capacitor C42. The first terminal of switch T48 receives the reference voltage signal VPA1. The second terminal of switch T48 is coupled to node N45. The control terminal of switch T48 is coupled to node N46. The first terminal of switch T411 receives the data signal DT2. The second terminal of switch T411 is coupled to node N46. The control terminal of switch T411 receives the control signal SP. The first terminal of switch T426 receives the reference voltage signal VPA1. The second terminal of switch T426 is coupled to node N47. The control terminal of switch T426 receives the control signal EPWM. The first terminal of switch T427 receives the reference voltage signal VRF. The second terminal of switch T427 is coupled to node N47. The control terminal of switch T427 receives the control signal SP. The first terminal of capacitor C42 is coupled to node N47. The second end of capacitor C42 is coupled to node N46.

[0065] like Figure 4As shown, the control circuit 430 includes switches T421-T423, T425, and capacitor C43. The first terminal of switch T421 receives the reference voltage signal VPA2. The second terminal of switch T421 is coupled to node N48. The control terminal of switch T421 receives the control signal EPAM or EPAM2. The first terminal of switch T422 receives the data signal DT1. The second terminal of switch T422 is coupled to node N410. The control terminal of switch T422 receives the control signal SP. The first terminal of switch T423 is coupled to node N48. The second terminal of switch T423 is coupled to node N49. The control terminal of switch T423 is coupled to node N410. The first terminal of switch T425 is coupled to node N411. The second terminal of switch T425 is coupled to node N49. The control terminal of switch T425 receives the control signal EPAM or EPAM2. The first terminal of capacitor C43 is coupled to node N410. The second terminal of capacitor C43 is used to receive the reference voltage signal VPA2.

[0066] like Figure 4 As shown, the switching circuit 440 includes switches T44, T410, T415, and capacitor C44. The first terminal of switch T44 is used to receive the reference voltage signal VTT. The second terminal of switch T44 is coupled to node N44. The control terminal of switch T44 is used to receive the control signal ST1. The first terminal of switch T410 is coupled to node N45. The second terminal of switch T410 is coupled to node N411. The control terminal of switch T410 is coupled to node N44. The first terminal of switch T415 is coupled to node N411. The second terminal of switch T415 is coupled to node N412. The control terminal of switch T415 is used to receive the control signal EPAM. The first terminal of capacitor C44 is coupled to node N44. The second terminal of capacitor C44 is used to receive the reference voltage signal VTT.

[0067] like Figure 4 As shown, the light-emitting circuit 450 includes a light-emitting element L4. A first terminal of the light-emitting element L4 is used to receive a reference voltage signal VSS. A second terminal of the light-emitting element L4 is coupled to node N412. In some embodiments, each of switches T41, T43-T45, T48, T410-T412, T415, T419, T421-T423, and T425-T427 can be implemented using an N-type metal-oxide-semiconductor (NMOS) transistor. In some embodiments, the reference voltage signal VSS has a voltage level VL.

[0068] Figure 5 This is a timing diagram 500 illustrating the operation of a display device 400 according to an embodiment of the present disclosure. (See diagram 500 for details.) Figure 5As shown, timing diagram 500 includes sequentially arranged periods P51 to P53. During periods P51 to P53, control signals SP, EPWM, ST1, EPAM, EPAM2, and scan signal SWP vary between voltage levels VH and VL. Please refer to... Figure 4 and Figure 5 For each of switches T41, T43~T45, T48, T410~T412, T415, T419, T421~T423, and T425~T427, the voltage level VH is the enabling voltage level and the voltage level VL is the disabling voltage level.

[0069] Please refer to Figures 2 to 5 The operation of display device 400 during periods P51 to P53 is similar to the operation of display device 200 during periods P31 to P33. Therefore, some details will not be repeated.

[0070] During this period, the control signal ST1 of P51 has a voltage level VH, causing switch T44 to turn on. At this time, switch T44 provides the reference voltage signal VTT to node N44 to reset the voltage level of node N44.

[0071] During period P52, control signals SP and ST1 have a voltage level VL, causing each of switches T419, T412, T411, T427, T422, and T44 to conduct. At this time, switch T419 provides the reference voltage signal SWV to capacitor C41. Switch T412 provides the data signal DT1 to node N43. Switch T411 provides the data signal DT2 to node N46. Switch T422 provides the data signal DT1 to node N410. Switch T427 provides the reference voltage signal VRF to node N47. In some embodiments, the reference voltage signal SWV has a voltage level VL.

[0072] During period P52, data signal DT1 is written to node N43 via switch T412, causing node N43 to have a voltage level VDT1. Similarly, data signal DT1 is written to node N410 via switch T422, causing node N410 to have a voltage level VDT1.

[0073] During period P53, each of the control signals EPWM, EPAM, and EPAM2 has a voltage level VH, causing each of switches T41, T45, T426, T415, T421, and T425 to conduct. The scan signal SWP gradually increases from a voltage level VL, causing the voltage level of node N43 to gradually increase. At this time, depending on the voltage level VDT1 of the data signal DT1, two different situations will occur.

[0074] In the first case, the voltage level VDT1 is small, for example, less than the preset voltage level VP2, where the voltage level VP2 is the voltage level of the reference voltage signal VPA2. Correspondingly, during period P53, switch T423 is turned off according to the voltage level VDT1 of node N410, so that control circuit 530 does not provide current to light-emitting element L4.

[0075] During period P53 in the first case, switch T43 is turned off according to the voltage level VDT1 of node N43. At this time, switches T48, T410 and T415 form a conductive path, and control circuit 520 generates a current I1 that flows sequentially through switches T48, T410 and T415 to the light-emitting element L4, causing the light-emitting element L4 to emit light.

[0076] In the first scenario, after period P53, the scan signal SWP gradually increases, causing the voltage level at node N43 to gradually rise and turn on switch T43. At this time, switches T41, T43, and T45 provide the reference voltage signal VSS to node N44, causing switch T410 to turn off to stop current I1, and the light-emitting element L4 to stop emitting light.

[0077] During the second scenario, period P53, the voltage level VDT1 is relatively high, for example, greater than or equal to the preset voltage level VP2. At this time, switch T423 is turned on according to the voltage level VDT1 at node N410, causing switches T421, T423, T425, and T415 to form a conductive path, generating a current I1 flowing sequentially through switches T421, T423, T425, and T415, causing the light-emitting element L4 to emit light. In some embodiments, the higher the voltage level VDT1, the higher the current I1. In other words, the control circuit 230 controls the magnitude of the current I1 based on the voltage level VDT1.

[0078] During the second scenario, period P53, switch T43 is turned on based on the voltage level VDT1 at node N43. At this time, switches T41, T43, and T45 provide the reference voltage signal VSS to node N44, causing switch T410 to turn off, and control circuit 220 does not provide current to the light-emitting element L4.

[0079] Figure 6 This is a schematic diagram of a display device 600 according to an embodiment of the present disclosure. Figure 6 As shown, the display device 600 includes control circuits 610, 620, and 630, a switching circuit 640, and a light-emitting circuit 650. Please refer to... Figure 6 and Figure 1The display device 600 is one embodiment of the display device 100. Control circuits 610, 620, 630, switch circuit 640, and light-emitting circuit 650 correspond to control circuits 110, 120, 130, switch circuit 140, and light-emitting circuit 150, respectively. Therefore, some details will not be repeated.

[0080] like Figure 6 As shown, the control circuit 610 includes switches T61-T64, T613, and capacitor C61. The first terminal of switch T61 receives the reference voltage signal SWV. The second terminal of switch T61 receives the scan signal SWP. The control terminal of switch T61 receives the control signal SP. The first terminal of switch T62 receives the data signal DT1. The second terminal of switch T62 is coupled to node N61. The control terminal of switch T62 receives the control signal SP. The first terminal of switch T63 is coupled to node N62. The second terminal of switch T63 receives the reference voltage signal VPW. The control terminal of switch T63 is coupled to node N61. The first terminal of switch T64 is coupled to node N62. The second terminal of switch T64 is coupled to node N63. The control terminal of switch T64 receives the control signal EPWM. The first terminal of switch T613 receives the voltage signal SSL. The second terminal of switch T613 is coupled to node N62. The control terminal of switch T613 is used to receive the control signal SW. The first terminal of capacitor C61 is coupled to node N61. The second terminal of capacitor C61 is used to receive the scan signal SWP.

[0081] like Figure 6 As shown, the control circuit 220 includes capacitor C62, switches T66-T69, and T614. The first terminal of switch T66 receives the reference voltage signal VPA1. The second terminal of switch T66 is coupled to node N64. The control terminal of switch T66 receives the control signal EPWM. The first terminal of switch T67 receives the reference voltage signal VPW. The second terminal of switch T67 is coupled to node N64. The control terminal of switch T67 receives the control signal SP. The first terminal of switch T68 is coupled to node N64. The second terminal of switch T68 is coupled to node N65. The control terminal of switch T68 is coupled to node N66. The first terminal of switch T69 is coupled to node N66. The second terminal of switch T69 receives the data signal DT1. The control terminal of switch T69 receives the control signal SP. The first terminal of switch T614 is coupled to node N65. The second terminal of switch T614 receives the voltage signal SSL. The control terminal of switch T614 is used to receive control signal SA1. The first terminal of capacitor C62 is coupled to node N64. The second terminal of capacitor C62 is coupled to node N66.

[0082] like Figure 6As shown, the control circuit 630 includes switches T615-T620 and capacitor C63. The first terminal of switch T615 receives the reference voltage signal VRF. The second terminal of switch T615 is coupled to node N67. The control terminal of switch T615 receives the control signal SP. The first terminal of switch T616 receives the reference voltage signal VPA2. The second terminal of switch T616 is coupled to node N67. The control terminal of switch T616 receives the control signal EPAM or EPAM2. The first terminal of switch T617 is coupled to node N68. The second terminal of switch T617 is coupled to node N67. The control terminal of switch T617 is coupled to node N69. The first terminal of switch T618 is coupled to node N69. The second terminal of switch T618 receives the data signal DT1. The control terminal of switch T618 receives the control signal SP. The first terminal of switch T619 is coupled to node N68. The second terminal of switch T619 receives the voltage signal SSL. The control terminal of switch T619 is used to receive control signal SA2. The first terminal of switch T620 is coupled to node N68. The second terminal of switch T620 is coupled to node N610. The control terminal of switch T620 is used to receive control signal EPAM or EPAM2. The first terminal of capacitor C63 is coupled to node N67. The second terminal of capacitor C63 is coupled to node N69.

[0083] like Figure 6 As shown, the switching circuit 640 includes switches T65, T610, T611, and capacitor C64. The first terminal of switch T65 receives the reference voltage signal VTT. The second terminal of switch T65 is coupled to node N63. The control terminal of switch T65 receives the control signal ST1. The first terminal of switch T610 is coupled to node N65. The second terminal of switch T610 is coupled to node N610. The control terminal of switch T610 is coupled to node N63. The first terminal of switch T611 is coupled to node N610. The second terminal of switch T611 is coupled to node N611. The control terminal of switch T611 receives the control signal EPAM. The first terminal of capacitor C64 is coupled to node N63. The second terminal of capacitor C64 receives the reference voltage signal VTT.

[0084] like Figure 6 As shown, the light-emitting circuit 650 includes a switch T612 and a light-emitting element L6. A first terminal of switch T612 is used to receive a reference voltage signal VSS. A second terminal of switch T612 is coupled to node N611. A control terminal of switch T612 is used to receive a test signal TST. A first terminal of light-emitting element L6 is used to receive the reference voltage signal VSS. A second terminal of light-emitting element L6 is coupled to node N611. In some embodiments, each of switches T61 to T620 can be implemented using a P-type metal-oxide-semiconductor (PMOS) transistor.

[0085] Figure 7This is a timing diagram 700 illustrating the operation of a display device 600 according to an embodiment of the present disclosure. Figure 7 As shown, timing diagram 700 includes sequentially arranged periods P71 to P76. During periods P71 to P76, the reset signal VST, control signals SW, SA1, SA2, SP, EPWM, ST1, EPAM, EPAM2, and scan signal SWP vary between voltage levels VH and VL. Please refer to... Figure 6 and Figure 7 For each of switches T61 to T620, voltage level VL is the enabling voltage level and voltage level VH is the disabling voltage level.

[0086] During period P71, control signal SW has a voltage level VL, causing switch T613 to conduct, providing voltage signal SSL to node N62. During period P72, control signal SA1 has a voltage level VL, causing switch T614 to conduct, providing voltage signal SSL to node N65. During period P73, control signal SA2 has a voltage level VL, causing switch T619 to conduct, providing voltage signal SSL to node N68.

[0087] During period P74, control signal ST1 has a voltage level VL, causing switch T65 to turn on. At this time, switch T65 provides the reference voltage signal VTT to node N63.

[0088] During period P75, control signals SP and ST1 have a voltage level VL, causing each of switches T61, T62, T67, T69, T615, T618, and T65 to conduct. At this time, switch T61 provides the reference voltage signal SWV to capacitor C61, switch T62 provides the data signal DT1 to node N61, switch T67 provides the reference voltage signal VPW to node N64, switch T69 provides the data signal DT1 to node N66, switch T615 provides the reference voltage signal VRF to node N67, switch T618 provides the data signal DT1 to node N69, and switch T65 provides the reference voltage signal VTT to node N63.

[0089] During period P76, each of the control signals EPWM, EPAM, and EPAM2 has a voltage level VL, causing each of switches T64, T66, T616, and T620 to conduct. The scan signal SWP gradually decreases from a voltage level VH, causing the voltage level of node N61 to gradually decrease. At this time, depending on the voltage level VDT1 of the data signal DT1, two different situations will occur.

[0090] In the first case, the voltage level VDT1 is relatively large, for example, greater than the preset voltage level VP2, where the voltage level VP2 is the voltage level of the reference voltage signal VPA2. Correspondingly, during period P76, switch T617 is turned off according to the voltage level VDT1 of node N69, so that the control circuit 230 does not provide current to the light-emitting element L6.

[0091] During period P76 in the first case, switch T63 is turned off according to the voltage level VDT1 of node N61. At this time, switches T66, T68, T610, and T611 form a conductive path. Control circuit 220 is used to generate a current I1 that flows sequentially through switches T66, T68, T610, and T611 to the light-emitting element L6, causing the light-emitting element L6 to emit light.

[0092] In the first scenario, after period P76, the scan signal SWP gradually decreases, causing the voltage level at node N61 to gradually decrease and turn on switch T63. At this time, switches T63 and T64 provide the reference voltage signal VPW to node N63, causing switch T610 to turn off to stop current I1, and the light-emitting element L6 to stop emitting light.

[0093] In the second case, the voltage level VDT1 is smaller, for example, less than or equal to the preset voltage level VP2. Correspondingly, during period P76, switch T617 is turned on according to the voltage level VDT1 of node N69, so that switches T616, T617, T620 and T611 form a conductive path to generate a current I1 flowing sequentially through switches T616, T617, T620 and T611, causing the light-emitting element L6 to emit light.

[0094] During period P76 in the second case, switch T63 is turned on according to the voltage level VDT1 of node N61. At this time, switches T63 and T64 provide the reference voltage signal VPW to node N63, causing switch T610 to turn off, and control circuit 220 does not provide current to the light-emitting element L6.

[0095] Although the present disclosure has been presented above with reference to embodiments, it is not intended to limit the present disclosure. Any person skilled in the art may make some changes and modifications without departing from the concept and scope of the present disclosure. Therefore, the scope of protection of the present disclosure shall be determined by the claims.

Claims

1. A display device, comprising: A light-emitting circuit used to emit light based on a current; A first control circuit is used to control the duration for which the light-emitting circuit emits light according to the current based on a first data signal; A second control circuit is provided to supply the current to the light-emitting circuit when the first data signal has a first voltage level; as well as A third control circuit, different from the first control circuit and the second control circuit, is used to provide the current to the light-emitting circuit when the first data signal has a second voltage level different from the first voltage level.

2. The display device as claimed in claim 1, wherein the third control circuit is further configured to generate the current based on a reference voltage signal. The first voltage level is greater than a third voltage level. The second voltage level is less than or equal to the third voltage level, and The third voltage level is related to the voltage level of the reference voltage signal.

3. The display device of claim 1, wherein the third control circuit includes a first switch, the first switch being configured to, when the first data signal has the second voltage level, conduct according to the first data signal to provide the current to a first node, and The display device also includes a second switch for providing current to the first node when the first data signal has the first voltage level.

4. The display device of claim 3, wherein the first control circuit includes a third switch, the third switch being configured to provide a reference voltage signal to a control terminal of the second switch to turn off the second switch when the first data signal has the first voltage level.

5. The display device of claim 3, wherein the third control circuit comprises: A first capacitor, wherein a first terminal of the first capacitor is coupled to a control terminal of the first switch; as well as A third switch is configured to provide a first reference voltage signal to a second terminal of the first capacitor when the first data signal is written to the first terminal of the first capacitor via the first switch. The first switch is further used to receive a second reference voltage signal to generate the current, and The voltage level of the first reference voltage is substantially the same as the voltage level of the second reference voltage.

6. The display device as claimed in claim 3, further comprising: A third switch is coupled between the first node and the light-emitting circuit, and is used to turn on according to a first control signal. The third control circuit further includes a fourth switch, which is coupled between the first node and the first switch, and is used to be turned on according to a second control signal. The duration for which the second control signal has an enable voltage level is shorter than the duration for which the first control signal has the enable voltage level.

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