Semiconductor device

Abstract

Semiconductor elements (40H, 40L) are arranged in the Y direction with the arm connecting portions (80) therebetween. The P terminal (91P) and the N terminal (91N) are disposed on the same side in the Y direction. The substrates (50, 60) sandwich the semiconductor elements (40H, 40L). The substrates (50, 60) have an insulating base material, a surface metal body, and a back surface metal body. The sealing body (30) seals the surface metal body together with the semiconductor elements. The surface metal body (62) has N wires (64) and a relay wire (65). The N wires have base portions (640) disposed in the Y direction in alignment with the relay wire, and a pair of extension portions (641) respectively connected to the N terminals, which extend from the base portions in the Y direction in a manner of sandwiching the relay wire in the X direction. In the X direction, the length L1 of the end portion (650) of the relay wire, the length L2 of the opposite edge (640a) of the base portion, and the length L3 of the element arrangement region (640b) of the base portion satisfy the relationship of L1 < L2 < L3.

Description

[0001] Cross-referencing of related applications

[0002] This application is based on Japanese Patent Application No. 2021-88994, filed on May 27, 2021, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This invention relates to semiconductor devices. Background Technology

[0004] Patent Document 1 discloses a semiconductor device with a two-sided heat dissipation structure constituting an upper and lower arm circuit of one phase. The contents of prior art documents are incorporated herein by reference as an explanation of technical elements.

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 2015-57807 Summary of the Invention

[0008] In the semiconductor device of Patent Document 1, heat sinks connected to the elements forming the upper arm and heat sinks connected to the elements forming the lower arm are exposed from one side of the encapsulated solid. These heat sinks have different potentials than each other, so a creepage distance is ensured by setting a predetermined interval between the heat sinks. Therefore, the effect of magnetic flux cancellation caused by mutually opposing currents is reduced. In recent years, there has been a demand for further reduction in the inductance of the main circuit. Based on the above viewpoints or other viewpoints not mentioned, further improvements are required for semiconductor devices.

[0009] One object of this disclosure is to provide a semiconductor device capable of reducing inductance.

[0010] The semiconductor device disclosed herein is provided with: a first element and a second element serving as a plurality of semiconductor elements, each having a first main electrode and a second main electrode, the second main electrode being formed on a surface opposite to the first main electrode in the plate thickness direction, the first element constituting one arm of an upper-lower arm circuit, the second element constituting the other arm, the second element and the first element being arranged side by side in a first direction orthogonal to the plate thickness direction; a first power terminal and a second power terminal serving as a plurality of power terminals, arranged such that the first element is located between the plurality of power terminals and the second element in the first direction, the first power terminal being electrically connected to the first main electrode of the first element, the second power terminal being electrically connected to the second main electrode of the second element; a first substrate having a first insulating base material, a first surface metal body disposed on the front surface of the first insulating base material, and a first back surface metal body disposed on the back surface of the first insulating base material, the first surface metal body including a first power wiring that electrically connects the first power terminal and the first main electrode of the first element, and a first relay wiring connected to the first main electrode of the second element, the first power wiring and the first relay wiring being arranged side by side in the first direction; a second substrate disposed such that the plurality of semiconductor elements are sandwiched between the second substrate and the first substrate in the plate thickness direction, having a second insulating base material, a second surface metal body disposed on the front surface of the second insulating base material, and a second back surface metal body disposed on the back surface of the second insulating base material, the second surface metal body including a second power wiring that electrically connects the second power terminal and the second main electrode of the second element, and a second relay wiring connected to the second main electrode of the first element; an arm connection portion disposed between the first element and the second element in the first direction, and electrically connecting the first relay wiring and the second relay wiring; and a sealing body that seals the plurality of semiconductor elements, the arm connection portion, a part of each of the plurality of power terminals, the first surface metal body and the second surface metal body; the second power wiring has a base portion where the second element is disposed, and a pair of extension portions respectively connected to the second power terminal, the base portion and the second relay wiring are arranged side by side in the first direction, the pair of extension portions extend from the base portion along the first direction so as to sandwich the second relay wiring in a second direction, and the second direction is orthogonal to the plate thickness direction and the first direction; in the second direction, when the length of the end portion of the second relay wiring facing the base portion is defined as L1, the length of the facing side of the base portion facing the end portion is defined as L2, and the length of the arrangement region of the second element in the base portion is defined as L3, the relationship of L1<L2<L3 is satisfied.

[0011] According to the disclosed semiconductor device, a first surface metal body of a first substrate and a second surface metal body of a second substrate provide wiring functionality for semiconductor elements. The first and second surface metal bodies are encapsulated with a solid. Since creepage distances can be ensured without the need for conventional methods, the second power supply wiring and the second relay wiring can be arranged close together. This improves the flux cancellation effect caused by the reverse-flowing current, reducing inductance. Furthermore, by satisfying the aforementioned dimensional relationships, particularly regarding the current near the second element, the first-direction component is increased. Consequently, the current path based on the second power supply wiring, i.e., the current path between the second element and the second main terminal, is shortened. Therefore, inductance can be reduced. As a result, a semiconductor device capable of reducing inductance can be provided.

[0012] The various technical solutions disclosed in this specification employ different technical means to achieve their respective purposes. The purposes, features, and effects disclosed in this specification will become clearer with reference to the following detailed description and accompanying drawings. Attached Figure Description

[0013] Figure 1 This is a diagram showing the circuit structure of the power conversion device using the semiconductor device of the first embodiment.

[0014] Figure 2 It is a three-dimensional diagram representing a semiconductor device.

[0015] Figure 3 It is a three-dimensional diagram representing a semiconductor device.

[0016] Figure 4 It is a plan view representing a semiconductor device.

[0017] Figure 5 It is along Figure 4 A cross-sectional view of the V-V line.

[0018] Figure 6 It is along Figure 4 A sectional view along line VI-VI.

[0019] Figure 7 It is along Figure 4 A sectional view along line VII-VII.

[0020] Figure 8 It is along Figure 4 A cross-sectional view of line VIII-VIII.

[0021] Figure 9 It is Figure 8 The area shown is IX, a magnified view.

[0022] Figure 10 It is an exploded three-dimensional diagram used to illustrate a semiconductor device.

[0023] Figure 11 It is a plan view showing the state in which semiconductor devices are mounted on the substrate on the drain electrode side.

[0024] Figure 12 It is a plan view showing the circuit pattern of the substrate on the drain electrode side.

[0025] Figure 13 It is a plan view showing the circuit pattern of the substrate on the source electrode side.

[0026] Figure 14 It is a diagram showing the circuit pattern, semiconductor components and terminal arrangement on the drain electrode side.

[0027] Figure 15 It is a diagram showing the circuit pattern, semiconductor components and terminal configuration on the source electrode side.

[0028] Figure 16 This is a planar diagram representing the current circulation of the reference example.

[0029] Figure 17 It is a planar diagram representing the current circulation.

[0030] Figure 18 This is a side view showing the current circulation.

[0031] Figure 19 This is a graph representing the current density for a reference example.

[0032] Figure 20 This is a graph showing the current density in this embodiment.

[0033] Figure 21 It is a plan view representing a variation.

[0034] Figure 22 It is a plan view representing a variation.

[0035] Figure 23 It is a plan view showing the circuit pattern of the substrate on the drain electrode side in the modified example.

[0036] Figure 24 It is a plan view showing the circuit pattern of the substrate on the source electrode side in the modified example.

[0037] Figure 25 This is a cross-sectional view showing the semiconductor device of the second embodiment.

[0038] Figure 26 This is a diagram used to illustrate the effect of inductor Ls.

[0039] Figure 27 This is a diagram used to illustrate the effect of inductor Ls.

[0040] Figure 28 It is a plan view showing the circuit pattern of the substrate on the source electrode side.

[0041] Figure 29 It is a diagram showing the current path.

[0042] Figure 30 This is a sectional view showing the arm connection.

[0043] Figure 31 This is a plan view showing a modified example of the substrate on the source electrode side.

[0044] Figure 32 It is a plan view showing the state in which semiconductor devices are mounted on the substrate on the drain electrode side.

[0045] Figure 33 It is a diagram showing the current path.

[0046] Figure 34 This is a plan view showing a modified example of the substrate on the drain electrode side.

[0047] Figure 35 It is a diagram showing the current path.

[0048] Figure 36 This is a cross-sectional view showing a modified example of the arm connection.

[0049] Figure 37 This is a cross-sectional view showing a modified example of the arm connection.

[0050] Figure 38 It is a plan view showing the circuit pattern of the substrate on the source electrode side in the modified example.

[0051] Figure 39 It is a cross-sectional view showing warping at high temperatures.

[0052] Figure 40 This is a cross-sectional view showing the semiconductor device of the third embodiment.

[0053] Figure 41 This is a cross-sectional view of a semiconductor device at room temperature.

[0054] Figure 42 It is a cross-sectional view of a semiconductor device at high temperatures.

[0055] Figure 43 It is a graph showing the relationship between the ratio of thicknesses T1 and T2 and the amount of warpage.

[0056] Figure 44 This is a sectional view representing a variation.

[0057] Figure 45 This is a sectional view representing a variation.

[0058] Figure 46 This is a plan view of the semiconductor device in the fourth embodiment, with the periphery of the signal terminals magnified.

[0059] Figure 47 It is along Figure 46 A sectional view of the XLVII-XLVII line.

[0060] Figure 48 This is a diagram illustrating wire bonding.

[0061] Figure 49 This is a sectional view representing a variation.

[0062] Figure 50 This is a sectional view representing a variation.

[0063] Figure 51 This is a sectional view representing a variation.

[0064] Figure 52 This is a sectional view representing a variation.

[0065] Figure 53 It is a plan view representing a variation.

[0066] Figure 54 This is a cross-sectional view showing the relay substrate.

[0067] Figure 55 It is along Figure 53 A cross-sectional view of the LV-LV line.

[0068] Figure 56 This is a sectional view representing a variation.

[0069] Figure 57 This is a cross-sectional view showing the semiconductor device according to the fifth embodiment.

[0070] Figure 58 From Figure 57 The diagram shown is a plan view from the LVIII direction.

[0071] Figure 59 It is Figure 57 The area shown is a magnified LVIX image.

[0072] Figure 60 It is relative to Figure 59 The diagram of the bonding material has been omitted.

[0073] Figure 61 It is a plan view representing a variation.

[0074] Figure 62 From Figure 61 The plan view shown is taken in the LXII direction.

[0075] Figure 63 It is a plan view representing a variation.

[0076] Figure 64 This is a sectional view representing a variation.

[0077] Figure 65 It is Figure 64 The region shown is an enlarged LXV image.

[0078] Figure 66 This is a sectional view representing a variation.

[0079] Figure 67 It is Figure 66 The area shown is an enlarged version of LXVII.

[0080] Figure 68 This is a sectional view representing a variation.

[0081] Figure 69 This is a cross-sectional view showing the semiconductor device according to the sixth embodiment.

[0082] Figure 70 This is a graph showing the relationship between glass transition temperature and coefficient of linear expansion for sealing solids and insulating substrates.

[0083] Figure 71 This is a diagram showing the warping of the reference example.

[0084] Figure 72 This is a diagram showing warping at high temperatures.

[0085] Figure 73 This is a cross-sectional view showing the semiconductor device of the seventh embodiment.

[0086] Figure 74 It is Figure 73 The LXXIV region is a magnified image.

[0087] Figure 75 This is a diagram illustrating the method for forming the roughened portion.

[0088] Figure 76 This is a sectional view representing a variation.

[0089] Figure 77 This is a sectional view representing a variation.

[0090] Figure 78 This is a sectional view representing a variation.

[0091] Figure 79 This is a cross-sectional view showing the semiconductor device of the eighth embodiment.

[0092] Figure 80 It is Figure 79The image is an enlarged version of region LXXX.

[0093] Figure 81 It is a graph showing the relationship between spacing, thickness and inductance.

[0094] Figure 82 This is a graph showing the simulation results when the interval is less than the thickness.

[0095] Figure 83 This is a graph showing the simulation results when the interval is greater than the thickness.

[0096] Figure 84 This is a cross-sectional view showing the semiconductor device according to the ninth embodiment.

[0097] Figure 85 It is a plan view showing the center of the substrate.

[0098] Figure 86 It is Figure 84 The image is an enlarged version of region LXXXVI.

[0099] Figure 87 It is a diagram showing dimensions and angles.

[0100] Figure 88 This is a side view of the stacked structure.

[0101] Figure 89 This is a cross-sectional view showing the semiconductor device of the 10th embodiment.

[0102] Figure 90 It is a planar diagram representing a semiconductor element.

[0103] Figure 91 It is Figure 89 The XCI region is magnified in the image.

[0104] Figure 92 This is a cross-sectional view showing the configuration of the sintered components.

[0105] Figure 93 It is a cross-sectional view showing the joining method.

[0106] Figure 94 This is a graph showing the relationship between the distance between the inner circumferential surface of the protective film and the sintered component and the strain amplitude of the substrate electrode.

[0107] Figure 95 It is a cross-sectional view showing the configuration of the solder as a bonding material.

[0108] Figure 96 This is a cross-sectional view showing the semiconductor device according to the 11th embodiment.

[0109] Figure 97 It is Figure 96The image shows a magnified view of region XCVII.

[0110] Figure 98 It is a plan view showing the arrangement of semiconductor elements, sintered components, and uneven oxide films.

[0111] Figure 99 It is Figure 97 The XCIX region is a magnified image.

[0112] Figure 100 This is a sectional view representing a variation.

[0113] Figure 101 It is a plan view showing the arrangement of semiconductor elements, sintered components, and uneven oxide films.

[0114] Figure 102 This is a sectional view representing a variation.

[0115] Figure 103 It is a plan view showing the arrangement of semiconductor elements, sintered components, and uneven oxide films.

[0116] Figure 104 This is a sectional view representing a variation.

[0117] Figure 105 This is a cross-sectional view showing the semiconductor device of the 12th embodiment.

[0118] Figure 106 It is Figure 105 The image shows a magnified view of the CVI region.

[0119] Figure 107 It is a graph showing the relationship between Young's modulus and yield stress of the base electrode, sintered layer, and fragile layer.

[0120] Figure 108 This is a sectional view representing a variation.

[0121] Figure 109 This is a sectional view representing a variation.

[0122] Figure 110 This is a sectional view representing a variation.

[0123] Figure 111 This is a diagram showing the circuit structure of the power conversion device of the semiconductor device according to the 13th embodiment.

[0124] Figure 112 It is a three-dimensional diagram representing a semiconductor device.

[0125] Figure 113 It is a plan view representing a semiconductor device.

[0126] Figure 114It is a plan view showing the state in which semiconductor devices are mounted on the substrate on the drain electrode side.

[0127] Figure 115 It is a plan view showing the circuit pattern of the substrate on the drain electrode side.

[0128] Figure 116 It is a plan view showing the circuit pattern of the substrate on the source electrode side.

[0129] Figure 117 It is along Figure 113 A cross-sectional view of the CXVII-CXVII line.

[0130] Figure 118 It is along Figure 113 A cross-sectional view of the CXVIII-CXVIII line.

[0131] Figure 119 It is along Figure 113 A cross-sectional view of the CXIX-CXIX line.

[0132] Figure 120 It is along Figure 113 A sectional view of the CXX-CXX line.

[0133] Figure 121 It is Figure 120 The region CXXI ​​is a magnified image. Detailed Implementation

[0134] Hereinafter, several embodiments will be described based on the accompanying drawings. Additionally, there are instances where repeated descriptions are omitted by assigning the same reference numerals to corresponding constituent elements in each embodiment. Where only a portion of the structure is described in each embodiment, the structures of other previously described embodiments can be applied to the remaining parts of that structure. Furthermore, not only combinations of structures explicitly shown in the descriptions of each embodiment, but also structures of multiple embodiments can be partially combined with each other, even without explicit description, as long as no particular obstacle arises in the combination.

[0135] The semiconductor device in this embodiment is applied, for example, to a power conversion device for a mobile body driven by a rotary electric motor. Examples of mobile bodies include electric vehicles (EVs), hybrid electric vehicles (HVs), plug-in hybrid electric vehicles (PHVs), flying vehicles such as drones, ships, construction machinery, and agricultural machinery. Hereinafter, examples of its application to vehicles will be described.

[0136] (First Embodiment)

[0137] First, based on Figure 1 The general structure of the vehicle's drive system 1 will be described.

[0138] <Vehicle drive system>

[0139] like Figure 1 As shown, the vehicle's drive system 1 includes a DC power supply 2, an electric generator 3, and a power conversion device 4.

[0140] DC power supply 2 is a DC voltage source composed of rechargeable and discharging secondary batteries. Examples of secondary batteries include lithium-ion batteries and nickel-metal hydride batteries. Electric generator 3 is a three-phase AC rotating electric motor. Electric generator 3 functions as the vehicle's driving force, i.e., an electric motor. During regeneration, electric generator 3 functions as a generator. Power conversion device 4 performs power conversion between DC power supply 2 and electric generator 3.

[0141] <Power Conversion Device>

[0142] Next, based on Figure 1 The circuit structure of the power conversion device 4 will be described. The power conversion device 4 includes a power conversion circuit. The power conversion device 4 of this embodiment includes a smoothing capacitor 5 and an inverter 6 as the power conversion circuit.

[0143] The smoothing capacitor 5 primarily smooths the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to the P-line 7 (high-potential side) and the N-line 8 (low-potential side). The P-line 7 is connected to the positive terminal of the DC power supply 2, and the N-line 8 is connected to the negative terminal of the DC power supply 2. The positive terminal of the smoothing capacitor 5 is connected to the P-line 7 between the DC power supply 2 and the inverter 6. The negative terminal of the smoothing capacitor 5 is connected to the N-line 8 between the DC power supply 2 and the inverter 6. The smoothing capacitor 5 is connected in parallel with the DC power supply 2.

[0144] Inverter 6 is a DC-AC conversion circuit. According to the switching control of a control circuit (not shown), inverter 6 converts DC voltage into three-phase AC voltage and outputs it to the electric generator 3. This drives the electric generator 3 to produce the specified torque. During regenerative braking of the vehicle, inverter 6, according to the switching control of the control circuit, converts the three-phase AC voltage generated by the rotational force from the wheels into DC voltage and outputs it to line P 7. Thus, inverter 6 performs bidirectional power conversion between the DC power supply 2 and the electric generator 3.

[0145] Inverter 6 is configured to have three-phase upper and lower arm circuits 9. The upper and lower arm circuits 9 are sometimes referred to as legs. Each upper and lower arm circuit 9 has an upper arm 9H and a lower arm 9L. The upper arm 9H and lower arm 9L are connected in series between the P-line 7 and the N-line 8, with the upper arm 9H as the P-line 7 side. The connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase of the generator 3 via the output line 10. Inverter 6 has six arms. Each arm is configured to have a switching element. At least a portion of each of the P-line 7, N-line 8, and output line 10 is formed, for example, by a conductive component such as a bus bar.

[0146] In this embodiment, an n-channel MOSFET 11 is used as the switching element constituting each arm. The number of switching elements constituting each arm is not particularly limited; it can be one or more. MOSFET is short for Metal Oxide Semiconductor Field Effect Transistor.

[0147] As an example, in this embodiment, each arm has two MOSFETs 11. The two MOSFETs 11 constituting one arm are connected in parallel. In the upper arm 9H, the drains of the two MOSFETs 11 connected in parallel are connected to the P-line 7. In the lower arm 9L, the sources of the two MOSFETs 11 connected in parallel are connected to the N-line 8. The sources of the two MOSFETs 11 connected in parallel in the upper arm 9H and the drains of the two MOSFETs 11 connected in parallel in the lower arm 9L are interconnected. The two MOSFETs 11 connected in parallel are turned on and off at the same timing by a common gate drive signal (drive voltage).

[0148] For each MOSFET 11, a freewheeling diode 12 is connected in anti-parallel. The diode 12 can be a parasitic diode (body diode) of the MOSFET 11, or it can be a separate diode. The anode of the diode 12 is connected to the source of the corresponding MOSFET 11, and the cathode is connected to the drain. A semiconductor device 20 provides the upper and lower arm circuits 9 for one phase. Details of the semiconductor device 20 will be described later.

[0149] The power conversion device 4 may also include a converter as a power conversion circuit. The converter is a DC-DC converter circuit that converts DC voltage into DC voltages of different values. The converter is located between the DC power supply 2 and the smoothing capacitor 5. The converter, for example, is configured to include a reactor and the aforementioned upper and lower arm circuits 9. With this configuration, step-up and step-down voltage conversion is possible. The power conversion device 4 may also include a filter capacitor to remove power supply noise from the DC power supply 2. The filter capacitor is located between the DC power supply 2 and the converter.

[0150] The power conversion device 4 may also include a drive circuit for switching elements that constitute the inverter 6, etc. Based on drive commands from the control circuit, the drive circuit supplies a drive voltage to the gate of the corresponding arm of the MOSFET 11. The drive circuit drives the corresponding MOSFET 11 by applying the drive voltage, i.e., it turns it on and off. The drive circuit is sometimes referred to as a driver.

[0151] The power conversion device 4 may also include a control circuit for the switching elements. The control circuit generates drive commands to operate the MOSFET 11 and outputs them to the drive circuit. The control circuit generates drive commands, for example, based on torque requests input from a higher-level ECU (not shown) and signals detected by various sensors. ECU is short for Electronic Control Unit.

[0152] Various sensors are used, such as current sensors, rotation angle sensors, and voltage sensors. The current sensor detects the phase current flowing in the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the electric generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs a PWM signal as a drive command, for example. The control circuit is configured to include, for example, a processor and a memory. PWM is short for Pulse Width Modulation.

[0153] Semiconductor Devices

[0154] Next, based on Figures 2 to 13 The semiconductor device is described. Figure 2 This is a three-dimensional view of semiconductor device 20. Figure 3 and Figure 2 This is also a 3D view of semiconductor device 20. Figure 3 It is a perspective view showing the internal structure. Figure 4 This is a plan view of semiconductor device 20. Figure 4 It is a perspective view showing the internal structure. Figure 5 It is along Figure 4 A cross-sectional view of the V-V line. Figure 6 It is along Figure 4 A sectional view along line VI-VI. Figure 7 It is along Figure 4 A sectional view along line VII-VII. Figure 8 It is along Figure 4 A cross-sectional view of line VIII-VIII. Figure 9 It will be Figure 8 The area represented by the single-dot dashed line in the middle is shown in the enlarged image IX.

[0155] Figure 10 This is an exploded perspective view used to illustrate the semiconductor device 20. Figure 10For convenience, the leader frame 94 is shown in the text. Figure 11 This is a plan view showing the state in which semiconductor elements 40 are mounted on substrate 50. Figure 12 It is a plan view showing the circuit pattern of the surface metal body 52 in the substrate 50. Figure 13 It is a plan view showing the circuit pattern of the surface metal body 62 in the substrate 60.

[0156] Hereinafter, the thickness direction of the semiconductor element (semiconductor substrate) is defined as the Z direction. The arrangement direction of the semiconductor element forming the upper arm 9H and the semiconductor element forming the lower arm 9L, which is orthogonal to the Z direction, is defined as the Y direction. The direction orthogonal to both the Z and Y directions is defined as the X direction. Unless otherwise specified, the shape seen from a planar view in the Z direction, in other words, the shape along the XY plane defined by the X and Y directions, is defined as a planar shape. Sometimes, a planar view from the Z direction is simply referred to as a planar view. Furthermore, the arrangement is not limited to the mounting surface; when there is an overlapping positional relationship in a planar view, it is sometimes referred to as an arrangement.

[0157] like Figures 2 to 13 As shown, the semiconductor device 20 constitutes one phase of the upper and lower arm circuit 9 described above. The semiconductor device 20 includes a solid-state enclosure 30, a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, an arm connection portion 80, and an external connection terminal 90.

[0158] Encapsulating solid 30 encapsulates a portion of other elements constituting semiconductor device 20. The remainder of the other elements is exposed outside encapsulating solid 30. Encapsulating solid 30 is made of resin, for example. An example of resin is epoxy resin. Encapsulating solid 30 is formed, for example, by transfer molding. Such encapsulating solid 30 is sometimes referred to as an encapsulating resin body, molding resin, or resin molded body. Encapsulating solid 30 can also be formed using gel, for example. The gel, for example, fills (configures) opposite regions of a pair of substrates 50, 60.

[0159] like Figures 2-4 As shown, the sealing body 30 has a generally rectangular planar shape. As the surface forming the outer contour, the sealing body 30 has a front surface 30a and a back surface 30b opposite to the front surface 30a in the Z direction. The front surface 30a and the back surface 30b are, for example, flat surfaces. Furthermore, it has side surfaces that connect the front surface 30a and the back surface 30b. The side surfaces include two side surfaces 30c and 30d protruding from the external connection terminal 90. Side surface 30d is the surface opposite to side surface 30c in the X direction.

[0160] A semiconductor device 40 is constituted by forming switching elements on a semiconductor substrate made of silicon (Si) or a wide-bandgap semiconductor with a wider bandgap than silicon. Examples of wide-bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor device 40 is sometimes referred to as a power device or a semiconductor chip.

[0161] The semiconductor element 40 in this embodiment is constructed by forming the aforementioned n-channel MOSFET 11 on a semiconductor substrate made of SiC. The MOSFET 11 has a vertical configuration so that the main current flows in the thickness direction (Z direction) of the semiconductor element 40 (semiconductor substrate). The semiconductor element 40 has main electrodes of the switching element on both sides in its thickness direction (Z direction). Specifically, as the main electrodes, a drain electrode 40D is provided on one side, and a source electrode 40S is provided on the side opposite to the main electrode in the Z direction (back side).

[0162] When diode 12 is a parasitic diode, the source electrode 40S also serves as the anode electrode, and the drain electrode 40D also serves as the cathode electrode. Diode 12 can also be configured in a chip other than MOSFET 11. The drain electrode 40D is the main electrode on the high-potential side (first main electrode), and the source electrode 40S is the main electrode on the low-potential side (second main electrode). Hereinafter, the drain electrode 40D and the source electrode 40S will sometimes be referred to as the main electrodes 40D and 40S.

[0163] Semiconductor element 40 has a roughly rectangular planar shape. For example... Figure 11 As shown, the semiconductor device 40 has a pad 40P formed on its back side at a different location than the source electrode 40S. The source electrode 40S and the pad 40P are exposed from a protective film (not shown) formed on the back side of the semiconductor substrate. A drain electrode 40D is formed over approximately the entire surface of one side. The source electrode 40S is formed on a portion of the back side of the semiconductor device 40. In planar view, the drain electrode 40D has a larger area than the source electrode 40S.

[0164] Pad 40P is a signal electrode. Pad 40P is electrically isolated from the source electrode 40S. Pad 40P is formed in the Y direction at the end opposite to the formation region of the source electrode 40S. Pad 40P includes a pad for the gate electrode.

[0165] The semiconductor device 20 includes a plurality of semiconductor elements 40 with the above-described structure. The structures of each semiconductor element 40 are common to each other. The plurality of semiconductor elements 40 includes a semiconductor element 40H constituting an upper arm 9H and a semiconductor element 40L constituting a lower arm 9L. Sometimes, semiconductor element 40H is referred to as the upper arm element, and semiconductor element 40L as the lower arm element. Semiconductor elements 40H and 40L are each arm elements constituting one arm. The semiconductor device 20 of this embodiment includes two semiconductor elements 40H and two semiconductor elements 40L. The two semiconductor elements 40H are arranged in the X direction. Similarly, the two semiconductor elements 40L are arranged in the X direction. The semiconductor elements 40H and 40L are arranged in the Y direction. The Y direction is a first direction orthogonal to the thickness direction of the semiconductor element 40, i.e., the Z direction. The X direction is a second direction orthogonal to both the Z direction and the first direction (Y direction). The semiconductor device 20 has two columns formed by semiconductor elements 40H and 40L along the Y direction.

[0166] Each semiconductor element 40 is arranged at approximately the same position in the Z direction. The drain electrode 40D of each semiconductor element 40 is opposite to the substrate 50. The source electrode 40S of each semiconductor element 40 is opposite to the substrate 60.

[0167] The substrates 50 and 60 are arranged such that a plurality of semiconductor elements 40 are sandwiched in the Z direction. The substrates 50 and 60 are arranged such that at least a portion of each other is opposed in the Z direction. The substrates 50 and 60 include all of the plurality of semiconductor elements 40 (40H, 40L) in a plan view.

[0168] Substrate 50 is disposed on the drain electrode 40D side relative to semiconductor element 40. Substrate 60 is disposed on the source electrode 40S side relative to semiconductor element 40. Substrate 50 is electrically connected to drain electrode 40D as described later, providing a wiring function. Similarly, substrate 60 is electrically connected to source electrode 40S, providing a wiring function. Therefore, substrates 50 and 60 are sometimes referred to as wiring substrates. Sometimes substrate 50 is referred to as drain substrate and substrate 60 as source substrate. Substrates 50 and 60 provide a heat dissipation function for dissipating heat generated by semiconductor element 40. Therefore, substrates 50 and 60 are sometimes referred to as heat dissipation components. In the pair of substrates 50 and 60 sandwiching semiconductor element 40 in the Z direction, substrate 50 is the first substrate and substrate 60 is the second substrate.

[0169] Substrate 50 has a facing surface 50a opposite to the semiconductor element 40, and a back surface 50b opposite to the facing surface 50a. Substrate 50 includes an insulating substrate 51, a surface metal body 52, and a back surface metal body 53. Substrate 50 is a substrate formed by stacking the insulating substrate 51 and the metal bodies 52 and 53. Substrate 60 has a facing surface 60a opposite to the semiconductor element 40, and a back surface 60b opposite to the facing surface 60a. Substrate 60 includes an insulating substrate 61, a surface metal body 62, and a back surface metal body 63. Substrate 60 is a substrate formed by stacking the insulating substrate 61 and the metal bodies 62 and 63. In substrate 50, which serves as the first substrate, the insulating substrate 51 is a first insulating substrate, the surface metal body 52 is a first surface metal body, and the back surface metal body 53 is a first back surface metal body. In the substrate 60, which serves as the second substrate, the insulating substrate 61 is the second insulating substrate, the surface metal body 62 is the second surface metal body, and the back metal body 63 is the second back metal body. Hereinafter, the surface metal bodies 52 and 62 and the back metal bodies 53 and 63 will sometimes be simply referred to as metal bodies 52, 53, 62, and 63.

[0170] The insulating substrate 51 electrically separates the surface metal body 52 from the back metal body 53. Similarly, the insulating substrate 61 electrically separates the surface metal body 62 from the back metal body 63. The insulating substrates 51 and 61 are sometimes referred to as insulating layers. The materials of the insulating substrates 51 and 61 are resin or inorganic ceramic materials. For example, epoxy resins and polyimide resins can be used as resins. For example, Al2O3 (alumina) and Si3N4 (silicon nitride) can be used as ceramics. When the insulating substrates 51 and 61 are resins, the substrates 50 and 60 are sometimes referred to as metal-resin substrates. When the insulating substrates 51 and 61 are ceramics, the substrates 50 and 60 are sometimes referred to as metal-ceramic substrates.

[0171] When using resin-based insulating substrates 51 and 61, inorganic fillers (inorganic filler materials) can be included in the resin to improve heat dissipation and insulation. The coefficient of linear expansion can also be adjusted by adding fillers. Examples of fillers that can be used include Al2O3, SiO2 (silicon dioxide), AlN (aluminum nitride), and BN (boron nitride). Insulating substrates 51 and 61 may contain only one type of filler or multiple types of fillers.

[0172] Considering heat dissipation and insulation, in the case of resin-based insulating substrates, the thickness of each insulating substrate 51 and 61, i.e., its length in the Z direction, is preferably about 50 μm to 300 μm. In the case of ceramic-based insulating substrates, the thickness of the insulating substrates 51 and 61 is preferably about 200 μm to 500 μm. In the Z direction, the surface of the insulating substrates 51 and 61 is the inner surface, i.e., the surface on the side of the semiconductor element 40, and the surface opposite to the surface in the Z direction, i.e., the back surface, is the outer surface. The insulating substrates 51 and 61 can be made to have the same material composition or to have different compositions. In this embodiment, resin-based insulating substrates 51 and 61 are used, and their material compositions are common. The coefficient of linear expansion of the insulating substrates 51 and 61 is adjusted to be approximately the same as that of the encapsulating solid 30 by adding filler to the resin. By adding filler to the resin, the coefficient of linear expansion of the insulating substrates 51 and 61 and the encapsulating solid 30 becomes a value close to that of the metal (Cu) constituting the metal bodies 52, 53, 62, and 63.

[0173] Metal bodies 52, 53, 62, and 63 are provided, for example, as metal plates or metal foils. Metal bodies 52, 53, 62, and 63 are formed from metals with good electrical and thermal conductivity, such as Cu and Al. The thickness of each metal body 52, 53, 62, and 63 is, for example, approximately 0.1 mm to 3 mm. The surface metal body 52 is disposed on the surface of the insulating substrate 51 in the Z direction. The back metal body 53 is disposed on the back side of the insulating substrate 51. Similarly, the surface metal body 62 is disposed on the surface of the insulating substrate 61 in the Z direction. The back metal body 63 is disposed on the back side of the insulating substrate 61. The insulating substrates 51 and 61 are opposing surfaces to the semiconductor element 40 in the Z direction. Figures 5-9 As shown, in this embodiment, the surface metal body 52 is thicker than the back metal body 53. The surface metal body 62 is thicker than the back metal body 63. The surface metal body 52 on the drain electrode 40D side is thicker than the surface metal body 62 on the source electrode 40S side. Instead of this structure, the back metal bodies 53 and 63 may be thicker than the corresponding surface metal bodies 52 and 62. The thicknesses of the surface metal body 52 and the back metal body 53 may also be approximately equal, and the thicknesses of the surface metal body 62 and the back metal body 63 may also be approximately equal.

[0174] Surface metal bodies 52 and 62 are patterned. Surface metal bodies 52 and 62 provide wiring, i.e., circuitry. Therefore, surface metal bodies 52 and 62 are sometimes referred to as circuit patterns, wiring layers, or circuit conductors. Surface metal bodies 52 and 62 may also have Ni-based, Au, or other coatings on their metal surfaces. Hereinafter, the patterns of surface metal bodies 52 and 62 will sometimes be referred to as circuit patterns. The non-distributed areas of surface metal body 52 on the surfaces of surface metal body 52 and insulating substrate 51 form the opposing surface 50a of substrate 50. Similarly, the non-distributed areas of surface metal body 62 on the surfaces of surface metal body 62 and insulating substrate 61 form the opposing surface 60a of substrate 60.

[0175] For example, surface metal bodies 52 and 62, patterned into a predetermined shape through pressure processing, etching, etc., can be prepared and closely bonded to a two-layer laminate of insulating substrates 51 and 61 and back metal bodies 53 and 63 to form substrates 50 and 60. Alternatively, after forming a three-layer laminate of surface metal bodies 52 and 62, insulating substrates 51 and 61, and back metal bodies 53 and 63, the surface metal bodies 52 and 62 can be patterned by cutting and etching.

[0176] Surface metal body 52, such as Figure 11 As shown, it has P-wire 54 and trunk wire 55. P-wire 54 and trunk wire 55 are electrically separated by a specified interval (gap). The gap is filled with a sealing solid 30.

[0177] P-wiring 54 is connected to P-terminal 91P (described later) and the drain electrode 40D of semiconductor element 40H. P-wiring 54 electrically connects P-terminal 91P to the drain electrode 40D of semiconductor element 40H. P-wiring 54 is sometimes referred to as positive wiring or high-potential power supply wiring. Relay wiring 55 is connected to the drain electrode 40D of semiconductor element 40L, arm connection portion 80, and output terminal 92. Relay wiring 55 electrically connects arm connection portion 80 to the drain electrode 40D of semiconductor element 40L. Relay wiring 55 electrically connects the source electrode 40S of semiconductor element 40H and the drain electrode of semiconductor element 40L to the output terminal 92. In surface metal body 52 (first surface metal body), P-wiring 54 is the first power supply wiring, and relay wiring 55 is the first relay wiring.

[0178] P-wiring 54 and relay wiring 55 are arranged in the Y direction. In the Y direction, P-wiring 54 is arranged on the power supply terminal 91 side, and relay wiring 55 is arranged on the output terminal 92 side. In other words, P-wiring 54 is arranged near the side 30c of the enclosure 30, and relay wiring 55 is arranged near the side 30d.

[0179] The P-wiring 54 has a notch 540. The notch 540 is an opening in one of the four sides of a planar shape that is approximately rectangular in the X direction. The notch 540 is located approximately at the center in the X direction in the side opposite to the side 30c. The P-wiring 54 has a base 541 and a pair of extending portions 542. The base 541 and the pair of extending portions 542 define the notch 540. The P-wiring 54 has a generally U-shaped (U-shaped) planar shape.

[0180] The base 541 is the portion closer to the relay wiring 55 than the notch 540 and the extended portion 542, and its planar shape is approximately rectangular. The base 541 overlaps with the semiconductor element 40H in planar view. That is, the semiconductor element 40H is disposed on the base 541. The drain electrode 40D of the semiconductor element 40H is connected to the base 541.

[0181] Two extension portions 542 extend from the base 541 toward the side 30c of the sealing solid 30 in the same direction, specifically in the Y direction. One extension portion 542 is connected near one end of the base 541 in the X direction, and the other is connected near the other end of the base 541. The two ends of the U-shape of the P-wire 54, that is, the ends of the two extension portions 542 opposite to the base 541, are positioned approximately the same in the Y direction. A notch 540 is sandwiched between the pair of extension portions 542 in the X direction. Regarding the length in the Y direction, the base 541 is longer than the depth of the notch 540 and the extension portion 542.

[0182] The relay cabling 55 also has a notch 550. The notch 550 is an opening in one of the four sides of a generally rectangular planar shape. The notch 550 is located approximately in the center of the side opposite to the side 30d in the X direction. That is, in the surface metal body 52, a notch 540 is provided at one end in the Y direction and a notch 550 is provided at the other end.

[0183] The relay wiring 55 has a base 551 and a pair of extended portions 552. The base 551 and the pair of extended portions 552 define a notch 550. The relay wiring 55 has a generally U-shaped (U-shaped) planar shape. The base 551, which is the portion closer to the P-wiring 54 than the notch 550 and the extended portions 552, has a generally rectangular planar shape. The base 551 overlaps with the semiconductor element 40L in planar view. That is, the semiconductor element 40L is disposed on the base 551. The drain electrode 40D of the semiconductor element 40L is connected to the base 551.

[0184] Two extension sections 552 extend from the base 551 toward the side 30d of the sealing solid 30 in the same direction, specifically in the Y direction. One extension section 552 is connected near one end of the base 551 in the X direction, and the other is connected near the other end of the base 551. The two ends of the U-shape of the relay cable 55, that is, the ends of the two extension sections 552 opposite to the base 551, are positioned approximately the same in the Y direction. A notch 550 is sandwiched between the pair of extension sections 552 in the X direction. The base 551 is longer than the depth of the notch 550 and the extension section 552 in the Y direction.

[0185] On the other hand, surface metal body 62 such as Figure 10 and Figure 13 As shown, it has an N-wire 64 and a trunk wire 65. The N-wire 64 and the trunk wire 65 are electrically separated by a specified interval (gap). The gap is filled with a sealing solid 30.

[0186] N-wire 64 is connected to the N-terminal 91N (described later) and the source electrode 40S of the semiconductor element 40L. N-wire 64 electrically connects the N-terminal 91N to the source electrode 40S of the semiconductor element 40L. N-wire 64 is sometimes referred to as N-wire. Relay wire 65 is connected to the source electrode 40S of the semiconductor element 40H and the arm connection portion 80. Relay wire 65 electrically connects the source electrode 40S of the semiconductor element 40H to the arm connection portion 80. In the surface metal body 62 (second surface metal body), N-wire 64 is the second power supply wiring, and relay wire 65 is the second relay wiring.

[0187] The N-cable 64 has a base 640 and a pair of extending portions 641. The N-cable 64 has a generally U-shaped planar shape. The base 640 is arranged in the Y direction alongside the trunk cable 65. The base 640 is located on the side 30d side in the Y direction. The planar shape of the base 640 is generally rectangular with the X direction as its length. Figure 15 As shown, the base 640 overlaps with the semiconductor element 40L in planar view. That is, the semiconductor element 40L is disposed on the base 640. The source electrode 40S of the semiconductor element 40L is connected to the base 640.

[0188] Two extension portions 641 extend from the base 640 toward the side 30c of the sealing solid 30 in the same direction, specifically in the Y direction. One extension portion 641 is connected near one end of the base 640 in the X direction, and the other is connected near the other end of the base 640. The two ends of the U-shape of the N-wire 64, that is, the ends of the two extension portions 641 opposite to the base 640, are positioned approximately the same in the Y direction.

[0189] A pair of extension portions 641 form the two ends of the surface metal body 62 in the X direction. The pair of extension portions 641 are disposed near the ends of the substrate 60. In planar view, a portion of each of the pair of extension portions 641 overlaps with the P-wire 54. Regarding length in the Y direction, the extension portion 641 is longer than the base 640. The N-wire 64 also has a notch 642. The notch 642 is an opening in one of the four sides of a generally rectangular shape with the Y direction as its length. The notch 642 is located approximately at the center in the X direction on the side opposite to the side surface 30c. The base 640 and the pair of extension portions 641 define the notch 642.

[0190] As described above, the relay cable 65 is arranged in the Y direction with the N cable 64, specifically with the base 640. In the Y direction, the relay cable 65 is positioned close to the side 30c of the enclosure 30, and the base 640 is positioned close to the side 30d. The relay cable 65 is positioned in the X direction between a pair of extension portions 641. The relay cable 65 is sandwiched between the pair of extension portions 641. The relay cable 65 is positioned within a notch 642. The relay cable 65 is configured to have a predetermined interval (gap) between it and the N cable 64. In plan view, a portion of the relay cable 65 overlaps with the P cable 54, and another portion overlaps with the relay cable 55.

[0191] like Figure 15 As shown, relay wiring 65 overlaps with semiconductor element 40H in planar view. That is, semiconductor element 40H is positioned at relay wiring 65. The source electrode 40S of semiconductor element 40H is connected to relay wiring 65. A more detailed example of the circuit pattern of surface metal body 62 is described later.

[0192] The back metal bodies 53 and 63 are electrically isolated from the circuit including the semiconductor element 40 via the insulating substrates 51 and 61. The back metal bodies 53 and 63 are sometimes referred to as metal base substrates. Heat generated by the semiconductor element 40 is transferred to the back metal bodies 53 and 63 via the surface metal bodies 52 and 62 and the insulating substrates 51 and 61. The back metal bodies 53 and 63 provide heat dissipation. In this embodiment, the back metal bodies 53 and 63 have a generally rectangular planar shape, and their outlines are generally consistent with the outlines of the surface metal bodies 52 and 62. The back metal bodies 53 and 63 are so-called distributed conductors disposed over approximately the entire area of ​​the back surface of the insulating substrates 51 and 61. Since the coefficient of linear expansion of the insulating substrates 51 and 61 is adjusted by adding filler as described above, warping can be suppressed even if the pattern is changed on the surface or back surface. Of course, the back metal bodies 53 and 63 can also be patterned so that they are consistent with the surface metal bodies 52 and 62 in planar view.

[0193] In this embodiment, the back metal bodies 53 and 63 are disposed over approximately the entire back surface of the corresponding insulating substrates 51 and 61. To further improve heat dissipation, at least one of the back metal bodies 53 and 63 may be exposed from the sealing solid 30. In this embodiment, the back metal body 53 is exposed from one side 30a of the sealing solid 30, and the back metal body 63 is exposed from the back side 30b. The exposed surface of the back metal body 53 is substantially coplanar with one side 30a. The exposed surface of the back metal body 63 is substantially coplanar with the back side 30b. The back metal bodies 53 and 63 form the back sides 50b and 60b of the substrates 50 and 60.

[0194] The conductive spacer 70 provides a spacer function to ensure a predetermined distance between the semiconductor element 40 and the substrate 60. For example, the conductive spacer 70 ensures the height of the signal terminal 93 corresponding to the pad 40P of the semiconductor element 40 for electrical connection. The conductive spacer 70 is located midway between the source electrode 40S of the semiconductor element 40 and the conductive and thermally conductive path of the substrate 60, providing wiring and heat dissipation functions. The conductive spacer 70 is made of a metal material with good electrical and thermal conductivity, such as Cu. The conductive spacer 70 may have a coating on its surface. The conductive spacer 70 is a planar cylindrical body with a generally rectangular shape and approximately the same size as the source electrode 40S in planar view.

[0195] The conductive spacer 70 is sometimes referred to as a terminal, terminal block, or metal block. The semiconductor device 20 has the same number of conductive spacers 70 as the semiconductor element 40. Specifically, it has four conductive spacers 70. The conductive spacers 70 are individually connected to the semiconductor element 40.

[0196] The arm connector 80 electrically connects the relay cables 55 and 65. That is, the arm connector 80 electrically connects the upper arm 9H and the lower arm 9L. The arm connector 80 is disposed between semiconductor elements 40H and 40L in the Y direction. In planar view, the arm connector 80 is disposed in the overlapping area of ​​the relay cables 55 and 65. In this embodiment, the arm connector 80 is configured to include a connector 81 and a bonding material 103, which will be described later.

[0197] The connector 81 is a metal columnar body respectively provided with the surface metal bodies 52 and 62. Such a connector 81 is sometimes referred to as a connector connection end. In the Z direction, there is a bonding material 103 between one end of the connector 81 and the relay cable 55, and there is a bonding material 103 between the other end of the connector 81 and the relay cable 65.

[0198] Alternatively, the connector 81 may be integrally connected to at least one of the surface metal bodies 52 and 62. That is, the connector 81 may also be integrally provided with the surface metal bodies 52 and 62 as part of the substrates 50 and 60. The arm connecting portion 80 may also be a structure without the connector 81. That is, the arm connecting portion 80 may also be a structure that only has the bonding material 103.

[0199] External connection terminal 90 is a terminal used to electrically connect semiconductor device 20 to external devices. External connection terminal 90 is formed of a highly conductive metal material such as copper. External connection terminal 90 is, for example, a substrate. External connection terminal 90 is sometimes referred to as a lead. External connection terminal 90 includes power supply terminal 91, output terminal 92, and signal terminal 93. Power supply terminal 91 includes a P terminal 91P and an N terminal 91N. P terminal 91P, N terminal 91N, and output terminal 92 are main terminals electrically connected to the main electrode of semiconductor element 40. Signal terminal 93 includes a signal terminal 93H on the upper arm 9H side and a signal terminal 93L on the lower arm 9L side.

[0200] Power terminal 91 is an external connection terminal 90 that is electrically connected to the power lines 7 and 8 mentioned above. P terminal 91P is electrically connected to the positive terminal of the smoothing capacitor 5. Sometimes P terminal 91P is referred to as the positive terminal or high-potential power terminal. P terminal 91P is connected to the P wiring 54 of the surface metal body 52. ​​That is, P terminal 91P is connected to the drain electrode 40D of the semiconductor element 40H that constitutes the upper arm 9H.

[0201] The P-terminal 91P is connected near one end of the P-wire 54 in the Y direction. The P-terminal 91P extends from the connection portion (joint portion) with the P-wire 54 along the Y direction and protrudes from near the center in the Z direction outside the sealing solid 30 in the side surface 30c. The semiconductor device 20 of this embodiment includes two P-terminals 91P. Figure 11 As shown, one of the P terminals 91P is connected to one of the pair of extension portions 542, and the other is connected to the other of the pair of extension portions 542. The P terminals 91P are positioned close to the notch 540, i.e., inwardly, at each extension portion 542, so as to be adjacent to the N terminal 91N in planar view. The two P terminals 91P are arranged in the X direction. The two P terminals 91P are arranged at approximately the same position in the Z direction.

[0202] The N-terminal 91N is electrically connected to the negative terminal of the smoothing capacitor 5. The N-terminal 91N is sometimes referred to as the negative terminal or low-potential power supply terminal. The N-terminal 91N is connected to the N-wire 64 of the surface metal body 62. That is, the N-terminal 91N is connected to the source electrode 40S of the semiconductor element 40L constituting the lower arm 9L.

[0203] The N-terminal 91N is connected near one end of the N-wiring 64 in the Y direction. The N-terminal 91N extends along the Y direction from the junction with the N-wiring 64, protruding from near the center in the Z direction outside the encapsulation solid 30 in the side surface 30c. The semiconductor device 20 has two N-terminals 91N. (The text abruptly ends here.) Figure 15 As shown, one of the N-terminals 91N is connected to one of the pair of extension portions 641, and the other is connected to the other of the pair of extension portions 641. The two N-terminals 91N are arranged in the Y direction. The two N-terminals 91N are arranged at approximately the same position in the Z direction.

[0204] Two N-terminals 91N are arranged outside the two P-terminals 91P in the X direction. In planar view, one N-terminal 91N is arranged near one P-terminal 91P, and the other N-terminal 91N is arranged near the other P-terminal 91P. The adjacent N-terminals 91N and P-terminals 91P in the X direction are laterally opposed to each other in a portion including the portion protruding from the sealing solid 30.

[0205] Output terminal 92 is electrically connected to the corresponding phase winding 3a (stator coil) of the generator 3. Sometimes output terminal 92 is referred to as terminal O, AC terminal, etc. Figure 3 and Figure 7 As shown, the output terminal 92 is connected to the relay wiring 55 of the surface metal body 52 of the substrate 50. That is, the output terminal 92 is connected to the connection point of the upper arm 9H and the lower arm 9L.

[0206] The output terminal 92 is connected near one end of the relay wiring 55 in the Y direction. The output terminal 92 extends from the junction with the relay wiring 55 in the Y direction and protrudes from near the center of the encapsulation solid 30 in the Z direction along the side 30d. The semiconductor device 20 has two output terminals 92. One output terminal 92 is connected to one of a pair of extension portions 552, and the other is connected to the other of the pair of extension portions 552. The two output terminals 92 are arranged in the X direction. The two output terminals 92 are arranged at approximately the same position in the Z direction.

[0207] Signal terminal 93 is electrically connected to a drive circuit (driver) not shown. Signal terminal 93H is electrically connected to the pad 40P of semiconductor element 40H via connecting components such as bonding wire 110. The number of signal terminals 93H is not particularly limited. Signal terminals 93H need to include at least a terminal for applying a drive voltage to at least the gate electrode of semiconductor element 40H. The semiconductor device 20 of this embodiment has two signal terminals 93H. One of the signal terminals 93H is a terminal for the gate electrode. For the signal terminal 93H for the gate electrode, the pads 40P for the gate electrodes of two semiconductor elements 40H are electrically connected. In plan view, the signal terminal 93H is arranged at a position overlapping with the notch 540 of the P-wire 54. In the signal terminal 93H, the junction with the bonding wire 110 is not opposite to the surface metal body 52 but opposite to the insulating substrate 51. The two signal terminals 93H are arranged laterally in the X direction.

[0208] Signal terminal 93H extends along the Y direction from the junction with bonding wire 110 and protrudes from near the center in the Z direction outside the sealing solid 30 in side surface 30c. At least a portion of the protrusion of signal terminal 93H extends in the same direction as power terminal 91. Signal terminal 93H is arranged between two P terminals 91P in the X direction. That is, the external connection terminals 90 protruding from side surface 30c are arranged in the X direction in the order of N terminal 91N, P terminal 91P, two signal terminals 93H, P terminal 91P, and N terminal 91N.

[0209] Signal terminals 93L are electrically connected to the pads 40P of semiconductor element 40L via connecting components such as bonding wires 110. The number of signal terminals 93L is not particularly limited. Each signal terminal 93L must include at least a terminal for applying a driving voltage to the gate electrode of the semiconductor element 40L. The semiconductor device 20 of this embodiment includes four signal terminals 93L. One of the signal terminals 93L is a gate electrode terminal. For the gate electrode signal terminal 93L, two gate electrode pads 40P of the semiconductor elements 40L are electrically connected. In planar view, the signal terminals 93L are positioned overlapping the notch 550 of the relay wiring 55. In the signal terminals 93L, the connection portion with the bonding wire 110 is not opposite to the surface metal body 52 but opposite to the insulating substrate 51. The four signal terminals 93L are arranged laterally in the X direction.

[0210] Signal terminals 93L extend from the junction with the bonding wire 110 along the Y direction and protrude from near the center in the Z direction beyond the sealing solid 30 in the side surface 30d. At least a portion of the protrusion of the signal terminals 93L extends in the same direction as the output terminals 92. The signal terminals 93L are arranged between the two output terminals 92 in the X direction. That is, the external connection terminals 90 protruding from the side surface 30d are arranged in the X direction in the order of output terminals 92, four signal terminals 93L, and output terminals 92.

[0211] The drain electrode 40D of the semiconductor element 40 is bonded to the surface metal body 52 via bonding material 100. The source electrode 40S of the semiconductor element 40 is bonded to the conductive spacer 70 via bonding material 101. The conductive spacer 70 is bonded to the surface metal body 62 via bonding material 102. The connector portion 81 is bonded to the metal bodies 52 and 62 via bonding material 103. The P terminal 91P, N terminal 91N, and output terminal 92 of the external connection terminal 90, which serve as main terminals, are bonded to the corresponding surface metal bodies 52 and 62 via bonding material 104.

[0212] The bonding materials 100 to 104 are conductive bonding materials. For example, solder can be used as the bonding materials 100 to 104. An example of solder is a multi-element lead-free solder that includes Cu, Ni, etc., in addition to Sn. Alternatively, sintered bonding materials such as sintered silver can be used instead of solder. The P-terminal 91P, N-terminal 91N, and output terminal 92 can also be directly bonded to the corresponding surface metal bodies 52 and 62 without using the bonding material 104. The P-terminal 91P, N-terminal 91N, and output terminal 92 can be directly bonded to the surface metal bodies 52 and 62, for example, by ultrasonic bonding, friction stir bonding, laser welding, etc. When the connector 81 is provided separately from the substrates 50 and 60, the connector 81 can be directly bonded to the surface metal bodies 52 and 62.

[0213] As described above, in the semiconductor device 20, a plurality of semiconductor elements 40 constituting the upper and lower arm circuits 9 of one phase are encapsulated by an encapsulating solid 30. The encapsulating solid 30 integrally encapsulates a portion of the plurality of semiconductor elements 40, a portion of the substrate 50, a portion of the substrate 60, a plurality of conductive spacers 70, an arm connection portion 80, and a portion of the external connection terminal 90. The encapsulating solid 30 encapsulates insulating substrates 51 and 61 and surface metal bodies 52 and 62 in the substrates 50 and 60.

[0214] Semiconductor element 40 is disposed between substrates 50 and 60 in the Z direction. Semiconductor element 40 is sandwiched between the opposing substrates 50 and 60. This allows heat from semiconductor element 40 to be dissipated to both sides in the Z direction. The semiconductor device 20 forms a two-sided heat dissipation structure. The back surface 50b of substrate 50 is substantially coplanar with one surface 30a of encapsulating solid 30. The back surface 60b of substrate 60 is substantially coplanar with the back surface 30b of encapsulating solid 30. Since the back surfaces 50b and 60b are exposed, heat dissipation is improved.

[0215] <Manufacturing Method>

[0216] Next, based on Figure 10 An example of a method for manufacturing semiconductor device 20 will be described. Figure 10 The diagram shows substrate 50 and substrate 60 facing each other to facilitate understanding of the subsequent assembly process.

[0217] First, prepare semiconductor element 40, substrates 50 and 60, conductive spacer 70, connector 81, and lead frame 94 respectively. Lead frame 94 is as follows... Figure 10 As shown, it includes an external connection terminal 90. The lead frame 94 is formed by processing a metal plate by pressure forming or the like. The external connection terminal 90 is supported on the outer peripheral frame 94b via a tie rod 94a.

[0218] Next, the semiconductor element 40, the connector 81, and the external connection terminal 90 are joined (connected) to the substrate 50. In addition, the conductive spacer 70 is joined to the semiconductor element 40.

[0219] At this time, a lead frame 94 and a semiconductor element 40 are disposed on the substrate 50. Furthermore, a conductive spacer 70 is disposed on the source electrode 40S of the semiconductor element 40. Regarding the lead frame 94, it is disposed such that a portion of each of the external connection terminals 90 overlaps with the substrate 50 in planar view. Specifically, the P terminal 91P and N terminal 91N overlap with the P wiring 54 of the surface metal body 52, and the output terminal 92 overlaps with the relay wiring 55. Furthermore, the signal terminal 93H overlaps with the insulating substrate 51 exposed from the notch 540, and the signal terminal 93L overlaps with the insulating substrate 51 exposed from the notch 550.

[0220] Next, the drain electrode 40D of the semiconductor element 40 is bonded to the surface metal body 52 using bonding material 100. The source electrode 40S is bonded to the conductive spacer 70 using bonding material 101. The connector portion 81 is bonded to the surface metal body 52 using bonding material 103. The P terminal 91P and the output terminal 92 are bonded to the surface metal body 52 using bonding material 104. For example, in the case of solder, the bonding can be performed together by reflow. Figure 10This indicates the engagement state.

[0221] Next, the pad 40P of semiconductor element 40H is electrically connected to signal terminal 93H via bonding wire 110. Similarly, the pad 40P of semiconductor element 40L is electrically connected to signal terminal 93L via bonding wire 110.

[0222] Next, the substrate 60 is bonded (connected). The source electrode 40S of the semiconductor element 40 is bonded to the surface metal body 62 via bonding material 102. The connector portion 81 is bonded to the surface metal body 62 via bonding material 103. The N-terminal 91N is bonded to the surface metal body 62 via bonding material 104. For example, in the case of solder, bonding can be performed together via reflow.

[0223] Next, the sealing solid 30 is formed by transfer molding. Although not shown in the figure, in this embodiment, the sealing solid 30 is formed to completely cover the substrates 50 and 60, and then cut after forming. The sealing solid 30, along with a portion of the back metal bodies 53 and 63 of the substrates 50 and 60, is cut together. This exposes the back surfaces 50b and 60b. The back surface 50b is substantially coplanar with one side 30a of the sealing solid 30, and the back surface 60b is substantially coplanar with the back surface 30b. Alternatively, the back surfaces 50b and 60b can be pushed against the cavity wall of the molding die, and the sealing solid 30 can be formed in a state of close contact. In this case, the back surfaces 50b and 60b are exposed from the sealing solid 30 when it is formed. Therefore, post-forming cutting is not required.

[0224] Next, in the lead frame 94, unwanted parts such as the tie rod 94a and the outer peripheral frame 94b are removed. In this way, the semiconductor device 20 can be obtained.

[0225] <Positional Relationship>

[0226] Next, based on Figure 14 and Figure 15 This describes the positional relationship between the circuit patterns of the semiconductor element 40, the surface metal bodies 52 and 62, the arm connection portion 80, and the external connection terminal 90 connected to the circuit pattern. Figure 14 It is a circuit pattern representing the surface metal body 52, the semiconductor element 40, and the configuration of the terminals. Figure 15 This is a diagram showing the circuit pattern of the surface metal body 62, the semiconductor element 40, and the arrangement of terminals. Figure 14 and Figure 15 For simplicity, only the external connection terminal 90 connected to the circuit diagram is shown in the illustration. Figure 14 In this context, the main electrode (drain electrode 40D) connected to the surface metal body 52 is represented as D in the configuration area of ​​the semiconductor element 40 for ease of understanding. Similarly, in Figure 15 In this context, the main electrode (source electrode 40S) connected to the surface metal body 62 is represented as S in the configuration area of ​​the semiconductor element 40 for ease of understanding.

[0227] Figure 14 The imaginary line CL1 shown is an imaginary line passing through the midpoint of the two semiconductor elements 40 that constitute an arm. The imaginary line CL1 extends in the Y direction through the midpoint (center) of the arrangement direction of the two semiconductor elements 40. For example, the imaginary line CL1 could be a line passing through the midpoint of the two semiconductor elements 40H. Alternatively, it could be a line passing through the midpoint of the semiconductor element 40L instead of the semiconductor element 40H.

[0228] like Figure 14 As shown, the arrangement of the two semiconductor elements 40H is approximately symmetrical with respect to the imaginary line CL1. Similarly, the arrangement of the two semiconductor elements 40L is also approximately symmetrical with respect to the imaginary line CL1. Here, "approximately symmetrical" means that it allows for a degree of manufacturing deviation. The circuit pattern of the surface metal body 52 is also approximately symmetrical with respect to the imaginary line CL1. That is, the P-wiring 54 and the relay wiring 55 are respectively approximately symmetrical with respect to the imaginary line CL1.

[0229] The arrangement of the arm connector 80, which connects to the trunk cabling 55, is also approximately symmetrical with respect to the hypothetical line CL1. The arrangement of the external connection terminals 90, which connect to the surface metal body 52, is also approximately symmetrical with respect to the hypothetical line CL1. That is, the arrangement of the two P terminals 91P is also approximately symmetrical with respect to the hypothetical line CL1. The arrangement of the two output terminals 92 is also approximately symmetrical with respect to the hypothetical line CL1.

[0230] and Figure 14 Similarly, in Figure 15 The diagram also shows the hypothetical line CL1. The arrangement of semiconductor elements 40H and 40L is shown in the diagram. Figure 14 They are the same. For example... Figure 15 As shown, the circuit pattern of the surface metal body 62 is also approximately symmetrical with respect to the imaginary line CL1. That is, the N-wire 64 and the relay wire 65 are approximately symmetrical with respect to the imaginary line CL1. The arrangement of the arm connection portion 80 connected to the relay wire 65 is also similar to... Figure 14 Similarly, they are approximately symmetrical with respect to the imaginary line CL1. The arrangement of the two N terminals 91N, which are external connection terminals 90 connected to the surface metal body 62, is also approximately symmetrical with respect to the imaginary line CL1.

[0231] <Circuit Pattern>

[0232] Next, based on Figure 15 The circuit pattern of the surface metal body 62 is described in more detail. Figure 15 The dashed lines shown represent the boundaries of each region.

[0233] As described above, the surface metal body 62 of the substrate 60 has an N wiring 64 and a relay wiring 65. The N wiring 64 has a base portion 640 and a pair of extending portions 641. The pair of extending portions 641 extend from the base portion 640 in the Y direction toward the side surface 30c side of the sealing body 30. The N wiring 64 defines the outer contour of the surface metal body 62. The relay wiring 65 is sandwiched by the pair of extending portions 641. The relay wiring 65 is arranged in the notch 642 of the N wiring 64.

[0234] As shown in Figure 15 , the relay wiring 65 has an end portion 650 that is one end in the Y direction. The end portion 650 is the end portion on the base portion 640 side in the Y direction. On the other hand, the base portion 640 of the N wiring 64 has an opposing side 640a that opposes the end portion 650. In the base portion 640, the opposing side 640a is the portion between the pair of extending portions 641. Further, the base portion 640 has an arrangement region 640b for the semiconductor element 40L. The arrangement region 640b is as shown in Figure 15 indicated by the two-dot chain line, defined by the outer contour of the semiconductor element 40L. The arrangement region 640b includes a region overlapping with the semiconductor element 40L in plan view, and in the case where a plurality of semiconductor elements 40L are included, also includes a region between the elements. The region between the elements is the opposing region between the semiconductor elements 40L in the arrangement direction of the semiconductor elements 40L.

[0235] Here, lengths L1, L2, and L3 in the X direction are defined as follows. The length L1 is as shown in Figure 15 the length of the end portion 650 of the relay wiring 65. The length L2 is the length of the opposing side 640a of the base portion 640. The length L3 is the length of the arrangement region 640b of the base portion 640. In the present embodiment, the relationship of L1<L2<L3 is satisfied.

[0236] The relay wiring 65 of the present embodiment has a width-reduced portion 651a. The width-reduced portion 651a includes the end portion 650. The width-reduced portion 651a is a portion within a predetermined range from the end portion 650 in the Y direction. The length in the X direction, i.e., the width, of the width-reduced portion 651a is the smallest at the end portion 650. In the width-reduced portion 651a, the width W1 at an arbitrary first position is equal to or less than the width W2 at a second position that is further away from the end portion 650 than the first position.

[0237] The width of the width-reduced portion 651a may, for example, be reduced stepwise by every predetermined length in the Y direction. That is, the end portion in the X direction of the width-reduced portion 651a may change in a stepped manner. In the present embodiment, the closer to the base portion 640, the shorter the length in the X direction of the width-reduced portion 651a. That is, the width of the width-reduced portion 651a continuously decreases toward the base portion 640. The arm connection portion 80 is arranged at the width-reduced portion 651a.

[0238] The relay wiring 65 may also have only a narrowing portion 651a including the end 650. In this case, the semiconductor element 40H is also disposed in the narrowing portion 651a. The relay wiring 65 of this embodiment has a fixed-width portion 651b. The fixed-width portion 651b is connected to the narrowing portion 651a and is a portion with a fixed width within a predetermined range in the Y direction. Furthermore, the semiconductor element 40H is disposed in the fixed-width portion 651b.

[0239] The relay cabling 65 in this embodiment also includes a contraction portion 651c. The contraction portion 651c includes an end portion 652 opposite to the end portion 650. The contraction portion 651c is connected to the amplitude-fixing portion 651b opposite to the contraction portion 651a. The width of the contraction portion 651c is smallest at the end portion 652. In the contraction portion 651c, the width at any first position is less than or equal to the width at a second position further away from the end portion 652 than the first position. In this embodiment, the width of the contraction portion 651c continuously decreases towards the end portion 652. In the relay cabling 65, the further away from the amplitude-fixing portion 651b, the narrower the width of the contraction portions 651a and 651c.

[0240] In this embodiment, the spacing between the N-wire 64 and the trunk wire 65 is approximately fixed throughout the opposing region. The extension portion 641 of the N-wire 64 is laid out with the spacing between it and the trunk wire 65 approximately fixed. The extension portion 641 has an expansion portion 641a, a fixed-amplitude portion 641b, and an expansion portion 641c.

[0241] The expansion section 641a is connected to the base section 640 and is a portion located within a predetermined range from the boundary of the base section 640 in the Y direction. The length, i.e., the width, of the expansion section 641a in the X direction is greatest at the boundary with the base section 640. In the expansion section 641a, the width at any first position is greater than the width at a second position further away from the base section 640 than the first position. In this embodiment, the width of the expansion section 641a continuously expands towards the base section 640. The fixed-width section 641b is connected to the expansion section 641a and is a portion with a fixed width within a predetermined range in the Y direction. The fixed-width section 641b is opposite to the fixed-width section 651b of the relay cabling 65.

[0242] The expanding portion 641c is connected to the fixed portion 641b opposite to the expanding portion 641a. The expanding portion 641c extends to a position closer to the side 30c than the contracting portion 651c. The expanding portion 641c includes a front end portion 641d of the extended portion 641. The width of the expanding portion 641c is greatest at the front end portion 641d. In the expanding portion 641c, the width at any first position is greater than the width at a second position further away from the front end portion 641d than the first position. In this embodiment, the width of the expanding portion 641c continuously increases towards the front end portion 641d at the opposing portion opposite to the contracting portion 651c. In the expanding portion 641c, the portion closer to the front end portion 641d than the opposing portion has a fixed width. In the N-wiring 64, the width of a portion of the expanding portion 641c and the expanding portion 641a increases further away from the fixed portion 641b.

[0243] <Current Path>

[0244] Next, based on Figures 16-20 Explain the current path. Figure 16 This is a diagram illustrating the PN current cycle of the reference example. In the reference example, the labels of each element are set by appending the number 'r' to the end of the label of the associated element of the semiconductor device 20. The structure of the reference example is substantially the same as that of the semiconductor device 20, except that the number of signal terminals 93Lr, the N-wiring 64r, and the pattern of the relay wiring 65r are different. Figure 17 This is a diagram showing the PN current cycle of the semiconductor device 20 in this embodiment. Figure 18 This is a diagram showing the PN current cycle in a side view of the semiconductor device 20 viewed from the X direction. The PN current cycle refers to the loop shape of the current path from the P terminal 91P to the N terminal 91N.

[0245] When studying inductors, consider the PN current cycle as follows: P terminal 91P → P wiring 54 → semiconductor element 40H → relay wiring 65 → arm connection 80 → relay wiring 55 → semiconductor element 40L → N wiring 64 → N terminal 91N. Therefore, for ease of understanding, the PN current cycle is represented by a continuous solid line from P terminal 91P to N terminal 91N. In practice, semiconductor elements 40H and 40L are controlled to not conduct simultaneously. For convenience, only the current path for one semiconductor element 40H and one semiconductor element 40L is shown, but the same applies to the other semiconductor element 40H and the other semiconductor element 40L.

[0246] Figure 19 and Figure 20 This represents the result of the electromagnetic field simulation. Figure 19 express Figure 18 The current density of the reference example shown. Figure 20 about Figure 16The structure shown in this embodiment represents the current density. The conditions for electromagnetic field simulation are the same, except for the circuit pattern of the surface metal body 62. Figure 19 , Figure 20 In this system, the lower the current density, the sparser (lighter) the color, and the higher the current density, the denser (darker) the color.

[0247] like Figure 16 As shown, in the semiconductor device 20r of the reference example, the planar shape of the relay wiring 65r is approximately rectangular. The length of the end 650r of the relay wiring 65r is approximately equal to the length of the arrangement region 640br of the semiconductor element 40Lr in the base 640r. The length of the opposing edge 640ar in the base 640r is longer than that of the arrangement region 640br. Therefore, as... Figure 16 As shown by the solid arrow, for a semiconductor element 40Lr with a roughly rectangular planar shape, current enters from one side 400r and exits from the other side 401r. Side 400r is the opposite side to the relay wiring 65r. Side 401r is the opposite side to the opposite sides of the two semiconductor elements 40Lr. Thus, because current flows outward in the X direction from the semiconductor element 40Lr, the PN current circulation is relatively large. According to... Figure 19 The simulation results also clearly show that current flows from the semiconductor element 40Lr outward in the X direction within the base 640r.

[0248] On the other hand, in the semiconductor device 20 of this embodiment, as described above, the N-wire 64 and relay wire 65 are laid out to satisfy a predetermined positional relationship with the semiconductor element 40L. Through this positional relationship, such as... Figure 17 As shown, in planar view, an N-wire 64 (extension setting portion 641) also exists above one edge 400 of the semiconductor element 40L. Edge 400 is an opposing edge to the relay wire 65. Therefore, current enters from edge 400 of the semiconductor element 40L and exits from the same edge 400. In the current flowing from the semiconductor element 40L toward the N-terminal 91N, particularly near the semiconductor element 40L, the Y-direction component increases. Figure 20 The simulation results also clearly show that the current flows from the semiconductor element 40L, with a Y-direction component.

[0249] Thus, the current flowing through N-wiring 64 is close to that through relay wiring 65, and the current path formed by N-wiring 64, i.e., the current path between semiconductor element 40L and N-terminal 91N, becomes shorter. Therefore, compared to the reference example, the PN current circulation is smaller. Figure 18 As shown, the PN current circulation is also smaller in the Z direction. P wiring 54 and N wiring 64 are opposite each other in the Z direction. In addition, relay wiring 55 and N wiring 64 are opposite each other in the Z direction.

[0250] <Summary of Implementation Method 1>

[0251] When the inductance of the main circuit wiring is large, the surge voltage increases. If the semiconductor element is made thicker to ensure withstand voltage, the steady-state loss increases. To reduce steady-state loss, the element area needs to be increased. Furthermore, the surge voltage can also be reduced by suppressing the switching speed. In this case, the output to the generator decreases. Thus, if the inductance is large, the size of the semiconductor element increases or the output decreases.

[0252] If components with current flowing in opposite directions are arranged opposite each other, the inductance can be reduced through the cancellation effect of the magnetic flux generated by the current. If the PN current circulation in the main circuit wiring is smaller, the components with current flowing in opposite directions are brought closer together, the cancellation effect of the magnetic flux is stronger, and thus the inductance can be reduced.

[0253] In this embodiment, semiconductor elements 40H and 40L are arranged in the Y direction, and the arm connector 80 is disposed between semiconductor elements 40H and 40L. Power terminals 91 (91P, 91N) in the main terminals are led out in the same direction. Furthermore, in the Y direction, P-wire 54 is disposed on the power terminal 91 side, and relay wire 55 is disposed on the opposite side. In the Y direction, relay wire 65 is disposed on the power terminal 91 side, and the base 640 of N-wire 64 is disposed on the opposite side. The extension portion 641 of N-wire 64 extends towards the power terminal 91 side in a manner that clamps the relay wire 65.

[0254] With this structure, the PN current circulation is reduced. This reduces the inductance of the main circuit wiring. For example, the parallel arrangement of P-terminal 91P and N-terminal 91N reduces inductance. The relay wiring 65 and N-wire 64 are also arranged with a predetermined interval (parallel arrangement). This reduces inductance. Furthermore, the extension portion 641 of the N-wire 64 is opposite the P-wire 54. This reduces inductance.

[0255] In this embodiment, the surface metal body 52 of substrate 50 and the surface metal body 62 of substrate 60 provide wiring functionality for semiconductor element 40. Surface metal bodies 52 and 62 are encapsulated by encapsulating solid 30. Since creepage distance can be ensured without the need for conventional methods, N-wire 64 and relay wire 65 can be arranged close together. This improves the flux cancellation effect and further reduces inductance.

[0256] In addition, such as Figure 15As shown, the length L1 of the end portion 650 of the relay wiring 65, the length L2 of the opposing side 640a of the base portion 640, and the length L3 of the arrangement region 640b of the semiconductor element 40L in the base portion 640 satisfy the relationship of L1<L2<L3. By satisfying this dimensional relationship, as described above, current enters from one side 400 of the semiconductor element 40L, and current exits from the same side 400. In the current flowing from the semiconductor element 40L toward the N terminal 91N, especially in the vicinity of the semiconductor element 40L, the Y-direction component increases. As a result, the current path formed by the N wiring 64, that is, the current path between the semiconductor element 40L and the N terminal 91N is shortened, and the PN current loop is reduced. This makes it possible to further reduce the inductance of the main circuit wiring.

[0257] Furthermore, the higher the frequency of the current, the more the current concentrates on the opposing side between the extending portion 641 of the N wiring 64 and the relay wiring 65 due to the skin effect. As a result, the PN current loop can be further reduced, and the inductance can be further decreased.

[0258] In the present embodiment, as Figure 15 shown, the relay wiring 65 has a width-reduced portion 651a. Thereby, in the extending portion 641, the width of the portion opposing the width-reduced portion 651a can be increased. This makes it possible to suppress heat generation caused by energization without changing the volumes of the surface metal body 62 and the substrate 60. That is, heat generation can be suppressed while reducing inductance.

[0259] In particular, in the present embodiment, the closer to the base portion 640, the shorter the length of the width-reduced portion 651a in the X direction. That is, the width of the width-reduced portion 651a continuously decreases toward the base portion 640. The width-reduced portion 651a of the relay wiring 65 has a tapered shape. Thereby, it is easy to make the interval between the relay wiring 65 and the extending portion 641 constant. That is, the extending portion 641 can be brought closer to the relay wiring 65 to reduce the PN current loop. In addition, the width of the extending portion 641 can be increased to suppress heat generation.

[0260] In the present embodiment, the relay wiring 65 has a constant-width portion 651b. Further, the semiconductor element 40H is arranged in the constant-width portion 651b. The relay wiring 65 having the width-reduced portion 651a and the constant-width portion 651b has a shape identical or similar to the home base of a baseball when viewed in a plan view. Thereby, compared with the configuration in which the semiconductor element 40H is arranged in the width-reduced portion 651a, the width of the extending portion 641 can be increased. This makes it possible to suppress heat generation caused by energization without changing the volumes of the surface metal body 62 and the substrate 60. That is, heat generation can be suppressed while reducing inductance.

[0261] In this embodiment, the semiconductor device 20 includes two semiconductor elements 40H and two semiconductor elements 40L. The two semiconductor elements 40H are arranged in the X direction. Similarly, the two semiconductor elements 40L are arranged in the X direction. Thus, semiconductor elements 40 forming one arm are arranged in a direction orthogonal to the arrangement direction (Y direction) of semiconductor elements 40H and semiconductor elements 40L. In the X direction, a pair of extending portions 641 sandwich a relay wiring 65. As a result, current bias can be suppressed.

[0262] The semiconductor device 20 may also include an N-terminal 91N that branches into two at the front end, each connected to a pair of extension portions 641. In this embodiment, the semiconductor device 20 includes two N-terminals 91N, each connected to a pair of extension portions 641. This allows for the easy placement of other external connection terminals 90 between the two N-terminals 91N. Since the external connection terminals 90 disposed between them do not need to be avoided, the device can be miniaturized.

[0263] Semiconductor device 20 may also have only one P terminal 91P. In this embodiment, semiconductor device 20 has two P terminals 91P. Furthermore, in the X direction, they are arranged in the order of N terminal 91N, P terminal 91P, signal terminal 93H, P terminal 91P, and N terminal 91N. P terminals 91P and N terminals 91N are arranged at both ends in the X direction. This makes it easier to reduce PN current circulation. In addition, since the external connection terminals 90 are arranged regularly in the X direction, as described above, it is easy to ensure line symmetry regarding the circuit patterns of semiconductor element 40, surface metal bodies 52 and 62, and external connection terminals 90. This helps to suppress current bias.

[0264] In this embodiment, the P terminal 91P and N terminal 91N protrude from the side 30c of the encapsulating solid 30, and the output terminal 92 protrudes from the side 30d. This directs the P terminal 91P and N terminal 91N, which are connected to the smoothing capacitor 5, in the same direction, while directing the output terminal 92 in the opposite direction. This improves the connectivity with the smoothing capacitor 5 and with the electric generator 3. Furthermore, the arrangement of the P terminal 91P and N terminal 91N reduces inductance. This terminal arrangement also makes it easier to reduce the PN current circulation.

[0265] <Variation Example>

[0266] As an example in which each of the semiconductor elements 40H and 40L is provided in plurality, an example in which each is provided with two is shown, but the present invention is not limited thereto. Three or more may be provided. For example, a configuration in which three semiconductor elements 40H are arranged side by side in the X direction and three semiconductor elements 40L are arranged side by side in the X direction may be adopted. The circuit pattern of the surface metal body 62 and the arrangement of the semiconductor elements 40 are not limited to the above examples. For example, as shown in Figure 21 , Figure 22 , it is also possible. In Figure 21 and Figure 22 , for convenience of illustration, the sealing body 30 on the back surface 30b side relative to the insulating base material 51 is omitted. Further, the insulating base material 61 and the back surface metal body 63 in the substrate 60 are omitted from illustration. Similarly to Figure 17 , the PN current loop is represented by a solid arrow. In Figure 21 and Figure 22 , the semiconductor device 20 includes two signal terminals 93L.

[0267] In Figure 21 , the semiconductor device 20 includes two arm connection portions 80. The planar shape of the relay wiring 65 is a substantially rectangular shape. The two arm connection portions 80 are arranged side by side in the X direction in the vicinity of the end portion 650. The interval between the two semiconductor elements 40L is larger than that in the above example (see Figure 17 ). The length of the arrangement region 640b of the semiconductor elements 40L is longer than that in the above example. Thereby, the relationship of L1<L2<L3 is satisfied. As a result, a current enters from the side 400 of the semiconductor element 40L, and the current exits from the same side 400. With such a configuration, the current path formed by the N wiring 64 is also shortened, and the PN current loop can be reduced. However, the configuration shown in Figure 17 can further increase the width of the N wiring 64, particularly the width of the extended portion 641. Further, in the case of the configuration shown in Figure 17 , the number of the arm connection portions 80 may be one.

[0268] In Figure 22 , the semiconductor device 20 is provided with only one semiconductor element 40H and only one semiconductor element 40L, respectively. In this example, the arrangement region 640b coincides with the outer contour of the semiconductor element 40L. The length of one semiconductor element 40H, 40L in the X direction is longer than that in the above example (see Figure 17 ). Thereby, the relationship of L1<L2<L3 is satisfied. As a result, a current enters from the side 400 of the semiconductor element 40L, and the current exits from the same side 400. With such a configuration, the current path formed by the N wiring 64 is also shortened, and the PN current loop can be reduced.

[0269] The configuration of the external connection terminal 90 is not limited to the example described above. For example, the P terminal 91P can be configured on the outside in the X direction, and the N terminal 91N can be configured on the inside. In this case, as... Figure 23 and Figure 24 As shown, the semiconductor element 40 and the circuit pattern are also reversed. Figure 23 This indicates the substrate 50. Figure 24 This indicates substrate 60.

[0270] like Figure 23 As shown, the circuit pattern of the surface metal body 52 of the substrate 50 is similar to... Figure 15 The circuit pattern of the surface metal body 62 of the substrate 60 shown is the same. P-wiring 54 is... Figure 15 The N-wire 64 shown has the same pattern. A semiconductor element 40H is disposed on the N-wire 64. The relay wiring 55 is the same as... Figure 15 The repeater wiring 65 shown has the same pattern. A semiconductor element 40L and an arm connector 80 are disposed on the repeater wiring 55.

[0271] like Figure 24 As shown, the circuit pattern of the surface metal body 62 of the substrate 60 is similar to... Figure 14 The circuit pattern of the surface metal body 52 of the substrate 50 shown is the same. N-wiring 64 is... Figure 14 The P-wire 54 shown has the same pattern. A semiconductor element 40L is disposed on the N-wire 64. The relay wire 65 is the same as... Figure 14 The repeater wiring 55 shown has the same pattern. A semiconductor element 40H and an arm connector 80 are disposed on the repeater wiring 65.

[0272] exist Figure 23 and Figure 24 In the structure shown, the first and second relationships described above are reversed. Semiconductor element 40L is the first element, and semiconductor element 40H is the second element. Source electrode 40S is the first main electrode, and drain electrode 40D is the second main electrode. Substrate 60 is the first substrate, and substrate 50 is the second substrate. Insulating substrate 61 is the first insulating substrate, surface metal body 62 is the first surface metal body, and back metal body 63 is the first back metal body. Insulating substrate 51 is the second insulating substrate, surface metal body 52 is the second surface metal body, and back metal body 53 is the second back metal body.

[0273] (Second Implementation)

[0274] This embodiment is a variation based on a prior embodiment, and the description of the prior embodiment can be referenced. In order to suppress transient current imbalance during switching, as described in this embodiment, the surface metal body of multiple semiconductor elements connected in parallel can be made with a predetermined structure.

[0275] Semiconductor Devices

[0276] First, based on Figure 25 The semiconductor device 20 of this embodiment will be described. Figure 25 This is a cross-sectional view showing the semiconductor device 20 of this embodiment. Figure 25 Corresponding to Figure 8 .

[0277] The semiconductor device 20 of this embodiment has a structure similar to that described in the prior embodiment (see reference). Figures 2 to 15 The same structure. Semiconductor device 20 constitutes the upper and lower arm circuits 9 of one phase. For example... Figure 25 As shown, the semiconductor device 20 includes multiple semiconductor elements 40, including upper arm elements (i.e., two semiconductor elements 40H), substrates 50 and 60 arranged to sandwich the semiconductor elements 40 in the Z direction, and an encapsulating solid 30. The surface metal body 52 of the substrate 50 is connected to the first main electrode (drain electrode 40D) on the high-potential side of the semiconductor element 40. The surface metal body 62 of the substrate 60 is connected to the second main electrode (source electrode 40S) on the low-potential side of the semiconductor element 40. Although not shown, the semiconductor device 20 includes two semiconductor elements 40L serving as lower arm elements.

[0278] The surface metal body 62, like in the prior embodiment, is approximately linearly symmetrical with respect to the imaginary line CL1. For example... Figure 25 As shown, in this embodiment, the relay wiring 65 of the surface metal body 62 has a slit 653. As will be described later, the N wiring 64 has a slit 643.

[0279] <Suppression effect of transient current imbalance>

[0280] Next, based on Figure 26 and Figure 27 The effect of suppressing transient current imbalance during switching is explained. Figure 26 This is an equivalent circuit diagram of two semiconductor elements 40 (MOSFET11) that constitute one arm. Figure 27 It is a schematic diagram (potential diagram) that represents electric potential in an easy-to-understand way.

[0281] exist Figure 26 and Figure 27In this diagram, one of the parallel-connected MOSFETs 11 is designated MOSFET1, and the other is designated MOSFET2. The inductance of the drain-side wiring (hereinafter referred to as drain wiring) is denoted as Ld, and the inductance of the source-side wiring (hereinafter referred to as source wiring) is denoted as Ls. The gate potential is denoted as Vg, the source potential of MOSFET1 is denoted as Vks1, the source potential of MOSFET2 is denoted as Vks1, and the common source potential is denoted as Vs. The midpoint potential between potentials Vks1 and Vks2 is denoted as Vm. The midpoint potential Vm is fixed. Vm = (Vks1 + Vks2) / 2.

[0282] Furthermore, let Vgs1 represent the gate voltage of MOSFET1, and Vgs2 represent the gate voltage of MOSFET2. Let I1 represent the current flowing through MOSFET1 when it is turned on, and let ΔVs1 represent the voltage across inductor Ls when current I1 flows through it. Similarly, let I2 represent the current flowing through MOSFET2 when it is turned on, and let ΔVs2 represent the voltage across inductor Ls when current I2 flows through it. ΔVs1 = Ls × dI1 / dt. ΔVs2 = Ls × dI2 / dt.

[0283] Assuming that due to the characteristic deviation of MOSFET11, such as Figure 26 As shown, a current I2 (I2>I1) flows through the inductor Ls that is larger than the current I1. At this time, the voltage ΔVs generated in the inductor Ls is ΔVs1<ΔVs2. That is, as... Figure 27 As shown, relative to the midpoint potential Vm, the source electrode potential Vks2 rises, and the potential Vks1 falls. Therefore, the gate voltage Vgs1 > the gate voltage Vgs2. Because the gate voltage Vgs2 is reduced, the current I2 decreases. Thus, the inductance Ls of the source wiring has the function of suppressing transient current imbalance during switching caused by characteristic deviations of the parallel-connected semiconductor element 40 (MOSFET11).

[0284] However, if the inductance Ls of the source wiring is small, the aforementioned function of suppressing transient current imbalance is compromised. Consequently, a bias occurs in the switching losses, requiring a margin in the thermal design.

[0285] <Circuit pattern of the substrate>

[0286] Next, based on Figure 28 The circuit pattern of the surface metal body 62 of the semiconductor device 20 of this embodiment will be described. Figure 28 Corresponding to Figure 15 .exist Figure 28 In, with Figure 15Similarly, the source electrode 40S is denoted as S in order to clarify the connection of the main electrode.

[0287] N-wire 64 and relay wire 65 are source wires connecting the source electrode 40S of semiconductor element 40. N-wire 64 differs from the pattern in the prior embodiment in that it has a slit 643. Similarly, relay wire 65 has a slit 653, thus differing from the pattern in the prior embodiment. Except for having slits 643 and 653, the structure is the same as that described in the prior embodiment.

[0288] The slit 643 extends through the N-wire 64 in its thickness direction (Z direction). The slit 643 is disposed in the base 640 at a position overlapping the opposing regions of the two semiconductor elements 40L. The opposing regions are the areas where the semiconductor elements 40L face each other in the arrangement direction of the semiconductor elements 40L. That is, the slit 643 is disposed between the semiconductor elements 40L, which are lower arm elements, in a planar view in the Z direction. The slit 643 is disposed in the base 640 between electrical connection portions that are electrically connected to the semiconductor elements 40L. The slit 643 extends from between the semiconductor elements 40L along the Y direction, which is the arrangement direction of the semiconductor elements 40H and 40L. The slit 643 opens in the opposing edge 640a of the base 640. The slit 643 is disposed approximately at the center of the N-wire 64 in the X direction.

[0289] Thus, slit 643 extends from the source electrode 40S of semiconductor element 40L in the Y direction toward the configuration side of the N terminal 91N, which serves as the main terminal, i.e., the current flow side. Slit 643 does not open at the end 640c of the base 640. Slit 643 is provided near the lower end of the opposing region of semiconductor element 40L. Slit 643 divides the N wiring 64 into a region connected to one semiconductor element 40L and a region connected to the other. Slit 643 separates the current path of the source electrode 40S of semiconductor element 40L, i.e., the source current path.

[0290] A slit 653 extends through the relay wiring 65 in its thickness direction (Z direction). The slit 653 is positioned within the relay wiring 65 at a location overlapping the opposing regions of the two semiconductor elements 40H. That is, the slit 653 is positioned between the semiconductor elements 40H in planar view. The slit 653 is positioned within the relay wiring 65 between electrical connections electrically connected to the semiconductor elements 40H. The slit 653 extends from between the semiconductor elements 40H in the Y direction. The slit 653 opens at an end 652. The slit 653 extends from the end 652 across the space between the semiconductor elements 40H (opposing region) to the vicinity of the arm connection 80. The slit 653 is positioned approximately at the center of the relay wiring 65 in the X direction.

[0291] Thus, slit 653 extends from the source electrode 40S of semiconductor element 40H towards the arm connection portion 80 in the Y direction. Slit 653 extends from the source electrode 40S of semiconductor element 40H towards the current flow side. Slit 653 does not open at the end 650. Slit 653 is positioned near the front of the arm connection portion 80. Slit 653 divides the relay wiring 65 into a region connected to one semiconductor element 40H and a region connected to the other. Slit 653 separates the current path of the source electrode 40S of semiconductor element 40H, i.e., the source current path.

[0292] <Summary of Implementation Method 2>

[0293] Figure 29 The solid arrows indicate the source current paths on the semiconductor element 40H side, and the dashed arrows indicate the source current paths on the semiconductor element 40L side. As described above, in this embodiment, slits 643 and 653 are provided on the surface metal body 62 connected to the source electrode 40S, which is the main electrode on the low-potential side.

[0294] A slit 643 is provided between adjacent semiconductor elements 40L in the N-wiring 64 that connects semiconductor elements 40L in parallel. The slit 643 divides the N-wiring 64, separating the source current paths of each semiconductor element 40L. This suppresses the convergence of current (source current) from the source electrode 40S of the semiconductor element 40L near the source electrode 40S. That is, in planar view, the point where the source current converges is farther from the source electrode 40S. Therefore, in a parallel circuit of two semiconductor elements 40L (MOSFET 11), the inductance Ls of the source wiring can be larger compared to a structure without the slit 643. Because the inductance Ls is larger, transient current imbalance during switching can be suppressed even if there are deviations in the characteristics of the two semiconductor elements 40L. By providing the slit 643, transient current imbalance can be suppressed while maintaining high integration of the semiconductor elements 40L.

[0295] Similarly, the relay wiring 65 has a slit 653. The slit 653 is disposed between the two semiconductor elements 40H. The slit 653 divides the relay wiring 65, separating the source current paths of each semiconductor element 40H. This suppresses the convergence of currents (source currents) from the source electrodes 40S of the semiconductor elements 40H near the source electrode 40S. That is, in planar view, the point where the source currents converge is farther from the source electrode 40S. Therefore, in the parallel circuit of the two semiconductor elements 40H, the inductance Ls of the source wiring can be larger compared to a structure without the slit 653. Because the inductance Ls is larger, transient current imbalance during switching can be suppressed even if there are deviations (deviations) in the characteristics of the two semiconductor elements 40H. By providing the slit 653, transient current imbalance can be suppressed while maintaining high integration of the semiconductor elements 40H.

[0296] In this embodiment, the slit 643 extends in the Y direction toward the N terminal 91N side from between adjacent semiconductor elements 40L. The slit 643 extends from the source electrode 40S of the semiconductor element 40L toward the current flow side. This allows the source current paths of each semiconductor element 40L to be separated by a longer distance. Consequently, in the parallel circuit of the semiconductor elements 40L, the inductance Ls of the source wiring can be increased. That is, the suppression effect of transient current imbalance can be improved.

[0297] Similarly, slit 653 extends in the Y direction toward the arm connection portion 80 from between adjacent semiconductor elements 40H. Slit 653 extends from the source electrode 40S of semiconductor element 40H toward the current flow side. This allows for the separation of the source current paths of each semiconductor element 40L by a longer distance. Consequently, in the parallel circuit of semiconductor elements 40H, the inductance Ls of the source wiring can be increased. That is, the suppression effect of transient current imbalance can be improved.

[0298] Figure 30 It is along Figure 29 A cross-sectional view along line XXX-XXX. In this embodiment, the components include a connector 81, a bonding material 103 connecting the connector 81 to the relay wiring 55, a bonding material 103 connecting the connector 81 to the relay wiring 65, and an arm connection 80 electrically connecting the relay wirings 55 and 65. The connector 81 is a component different from the substrates 50 and 60. The arm connection 80 electrically connects the relay wiring 65, which is connected to the source electrode 40S of the semiconductor element 40H, and the relay wiring 55, which is connected to the drain electrode 40D of the semiconductor element 40L.

[0299] <Variation Example>

[0300] In the above example, it is shown that each of the multiple semiconductor elements 40 includes two semiconductor elements 40H and 40L, but it is not limited to this. It is also possible to make a structure in which one of the semiconductor elements 40H and 40L contains two and the other contains one. In this case, a slit can be provided in the wiring of the two wirings (64, 65) of the surface metal body 62 that connects the multiple semiconductor elements 40 in parallel to form an arm. For example, in the case of a structure including two semiconductor elements 40H and one semiconductor element 40L, a slit 643 is not provided in the N wiring 64, but a slit 653 is provided at the relay wiring 65 connected to the semiconductor element 40H. Thus, it is also possible that, with respect to the multiple semiconductor elements 40, at least one of the semiconductor elements 40H and 40L has an arm element containing two.

[0301] The number of semiconductor elements 40 connected in parallel is not limited to two. Three or more semiconductor elements 40 can also be connected in parallel to form an arm. For example, in a structure containing three semiconductor elements 40H, for the three semiconductor elements 40H arranged in the X direction, slits 653 can be provided between adjacent semiconductor elements 40H in planar view. Multiple semiconductor elements 40 can include multiple arm elements of at least one of semiconductor elements 40H and 40L. Multiple arm elements of both semiconductor elements can also be included, i.e., multiple semiconductor elements 40H and multiple semiconductor elements 40L.

[0302] The configuration of the N terminal 91N is not limited to the example described above. For example, it can also be configured such that the P terminal 91P protrudes from the side 30c of the encapsulation solid 30 and the N terminal 91N protrudes from the side 30d. In this case, the pattern of the N wiring 64 can be similar in shape to, for example, the P wiring 54 and the relay wiring 55. That is, the extension portion 641 extends from the base 640 toward the side 30d of the encapsulation solid 30. In this configuration, it is sufficient that the slit 643 is provided at least between the semiconductor elements 40L. Furthermore, by configuring the slit 643 to extend from the opposite region of the semiconductor element 40L toward the outside of the opposite region and toward the N terminal 91N side, the inductance Ls can be increased.

[0303] The slits 643 and 653 disposed between the semiconductor elements 40 may be one, but are not limited to this. At least one of the slits 643 and 653 may be multiple.

[0304] Examples are shown where slits 643 and 653 open at one end of the surface metal body 62, but this is not a limitation. For example, in Figure 31 and Figure 32In the example shown, slit 643 extends in the Y direction from the opposite edge 640a of the base 640 to the end 640c. Slit 643 divides the base 640, and thus the N-wire 64, in two. Slit 643 traverses the opposite region of the semiconductor element 40L. One semiconductor element 40L is disposed on one of the divided N-wires 64, and the other semiconductor element 40L is disposed on the other N-wire. Similarly, slit 653 extends in the Y direction from the end 652 to the end 650 of the relay wire 65. Slit 653 divides the relay wire 65 in two. One semiconductor element 40H is disposed on one of the divided relay wires 65, and the other semiconductor element 40H is disposed on the other relay wire.

[0305] Slits 643 and 653 are interconnected, forming a slit extending in the Y direction. The surface metal body 62 is approximately linearly symmetrical with respect to the imaginary line CL1. Figure 33 The solid arrows indicate the source current paths of semiconductor element 40H, and the dashed arrows indicate the source current paths of semiconductor element 40L. As described above, slit 643 divides the N-wire 64 in two. Therefore, the source currents of one semiconductor element 40L and the other semiconductor element 40L do not converge on the substrate 60. Because the convergence points of the source currents are further apart, the inductance Ls of the source wiring can be increased.

[0306] Similarly, slit 653 divides relay wiring 65 in two. As a result, the source current of semiconductor element 40H and another source current do not converge on substrate 60. Because the confluence point of the source currents is further away, the inductance Ls of the source wiring can be increased. This improves the suppression effect of transient current imbalance. Figure 31 , Figure 32 and Figure 33 This is a diagram representing a variation. Figure 31 Corresponding to Figure 28 . Figure 32 Corresponding to Figure 11 . Figure 33 Corresponding to Figure 29 .

[0307] exist Figures 31-33 In the example shown, corresponding to the division of the trunk wiring 65, the arm connection portion 80 is divided into the same number as the trunk wiring 65. Each arm connection portion 80 is connected to a trunk wiring 65. Therefore, the source currents do not converge at the arm connection portion 80, allowing for a larger inductance Ls.

[0308] In the modified structure described above, a slit may also be provided on the surface metal body 52 of the substrate 50. For example... Figure 34 and Figure 35As shown, in the surface metal body 52, the relay wiring 55 has a slit 553. The slit 553 opens at an end 551a of the relay wiring 55. The end 551a is opposite to the P wiring 54 in the Y direction. The slit 553 extends in the Y direction, traversing the arm connection 80 that will be divided into two, reaching the opposing region (between) of the semiconductor element 40L. The slit 553 is located near the lower end of the opposing region of the semiconductor element 40L.

[0309] By adopting such a structure, such as Figure 35 As shown, the first current path formed by a group of semiconductor elements 40H and 40L and the second current path formed by other groups of semiconductor elements 40H and 40L are substantially completely separated within the semiconductor device 20. The point where the currents converge is located outside the N terminal 91N. Therefore, the inductance Ls of the source wiring can be increased. Figure 34 and Figure 35 This is a diagram representing a variation. Figure 34 Corresponding to Figure 32 . Figure 35 Corresponding to Figure 33 Alternatively, the semiconductor device 20 may also include an N busbar connecting multiple N terminals 91N. In this case, the current converges in the N busbar. For example, the smoothing capacitor 5 may have an N busbar connecting the N terminals 91N.

[0310] This illustration shows an example of an arm connector 80 including a joint portion 81 and engagement materials 103 disposed at both ends of the joint portion 81, but is not limited thereto. Figure 36 In the example shown, a connector 81 is integrally provided with the substrate 60. The connector 81 is provided as a protrusion extending from the relay wiring 65 along the Z direction. The conductive spacer 70 is also integrally provided with the surface metal body 62 as a protrusion, similar to the connector 81.

[0311] The surface metal body 62 with protrusions can be formed, for example, by patterning an irregularly shaped metal plate through pressure processing and then bonding it to an insulating substrate 61. The surface metal body 62 with protrusions can also be formed by etching a thick Cu layer. Alternatively, it can be formed by directly bonding a metal body, which is a component independent of the substrate 60, to the surface metal body 62. Figure 36 In the structure shown, the protrusion of the relay cable 65, i.e. the connector 81, and the bonding material 103 between the front end of the connector 81 and the relay cable 55 constitute the arm connector 80. Figure 36 It corresponds to Figure 30 The image.

[0312] exist Figure 37In the example shown, a structure is created that excludes the connector 81. The bonding material 103 electrically connects the relay cables 55 and 65. The bonding material 103 constitutes the arm connector 80. Figure 37 In this configuration, the conductive spacer 70 is also excluded, and the source electrode 40S of the semiconductor element 40 is connected to the surface metal body 62 via the bonding material 101. Although not shown in the figure, it is also possible to make the arm connection portion 80 without the bonding material 103 and only having the connector portion 81. In this case, the connector portion 81 is directly bonded to the relay wiring 55, 65.

[0313] The circuit patterns of substrates 50 and 60 are not limited to the examples described above. Figure 38 The substrate 60 shown represents the... Figure 24 The circuit pattern shown uses examples of slits 643 and 653. Figure 38 In the example shown, slit 643 is disposed between adjacent semiconductor elements 40L. Slit 643 extends from between semiconductor elements 40L in the Y direction toward the N terminal 91N side, i.e., the side where the source current flows. Slit 653 is disposed between adjacent semiconductor elements 40H. Slit 653 extends from between semiconductor elements 40H in the Y direction toward the arm connection portion 80 side.

[0314] In this embodiment, the configuration of the external connection terminals 90 is not limited to the example shown. For example, the P terminal 91P may be connected to the P wiring 54 at both ends in the X direction. For example, the N terminal 91N may be connected to the N wiring 64 at both ends in the X direction. In this case, the N terminal 91N may also be connected to the extension section 641. Alternatively, the extension section 641 may be excluded from the N wiring 64 and connected to the base 640. For example, the output terminal 92 may also be connected to the relay wiring 55 at both ends in the X direction.

[0315] The structure described in this embodiment can be combined with any of the structures described in the first embodiment and its variations.

[0316] (Third Implementation)

[0317] This embodiment is a variation based on a prior embodiment, and the description of the prior embodiment can be referenced. In order to effectively dissipate heat from the semiconductor element, as described in this embodiment, the thickness above and below the semiconductor element can satisfy a predetermined relationship.

[0318] <Warping at High Temperatures>

[0319] Specialized research has clarified that even when using resin-based insulating substrates 51 and 61, and adding fillers to make the coefficient of linear expansion close to that of metal bodies 52, 53, 62, and 63, it is still possible to achieve the same results. Figure 39As shown, warping may occur in semiconductor device 20. Figure 39 This shows the state of the semiconductor device 20 when the semiconductor element 40 is operating, i.e., at high temperature. The dashed line in the figure is a reference line indicating the direction of warping.

[0320] Figure 39 The structure shown is similar to the prior embodiment (see reference). Figure 5 The structure described in ) is the same. Figure 39 For simplicity, the external connection terminal 90 is omitted in the illustration. Figure 39 In this configuration, the heat exchange section 121 of the semiconductor device 20 and the cooler 120 are arranged in the Z direction, which is a predetermined direction. The heat exchange section 121 is arranged on both sides of the semiconductor device 20 in the Z direction, sandwiching the semiconductor device. A thermally conductive component 130, such as silicone gel, is disposed between each heat exchange section 121 and the semiconductor device 20. The cooler 120 cools the semiconductor device 20 by circulating a refrigerant within the flow path of the heat exchange section 121. As the refrigerant flowing in the flow path, phase change refrigerants such as water and ammonia, or non-phase change refrigerants such as ethylene glycol, can be used. The thermally conductive component 130 is sometimes referred to as a thermal interface material (TIM). The thermally conductive component 130 follows the opposing surfaces of the heat exchange section 121 and the semiconductor device 20, filling the gap between the opposing surfaces.

[0321] As described above, in semiconductor element 40, the drain electrode 40D on the high-potential side has a larger electrode area than the source electrode 40S on the low-potential side. Furthermore, a conductive spacer 70 exists between the source electrode 40S and the substrate 60, but no conductive spacer 70 exists between the drain electrode 40D and the substrate 50. That is, the thermal resistance of the heat conduction path from semiconductor element 40 to substrate 50 is smaller than that of the heat conduction path from semiconductor element 40 to substrate 60. In semiconductor device 20 with such a structure, effective heat dissipation to the substrate 50 side is required.

[0322] In such Figure 39 When warping occurs, with substrate 50 concave and substrate 60 convex, as shown, the distance between the exposed back surface 50b of substrate 50 and the heat exchange section 121 increases, and the heat-conducting member 130 between them becomes thicker. Consequently, the thermal resistance between substrate 50 and heat exchange section 121 increases, making heat conduction (heat exchange) between semiconductor device 20 and cooler 120 (heat exchange section 121) difficult. In order to effectively dissipate heat from semiconductor element 40, i.e., to efficiently cool semiconductor device 20, Figure 39 The warping shown is undesirable. Figure 39The example shown illustrates a two-sided cooling structure in which coolers 120 (heat exchange units 121) are arranged on both sides of the semiconductor device 20. However, the same issue exists with a single-sided cooling structure in which coolers 120 are arranged only on the substrate 50 side in the Z direction.

[0323] <Structure of Semiconductor Devices>

[0324] Through specialized research, it has been determined that in the semiconductor device 20, the warpage of the semiconductor device 20 can be controlled based on the relationship between the thickness of the portion of the semiconductor element 40 on the substrate 50 side and the thickness of the portion on the substrate 60 side. The semiconductor device 20 of this embodiment has a structure based on this understanding. Figure 40 This is a cross-sectional view showing the semiconductor device 20 according to this embodiment. Figure 40 The symbol represents the ideal state in which there is no warping in the semiconductor device 20.

[0325] The semiconductor device 20 of this embodiment has a structure similar to that described in the prior embodiment (see reference). Figures 2 to 13 The same structure. Figure 40 In, with Figure 39 Similarly, the heat exchange section 121 and the heat conduction component 130 of the cooler 120 are shown together with the semiconductor device 20. That is, Figure 40 This describes a semiconductor module 140 comprising a semiconductor device 20, a cooler 120, and a heat-conducting component 130. As an example, the semiconductor module 140 has a two-sided cooling structure in which a pair of heat exchange sections 121 sandwich the semiconductor device 20. The semiconductor device 20 is arranged with the cooler 120 (heat exchange section 121) in the Z direction, which is a predetermined direction. The cooler 120 is disposed on both sides of the semiconductor device 20.

[0326] The back metal bodies 53 and 63 are exposed from the encapsulating solid 30 as the back surfaces 50b and 60b of the substrates 50 and 60. One heat exchange section 121 of the cooler 120 is disposed opposite to one side 30a and the back surface 50b of the encapsulating solid 30, and the other heat exchange section 121 is disposed opposite to the back surfaces 30b and 60b of the encapsulating solid 30. Thermally conductive members 130 are disposed between the opposing surfaces of the semiconductor device 20 and the heat exchange section 121. The thermally conductive members 130 are in close contact with the semiconductor device 20 and the heat exchange section 121.

[0327] The semiconductor device 20 is configured such that the thickness T1 of the semiconductor element 40 on the side closer to the substrate 50 and the thickness T2 of the semiconductor element 40 on the side closer to the substrate 60 satisfy the relationship T1 ≥ T2. Other structures are the same as in the prior embodiment (see [reference]). Figure 5The structure described herein is the same. Thickness T2 is the total thickness of the bonding material 101, conductive spacer 70, bonding material 102, and substrate 60. Thickness T1 is the total thickness of the bonding material 100 and substrate 50. To satisfy the relationship T1≥T2, substrate 50 is thicker than substrate 60. Substrate 50 is thicker than conductive spacer 70. In substrate 50, metal bodies 52 and 53 are thicker than insulating substrate 51. In substrate 60, metal bodies 62 and 63 are thicker than insulating substrate 61. The structure of parts other than the thickness relationship is the same as the structure described in the first embodiment.

[0328] <Simulation Results>

[0329] Figures 41-43 This represents the results of the thermal stress simulation. Figure 41 express Figure 40 The state of the semiconductor device 20 at room temperature (RT). Figure 42 express Figure 40 The semiconductor device 20 shown is in its high-temperature state. High temperature refers to the state when the semiconductor element 40 heats up due to the application of electricity, i.e., when the semiconductor element 40 is activated. For example... Figure 41 and Figure 42 As shown, warping occurs in the semiconductor device 20 at high temperatures. In this embodiment, since the relationship T1≥T2 is satisfied as described above, therefore... Figure 42 As shown by the dashed arrow, the expansion on the substrate 50 side is greater than that on the substrate 60 side. This is because Cu, which constitutes the metal bodies 52, 53, 62, and 63, has the largest coefficient of linear expansion, and the substrate 50 is thicker. As a result, convex warping occurs on the substrate 50 side, which is the first substrate, and concave warping occurs on the substrate 60 side, which is the second substrate. Figure 42 The single-dot dashed line in the diagram is a reference line indicating the direction of warping.

[0330] Figure 43 This represents the relationship between the thickness ratio T1:T2 and the warping at high temperatures. In this simulation, the semiconductor element 40, conductive spacer 70, and bonding materials 100, 101, and 102 are set to be identical (common). The thicknesses of substrates 50 and 60 are adjusted to make the thickness ratio T1:T2 a specified value. The material composition is set to be identical (common). Figure 43 The vertical axis shown represents the warpage amount, in arbitrary units (au). Warpage amounts above 0 (zero) indicate warpage that bulges towards substrate 50 and is concave towards substrate 60, while warpage amounts below 0 (zero) indicate warpage that is concave towards substrate 50 and bulges towards substrate 60. T1:T2 is set to four levels: 1:2, 1:1.3, 1:1, and 1.5:1.

[0331] like Figure 43As shown, when T1:T2=1:2, warping that is concave toward the substrate 50 side and convex toward the substrate 60 side occurs, and the amount of warping convex toward the substrate 60 side is the largest among the four levels. When T1:T2=1:1.3, warping that is concave toward the substrate 50 side and convex toward the substrate 60 side occurs, and the amount of warping convex toward the substrate 60 side is smaller than that when T1:T2=1:2. When T1:T2=1:1, the warping changes to be convex toward the substrate 50 side and concave toward the substrate 60 side. When T1:T2=1.5:1, warping that is convex toward the substrate 50 side and concave toward the substrate 60 side occurs, and the amount of warping convex toward the substrate 50 side is the largest among the four levels.

[0332] Thus, it is clarified that when T1<T2, warping that is concave toward the substrate 50 side and convex toward the substrate 60 side occurs, and when T1≥T2, warping that is convex toward the substrate 50 side and concave toward the substrate 60 side occurs. That is, it is clarified that by satisfying the relationship of T1≥T2, the warping that occurs at high temperatures can be controlled to be warping that is convex toward the substrate 50 side and concave toward the substrate 60 side. In addition, it is clarified that the larger T2 is relative to T1, the larger the amount of warping convex toward the substrate 60 side, and the larger T1 is relative to T2, the larger the amount of warping convex toward the substrate 50 side.

[0333] <Summary of Third Embodiment>

[0334] In the present embodiment, the semiconductor device 20 satisfies the above-described relationship that the thickness T1 is greater than or equal to the thickness T2. The thickness T1 on the side where no conductive spacer 70 is present between the semiconductor element 40 and the substrate 50 is equal to or greater than the thickness T2 on the side where the conductive spacer 70 is present between the semiconductor element 40 and the substrate 60. As a result, when the semiconductor element 40 operates (at high temperature), warping that is convex toward the substrate 50 side and concave toward the substrate 60 side occurs in the semiconductor device 20. Accordingly, compared with a structure that satisfies the relationship of thickness T1 < thickness T2, the facing distance between the semiconductor device 20 on the substrate 50 side, which has a high contribution rate to heat dissipation performance, and the cooler 120 (heat exchange portion 121) can be reduced. Since the facing distance is reduced, the thermal resistance between the semiconductor device 20 and the cooler 120 is decreased. As a result, the heat generated by the semiconductor element 40 can be efficiently dissipated to the outside of the semiconductor device 20. In other words, the cooling efficiency of the semiconductor device 20 can be improved.

[0335] Specifically, compared with a structure that satisfies the relationship of thickness T1 < thickness T2, the thickness of the thermally conductive member 130 interposed between the semiconductor device 20 and the cooler 120 is reduced. As a result, the thermal resistance between the semiconductor device 20 and the cooler 120 is decreased, and heat exchange is facilitated between the semiconductor device 20 and the cooler 120. As a result, the heat generated by the semiconductor element 40 can be efficiently dissipated to the outside of the semiconductor device 20.

[0336] In this embodiment, the back metal body 53 is exposed from the sealing solid 30. Compared to a structure where the back metal body 53 is covered by the sealing solid 30, heat dissipation is improved. Similarly, the back metal body 63 is exposed from the sealing solid 30. Compared to a structure where the back metal body 63 is covered by the sealing solid 30, heat dissipation is improved.

[0337] <Variation Example>

[0338] This illustrates an example of a two-sided heat dissipation structure, but is not limited to it. The semiconductor device 20 aims to efficiently dissipate heat primarily from the substrate 50 side. Therefore, it is possible that the cooler 120 (heat exchange section 121) is disposed only on the substrate 50 side in the Z direction for the semiconductor device 20. In such a one-sided heat dissipation structure, the warping towards the substrate 50 side occurs at high temperatures by satisfying the relationship T1≥T2. This reduces the thermal resistance between the semiconductor device 20 and the cooler 120. Consequently, the heat generated by the semiconductor element 40 can be efficiently dissipated.

[0339] This example shows both the back metal bodies 53 and 63 exposed from the sealing solid 30, but it is not limited to this. For example, it is also possible to make a structure in which only the back metal body 53 is exposed.

[0340] This illustration shows an example of a semiconductor device 20 having a semiconductor element 40H constituting the upper arm 9H and a semiconductor element 40L constituting the lower arm 9L, but it is not limited to this. It may also have only one semiconductor element 40 constituting one arm. For example, the semiconductor device 20 may have only one semiconductor element 40. The semiconductor device 20 may include the semiconductor element 40, a pair of substrates 50 and 60 disposed sandwiching the semiconductor element 40, and a conductive spacer 70 between the semiconductor element 40 and the substrates 60.

[0341] In the substrate 50, the thickness relationship between the metal bodies 52 and 53 is not specifically mentioned. For example, it can be as follows: Figure 44 As shown, the surface metal body 52 is thicker than the back metal body 53. The first main electrode, i.e., the drain electrode 40D, of the semiconductor element 40 is bonded to the surface metal body 52. ​​The thermal resistance between the surface metal body 52 and the semiconductor element 40 is small. By making the surface metal body 52, which is closer to the semiconductor element 40, thicker, the heat generated by the semiconductor element 40 can be effectively diffused. That is, the heat of the semiconductor element 40 can be dissipated efficiently. Figure 44 This is a sectional view representing a variation. Figure 44 Corresponding to Figure 41 .

[0342] like Figure 44As shown, the surface metal body 62 can be thicker than the back metal body 63. By making the surface metal body 62, which is closer to the semiconductor element 40, thicker, the heat generated by the semiconductor element 40 can be effectively diffused.

[0343] As described above, the heat from the semiconductor element 40, which has main electrodes on both sides, is primarily conducted to the substrate 50 side, which has lower thermal resistance. Therefore, as... Figure 45 As shown, the surface metal body 62 can also be thinner than the back metal body 63. This allows for a thinner substrate 60, thereby miniaturizing the semiconductor device 20. Since a thicker metal body is not required, costs can also be reduced. Figure 45 This is a sectional view representing a variation. Figure 45 Corresponding to Figure 44 .exist Figure 45 In this configuration, the surface metal body 52 is thicker than the back metal body 53, and the surface metal body 62 is thinner than the back metal body 63. This allows for efficient heat dissipation of the semiconductor device 40 while simultaneously achieving miniaturization and cost reduction.

[0344] The structure described in this embodiment can be combined with any of the structures described in the first embodiment, the second embodiment, and the variations.

[0345] (Fourth implementation)

[0346] This embodiment is a variation based on a prior embodiment, and the description of the prior embodiment can be referenced. In order to improve connection reliability, as described in this embodiment, the substrate and the signal terminals can be positioned in a specified manner.

[0347] Semiconductor Devices

[0348] First, based on Figure 46 and Figure 47 The semiconductor device 20 of this embodiment will be described. Figure 46 In this embodiment, the semiconductor device 20 is shown around the signal terminal 93. Figure 46 In order to show the positional relationship between the substrate 50 and the signal terminal 93, some elements of the semiconductor device 20 are omitted in the illustration. Figure 47 It is along Figure 46 A cross-sectional view of the XLVII-XLVII line. In Figure 46 and Figure 47 As an example, the signal terminal 93L on the lower arm 9L side will be described.

[0349] The semiconductor device 20 of this embodiment has a structure similar to that described in the prior embodiment (see reference). Figures 2 to 13 The same structure. For example... Figure 46As shown, the semiconductor device 20 includes two semiconductor elements 40L. Each semiconductor element 40L has a drain electrode 40D serving as a first main electrode on one side, and a source electrode 40S serving as a second main electrode and a signal pad 40P on its back side. The semiconductor device 20 includes four signal terminals 93L. Each signal terminal 93L extends in the Y direction, protruding outward from the side 30d of the encapsulating solid 30. In a planar view in the Z direction, the four signal terminals 93L are arranged along the X direction between the output terminals 92.

[0350] <Signal Terminal Shape and Configuration>

[0351] Next, based on Figure 46 and Figure 47 The shape and configuration of signal terminal 93 are described.

[0352] like Figure 46 As shown, each signal terminal 93L has an overlapping portion 930 that overlaps with the substrate 50 in planar view and a non-overlapping portion 931 that does not overlap with the substrate 50. The overlapping portion 930 is opposite to the substrate 50 in the Z direction.

[0353] The overlapping portion 930 is the portion of the signal terminal 93L within a defined range from the end of the semiconductor element 40L. The non-overlapping portion 931 is the portion other than the overlapping portion 930. The overlapping portion 930 overlaps with the insulating substrate 51 in the substrate 50 that is electrically connected to the drain electrode 40D. The entire area of ​​the overlapping portion 930 overlaps with the insulating substrate 51. The overlapping portion 930 overlaps with the exposed portion 510 of the insulating substrate 51 that is exposed from the surface metal body 52. ​​In this way, the signal terminal 93L extends and is disposed on the substrate 50. That is, the signal terminal 93L is inserted and disposed at a position that overlaps with the substrate 50 in planar view.

[0354] Two of the four signal terminals 93L have overlapping portions 930, each with a main portion 930a and a protrusion 930b. The other two signal terminals 93L do not have protrusions 930b. The main portion 930a extends in the primary extending direction of the signal terminal 93L, i.e., the Y direction. The protrusion 930b is connected to the main portion 930a and protrudes from it. The protrusion 930b extends in a direction different from that of the main portion 930a. Sometimes the protrusion 930b is referred to as a branch. The planar shape of the main portion 930a can be approximately L-shaped, approximately Y-shaped, approximately T-shaped, or various other shapes. Figure 46 In the example shown, one of the signal terminals 93L has a planar shape that is approximately L-shaped, and the other of the signal terminals 93L has a planar shape that is approximately T-shaped.

[0355] As in the prior implementation method (see Figure 11As described in the previous embodiment, the relay wiring 55 of the surface metal body 52 has a notch 550. The overlapping portion 930 of the signal terminal 93L overlaps with the portion of the insulating substrate 51 exposed from the notch 550. The four signal terminals 93L are arranged in the X direction between the output terminals 92 in plan view. Each signal terminal 93L has a tie rod mark 93a. The tie rod mark 93a is as described in the previous embodiment (see [reference]). Figure 10 This refers to the mark left on the side of the signal terminal 93L when the tie rod 94a of the lead frame 94 is cut off. Sometimes the tie rod mark 93a is referred to as a cut mark. Each signal terminal 93L has a tie rod mark 93a on both sides in the X direction. The tie rod mark 93a is provided in the non-overlapping portion 931 at the external position of the sealing solid 30.

[0356] Each signal terminal 93L, such as Figure 47 As shown, it has a joining portion 93b, a front end portion 93c, a bent portion 93d, and an extended portion 93e. The joining portion 93b is the portion that joins with the bonding wire 110, which serves as a connecting member. The joining portion 93b preferably includes a portion that is substantially parallel to the XY plane. The joining portion 93b is the portion of the signal terminal 93L closest to the surface of the insulating substrate 51 (exposed portion 510). In this embodiment, the joining portion 93b is raised relative to the surface of the insulating substrate 51. The joining portion 93b does not contact the insulating substrate 51, and the sealing solid 30 enters into the gap between the lower surface of the joining portion 93b and the surface of the insulating substrate 51 to fill the gap. The bonding wire 110 electrically connects the pad 40P, which is formed on the same surface as the source electrode 40S, and the signal terminal 93L.

[0357] The front end portion 93c is the portion closer to the front end of the junction portion 93b, i.e., closer to the semiconductor element 40 (40L). The front end portion 93c is positioned higher than the junction portion 93b, i.e., farther from the surface of the insulating substrate 51 in the Z direction. The further away from the junction portion 93b the front end portion 93c rises upwards. The front end portion 93c has an R-shape (curved shape) in the ZY cross section. The bent portion 93d is provided between the junction portion 93b and the extended portion 93e, which is the portion further from the rear end of the junction portion 93b. The bent portion 93d is bent so that the extended portion 93e is positioned higher than the junction portion 93b, i.e., farther from the surface of the insulating substrate 51. Through the bending process, the bent portion 93d has a smaller cross-sectional area, i.e., is thinner, compared to other portions of the signal terminal 93, specifically the junction portion 93b, the front end portion 93c, and the extended portion 93e. The extended portion 93e is the portion further from the rear end of the junction portion 93b. The extension section 93e extends in the Y direction and is configured to span the inside and outside of the solid enclosure 30.

[0358] At least a portion of the joint 93b, the front end 93c, and the bent portion 93d are included in the overlapping portion 930 described above. At least a portion of the extended portion 93e is included in the non-overlapping portion 931. In this embodiment, the entire area of ​​the extended portion 93e is included in the non-overlapping portion 931. Each signal terminal 93L is formed by stamping. In the signal terminal 93L, the surface opposite to the insulating substrate 51 is a pressure R-surface 93f, and the back surface of the opposite surface is a burr surface 93g formed by punching. The structure other than the above is the same as the structure described in the first embodiment.

[0359] <Methods for connecting bonding wires>

[0360] Next, based on Figure 48 The connection method between the signal terminal 93 and the bonding wire 110 constructed above will be described. Figure 48 This is a diagram illustrating wire bonding. Figure 48 The reference numeral 111 shows a clamp for pressing the signal terminal 93L. Reference numeral 112 is a tool for ultrasonic bonding. Tool 112 is sometimes referred to as an ultrasonic bonding device. Figure 48 The single-dot dashed line shown indicates the position of the signal terminal 93L, which has been bent by the clamp 111.

[0361] like Figure 48 As shown, firstly, positioning is performed so that the overlapping portion 930 of the signal terminal 93L overlaps with the insulating substrate 51, and it is positioned at the portion where the wire 110a is joined. Next, pressure is applied in the Z direction using the clamp 111 to elastically deform the signal terminal 93L, so that the overlapping portion 930 contacts the surface of the insulating substrate 51. The clamp 111 pushes the overlapping portion 930 of the signal terminal 93L or its vicinity.

[0362] Next, with the signal terminal 93L in contact with the insulating substrate 51, ultrasonic bonding is performed using the tool 112. Since the insulating substrate 51 supports the signal terminal 93L, a separate receiving clamp is not required. Once the ultrasonic bonding is complete and the tool 112 and clamp 111 are removed from the signal terminal 93L, the terminal is released from its elastic deformation state and returns to its pre-pressurized position. The signal terminal 93L is part of the lead frame 94. Because the signal terminal 93L is supported on the outer peripheral frame 94b by the tie rod 94a, it returns to its original position when the pressure is released.

[0363] The above explanation uses signal terminal 93L as an example. However, the above structure can also be applied to signal terminal 93H on the upper arm 9H side. Both signal terminals 93H and 93L may have the above structure. The structure described in the prior embodiment (see...) Figure 11In the circuit, signal terminals 93H and 93L overlap with the exposed portion of the insulating substrate 51. The P-wire 54 of the surface metal body 52 has a notch 540, and the signal terminal 93H overlaps with the surface of the insulating substrate 51 exposed from the notch 540.

[0364] <Summary of Implementation Method 4>

[0365] In this embodiment, the signal terminal 93 (93L) overlaps with the exposed portion 510 of the insulating substrate 51. However, the signal terminal 93 is not bonded to the exposed portion 510. That is, the signal terminal 93 is not fixed to the insulating substrate 51 or the substrate 50. As a result, the signal terminal 93 can absorb dimensional deviations within the tolerances of the various elements constituting the semiconductor device 20, as well as assembly deviations during the assembly of the various elements. Therefore, during the molding of the encapsulating solid 30, stress concentration at the electrical connection portion (bonding portion) between the signal terminal 93 and the semiconductor element 40 can be suppressed. As a result, a semiconductor device 20 with high connection reliability can be provided.

[0366] In this embodiment, the signal terminal 93 is inserted and positioned on the substrate 50 at a location overlapping with the substrate 50. This arrangement brings the signal terminal 93 close to the pad 40P of the semiconductor element 40 (40L) in the Y direction. Therefore, compared to a structure where the signal terminal 93 is positioned only at a location not overlapping with the substrate 50, the length of the bonding wire 110, which serves as a connecting member, can be shortened. Because the length of the bonding wire 110 can be shortened, when the encapsulating solid 30 is formed using methods such as transfer molding, wire misalignment, short circuits caused by wire misalignment, and wire breakage can be suppressed.

[0367] In this embodiment, the overlapping portion 930 of the signal terminal 93 floats above the surface of the exposed portion 510 of the insulating substrate 51. Furthermore, a sealing solid 30 exists between the lower surface of the overlapping portion 930 and the surface of the exposed portion 510. The sealing solid 30 is also present between the joint portion 93b and the exposed portion 510. Therefore, even if there is a large manufacturing deviation in the thickness direction, the deviation can be absorbed. In addition, since the signal terminal 93 is located above the insulating substrate 51, it is easy to ensure an insulating distance from the back metal body 53.

[0368] In this embodiment, the surface metal body 52 has a notch 550 (540). The notch 550 opens at its end in the Y direction, which is orthogonal to the Z direction. Furthermore, the overlapping portion 930 of the signal terminal 93 overlaps with the surface of the exposed portion 510 exposed from the notch 550. Thus, by providing the notch 550 in the surface metal body 52 of the substrate 50, it is possible to ensure the insulating distance between the surface metal body 52 and the signal terminal 93 while suppressing the increase in the volume of the substrate 50.

[0369] In this embodiment, the non-overlapping portion 931 of the signal terminal 93 has a tie rod mark 93a. As described above, the signal terminal 93L is part of the lead frame 94 and is supported on the outer peripheral frame 94b by the tie rod 94a. Therefore, by applying pressure, the signal terminal 93 is bent to contact the exposed portion 510 of the insulating substrate 51, and in this contact state, the bonding wire 110 can be bonded by ultrasonic bonding. Furthermore, by releasing the pressure after bonding, it returns to its original position.

[0370] In this embodiment, the signal terminal 93 has a bent portion 93d between the joint portion 93b and the extended portion 93e. Due to the bent portion 93d, the extended portion 93e is positioned in the Z-direction at a location farther from the exposed portion 510 (insulating substrate 51) than the joint portion 93b. By having the bent portion 93d, the insulation distance between the signal terminal 93 and the back metal body 53 can be ensured while suppressing volume increase in the Z-direction.

[0371] In this embodiment, the signal terminal 93 has a front end portion 93c. The front end portion 93c is farther from the exposed portion 510 (insulating substrate 51) in the Z direction than the joint portion 93b. Therefore, during the above-described bonding process (such as ultrasonic bonding), damage to the insulating substrate 51 caused by the front end of the signal terminal 93 can be suppressed. That is, a decrease in insulation performance can be suppressed. In particular, in this embodiment, since the front end portion 93c rises upwards the further away from the joint portion 93b, it is more difficult for the front end portion 93c to come into contact with the insulating substrate 51. Furthermore, since the front end portion 93c has an R-shape in the ZY section, damage to the insulating substrate 51 can be suppressed even if contact occurs.

[0372] When the opposing surface is a burred surface 93g, it may damage the insulating substrate 51 and reduce its insulation performance. In this embodiment, the signal terminal 93 is configured such that the side opposite to the exposed portion 510 is a pressure R-surface 93f, and the back side of the opposing surface is a burred surface 93g. As a result, the reduction in the insulation performance of the insulating substrate 51 can be suppressed.

[0373] <Variation Example>

[0374] The non-contact structure between signal terminal 93 and exposed portion 510 is not limited to the examples described above. For example, in... Figure 49 In this configuration, the overlapping portion 930 of the signal terminal 93 has a slight height gap between it and the surface of the exposed portion 510, preventing the sealing solid from penetrating, and floats on the insulating substrate 51. The sealing solid 30 has a gap 31 between the lower surface of the overlapping portion 930 and the surface of the exposed portion 510. The signal terminal 93 is not fixed to the insulating substrate 51 (exposed portion 510). Therefore, it can function as a... Figure 47 The structure shown has the same effect. Figure 49This is a sectional view representing a modified example, corresponding to... Figure 47 .

[0375] exist Figure 50 In this configuration, the overlapping portion 930 of the signal terminal 93 contacts the surface of the exposed portion 510. Although the signal terminal 93 contacts the insulating substrate 51 (exposed portion 510), it is not fixed. Therefore, it can function as a connector with... Figure 47 The structure shown has the same effect. Figure 50 This is a sectional view representing a modified example, corresponding to... Figure 47 Alternatively, the lower surface of the joint 93b may be configured such that a portion of it contacts the insulating substrate 51 while the other portion does not.

[0376] exist Figure 47 In the example shown, the substrate 60 is configured so that it does not overlap with the signal terminal 93 when viewed in planar view. That is, the substrate 60 is not positioned above the signal terminal 93. By adopting this configuration, the size of the substrate 60 can be reduced. Furthermore, it is easy to ensure the insulating distance between the surface metal body 62 and the signal terminal 93. However, the positional relationship between the signal terminal 93 and the substrate 60 is not limited to... Figure 47 The example shown. For example, as shown... Figure 51 As shown, the overlapping portion 930 of the signal terminal 93 also overlaps with the substrate 60. The surface metal 62 of the substrate 60 overlaps with the overlapping portion 930 and the exposed portion 510 of the insulating substrate 51 in planar view. This improves heat dissipation. Figure 51 This is a sectional view representing a modified example, corresponding to... Figure 47 .

[0377] exist Figure 52 In, relative to Figure 51 The surface metal body 62 is patterned so that it does not overlap with the overlapping portion 930 of the signal terminal 93. The insulating substrate 61 and the back metal body 63 are located above the overlapping portion 930. Therefore, by making the surface metal body 62 smaller, it is easy to ensure the insulation distance between the surface metal body 62 and the signal terminal 93. Because the back metal body 63 is larger, heat dissipation is improved. Figure 52 This is a sectional view representing a modified example, corresponding to... Figure 47 .

[0378] This illustrates an example where the length of the bonding wire 110 (connecting member) can be shortened by inserting the signal terminal 93 onto the substrate 50. Alternatively, it can be achieved by using... Figures 53-55 The relay substrate 150 shown makes the bonding wire 110 shorter. Figure 53 It is a plan view representing a variant example, corresponding to Figure 46 .exist Figure 53In order to show the positional relationship between the substrate 50, the signal terminal 93 and the relay substrate 150, some elements of the semiconductor device 20 are omitted in the illustration. Figure 54 This is a cross-sectional view showing the relay substrate. Figure 55 It is along Figure 53 A cross-sectional view of the LV-LV line. Here, as an example, the trunk wiring 55 and signal terminal 93L are shown, but the same structure can also be used for the P wiring 54 and signal terminal 93H.

[0379] The semiconductor device 20 also includes a relay substrate 150. For example... Figure 53 and Figure 55 As shown, the relay substrate 150 is disposed on the surface metal body 52 (relay wiring 55) of the substrate 50. Figure 54 As shown, the relay substrate 150 has an insulating substrate 151 and a conductor portion 152 disposed on the insulating substrate 151. A portion of the conductor portion 152 provides wiring functionality. The relay substrate 150 is sometimes referred to as a printed circuit board or a wiring substrate.

[0380] The conductor portion 152 has soldering areas 152a and 152b. Soldering areas 152a and 152b are exposed on one side of the relay substrate 150. Specifically, they are exposed from a solder mask portion 153 provided on one side 151a of the insulating substrate 151. Soldering area 152a is electrically connected to pad 40P via bonding wire 110. Signal terminal 93 overlaps with substrate 50 in a plan view. Signal terminal 93 is connected to soldering area 152b.

[0381] The conductor portion 152 has wiring 152c and via conductor 152d, excluding solder areas 152a and 152b. At least a portion of the wiring 152c is an inner layer wiring disposed inside the insulating substrate 151. Solder areas 152a and 152b are electrically connected via wiring 152c and via conductor 152d. A plurality of solder areas 152a include two solder areas 152a respectively connected to pads 40P for the gate electrodes of two semiconductor elements 40. The two solder areas 152a for the gate electrodes are electrically connected to one solder area 152b for the gate electrode via wiring 152c and via conductor 152d.

[0382] In this way, by using the relay substrate 150, the connection target (soldering area 152a) of the bonding wire 110 can be brought closer to the pad 40P. This allows for a shorter length of the bonding wire 110 that electrically connects the pad 40P to the signal terminal 93. Furthermore, the wiring 152c can be freely wound within the relay substrate 150. Therefore, in a structure where semiconductor elements 40 are connected in parallel, crossing of the bonding wires 110 can be avoided. Consequently, contact between wires during the forming of the encapsulation solid 30 can be suppressed. Furthermore, through the micro-wiring technology of the printed circuit board, it is possible to achieve… Figure 47 The structure shown represents a similar degree of miniaturization.

[0383] The conductor portion 152 also has a fixing soldering area 152e. The fixing soldering area 152e is a soldering area used to fix the relay substrate 150 to the substrate 50. The fixing soldering area 152e does not provide electrical connection function, i.e., wiring function. The fixing soldering area 152e is disposed on the back side 151b of the insulating substrate 151. The fixing soldering area 152e (relay substrate 150) is bonded to the surface metal body 52 via a bonding material 154. Solder can be used as the bonding material 154, for example.

[0384] Thus, since the relay substrate 150 is fixed to the surface metal body 52, wire bonding can be performed stably. Solder containing Ni balls can also be used as the bonding material 154. In this case, the thickness of the bonding material 154 can be controlled by the Ni balls. Furthermore, tilting of the relay substrate 150 can be suppressed.

[0385] The wiring function provided by the conductor portion 152 is electrically separated from the surface metal body 52 by the insulating substrate 151. For example, the insulating substrate 151 may have a non-distribution region 151c in the Z direction where the conductor portion 152 is not disposed and a distribution region 151d where the conductor portion 152 is disposed. In the Z direction, the non-distribution region 151c is provided in the center of the insulating substrate 151, and the distribution regions 151d are provided on the surface layers on both sides. The non-distribution region 151c is sometimes referred to as the core layer. In this way, the insulating substrate 151 has the non-distribution region 151c, thereby enabling the conductor portion 152, which provides the wiring function and is disposed on one side 151a, to be electrically separated from the fixing solder area 152e and the surface metal body 52.

[0386] The adhesion between the solder resist 153 and the sealant 30 is low. Furthermore, peeling of the sealant 30 caused by thermal stress begins at the outer peripheral end of the relay substrate 150. For example, the insulating substrate 151 may have an exposed portion 151e that protrudes from the solder resist 153. The exposed portion 151e is provided at the outer peripheral edge of one side 151a of the insulating substrate 151. The insulating substrate 151 has a higher adhesion to the sealant 30 compared to the solder resist 153. In the exposed portion 151e, the sealant 30 is tightly adhered to the relay substrate 150. Therefore, peeling of the sealant 30 relative to the relay substrate 150 can be suppressed. Since the sealant 30 is tightly adhered at the outer peripheral edge, the conductor portions 152, such as the solder areas 152a and 152b, exposed from the solder resist 153 can be protected.

[0387] like Figure 55As shown, the signal terminal 93 (93L) has a first extension portion 93h, a second extension portion 93i, and a bent portion 93j. The first extension portion 93h and the second extension portion 93i extend in the Y direction. The first extension portion 93h is disposed inside the sealing solid 30. The second extension portion 93i is disposed across the inside and outside of the sealing solid 30. The bent portion 93j is disposed between the first extension portion 93h and the second extension portion 93i. The first extension portion 93h is the portion further forward than the bent portion 93j, and the second extension portion 93i is the portion further backward than the bent portion 93j.

[0388] The signal terminal 93 may have a protrusion 93k. The protrusion 93k is provided near the front end of the signal terminal 93. The protrusion 93k protrudes from the first extension portion 93h toward the soldering area 152b in the Z direction. The protrusion 93k engages with the soldering area 152b. In the signal terminal 93, the front end of the first extension portion 93h and the protrusion 93k overlap with the soldering area 152b when viewed in a plane in the Z direction. The portion of the first extension portion 93h connected to the protrusion 93k is a thick-walled portion, while the other portions of the signal terminal 93 are thin-walled portions. By providing the protrusion 93k in this way, the signal terminal 93 (the first extension portion 93h) is farther from the surface metal body 52, thus easily ensuring an insulation distance between it and the surface metal body 52.

[0389] Figure 56 Indicates and Figure 54 Different examples. Figure 56 Corresponding to Figure 54 .exist Figure 56 In this configuration, the relay substrate 150 is fixed to the exposed portion 510 of the insulating substrate 51. In this case, the insulation distance between the signal terminal 93 and the back metal body 53 can be ensured based on the thickness of the bonding material 154 and the relay substrate 150. If the aforementioned solder containing Ni balls is used as the bonding material 154, the specified thickness can be ensured, thus easily ensuring the insulation distance. Furthermore, tilting of the relay substrate 150 can be suppressed.

[0390] Surface metal body 52 (relay wiring 55) for example through, as Figure 46 The surface metal body 52 has a notch 550 as shown, thus exposing the insulating substrate 51. For example, the surface metal body 52 may also have a chamfer 554. The chamfer 554 is provided at least on the surface where the imaginary straight line connecting the semiconductor element 40 and the relay substrate 150 intersects, within the end face of the notch 550. The chamfer 554 is provided at the upper end of the end face. This ensures an insulating distance between the bonding wire 110 and the surface metal body 52.

[0391] This example illustrates a semiconductor device 20 having a substrate 60 electrically connected to the source electrode 40S. Specifically, it illustrates an example of a semiconductor device 20 having a two-sided heat dissipation structure with a pair of substrates 50 and 60. However, it is not limited to this example. A semiconductor device 20 having only a single-sided heat dissipation structure with a substrate 50 connected to the drain electrode 40D (first main electrode) can also be used. An example is shown where both back metal bodies 53 and 63 are exposed from the sealing solid 30, but it is not limited to this.

[0392] This illustration shows an example of a semiconductor device 20 having a semiconductor element 40H constituting the upper arm 9H and a semiconductor element 40L constituting the lower arm 9L, but it is not limited to this. It may also have only one semiconductor element 40 constituting one arm. For example, the semiconductor device 20 may also have only one semiconductor element 40.

[0393] The structure described in this embodiment can be combined with any of the structures described in the first embodiment, the second embodiment, the third embodiment, and the variations.

[0394] (Fifth Embodiment)

[0395] This embodiment is a variation based on the prior embodiment, and the description of the prior embodiment can be referenced. In order to balance ensuring insulation reliability and miniaturization, as described in this embodiment, the connection between the metal component and the surface metal body via the bonding material can be made into a predetermined structure.

[0396] Semiconductor Devices

[0397] First, based on Figure 57 The semiconductor device 20 of this embodiment will be described. Figure 57 Corresponding to Figure 5 .

[0398] The semiconductor device 20 of this embodiment has a structure similar to that described in the prior embodiment (see reference). Figures 2 to 13 The same structure. For example... Figure 57As shown, the semiconductor device 20 includes semiconductor elements 40 (40H, 40L), substrates 50 and 60 that clamp the semiconductor elements 40 in the Z direction, and an encapsulating solid 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D, which serves as the main electrode of the semiconductor element 40. The surface metal body 52 is connected to the P terminal 91P and the output terminal 92, which serve as main terminals, via a bonding material 104. The surface metal body 62 of the substrate 60 is electrically connected to the source electrode 40S, which serves as the main electrode of the semiconductor element 40. The surface metal body 62 is connected to the N terminal 91N (not shown), which serves as a main terminal, via the bonding material 104. The encapsulating solid 30 encapsulates the semiconductor elements 40, the substrates 50 and 60, a portion of each of the main terminals, and the bonding material 104.

[0399] <Main terminal connection structure>

[0400] Next, based on Figures 57-60 The connection structure of the main terminals is described. Figure 58 It is Figure 57 A plan view of the periphery of the output terminal 92 as viewed from the LVIII direction. Figure 58 In order to clarify, some parts were given shadows. Figure 59 It will be Figure 57 The area represented by the single-dot dashed line in the LVIX image is magnified. Figure 60 This indicates that the bonding material 104 is from Figure 59 The diagram excludes states. Figure 59 and Figure 60 For convenience, the sealing solid 30 is omitted in the diagram.

[0401] like Figure 57 As shown, the bonding structure of the P terminal 91P, which serves as the main terminal, and the output terminal 92 with the substrate 50 is similar to the structure described in the prior embodiment (see reference). Figure 5 The connection structure of the N terminal 91N, which serves as the main terminal, is different, although not shown in the figure. Other structures are the same as those described in the prior embodiment. Hereinafter, the output terminal 92 will be described as an example. The bonding material 104 wets and diffuses onto the metal surface during bonding. As an example, the bonding material 104 is solder.

[0402] like Figure 57 As shown, substrate 50 has ends 50c and 50d in the Y direction. End 50c is the end on the side 30c side of the encapsulating solid 30, and end 50d is the end on the side 30d side. Output terminal 92 extends across end 50d of substrate 50 in the Y direction. In a planar view in the Z direction, a portion of output terminal 92 overlaps with surface metal body 52 (relay wiring 55), while another portion does not overlap. Figures 58-60As shown, the output terminal 92 has an opposing surface 920 and a receiving portion 921.

[0403] The opposing surface 920 is the portion of the lower surface of the output terminal 92 that faces the surface metal body 52 (relay wiring 55) of the substrate 50 in the Z direction. Macroscopically, the opposing surface 920 is a flat surface and ideally contacts the upper surface 52a of the surface metal body 52 with its entire surface. Microscopically, the opposing surface 920 has minute irregularities on its surface, at least a portion of which contacts the upper surface 52a. The opposing surface 920 is sometimes referred to as the metal contact surface. In planar view, the opposing surface 920 is the portion in the Y direction that overlaps with the end portion 52b of the surface metal body 52 within a defined range. The end portion 52b is the end face (side face) of the side face 30d of the sealing solid 30 in the Y direction and is connected to the upper surface 52a. The end portion 52b forms part of the end portion 50d. The planar shape of the opposing surface 920 is approximately rectangular.

[0404] The receiving portion 921 is disposed adjacent to the opposing surface 920, providing a receiving space for the bonding material 104. For example, the receiving portion 921 is a recessed portion that is recessed relative to the opposing surface 920 in a direction away from the upper surface 52a. As a recessed portion, the receiving portion 921 is a surface including a Z-direction component, having a side surface 921a connected to the opposing surface 920 and a bottom surface 921b connected to the side surface 921a. The side surface 921a is, for example, a surface that is substantially parallel to the Z-direction. The receiving portion 921 opens in the Y-direction in the side surface 922 on the front end side of the output terminal 92, i.e., the front end surface 922. The receiving portion 921 opens in the X-direction in the side surfaces 923 and 924 on both sides of the output terminal 92. The receiving portion 921 is disposed in the Y-direction within a predetermined range from the front end surface 922 of the output terminal 92. The planar shape of the receiving portion 921 is substantially rectangular. The receiving portions 921 are arranged in a row in the X-direction.

[0405] The output terminal 92 is positioned such that the opposing surface 920 contacts the surface metal body 52, and the bonding material 104 is housed within the receiving portion 921. The bonding material 104 may be disposed solely within the receiving portion 921, or it may be arranged as follows: Figure 59 As shown, a portion of the bonding material 104 is disposed outside the housing 921. Figure 59 In this configuration, the bonding material 104 forms a fillet relative to the front end face 922. The output terminal 92 is connected (bonded) to the surface metal body 52 via the bonding material 104 disposed in the receiving portion 921.

[0406] <Main terminal connection method>

[0407] The connection structure between the output terminal 92 and the surface metal body 52 is formed as follows: With the bonding material 104 (solder) disposed in the receiving portion 921, the upper portion of the opposing surface 920 of the output terminal 92 is pressed towards the substrate 50 in the Z direction to make the opposing surface 920 make strong contact with the upper surface 52a. Reflow is performed while the opposing surface 920 and the upper surface 52a are in strong contact. Therefore, during reflow, the bonding material 104 does not wet and diffuse towards the opposing surface 920, and even if it does wet and diffuse, it only penetrates into the tiny recesses of the surface of the opposing surface 920.

[0408] <Summary of Implementation Method 5>

[0409] In this embodiment, the opposing surface 920 of the output terminal 92, which is a metal component, is in contact (metal contact) with the upper surface 52a of the surface metal body 52. ​​This suppresses the overflow of the bonding material 104 from the receiving portion 921 towards the opposing surface 920. It also suppresses the wetting and diffusion of the bonding material 104 in an undesirable direction, ensuring insulation reliability. Furthermore, the output terminal 92, as a single component, has both the receiving portion 921 and the opposing surface 920. As a result, a semiconductor device 20 that balances insulation reliability and miniaturization can be provided.

[0410] In the structure including the substrate 50, if the bonding material 104 wets and diffuses to the end 52b (end face) of the surface metal body 52 and then to the insulating substrate 51, the portion with the same potential as the surface metal body 52 expands, and the distance to the back metal body 53 becomes closer. The bonding material 104 may also come into contact with the back metal body 53. In this embodiment, the opposing surface 920 is provided at a position closer to the end 50d of the substrate 50, i.e., the end 52b of the surface metal body 52, than the receiving portion 921. By arranging the opposing surface 920 on the end 52b side, it is possible to suppress the bonding material 104 from wetting and diffusing on the surface of the output terminal 92 and / or the surface metal body 52, reaching the end 52b, and then reaching the insulating substrate 51. As a result, insulation reliability can be improved without increasing the volume.

[0411] As described above, the metal component with the opposing surface and the receiving portion can also be applied to the P terminal 91P and N terminal 91N, which are other main terminals. The P terminal 91P is connected to the surface metal body 52 (P wiring 54) of the substrate 50 via the bonding material 104. Since the opposing surface of the P terminal 91P is in contact with the surface metal body 52, the overflow of the bonding material 104 from the receiving portion of the P terminal 91P to the opposing surface side can be suppressed. Figure 57 As shown, by setting the opposing surface on the end 50c side of the substrate 50, it is possible to suppress the wetting and diffusion of the bonding material 104 onto the end of the surface metal body 52 and the insulating substrate 51.

[0412] The N-terminal 91N is connected to the surface metal body 62 (N-wire 64) of the substrate 60 via the bonding material 104. Since the opposing surface of the N-terminal 91N is in contact with the surface metal body 62, overflow of the bonding material 104 from the receiving portion of the N-terminal 91N to the opposing surface side can be suppressed. Furthermore, by providing the opposing surface... Figure 57 The end 60c side of the substrate 60 shown can suppress the wetting and diffusion of the bonding material 104 onto the end of the surface metal body 62 and the insulating substrate 61. The end 60c is the end face (side face) of the side face 30c side of the sealing solid 30 in the Y direction.

[0413] <Variation Example>

[0414] The configuration of the opposing surface 920 and the housing 921 is not limited to the example described above. For example, it may also employ... Figure 61 and Figure 62 The structure shown. Figure 61 It is a plan view representing a variant example, corresponding to Figure 58 . Figure 62 From Figure 61 The diagram shows a plan view taken in the LXII direction. In this example, the housing 921 has no openings at the sides 923 and 924, but only at the front end face 922. The housing 921 has an opening 921c at the front end face 922, which is a side face.

[0415] The opposing surface 920 has a first opposing portion 920a and a second opposing portion 920b. The first opposing portion 920a is disposed on the opposite side of the receiving portion 921 from the opening 921c. In the Y-direction of the extension direction of the output terminal 92, the first opposing portion 920a is adjacent to the receiving portion 921. The second opposing portion 920b is adjacent to the receiving portion in the X-direction. Figure 61 and Figure 62 In the example shown, the opposing surface 920 has a pair of second opposing portions 920b. The pair of second opposing portions 920b sandwich the receiving portion 921 in the X direction. The planar shape of the opposing surface 920 is approximately U-shaped. Since the opposing surface 920 is arranged in three directions relative to the receiving portion 921, the overflow direction of the bonding material 104 from the receiving portion 921 can be limited to one direction on the opening 921c side. As a result, the insulation reliability can be further improved.

[0416] Alternatively, the opposing surface 920 can be configured to have only one second opposing portion 920b. In this case, the planar shape of the opposing surface 920 is approximately L-shaped. Since the opposing surface 920 is arranged in two directions relative to the receiving portion 921, it is relatively... Figure 58 This configuration limits the overflow direction of the bonding material 104 from the receiving portion 921. This, in turn, improves insulation reliability.

[0417] This illustration shows an example where the receiving portion 921 has an opening on the side of the output terminal 92, but it is not limited to this. Furthermore, the planar shape of the receiving portion 921 is not limited to a generally rectangular shape. For example… Figure 63 As shown, it may also have a receiving section 921 that does not have an opening on the side. Figure 63 It is a plan view representing a variant example, corresponding to Figure 58 .exist Figure 63 In the middle, the planar shape of the receiving part 921 is roughly circular. The receiving part 921 is a hole that opens on the lower surface of the output terminal 92. Figure 63 The shown receiving portion 921 is a non-through hole. Like the receiving portion 921 described above, the non-through hole receiving portion 921 has a side surface 921a and a bottom surface 921b connected to the opposing surface 920. Alternatively, a through hole opening on the upper surface of the output terminal 92 can be used. The receiving portion 921 as a through hole does not have a bottom surface 921b, but has a side surface 921a.

[0418] Metal components with opposing surfaces and receiving portions are not limited to main terminals. For example, they can also be... Figure 64 and Figure 65 As shown, in the semiconductor device 20 that constitutes the upper and lower arm circuits 9, an opposing surface and a receiving portion are provided at the connector portion 81. Figure 64 This is a sectional view representing a modified example, corresponding to... Figure 57 . Figure 65 It is Figure 64 The region indicated by the single-dotted line in the middle is an enlarged LXV image. Figure 65 For convenience, the sealing solid 30 is omitted in the illustration.

[0419] As described in the prior embodiment, the semiconductor device 20 includes a semiconductor element 40H constituting the upper arm 9H as a first semiconductor element and a semiconductor element 40L constituting the lower arm 9L as a second semiconductor element. A connector 81 electrically connects the source electrode 40S of the semiconductor element 40H to the drain electrode 40D of the semiconductor element 40L. The connector 81 is a metal column extending in the Z direction. The end 81a of the connector 81 is connected to the first wiring, i.e., the relay wiring 55, of the substrate 50 via a bonding material 103. The end 81b, opposite to the end 81a, is connected to the third wiring, i.e., the relay wiring 65, of the substrate 60 via the bonding material 103. The surface metal body 52 has a second wiring, i.e., a P-wiring 54, disposed at a predetermined interval between itself and the relay wiring 55. The surface metal body 62 has a fourth wiring, i.e., an N-wiring 64, disposed at a predetermined interval between itself and the relay wiring 65.

[0420] exist Figure 64 and Figure 65In the example shown, each of the ends 81a and 81b of the connector 81 has a facing surface 810 and a receiving portion 811. The structure of the facing surface 810 and the receiving portion 811 is the same as that of the facing surface 920 and the receiving portion 921 described above. In end 81a, the facing surface 810 faces the upper surface 52a of the surface metal body 52 (relay wiring 55). The facing surface 810 is in contact with the upper surface 52a. The receiving portion 811 is a recessed portion relative to the facing surface 810. The receiving portion 811 has a side surface 811a connected to the facing surface 810 and a bottom surface 811b. The receiving portion 811 houses the bonding material 103.

[0421] The opposing surface 810 and the receiving portion 811 are arranged in the Y direction. The opposing surface 810 is provided on the side of the cable gap 52G that separates the trunk cable 55 and the P cable 54, that is, it is provided closer to the cable other than the trunk cable 55 connected to the connector 81, i.e., the P cable 54. The receiving portion 811 is open in the Y direction at the side 812 of the connector 81, and is not open at the side 813 opposite to the side 812. The receiving portion 811 may be open only at the side 812, or it may be open at three sides, including the two sides adjacent to the side 812.

[0422] In this way, the opposing surface 810 of the connector 81 comes into contact with the surface metal body 52 (metal contact). As a result, the overflow of the bonding material 103 from the receiving portion 811 toward the opposing surface 810 side can be suppressed. As a result, a semiconductor device 20 that can balance insulation reliability and miniaturization can be provided.

[0423] Furthermore, if the bonding material 103 wettes and diffuses into the inter-wiring gap 52G of the surface metal body 52, the portion with the same potential as the relay wiring 55 expands, and the distance to the P wiring 54 becomes closer. The bonding material 103 may also come into contact with the P wiring 54. In contrast, in the example described above, the opposing surface 810 is positioned closer to the P wiring 54, i.e., the inter-wiring gap 52G, than the receiving portion 811. This prevents the bonding material 103 from reaching the inter-wiring gap 52G. Consequently, insulation reliability can be improved without increasing the overall volume.

[0424] The structure of end 81b is the same as that of end 81a. In end 81b, the opposing surface 810 faces the upper surface 62a of the surface metal body 62 (relay cable 65). The opposing surface 810 contacts the upper surface 62a. The receiving portion 811 is a recess. The receiving portion 811 receives the bonding material 103. The opposing surface 810 and the receiving portion 811 are arranged in the Y direction. The opposing surface 810 is provided on the side of the cable gap 62G that separates the relay cable 65 and the N cable 64, that is, it is provided closer to the N cable 64, which is the cable other than the relay cable 65 connected to the connector 81. The receiving portion 811 is open at the side 813 of the connector 81 in the Y direction, but not at the side 812. The receiving portion 811 may be open only at the side 813, or it may be open at three sides, including the two sides adjacent to the side 813.

[0425] In this way, the opposing surface 810 of the connector 81 comes into contact with the surface metal body 62 (metal contact). This prevents the bonding material 103 from overflowing from the housing portion 811 towards the opposing surface 810. Therefore, a semiconductor device 20 that balances insulation reliability and miniaturization can be provided. Furthermore, the opposing surface 810 is positioned closer to the N-wire 64, i.e., the wire gap 62G, than the housing portion 811. This prevents the bonding material 103 from reaching the wire gap 62G. Therefore, insulation reliability can be improved without increasing the overall size.

[0426] In the above example, the contact between the opposing surfaces of the metal components and the surface metal body suppresses the overflow of the bonding material. The overflow suppression function can also be improved by further adding a rough oxide film formed by laser irradiation to the structure. Figure 66 and Figure 67 The text presents an example. Figure 66 Is with Figure 65 For simplicity, the sealing solid 30 is omitted from the corresponding sectional view. Figure 67 It is Figure 66 The area LXVII shown by the single-dotted line is enlarged in the diagram, which only shows the surface metal body 52.

[0427] exist Figure 66 In the example shown, corresponding to the joint portion 81, uneven oxide films 520 and 620 are respectively provided on the surface metal bodies 52 and 62. The following explanation uses the uneven oxide film 520 as an example. Figure 67As shown, the surface metal body 52 has a base material 521 and a metal film 522 and an uneven oxide film 520 disposed on the surface of the base material 521. The base material 521 forms the main part of the surface metal body 52. ​​The base material 521 is formed, for example, using a Cu-based material. The metal film 522 is formed using a material that has higher solder wettability than the base material 521. The metal film 522 is formed over the entire area of ​​the upper surface 52a. In this embodiment, the metal film 522 is formed over the entire area of ​​the surface of the base material 521. The uneven oxide film 520 is formed locally in the upper surface 52a.

[0428] The uneven oxide film 520 is locally formed on the upper surface 52a of the metal film 522 by irradiating the metal film 522 with a laser. The metal film 522 has a base film mainly composed of Ni (nickel) and an upper film mainly composed of Au (gold). In this embodiment, an electroless Ni plating film containing P (phosphorus) is used as the base film. When the bonding material 103 is solder, the upper film (Au) in the portion of the metal film 522 exposed from the uneven oxide film 520 that contacts the bonding material 103 diffuses into the solder during reflow. The upper film (Au) in the portion of the metal film 522 that forms the uneven oxide film 520 is removed by laser irradiation during the formation of the uneven oxide film 520. The uneven oxide film 520 is a film of oxide mainly composed of Ni. For example, in the composition constituting the uneven oxide film 520, 80% is Ni2O3, 10% is NiO, and 10% is Ni.

[0429] The recesses 523 on the surface of the metal film 522 are formed by irradiation with a pulsed laser. Each pulse forms one recess 523. Through laser irradiation, the surface portion of the metal film 522 melts, vaporizes, and evaporates, thereby forming a rough oxide film 520. The rough oxide film 520 is an oxide film derived from the metal film 522. The rough oxide film 520 is a film of oxide of the metal (Ni) that is the main component of the metal film 522. The rough oxide film 520 is formed by mimicking the irregularities on the surface of the metal film 522 with recesses 523. On the surface of the rough oxide film 520, irregularities are formed at a spacing finer than the width of the recesses 523. That is, very fine irregularities (roughened areas) are formed.

[0430] Such an uneven oxide film 520 can be formed through the following process. First, a pulsed laser is irradiated onto the upper surface 52a of the surface metal body 52 on which the metal film 522 is formed on the base material 521, causing the surface of the metal film 522 to melt and evaporate. The pulsed laser is adjusted to have an energy density ratio of 0 J / cm². 2 Large and above 100 J / cm 2The pulse width is below 1 μs. To meet this requirement, YAG lasers, YVO4 lasers, fiber lasers, etc., can be used. For example, in the case of a YAG laser, the energy density is 1 J / cm². 2 That's all. In the case of non-electrolytic Ni plating, for example, at 5 J / cm... 2 It can also process metal films 522 on both sides.

[0431] At this time, by moving the laser source and the surface metal body 52 relative to each other, the laser is scanned and sequentially irradiated at multiple locations. Irradiation with the laser causes the surface of the metal film 522 to melt and vaporize, thereby forming recesses 523 on the surface of the metal film 522. The average thickness of the portion of the metal film 522 irradiated with the laser is thinner than the average thickness of the portion not irradiated with the laser. Furthermore, the multiple recesses 523 formed corresponding to the laser spot are connected, for example, forming a scale-like pattern. The laser spot is the irradiation range of a pulse. For example, the laser is scanned in such a way that the laser spots of adjacent lasers in the X direction partially overlap, and the laser spots of adjacent lasers in the Y direction partially overlap.

[0432] Next, the molten metal film 522 is partially solidified. Specifically, the molten and vaporized metal film 522 is deposited onto the portion irradiated by the laser and its surrounding area. In this way, by depositing the molten and vaporized metal film 522, an uneven oxide film 520 is formed on the surface of the metal film 522.

[0433] exist Figure 66 In this case, the uneven oxide film 520 is not provided in the first region 524 of the upper surface 52a of the surface metal body 52, which overlaps with the receiving portion 811 of the connector portion 81 in plan view. The uneven oxide film 520 is selectively provided in the second region 525 that overlaps with the opposing surface 810. The structure of the surface metal body 62 and the uneven oxide film 620 is the same as that of the surface metal body 52 and the uneven oxide film 520. The uneven oxide film 620 is not provided in the first region 624 of the upper surface 62a of the surface metal body 62, which overlaps with the receiving portion 811 of the connector portion 81 in plan view. The uneven oxide film 620 is selectively provided in the second region 625 that overlaps with the opposing surface 810.

[0434] Compared to metal films, the oxide films (uneven oxide films 520, 620) have lower wettability for the bonding material 103. Because the uneven oxide films 520, 620 have fine irregularities on their surfaces, the contact area with the bonding material 103 is smaller, and a portion of the bonding material 103 becomes spherical due to surface tension. That is, the contact angle becomes larger. Therefore, the wettability for the bonding material 103 is low. Consequently, due to the reduced wettability effect of the uneven oxide films 520, 620 and the contact effect of the opposing surfaces 810, the bonding material 103 has difficulty passing between the opposing surfaces 810 and the second regions 525, 625. Therefore, the overflow of the bonding material 103 can be more effectively suppressed. In the formation of the uneven oxide films 520, 620, a laser is used as described above, so patterning is easy.

[0435] like Figure 68 As shown, the uneven oxide films 520 and 620 can also be provided in the peripheral regions 526 and 626. The peripheral region 526, in plan view, is the region surrounding the second region 525, excluding the first region 524. The peripheral region 626, in plan view, is the region surrounding the second region 625, excluding the first region 624. Even if the bonding material 103 passes directly below the opposing surface 810 of the joint portion 81, it can be stopped by the uneven oxide films 520 and 620. Furthermore, since very fine unevenness is formed on the surface of the uneven oxide films 520 and 620, the sealing solid 30 is wrapped around, creating an anchoring effect. In addition, the contact area with the sealing solid 30 is increased. Therefore, the adhesion of the surface metal bodies 52 and 62 to the sealing solid 30 can be improved.

[0436] Alternatively, the uneven oxide films 520 and 620 can be provided in the second region 525 and 625 and the peripheral region 526 and 626. Alternatively, only one of the uneven oxide films 520 and 620 can be provided. The uneven oxide films 520 and 620 can also be used for the connection with the main terminals, namely the P terminal 91P, N terminal 91N, and output terminal 92, which are metal components.

[0437] This example illustrates a semiconductor device 20 having a substrate 60 electrically connected to the source electrode 40S (second main electrode). Specifically, it illustrates an example of a semiconductor device 20 having a two-sided heat dissipation structure with a pair of substrates 50 and 60. However, it is not limited to this example. It can also be applied to a semiconductor device 20 having a single-sided heat dissipation structure with only a substrate 50 connected to the drain electrode 40D (first main electrode). In a semiconductor device 20 having a pair of substrates 50 and 60, the above structure may be applied only to the junction of one of the substrates 50 and 60 with the metal component. An example is shown where both back metal bodies 53 and 63 are exposed from the sealing solid 30, but this is not a limitation.

[0438] This illustrates an example of a semiconductor device 20 having semiconductor elements 40H and 40L, but it is not limited to this. It may also have only one semiconductor element 40 constituting one arm. For example, the semiconductor device 20 may also have only one semiconductor element 40.

[0439] The structure described in this embodiment can be combined with any of the structures described in the first embodiment, second embodiment, third embodiment, fourth embodiment, and variations.

[0440] (Sixth Embodiment)

[0441] This embodiment is a variation based on a prior embodiment, and the description of the prior embodiment can be referenced. In order to improve the reliability of the semiconductor device, as described in this embodiment, the physical properties of the encapsulating solid and the physical properties of the insulating substrate can satisfy a specified relationship.

[0442] Semiconductor Devices and Heat Dissipation Structures

[0443] based on Figure 69 The semiconductor device 20 and its heat dissipation structure of this embodiment will be described. Figure 69 This is a cross-sectional view showing the semiconductor device 20 of this embodiment. Figure 69 It is Figure 5 A magnified portion of the image. Figure 69 For convenience, the external connection terminal 90 has been omitted.

[0444] The semiconductor device 20 of this embodiment has the same structure as that described in the prior embodiment (see reference). Figures 2 to 13 The same construction. For example... Figure 69 As shown, the semiconductor device 20 includes a semiconductor element 40 (40H), substrates 50 and 60 arranged to sandwich the semiconductor element 40 in the Z direction, and an encapsulating solid 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D of the semiconductor element 40, which serves as the main electrode. The surface metal body 62 of the substrate 60 is connected to the source electrode 40S of the semiconductor element 40, which serves as the main electrode. The back metal bodies 53 and 63 are exposed from the encapsulating solid 30. The insulating substrates 51 and 61 contain resin. The encapsulating solid 30 contains resin. Although not shown, the semiconductor device 20 includes a semiconductor element 40L.

[0445] exist Figure 69 In the diagram, along with the semiconductor device 20, the heat exchange section 121 of the cooler 120 and the heat-conducting components 130 such as heat dissipation gel are shown. That is, Figure 69This illustrates a semiconductor module 140 comprising a semiconductor device 20, a cooler 120, and a heat-conducting component 130. As an example, the semiconductor module 140 has a two-sided cooling structure in which the semiconductor device 20 is sandwiched between a pair of heat exchange sections 121. The semiconductor device 20 and the cooler 120 (heat exchange section 121) are arranged in the Z direction, which is a predetermined direction. The cooler 120 is disposed on both sides of the semiconductor device 20.

[0446] The back metal bodies 53 and 63 are exposed from the encapsulating solid 30 as the back surfaces 50b and 60b of the substrates 50 and 60. One heat exchange section 121 of the cooler 120 is disposed opposite to one side 30a and the back surface 50b of the encapsulating solid 30, and the other heat exchange section 121 is disposed opposite to the back surfaces 30b and 60b of the encapsulating solid 30. Heat-conducting components 130 are disposed between the opposing surfaces of the semiconductor device 20 and the heat exchange section 121. The heat-conducting components 130 are in close contact with the semiconductor device 20 and the heat exchange section 121.

[0447] <Relationship between glass transition temperature>

[0448] Next, based on Figure 69 and Figure 70 This illustrates the relationship between the glass transition temperatures of the sealing solid 30 and the insulating substrates 51 and 61.

[0449] Figure 70 This is a figure illustrating an example of the relationship between the glass transition temperature Tgs and the coefficient of linear expansion αs of the sealing solid 30 and the glass transition temperature Tgi and the coefficient of linear expansion αi of the insulating substrates 51 and 61. Figure 70 In the diagram, the vertical axis represents the coefficient of linear expansion α, and the horizontal axis represents temperature. Figure 70 In the diagram, the solid line represents the linear expansion coefficient αs of the sealing solid 30, and the dashed line represents the linear expansion coefficient αi of the insulating substrates 51 and 61. Within the linear expansion coefficient αs, α1s represents the linear expansion coefficient at temperatures lower than the glass transition temperature Tgs, i.e., the linear expansion coefficient of the α1 region. α2s represents the linear expansion coefficient at temperatures higher than the glass transition temperature Tgs, i.e., the linear expansion coefficient of the α2 region. Similarly, for the linear expansion coefficient αi, α1i represents the linear expansion coefficient of the α1 region, and α2s represents the linear expansion coefficient of the α2 region.

[0450] like Figure 69As shown, the encapsulating solid 30 is in close contact with the semiconductor element 40. The insulating substrates 51 and 61 are thermally connected to the semiconductor element 40 via bonding materials 100, 101, and 102, and surface metal bodies 52 and 62. Therefore, when the semiconductor element 40 operates (heats up), the temperature of the peripheral position MP1 of the semiconductor element 40 in the encapsulating solid 30 is higher than the temperature of the positions MP2 and MP3 in the insulating substrates 51 and 61 that overlap with the semiconductor element 40. Thus, the encapsulating solid 30 is hotter than the insulating substrates 51 and 61.

[0451] When the temperature of the sealing solid 30 exceeds the glass transition temperature Tgs, the Young's modulus decreases, and the sealing performance of the sealing solid 30 declines. Due to this decline in sealing performance, thermal stress may concentrate at the drain electrode 40D, the source electrode 40S, and their junction, potentially leading to cracks. In other words, connection reliability may decrease. In contrast, in this embodiment, as... Figure 70 As shown, the relationship Tgs > Tgi is satisfied.

[0452] <Relationship of linear expansion coefficients>

[0453] Next, based on Figures 70-72 This illustrates the relationship between the coefficients of linear expansion of the sealing solid 30 and the insulating substrates 51 and 61. Figure 71 and Figure 72 This is a schematic diagram illustrating the warping of semiconductor device 20. Figure 71 and Figure 72 In the illustration, only the resin elements constituting the semiconductor device 20 are shown, that is, only the encapsulating solid 30 and the insulating substrates 51 and 61 are shown.

[0454] When the semiconductor element 40 operates (generates heat), if the coefficient of linear expansion αs of the sealing solid 30 is greater than the coefficient of linear expansion αi of the insulating substrates 51 and 61, then... Figure 71 As shown by the dashed arrow, the expansion of the sealing solid 30 becomes greater than the expansion of the insulating substrates 51 and 61. That is, the expansion is greater in the center of the Z-direction and smaller at both ends. Therefore, the two ends in the Z-direction become concave shapes.

[0455] In this embodiment, such as Figure 70 As shown, the relationship αi > αs is satisfied. Specifically, the relationship α1i > α1s is satisfied in the α1 region, and the relationship α2i > α2s is satisfied in the α2 region. As mentioned above, since the relationship Tgs > Tgi is satisfied, the relationship αi > αs is satisfied throughout the entire operating temperature range. Therefore, when the semiconductor element 40 operates (heats up), as... Figure 72 As shown by the dashed arrow, the expansion of the insulating substrates 51 and 61 becomes greater than the expansion of the sealing solid 30. That is, the expansion is smaller in the center of the Z-direction and larger at both ends. Therefore, as... Figure 72As shown, the shape of the semiconductor device 20 is convex at both ends in the Z direction.

[0456] <Summary of Sixth Embodiment>

[0457] According to the present embodiment, the glass transition temperature Tgs of the sealing body 30 is higher than the glass transition temperature Tgi of the insulating base materials 51 and 61. Accordingly, when the semiconductor element 40 operates, the temperature of the sealing body 30 that reaches a higher temperature is less likely to exceed the glass transition temperature Tgs. The temperature of the sealing body 30 does not exceed the glass transition temperature Tgs, or exceeds it only by a very small margin. Therefore, it is possible to suppress the situation where the Young's modulus of the sealing body 30 decreases and the sealing function deteriorates. Since the deterioration of the sealing function can be suppressed, it is possible to suppress stress concentration on the drain electrode 40D and the source electrode 40S which are main electrodes, and their joint portions. That is, the connection reliability can be improved.

[0458] The glass transition temperature Tgs of the sealing body 30 may also be made substantially equal to the glass transition temperature Tgi of the insulating base materials 51 and 61. Compared with the case where Tgs < Tgi, the temperature of the sealing body 30 that reaches a higher temperature during heat generation is less likely to exceed the glass transition temperature Tgs.

[0459] In addition, the linear expansion coefficient αi of the insulating base materials 51 and 61 is larger than the linear expansion coefficient αs of the sealing body 30. Accordingly, when the semiconductor element 40 operates, the expansion amount of the insulating base materials 51 and 61 is larger than the expansion amount of the sealing body 30. That is, the expansion amount at the center in the Z direction becomes smaller, and the expansion amount at both ends becomes larger. As a result, the semiconductor device 20 warps to be convex outward in the Z direction. This narrows the facing distance between the semiconductor device 20 and the cooler 120 (121), and the thermal resistance between the semiconductor device 20 and the cooler 120 decreases. Specifically, the thickness of the heat conductive member 130 becomes thinner, and the thermal resistance decreases. Since the heat of the semiconductor element 40 can be dissipated with good efficiency, the semiconductor element 40 can be suppressed from being in an overheated state. That is, the heat dissipation performance can be improved.

[0460] The linear expansion coefficient αi of the insulating base materials 51 and 61 may also be made substantially equal to the linear expansion coefficient αs of the sealing body 30. In this case, the expansion amount at the center and both ends in the Z direction is substantially equal, and it is possible to suppress both ends in the Z direction from forming a concave recessed shape. That is, it is possible to suppress the situation where the thermal resistance between the semiconductor device 20 and the cooler 120 increases due to the concave shape.

[0461] In this way, by satisfying the relationship of Tgs ≥ Tgi and αi ≥ αs, the semiconductor device 20 with high reliability can be provided.

[0462] <Modification>

[0463] This example illustrates a semiconductor device 20 having a two-sided heat dissipation structure with a pair of substrates 50 and 60, but it is not limited to this. A semiconductor device 20 having a single-sided heat dissipation structure with only a substrate 50 connected to the drain electrode 40D (first main electrode) can also be applied.

[0464] This illustrates an example of a semiconductor device 20 having semiconductor elements 40H and 40L, but it is not limited to this. It may also have only one semiconductor element 40 constituting one arm. For example, the semiconductor device 20 may also have only one semiconductor element 40.

[0465] The structure described in this embodiment can be combined with any of the structures described in the first embodiment, second embodiment, third embodiment, fourth embodiment, fifth embodiment, and variations.

[0466] (Seventh Embodiment)

[0467] This embodiment is a variation based on the prior embodiment, and the description of the prior embodiment can be referenced. In order to suppress the peeling of the sealing solid, as described in this embodiment, the surface metal body can be made into a predetermined structure.

[0468] Semiconductor Devices

[0469] Figure 73 This is a cross-sectional view showing the semiconductor device 20 of this embodiment. Figure 73 Corresponding to Figure 8 .

[0470] The semiconductor device 20 of this embodiment has a structure similar to that described in the prior embodiment (see reference). Figures 2 to 13 The same structure. For example... Figure 73 As shown, the semiconductor device 20 includes two semiconductor elements 40 (40H), substrates 50 and 60 arranged to sandwich the semiconductor elements 40 in the Z direction, and an encapsulating solid 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D of the semiconductor element 40, which serves as the main electrode, via a bonding material 100. The surface metal body 62 of the substrate 60 is electrically connected to the source electrode 40S of the semiconductor element 40, which serves as the main electrode, via a bonding material 102. The encapsulating solid 30 encapsulates the semiconductor elements 40, substrates 50 and 60, and bonding materials 100 and 102. The back metal bodies 53 and 63 of the substrates 50 and 60 are exposed from the encapsulating solid 30. Although not shown, the semiconductor device 20 includes two semiconductor elements 40L.

[0471] like Figure 73 As shown, the surface metal bodies 52 and 62 have roughened portions 527 and 627 and unroughened portions 528 and 628.

[0472] <Uneven Oxide Film>

[0473] Next, based on Figure 74 and Figure 75 The uneven oxide film 520 constituting the roughened portion 527 will be described in detail. Figure 74 It is Figure 73 The LXXIV region is a magnified image. Figure 75 This is a diagram illustrating the method for forming the roughened portion.

[0474] Surface metal bodies 52 and 62 and the structure described in the modified example of the fifth embodiment (see reference) Figure 66 and Figure 67 Similarly, the surface metal bodies 520 and 620 have uneven oxide films 520 and 620. The uneven oxide films 520 and 620 provide roughened portions 527 and 627 on the surfaces of the surface metal bodies 52 and 62. The portions of the surfaces of the surface metal bodies 52 and 62 where the uneven oxide films 520 and 620 are not formed provide unroughened portions 528 and 628. Hereinafter, the surface metal body 52 will be used as an example for explanation.

[0475] like Figure 74 As shown, the surface metal body 52 has a base material 521 and a coating 522p and an uneven oxide film 520 disposed on the surface of the base material 521. The base material 521 forms the main part of the surface metal body 52. ​​The base material 521 is formed, for example, using a Cu-based material. The coating 522p is formed by comprising a material having higher wettability to bonding materials 100 such as solder than the base material 521. The coating 522p is formed over the entire area of ​​the upper surface 52a and the entire area of ​​the side surface 52c of the surface metal body 52. ​​The side surface 52c is the surface of the surface metal body 52 that connects the upper surface 52a to the lower surface 52d opposite to the insulating substrate 51.

[0476] The uneven oxide film 520, as described in the variation of the fifth embodiment, is formed by irradiating the coating 522p with a laser. In this embodiment, the upper surface 52a and side surface 52c of the surface metal body 52 are irradiated with a laser. The roughened portion 527 provided by the uneven oxide film 520 is the portion of the upper surface 52a other than the non-roughened portion 528. As an example, the roughened portion 527 is formed over the entire area of ​​the side surface 52c. At the end of the surface metal body 52, the roughened portion 527 is continuously provided from the side surface 52c to the upper surface 52a. The roughened portion 527 is provided on a portion of the upper surface 52a and the side surface 52c. The roughened portion 527 may also be provided only on the edge portion of the upper surface 52a. The non-roughened portion 528 is provided on a portion of the upper surface 52a, including at least the configuration area (bonding area) of the bonding material 100. The non-roughened portion 528 may be provided only in the bonding area, or it may include areas other than the bonding area. The roughened portion 527 is provided on at least a portion of the side surface 52c. The roughened portion 527 may be provided only on a portion of the side surface 52c. For example, the roughened portion 527 may be provided only on a portion of the side surface 52c so that the uneven oxide film 520 does not contact the insulating substrate 51.

[0477] The coating 522p of this embodiment has a base film mainly composed of Ni (nickel) and an upper film mainly composed of Au (gold). Specifically, an electroless Ni coating containing P (phosphorus) is used as the base film. When the bonding material 100 is solder, in the coating 522p exposed from the uneven oxide film 520, the upper film (Au) at the portion in contact with the bonding material 100 diffuses into the solder during reflow. In the coating 522p, the upper film (Au) at the portion forming the uneven oxide film 520 is removed by laser irradiation during the formation of the uneven oxide film 520. The uneven oxide film 520 is a film of oxide mainly composed of Ni. The uneven oxide film 520 is continuously provided from the side surface 52c to the upper surface 52a at the end of the surface metal body 52.

[0478] As described in the variation of the fifth embodiment, the surface portion of the coating 522p is partially melted, vaporized, and evaporated by laser irradiation, thereby forming a rough oxide film 520. The rough oxide film 520 is an oxide film derived from the coating 522p. The rough oxide film 520 is a film of an oxide of the metal (Ni) that is the main component of the coating 522p. Fine roughness (unroughened areas) is always formed on the surface of the rough oxide film 520. The surface of the rough oxide film 520 is continuous and uneven.

[0479] In this embodiment, the area of ​​the lower surface 52d of the surface metal body 52 is larger than the area of ​​the upper surface 52a. Therefore, as Figure 74As shown, the lower surface 52d protrudes relative to the upper surface 52a. That is, in a planar view along the Z direction, at least a portion of the side surface 52c lies outside the upper surface 52a. Thus, as... Figure 75 As shown, by irradiating the upper surface 52a and the side surface 52c with a laser in the Z direction, an uneven oxide film 520 can be formed.

[0480] <Summary of Implementation Method 7>

[0481] In a structure where the coating 522p is provided on the upper surface 52a and side surface 52c of the surface metal body 52, thermal stress can easily cause the sealing solid 30 to peel off from the end of the surface metal body 52, i.e., the side surface 52c. In contrast, in this embodiment, a roughening portion 527 is provided in the portion of the upper surface 52a other than the non-roughened portion 528 and in the side surface 52c. Therefore, the adhesion force between the sealing solid 30 and the side surface 52c of the surface metal body 52 is higher than in a structure without the roughening portion 527. Consequently, peeling of the sealing solid 30 can be suppressed in the side surface 52c of the surface metal body 52. ​​By suppressing peeling, thermal stress concentration at the bonding portions of the bonding materials 100, etc., in the surface metal body 52 can be suppressed. As a result, a semiconductor device 20 with high reliability can be provided.

[0482] The surface metal body 62 has the same structure as the surface metal body 52. ​​The surface metal body 62 has roughened portions 627 on the upper surface 62a (excluding the non-roughened portion 628) and the side surface 62c. As a result, peeling of the sealing solid 30 in the side surface 62c of the surface metal body 62 can be suppressed.

[0483] In this embodiment, the roughened portions 527 and 627 are continuously provided from the side surfaces 52c and 62c to the upper surfaces 52a and 62a. This helps to suppress the peeling of the sealing solid 30 near the ends of the surface metal bodies 52 and 62.

[0484] The roughening treatment for forming roughened portions 527 and 627 can be roughening plating, sandblasting, chemical treatment, etc. In this embodiment, laser roughening is used. Uneven oxide films 520 and 620 are formed by irradiating the coating with a laser. The surface metal bodies 52 and 62 have uneven oxide films 520 and 620 at the roughened portions 527 and 627.

[0485] The surfaces of the roughened oxide films 520 and 620 are continuously uneven, creating an anchoring effect as the sealing solid 30 wraps around them. Furthermore, the contact area with the sealing solid 30 is increased. This improves the adhesion to the sealing solid 30 in the roughened portions 527 and 627. However, compared to the coating (coating 522p), the roughened oxide films 520 and 620 have lower wettability for the bonding materials 100 and 102. Because the roughened oxide films 520 and 620 have fine unevenness on their surfaces, the contact area with the bonding materials 100 and 102 is smaller, and a portion of the bonding materials 100 and 102 becomes spherical due to surface tension. That is, the contact angle is increased. Therefore, the overflow of the bonding materials 100 and 102 can be suppressed. Thus, by employing the roughened oxide films 520 and 620, the adhesion to the sealing solid 30 can be improved, and the overflow of the bonding materials 100 and 102 from the joint can be suppressed.

[0486] In this embodiment, the area of ​​the surface metal bodies 52 and 62 is larger at the lower surfaces 52d and 62d than at the upper surfaces 52a and 62a. The lower surfaces 52d and 62d protrude relative to the upper surfaces 52a and 62a. Therefore, it is easy to physically roughen the side surfaces 52c and 62c in the Z direction. In the case of laser roughening described above, by irradiating with a laser in the Z direction, an uneven oxide film 520 and 620 can be formed not only on the upper surfaces 52a and 62a, but also on the side surfaces 52c and 62c.

[0487] <Variation Example>

[0488] The side shapes of the surface metal bodies 52 and 62 are not limited to the examples described above. When the surface metal bodies 52 and 62 are patterned by pressure processing, etching, cutting, etc., the side shapes can be processed into a specified shape. Figure 76 This is a sectional view showing a modified example of the side profile. In Figure 76 In the illustration, surface metal body 52 is shown as an example; for convenience, coating 522p is omitted. Although the illustration is omitted, the same structure can be used for surface metal body 62.

[0489] exist Figure 76 In the example shown, the surface metal body 52 has a side surface 52c that is approximately parallel to the Z direction. That is, the area of ​​the surface metal body 52 is approximately constant in the Z direction. To physically roughen such a surface metal body 52, the upper surface 52a and the side surface 52c can be roughened separately, for example. In the case of laser roughening, the side surface 52c is irradiated with laser light from a direction different from the direction of laser irradiation on the upper surface 52a, for example, a direction inclined relative to the Z direction. As a result, an uneven oxide film 520 can be formed on the side surface 52c.

[0490] Figure 77This is a sectional view showing a modified example of the side profile shape, corresponding to... Figure 76 .exist Figure 77 In the example shown, the area of ​​the surface metal body 52 orthogonal to the Z direction increases as it approaches the lower surface 52d. The side surface 52c is R-shaped. In this case, in planar view, the entire area of ​​the side surface 52c lies outside the upper surface 52a. Therefore, compared with... Figure 75 Compared to the structure shown, it is easier to physically roughen the side 52c in the Z direction, such as by laser roughening.

[0491] Figure 78 This is a sectional view showing a modified example of the side profile shape, corresponding to... Figure 76 .exist Figure 78 In the example shown, the area of ​​the surface metal body 52 orthogonal to the Z direction also increases as it approaches the lower surface 52d. The surface metal body 52 is, for example, roughly trapezoidal in the ZY plane. In this case, since the entire area of ​​the side surface 52c is located outside the upper surface 52a in planar view, it is easy to physically roughen the side surface 52c in the Z direction.

[0492] This example illustrates a semiconductor device 20 with a two-sided heat dissipation structure comprising a pair of substrates 50 and 60, but it is not limited to this. A semiconductor device 20 with a single-sided heat dissipation structure comprising only a substrate 50 connected to the drain electrode 40D (first main electrode) can also be applied. In a structure comprising a pair of substrates 50 and 60, the above-described structure including the roughened portion on the side surface may also be applied only to one of the substrates 50 and 60.

[0493] This illustrates an example of a semiconductor device 20 having semiconductor elements 40H and 40L, but it is not limited to this. It may also have only one semiconductor element 40 constituting one arm. For example, the semiconductor device 20 may also have only one semiconductor element 40.

[0494] The structure described in this embodiment can be combined with any of the structures described in the first embodiment, second embodiment, third embodiment, fourth embodiment, fifth embodiment, sixth embodiment, and variations.

[0495] (Eighth Embodiment)

[0496] This embodiment is a variation based on a prior embodiment, and the description of the prior embodiment can be referenced. In order to reduce inductance, as described in this embodiment, the thickness of the surface metal body and the spacing of the wiring can satisfy a specified relationship.

[0497] Semiconductor Devices

[0498] First, based on Figure 79The circuit patterns of the semiconductor device 20, particularly the surface metal bodies 52 and 62, of this embodiment will be described. Figure 79 This is a cross-sectional view showing the semiconductor device 20 according to this embodiment. Figure 79 The diagram illustrates the structure described in the prior embodiment (see reference). Figure 8 Part of ).

[0499] The semiconductor device 20 of this embodiment has a structure similar to that described in the prior embodiment (see reference). Figures 2 to 13 The same structure. For example... Figure 79 As shown, the semiconductor device 20 includes a semiconductor element 40 (40H), substrates 50 and 60 arranged to sandwich the semiconductor element 40 in the Z direction, and an encapsulating solid 30. The surface metal body 52 of the substrate 50 is electrically connected to the drain electrode 40D of the semiconductor element 40, which serves as the main electrode. The surface metal body 62 of the substrate 60 is electrically connected to the source electrode 40S of the semiconductor element 40, which also serves as the main electrode. The encapsulating solid 30 encapsulates the semiconductor element 40, substrates 50 and 60, and bonding materials 100 and 102. Backside metal bodies 53 and 63 are exposed from the encapsulating solid 30 in substrates 50 and 60. Although not shown, the semiconductor device 20 includes a semiconductor element 40L constituting the lower arm 9L.

[0500] <Relationship between wiring spacing and thickness>

[0501] Next, based on Figure 79 and Figure 80 The relationship between wiring spacing and thickness is explained. Figure 80 It is Figure 79 The image is an enlarged view of region LXXX. Figure 80 Only substrate 60 is shown in the figure.

[0502] Surface metal bodies 52, 62 and the structure described in the prior embodiment (see reference) Figure 65 Similarly, it has 52G and 62G of wiring gaps. For example... Figure 79 and Figure 80 As shown, the wiring gap 62G separates adjacent N-wires 64 and relay wires 65. The wiring gap 62G is a defined gap disposed in the surface metal body 62 between wires with different potentials.

[0503] like Figure 80 As shown, in this embodiment, the interval L10 between the N-wire 64 and the relay wire 65 is less than or equal to the thickness T10 of the surface metal body 62 (L10 ≤ T10). The interval L10 is the length of the wire gap 62G, i.e., the distance between the patterns of the N-wire 64 and the relay wire 65. Figure 79 and Figure 80Herein, the interval L10 and the thickness T10 of the surface metal body 62 satisfy the relationship of L10<T10. Although illustration is omitted, the substrate 50 provided with the surface metal body 52 has the same structure as the substrate 60. In the surface metal body 52, the interval L10 between the P wiring 54 and the relay wiring 55 is equal to or less than the thickness T10 of the surface metal body 52 (L10≤T10).

[0504] <Simulation Result>

[0505] Figures 81-83 shows the result of electromagnetic field simulation. Figure 81 is a diagram summarizing the simulation results as the relationship between the length (interval, thickness) and inductance. The circle (○) measurement points represent the results of three levels of thickness T10 (0.3 mm, 1.5 mm, 2.5 mm) when the interval L10 is fixed at 1.5 mm. The solid line in the diagram represents the change in inductance accompanying the change in thickness T10 when the interval L10 is fixed. The square (□) measurement points represent the results of three levels of interval L10 (0.5 mm, 1.5 mm, 2.5 mm) when the thickness T10 is fixed at 1.5 mm. The dashed line in the diagram represents the change in inductance accompanying the change in interval L10 when the thickness T10 is fixed. Figure 81 The length of the horizontal axis shown in the figure represents the length of the thickness T10 when the interval L10 is fixed, and represents the length of the interval L10 when the thickness T10 is fixed.

[0506] Figure 82 is a diagram showing the simulation result in the case of L10>T10. Figure 82 shows Figure 81 the simulation result under the first condition C1 shown in the figure, specifically, when the interval L10=1.5 mm and the thickness T10=0.3 mm. Figure 83 is a diagram showing the simulation result in the case of L10<T10. Figure 83 shows Figure 81 the simulation result under the second condition C2 shown in the figure, specifically, when the interval L10=1.5 mm and the thickness T10=2.5 mm. In the simulation, the conditions other than the interval L10 and the thickness T10 are common.

[0507] From Figure 81 the results shown in the figure, it is clearly found that the inductance can be reduced in the range where the relationship of L10≤T10 is satisfied. In particular, it is clearly found that the inductance can be effectively reduced in the range where the relationship of L10<T10 is satisfied.

[0508] As in Figure 82As shown, in the case of L10>T10, although the current disperses in the width direction in the extending portion 641 of the N wiring 64, it flows while biasing toward the end side of the surface metal body 62 (substrate 60). Therefore, the PN current loop described in the prior embodiment (refer to Figure 17 ) is large. Since the current path flowing in the extending portion 421 is relatively far from the relay wiring 65, the cancellation effect of the magnetic flux caused by the current of the opposite direction component is weakened. Figure 82 This indicates a case where the inductance is increased compared with the case where the relationship of L10≤T10 is satisfied.

[0509] As shown in Figure 83 , in the case of L10<T10, the current flows while biasing toward the end portion on the relay wiring 65 side in the width direction of the extending portion 641. Therefore, the PN current loop is small. Since the current path flowing in the extending portion 421 is relatively close to the relay wiring 65, the cancellation effect of the magnetic flux caused by the current of the opposite direction component is enhanced. Figure 83 This indicates a case where the inductance is reduced compared with the case where the relationship of L10>T10 is satisfied.

[0510] <Summary of Eighth Embodiment>

[0511] In this embodiment, the surface metal body 52 has a P wiring 54 as the first wiring and a relay wiring 55 as the second wiring having a potential different from that of the first wiring. Further, the interval L10 between the P wiring 54 and the relay wiring 55 and the thickness T10 of the surface metal body 52 satisfy the relationship of L10≤T10. Similarly, the surface metal body 62 has an N wiring 64 as the first wiring and a relay wiring 65 as the second wiring having a potential different from that of the first wiring. Further, the interval L10 between the N wiring 64 and the relay wiring 65 and the thickness T10 of the surface metal body 62 satisfy the relationship of L10≤T10.

[0512] If the relationship of L10≤T10 is satisfied, since the interval between adjacent wirings is narrow, the cancellation effect of the magnetic flux generated by the current flowing through the first wiring and the magnetic flux generated by the current flowing through the second wiring is enhanced, and the inductance can be reduced. In addition, since the surface metal body is thick, the cross-sectional area of the current path becomes large, and the inductance can be reduced. As such, the semiconductor device 20 of this embodiment can reduce the inductance. In particular, if the relationship of L10<T10 is satisfied, the above effect is enhanced, and the inductance can be reduced more effectively.

[0513] <Modified Example>

[0514] An example of a semiconductor device 20 having a two-sided heat dissipation structure with a pair of substrates 50 and 60 is shown, but it is not limited to this. A semiconductor device 20 having a single-sided heat dissipation structure with only a substrate 50 connected to the drain electrode 40D (first main electrode) can also be applied. In the structure having a pair of substrates 50 and 60, only one of the surface metal bodies 52 and 62 may satisfy the above-mentioned L10≤T10 relationship. That is, in at least one substrate electrically connected to the main electrode of the semiconductor element, the surface metal body has a first wiring and a second wiring, and the L10≤T10 relationship is satisfied. Furthermore, an example is shown where the L10≤T10 relationship is satisfied in all the opposing regions of the N wiring 64, which is the first wiring, and the relay wiring 65, which is the second wiring and has a different potential from the first wiring, but it is not limited to this. The L10≤T10 relationship is satisfied in at least a portion of the opposing regions. The same applies to the opposing regions of the P wiring 54, which is the first wiring, and the relay wiring 55, which is the second wiring and has a different potential from the first wiring.

[0515] This illustrates an example of a semiconductor device 20 having semiconductor elements 40H and 40L, but it is not limited to this. It may also have only one semiconductor element 40 constituting one arm. For example, the semiconductor device 20 may also have only one semiconductor element 40.

[0516] The structure described in this embodiment can be combined with any of the structures described in the first embodiment, second embodiment, third embodiment, fourth embodiment, fifth embodiment, sixth embodiment, seventh embodiment, and variations.

[0517] (9th embodiment)

[0518] This embodiment is a variation based on a prior embodiment, and the description of the prior embodiment can be referenced. In order to improve heat dissipation and reliability, as described in this embodiment, the side surface shape of the substrate can be made into a predetermined shape.

[0519] Semiconductor Devices

[0520] First, based on Figure 84 The semiconductor device 20 of this embodiment will be described. Figure 84 Is with Figure 5 The corresponding sectional view. Figure 84 For convenience, the illustration of the external connection terminal 90 has been omitted.

[0521] The semiconductor device 20 of this embodiment has a structure similar to that described in the prior embodiment (see reference). Figures 2 to 13 The same structure. For example... Figure 84As shown, the semiconductor device 20 includes semiconductor elements 40 (40H, 40L), substrates 50 and 60 arranged to sandwich the semiconductor elements 40 in the Z direction, and an encapsulating solid 30. The surface metal body 52 of the substrate 50 is electrically connected to the drain electrode 40D of the semiconductor element 40, which serves as the main electrode. The surface metal body 62 of the substrate 60 is electrically connected to the source electrode 40S of the semiconductor element 40, which also serves as the main electrode. The encapsulating solid 30 encapsulates the semiconductor elements 40, substrates 50 and 60, and bonding materials 100 and 102.

[0522] <Substrate>

[0523] Next, based on Figures 84-86 Substrates 50 and 60 will be described. Figure 85 It is a planar view showing the center of the substrate. Figure 85 Corresponding to Figure 12 . Figure 86 It is Figure 84 The image shows a magnified view of the area LXXXVI indicated by the single-dotted line. Below, "inner" and "outer" refer to the relative positions of the substrates 50 and 60, respectively, as reference points in a planar view along the Z-direction. The side closer to the center is the inner side, and the side farther from the center is the outer side. Figure 85 In the example shown, the center 50sc of the substrate 50 is represented. Figure 84 It is a sectional view, but for the sake of explanation, the center is shown as 50 sc and 60 sc.

[0524] In the substrates 50 and 60 of this embodiment, insulating substrates 51 and 61 comprise resin. Surface metal bodies 52 and 62 are disposed on surfaces 51a and 61a of the insulating substrates 51 and 61. The surface metal bodies 52 and 62 are patterned as described in the prior embodiments. Thus, the insulating substrates 51 and 61 have exposed portions 510 and 610 protruding from the surface metal bodies 52 and 62. The exposed portion 510 of the insulating substrate 51, which is a first exposed portion, and the exposed portion 610 of the insulating substrate 61, which is a second exposed portion, overlap each other in a plane view in the Z direction. The exposed portions 510 and 610 overlap. That is, at least a portion of the exposed portion 510 is opposite to the exposed portion 610 in the Z direction.

[0525] Back metal bodies 53 and 63 are disposed on the back surfaces 51b and 61b of insulating substrates 51 and 61. The back metal bodies 53 and 63 are exposed from the encapsulating body 30. In the back metal bodies 53 and 63, the surfaces opposite to the opposing surfaces 53a and 63a of the insulating substrate 51 become exposed surfaces 53b and 63b. Exposed surfaces 53b are exposed approximately coplanarly with respect to one surface 30a of the encapsulating body 30. Exposed surfaces 63b are exposed approximately coplanarly with respect to the back surface 30b of the encapsulating body 30. Exposed surfaces 53b and 63b become the back surfaces 50b and 60b of the substrates 50 and 60. The encapsulating body 30 has a side surface 30e as a second surface connected to the first surface, i.e., one surface 30a and the back surface 30b. The side surface 30e includes sides 30c and 30d in the Y direction and also includes sides in the X direction. The side surface 30e includes all sides. For demolding during molding, the second side surface 30e is a conical surface inclined relative to the Z direction. The side surface 30e has a draft angle. In the previous embodiment, the draft angle was omitted for simplicity and is shown in the illustration. The side surface 30e has a curved portion near approximately the center in the Z direction, and from the curved portion, it gets closer to the front surface 30a and the back surface 30b, and closer to the semiconductor element 40 in a planar view in the Z direction. That is, in a planar view, the curved portion is on the outside, and the front surface 30a and the back surface 30b are on the inside. Hereinafter, the front surface 30a and the back surface 30b of the encapsulating solid 30 will sometimes be referred to as the first surface 30a and 30b.

[0526] like Figure 84 and Figure 86 As shown, substrates 50 and 60 have laminates 500 and 600. Laminate 500 is a two-layer structure consisting of an insulating substrate 51 and a back metal body 53. Similarly, laminate 600 is a two-layer structure consisting of an insulating substrate 61 and a back metal body 63. In laminates 500 and 600, the side surfaces connecting the surfaces 51a and 61a of the insulating substrates 51 and 61 to the exposed surfaces 53b and 63b of the back metal bodies 53 and 63 have a so-called V-shaped cut. The side surfaces of laminates 500 and 600 have a shape that bulges outward from the center relative to the upper surfaces 51a and 61a and the lower exposed surfaces 53b and 63b.

[0527] The sides of the laminates 500 and 600 have first inclined portions 501 and 601, second inclined portions 502 and 602, and intermediate portions 503 and 603. First, the laminate 500 will be described.

[0528] The first inclined portion 501 is a portion located within a predetermined range from the surface 51a. The first inclined portion 501 has an inclination such that, in planar view, its distance from the center 50sc is closest at its upper end on the surface 51a side and farther at its lower end than at its upper end. That is, in the first inclined portion 501, the lower end is located outside the upper end. Figure 85As shown, the first inclined portion 501 is provided at the edge of the substrate 50. The first inclined portion 501 is annular in shape, surrounding the surface metal body 52.

[0529] In this embodiment, the first inclined portion 501 has an inclination that increases in the Z-direction from the surface 51a as it moves further away from the center 50sc in planar view. That is, the laminate 500, including the first inclined portion 501, has the smallest area orthogonal to the Z-direction at the surface 51a in its upper portion, and the area increases as it moves further away from the surface 51a. The inclination of the first inclined portion 501 allows for manufacturing deviations. The first inclined portion 501 has the aforementioned inclination macroscopically. The first inclined portion 501 is a conical surface.

[0530] The second inclined portion 502 is a portion located within a predetermined range from the exposed surface 53b. The second inclined portion 502 has an inclination such that, in planar view, its distance from the center 50sc is closest at its lower end on the exposed surface 53b side and farther at its upper end than its lower end. That is, in the second inclined portion 502, the upper end is located outside the lower end. Like the first inclined portion 501, the second inclined portion 502 is provided at the edge of the substrate 50. The second inclined portion 502 is annular in shape, surrounding the back metal body 53.

[0531] In this embodiment, the second inclined portion 502 has an inclination such that the farther it is from the exposed surface 53b in the Z direction, the farther it is from the center 50sc in planar view. That is, the laminate 500 has the smallest area at the exposed surface 53b in the lower part, including the second inclined portion 502, and the area increases with distance from the exposed surface 53b. The inclination of the second inclined portion 502 allows for manufacturing deviations. The second inclined portion 502 has the aforementioned inclination macroscopically. The second inclined portion 502 is a conical surface. If the first inclined portion 501 is a positive cone, then the second inclined portion 502 is a negative cone.

[0532] The intermediate portion 503 is connected to the first inclined portion 501 and the second inclined portion 502. The intermediate portion 503, which connects the first inclined portion 501 and the second inclined portion 502, has a predetermined length in the Z direction. The intermediate portion 503 is the apex of the side surface of the laminate 500. The side surface of the laminate 500 is furthest from the center 50sc at the intermediate portion 503. In planar view, the intermediate portion 503 is the outermost part of the laminate 500. The area of ​​the laminate 500 orthogonal to the Z direction is largest at the intermediate portion 503. At the intermediate portion 503, the area of ​​the laminate 500 is approximately constant. The farther the first inclined portion 501 is from the intermediate portion 503, the shorter its distance from the center 50sc in planar view. The farther the second inclined portion 502 is from the intermediate portion 503, the shorter its distance from the center 50sc in planar view.

[0533] The laminate 600 has the same structure as the laminate 500. The first inclined portion 601 is a portion located within a defined range from the surface 61a. The first inclined portion 601 has an inclination such that, in planar view, its distance from the center 60sc is closest at the upper end on the surface 61a side and farther at the lower end than at the upper end. That is, in the first inclined portion 601, the lower end is located outside the upper end. The first inclined portion 601 is provided at the edge of the substrate 60. The first inclined portion 601 is annular in shape, surrounding the surface metal body 62.

[0534] In this embodiment, the first inclined portion 601 has an inclination that increases in the Z-direction from the surface 61a as it moves further away from the center 60sc in planar view. That is, the laminate 600, including the first inclined portion 601, has the smallest area orthogonal to the Z-direction at the surface 61a at the upper part, and the area increases as it moves further away from the surface 61a. The inclination of the first inclined portion 601 allows for manufacturing deviations. The first inclined portion 601 has the aforementioned inclination macroscopically. The first inclined portion 601 is a conical surface.

[0535] The second inclined portion 602 is a portion located within a predetermined range from the exposed surface 63b. The second inclined portion 602 has an inclination such that, in planar view, its distance from the center 60sc is closest at its lower end on the exposed surface 63b side and farther at its upper end than its lower end. That is, in the second inclined portion 602, the upper end is located outside the lower end. Like the first inclined portion 501, the second inclined portion 602 is provided at the edge of the substrate 60. The second inclined portion 602 is annular in shape, surrounding the back metal body 63.

[0536] In this embodiment, the second inclined portion 602 has an inclination that increases in the Z direction from the exposed surface 63b, and in planar view, increases in distance from the center 60sc. That is, the laminate 600 has the smallest area at the exposed surface 63b in its lower portion, including the second inclined portion 602, and the area increases in distance from the exposed surface 63b. The inclination of the second inclined portion 602 allows for manufacturing deviations. The second inclined portion 602 has the aforementioned inclination macroscopically. The second inclined portion 602 is a conical surface. If the first inclined portion 601 is a positive cone, then the second inclined portion 602 is a negative cone.

[0537] The intermediate portion 603 is connected to the first inclined portion 601 and the second inclined portion 602. The intermediate portion 603, which connects the first inclined portion 601 and the second inclined portion 602, has a predetermined length in the Z direction. The intermediate portion 603 is the apex of the side surface of the laminate 600. The side surface of the laminate 600 is furthest from the center 60sc at the intermediate portion 603. In planar view, the intermediate portion 603 is the outermost part of the laminate 600. The laminate 600 has the largest area at the intermediate portion 603. At the intermediate portion 603, the area of ​​the laminate 600 is approximately constant. The farther the first inclined portion 601 is from the intermediate portion 603, the shorter its distance from the center 60sc in planar view. The farther the second inclined portion 602 is from the intermediate portion 603, the shorter its distance from the center 60sc in planar view.

[0538] <Size and Angle>

[0539] Next, based on Figure 87 The dimensions and angles of the laminates 500 and 600 are described. Figure 87 Is with Figure 86 The corresponding diagram shows the dimensions and angles. The following explanation uses a 500-layer stack as an example.

[0540] Figure 87 The length L11 shown is the length of the first inclined portion 501 in planar view, that is, the width of the annular first inclined portion 501. The length L12 is the length of the second inclined portion 502 in planar view, that is, the width of the annular second inclined portion 502. The length L21 is the length of the first inclined portion 501 in the Z direction, that is, the height of the first inclined portion 501. The length L22 is the length of the second inclined portion 502 in the Z direction, that is, the height of the second inclined portion 502. The length L23 is the length of the middle portion 503 in the Z direction, that is, the height of the middle portion 503. The length L24 is the length of the insulating substrate 51 in the Z direction, that is, the thickness of the insulating substrate 51. The length L25 is the length of the back metal body 53 in the Z direction, that is, the thickness of the back metal body 53.

[0541] Angle R1 is the tilt angle of the back metal body 53 in the first tilted portion 501 relative to the thickness direction (Z direction) of the semiconductor element 40. Angle R2 is the tilt angle of the back metal body 53 in the second tilted portion 502 relative to the Z direction. Angle R3 is the tilt angle of the insulating substrate 51 in the first tilted portion 501 relative to the Z direction. Angle R4 is the tilt angle of the second tilted portion 502 relative to the exposed surface 53b of the back metal body 53. Angle R5 is the tilt angle of the side surface 30e relative to one surface 30a of the encapsulating solid 30.

[0542] like Figure 87As shown, in the present embodiment, the length of the second inclined portion 502 is shorter than the length of the first inclined portion 501. That is, the relationship of L11>L12 is satisfied. The angle R1 satisfies the relationship of 0°<R1≤45°, and the angle R2 satisfies the relationship of 0°<R2<45°. The closer the angle R1 is to 45°, the more efficiently the heat generated by the semiconductor element 40 can be diffused. The closer the angle R2 is to 45°, the smaller the thermal resistance can be, as will be described later.

[0543] Furthermore, the first inclined portion 501 is provided from the insulating base material 51 to the back metal body 53, and the second inclined portion 502 is provided on the back metal body 53. That is, the relationships of L21>L24 and L22<L25 are satisfied. In the structure including the intermediate portion 503, the intermediate portion 503 is provided on the back metal body 53. That is, the relationship of L24<(L24+L25-L23) / 2 is satisfied.

[0544] Furthermore, in the structure where the first inclined portion 501 is provided from the insulating base material 51 to the back metal body 53, the inclination angle of the back metal body 53 is substantially equal to the inclination angle of the insulating base material 51. That is, the relationship of R1=R3 is satisfied.

[0545] Furthermore, the inclination angle of the second inclined portion 502 with respect to the exposed surface 53b of the back metal body 53 is smaller than the inclination angle of the side surface 30e (the second surface) with respect to the one surface 30a (the first surface) of the sealing body 30. That is, the relationship of R4<R5 is satisfied. Although the description is omitted, the layered body 600 also has the same structure as the layered body 500.

[0546] <Method for Manufacturing Layered Body>

[0547] Next, an example of the method for manufacturing the above-described layered body 500 will be described. First, a mother substrate having a two-layer structure including an insulating base material 51 containing a resin and a back metal body 53 is formed. Next, cutting (V-cutting) is performed simultaneously from both sides of the surface 51a of the insulating base material 51 and the exposed surface 53b by a blade. In this cutting, the mother substrate is not completely cut off, and the first inclined portion 501 and the second inclined portion 502 are formed. In the mother substrate, the adjacent layered bodies 500 are in a state of being connected at the intermediate portion 503. Then, by separating (cutting off) the adjacent layered bodies 500 at the intermediate portion 503, the layered body 500 having a side surface of a V-cut shape can be obtained.

[0548] Figure 88This is a side view of the laminate 500 obtained by the manufacturing method described above. The first inclined portion 501 has a circumferential cutting mark 501a by cutting with a blade. Similarly, the second inclined portion 502 has a circumferential cutting mark 502a. Since adjacent laminates 500 are separated at the intermediate portion 503, the intermediate portion 503 has a concave-convex portion 503a. Although the description is omitted, the laminate 600 is also formed by the same method as the laminate 500.

[0549] <Summary of Implementation Method 9>

[0550] In this embodiment, the sides of the laminates 500 and 600 have first inclined portions 501 and 601 and second inclined portions 502 and 602. That is, the sides are curved (approximately V-shaped). Therefore, even if peeling occurring in the sealing solid 30 starts at the interface with the exposed surfaces 53b and 63b and progresses along the second inclined portions 502 and 602, the curved shape can suppress the progress towards the first inclined portions 501 and 601. Thus, the progress of peeling towards the surface metal bodies 52 and 62, the semiconductor element 40, and the joints between the surface metal bodies 52 and 62 and the semiconductor element 40 can be suppressed. That is, the concentration of thermal stress on the surface metal bodies 52 and 62, the semiconductor element 40, etc., which could lead to a decrease in connection reliability, can be suppressed. Therefore, reliability can be ensured.

[0551] Because of the second inclined portions 502 and 602, the back metal bodies 53 and 63 can be prevented from falling off (dropping) from the sealing solid 30 when the above-mentioned peeling occurs.

[0552] Ideally, heat diffuses at a 45-degree angle. In this embodiment, the laminates 500 and 600 have first inclined portions 501 and 601 in the Z direction on the semiconductor element 40 side. Therefore, heat generated by the semiconductor element 40 diffuses in the portion above the curved portion, corresponding to the first inclined portions 501 and 601. On the other hand, by having second inclined portions 502 and 602, the heat conduction path of the portion corresponding to the second inclined portions 502 and 602 is narrower than the heat conduction path of the portion corresponding to the first inclined portions 501 and 601. A narrower heat conduction path results in greater thermal resistance. In this embodiment, the length L12 of the second inclined portions 502 and 602 is shorter than the length L11 of the first inclined portions 501 and 601 (L11>L12). Therefore, compared to a structure satisfying L11≤L12, the length L22 of the second inclined portions 502 and 602 in the Z direction can be shortened, thereby reducing the thermal resistance below the curved portion. That is, the heat that has diffused in the upper part of the laminates 500 and 600 can be efficiently dissipated from the exposed surfaces 53b and 63b. In this way, the semiconductor device 20 of this embodiment can ensure reliability while improving heat dissipation.

[0553] Alternatively, the first inclined portions 501 and 601 can be provided on the insulating substrates 51 and 61, and the second inclined portions 502 and 602 can be provided on the back metal bodies 53 and 63. Alternatively, the first inclined portions 501 and 601 can be provided on the insulating substrates 51 and 61, and the second inclined portions 502 and 602 can be provided across the insulating substrates 51 and 61 and the back metal bodies 53 and 63. In this embodiment, the first inclined portions 501 and 601 are provided across the insulating substrates 51 and 61 and the back metal bodies 53 and 63, and the second inclined portions 502 and 602 are provided on the back metal bodies 53 and 63. That is, the curved portion exists within the back metal bodies 53 and 63. Therefore, even if peeling occurring in the sealing body 30 progresses along the second inclined portions 502 and 602 starting from the interface with the exposed surfaces 53b and 63b, peeling progress to the interface with the insulating substrates 51 and 61 can be suppressed. Therefore, it is possible to suppress the situation where thermal stress concentrates on the insulating substrates 51 and 61, leading to a decrease in insulation reliability. In other words, it is possible to further improve reliability.

[0554] Alternatively, the structure can be made such that the first inclined portions 501, 601 are connected to the second inclined portions 502, 602. In this embodiment, intermediate portions 503, 603 are provided between the first inclined portions 501, 601 and the second inclined portions 502, 602. In this structure, the intermediate portions 503, 603 are curved portions. By providing the intermediate portions 503, 603, as described above, even if both the surfaces 51a, 61a of the insulating substrates 51, 61 and the exposed surfaces 53b, 63b of the back metal bodies 53, 63 are cut simultaneously (cutting), contact between the blades can be avoided. Furthermore, since the intermediate portions 503, 603 are provided on the back metal bodies 53, 63, as described above, peeling progress to the interface with the insulating substrates 51, 61 can be suppressed.

[0555] In the structure where the first inclined portions 501, 601 are provided spanning from the insulating base materials 51, 61 across the back metal bodies 53, 63, the inclination angle R1 of the back metal bodies 53, 63 and the inclination angle R3 of the insulating base materials 51, 61 may also be different. For example, in the case of R1<R3, thermal stress concentrates on the ends of the resin-containing insulating base materials 51, 61, so the insulation performance may decrease. In the case of R1>R3, thermal stress may concentrate at the interfaces between the insulating base materials 51, 61 and the back metal bodies 53, 63, causing interfacial delamination. In the present embodiment, the inclination angle R1 and the inclination angle R3 are set to substantially equal angles (R1=R3). That is, in the first inclined portions 501, 601, the inclined surfaces of the insulating base materials 51, 61 and the inclined surfaces of the back metal bodies 53, 63 are connected substantially coplanar. The inclined surfaces of the insulating base materials 51, 61 and the inclined surfaces of the back metal bodies 53, 63 continuously form one flat surface. Thereby, concentration of thermal stress at the triple points of the sealing body 30, the insulating base materials 51, 61 and the back metal bodies 53, 63 can be suppressed.

[0556] The inclination angle R4 of the second inclined portions 502, 602 relative to the exposed surfaces 53b, 63b may also be set to be equal to or greater than the inclination angle R5 of the side surface 30e (the second surface) relative to the first surfaces 30a, 30b of the sealing body 30. In the present embodiment, the inclination angle R4 is made smaller than the inclination angle R5 (R4<R5). As described in the prior embodiment (for example, refer to Figure 72 ), when the semiconductor element 40 generates heat, warpage occurs in the semiconductor device 20. As described above, if a structure that adopts a warpage shape with high heat dissipation is employed, delamination is likely to occur at the interfaces between the back metal bodies 53, 63 and the sealing body 30 due to the warpage convex in the Z direction. By adopting the structure satisfying the relationship of R4<R5, even if delamination occurs, the back metal bodies 53, 63 can be prevented from falling off from the sealing body 30.

[0557] In the present embodiment, the exposed portion 510 of the insulating base material 51 serving as the first exposed portion and the exposed portion 610 of the insulating base material 61 serving as the second exposed portion overlap each other in plan view in the Z direction. Thereby, the unbalance in the arrangement of the front surface metal body 52 of the substrate 50 serving as the first substrate and the front surface metal body 62 of the substrate 60 serving as the second substrate can be suppressed, and further the unbalance of the warpage of the semiconductor device 20 can be suppressed. It is possible to suppress the situation where interfacial delamination between the back metal bodies 53, 63 and the sealing body 30 is likely to occur on the side with larger deformation due to warpage bias.

[0558] In this embodiment, the first inclined portion 501 and the second inclined portion 502 have circumferential cutting marks 501a and 502a. The cutting marks 501a and 502a create an anchoring effect, increasing the adhesion force with the sealing body 30. This helps to suppress the peeling of the sealing body 30 from the laminates 500 and 600. Alternatively, the circumferential cutting marks may be provided only on one of the first inclined portion 501 and the second inclined portion 502. In this embodiment, since the intermediate portion 503 also has a concave-convex portion 503a, peeling suppression due to the anchoring effect is expected.

[0559] <Variation Example>

[0560] This example illustrates a semiconductor device 20 with a two-sided heat dissipation structure comprising a pair of substrates 50 and 60, but it is not limited to this. A semiconductor device 20 with a single-sided heat dissipation structure comprising only a substrate 50 connected to the drain electrode 40D (first main electrode) can also be applied. In a structure comprising a pair of substrates 50 and 60, the above-described structure (V-shaped cut) may also be applied to only one of the substrates 50 and 60.

[0561] This illustrates an example of a semiconductor device 20 having semiconductor elements 40H and 40L, but it is not limited to this. It may also have only one semiconductor element 40 constituting one arm. For example, the semiconductor device 20 may also have only one semiconductor element 40.

[0562] The structure described in this embodiment can be combined with any of the structures described in the first embodiment, second embodiment, third embodiment, fourth embodiment, fifth embodiment, sixth embodiment, seventh embodiment, eighth embodiment, and variations.

[0563] (10th Embodiment)

[0564] This embodiment is a variation based on a prior embodiment, and the description of the prior embodiment can be referenced. In order to improve the connection reliability, as described in this embodiment, the sintered component as the bonding material can also be configured in a predetermined way.

[0565] Semiconductor Devices

[0566] First, based on Figure 89 The semiconductor device 20 of this embodiment will be described. Figure 89 Is with Figure 5 The corresponding sectional view. Figure 89 For convenience, the illustration of the external connection terminal 90 has been omitted.

[0567] The semiconductor device 20 of this embodiment has a structure similar to that described in the prior embodiment (see reference). Figures 2 to 13 The same structure. For example... Figure 89 As shown, the semiconductor device 20 includes semiconductor elements 40 (40H, 40L), substrates 50 and 60 arranged as wiring members sandwiching the semiconductor elements 40 in the Z direction, and an encapsulating solid 30. The surface metal body 52 of the substrate 50, serving as the first wiring member, is connected to the drain electrode 40D of the semiconductor element 40, which serves as the first main electrode. The surface metal body 62 of the substrate 60, serving as the second wiring member, is connected to the source electrode 40S of the semiconductor element 40, which serves as the second main electrode, via a conductive spacer 70, which also serves as the second wiring member. The encapsulating solid 30 encapsulates the semiconductor elements 40, substrates 50 and 60, and conductive spacer 70. The source electrode 40S and the conductive spacer 70 are bonded by a sintering member 101A, which serves as a bonding material 101.

[0568] Semiconductor Components

[0569] Next, based on Figure 90 and Figure 91 The semiconductor element 40 will be described. Figure 90 This is a plan view representing semiconductor element 40 (40H). Figure 91 It is Figure 89 The XCI region is magnified in the image. Figure 91 Is with Figure 90 The sectional view corresponding to the XCI-XCI line. Figure 91 In the example shown, semiconductor element 40H is illustrated, but semiconductor element 40L also has the same structure, so it will be described as semiconductor element 40 below.

[0570] As described above, semiconductor element 40 has a semiconductor substrate 41 on which switching elements are formed. The planar shape of semiconductor substrate 41 is generally rectangular. A drain electrode is disposed on one side of semiconductor substrate 41, and a source electrode 40S and a pad 40P are disposed on the back side of semiconductor substrate 41. The source electrode 40S has a multilayer structure. The source electrode 40S has a base electrode 42 and a connection electrode 43. The pad 40P also has the same structure as the source electrode 40S.

[0571] The semiconductor element 40 also includes a protective film 44. The protective film 44 is an insulating film disposed on the back side of the semiconductor substrate 41, covering the periphery of the source electrode 40S. Materials for the insulating film include, for example, polyimide and silicon nitride. The protective film 44 has an opening 440 defining a connection area in the source electrode 40S. The opening 440 exposes the source electrode 40S in a bondable manner. The protective film 44 also has an opening 441 defining a connection area in the pad 40P. Both openings 440 and 441 are through-holes that penetrate the protective film 44 in the Z direction. In the source electrode 40S (connection electrode 43), the portion exposed from the opening 440 of the protective film 44 forms a bond with the sintered component 101A.

[0572] The protective film 44 in this embodiment is made of polyimide. The protective film 44 covers the peripheral portion 420 of the base electrode 42, which will be described later. The protective film 44 is not disposed in a dicing region, for example, within a predetermined range from the outer peripheral end of the semiconductor substrate 41. The opening shape of the opening 440, that is, the planar shape of the inner peripheral surface 442 of the protective film 44 defining the opening 440, is approximately rectangular. The inner peripheral surface 442 is sometimes referred to as the inner peripheral end or the opening end.

[0573] The base electrode 42 is a metal layer formed adjacent to the semiconductor substrate 41 in the multilayer source electrode 40S. The base electrode 42 is sometimes referred to as the lower electrode, lower layer electrode, wiring electrode, base layer, first metal layer, etc. The base electrode 42 is connected to the back side of the semiconductor substrate 41. The base electrode 42 is formed, for example, using a material with Al (aluminum) as the main component. In this embodiment, an AlSi-type alloy such as AlSi or AlSiCu is used as the material.

[0574] In planar view, the base electrode 42 encloses and extends into the outer peripheral region surrounding the semiconductor substrate 41, encompassing a component region (active region) not shown. The planar shape of the peripheral portion 420 of the base electrode 42 is approximately rectangular. The peripheral portion 420 is covered by a protective film 44.

[0575] The connecting electrode 43 is stacked on the base electrode 42. The connecting electrode 43 is also referred to as the upper electrode, upper layer electrode, upper layer, or second metal layer. For bonding with the sintered component 101A, the connecting electrode 43 contains at least noble metals such as Au (gold), Ag (silver), Pt (platinum), and Pd (palladium). The connecting electrode 43 may also contain base metals along with the noble metals.

[0576] The connecting electrode 43 in this embodiment comprises Ni (nickel). Ni is harder than the Al alloy constituting the base electrode 42. The connecting electrode 43 comprises Ni and a noble metal, such as Au or Ag. The connecting electrode 43 is formed as a multilayer, for example, by plating. At least a portion of the noble metal of the connecting electrode 43 diffuses into the sintered component 101A during bonding.

[0577] The connecting electrode 43 is stacked on the base electrode 42 within the opening 440 of the protective film 44. The entire circumference of the outer peripheral end of the connecting electrode 43 is in contact with the inner peripheral surface 442 of the protective film 44.

[0578] <Joint Structure>

[0579] Next, based on Figures 90-92 The bonding structure of semiconductor element 40 will be described. Figure 90 In the diagram, the outer periphery of the sintered component 101A is indicated by a dashed line, and the outer periphery of the conductive spacer 70 is indicated by a double-dotted line. Figure 92 This is a cross-sectional view showing the configuration of the sintered component 101A. Figure 92 Corresponding to Figure 91 Hereinafter, "inner side" and "outer side" refer to the relative positional relationship with the center of semiconductor element 40 as the reference position. The side closer to the center is the inner side, and the side farther from the center is the outer side.

[0580] In this embodiment, the substrate 60 and the conductive spacer 70 are wiring components (second wiring components) electrically connected to the source electrode 40S. Figure 90 and Figure 91 As shown, the sintered component 101A is located between the source electrode 40S of the semiconductor element 40 and the conductive spacer 70. The sintered component 101A bonds the source electrode 40S to the conductive spacer 70.

[0581] Sintered component 101A is made of Ag or Cu. Sintered component 101A is a sintered body formed from Ag particles or Cu particles. Sintered component 101A enables low-temperature bonding compared to solder. For example... Figure 92 As shown, the sintered component 101A is disposed at a predetermined distance L30 between itself and the inner peripheral surface 442 of the protective film 44. Figures 90-92 As shown, the sintered component 101A is disposed inside the inner peripheral surface 442. The planar shape of the sintered component 101A is, for example, generally rectangular. The entire circumference of the outer peripheral end of the sintered component 101A is not in contact with the protective film 44. That is, the inner peripheral surface 442 of the protective film 44 encloses the sintered component 101A in planar view.

[0582] The conductive spacer 70 has a metal film (not shown) at its interface with the sintered component 101A. Like the connecting electrode 43, the metal film contains at least a noble metal. In this embodiment, the metal film is a coating containing Ni and a noble metal, such as Au or Ag.

[0583] like Figures 90-92 As shown, the conductive spacer 70 is disposed inside the inner peripheral surface 442. The planar shape of the conductive spacer 70 is, for example, generally rectangular. The outer peripheral end of the conductive spacer 70 is disposed outside or substantially aligned with the outer peripheral end of the sintered component 101A in planar view. That is, the conductive spacer 70 is disposed in a manner that encloses or substantially aligns with the sintered component 101A in planar view. In this embodiment, the conductive spacer 70 encloses the sintered component 101A.

[0584] <Jointing Method>

[0585] Next, based on Figure 93 The method for forming the above-mentioned joint structure, i.e., the joint method, will be described. Figure 93 It is a cross-sectional view showing the joining method. Figure 93 Corresponding to Figure 91 .

[0586] In this embodiment, a sintered sheet 105 is used to form the sintered component 101A. The sintered sheet 105 is sometimes referred to as a sintered film. The sintered sheet 105 contains Ag or Cu. Figure 93 As shown, the sintered sheet 105 is disposed on the source electrode 40S (connection electrode 43) of the semiconductor element 40. The sintered sheet 105 has a predetermined size that does not contact the protective film 44 in planar view.

[0587] Next, conductive spacers 70 are disposed on the sintered sheet 105. While heating, pressure is applied from the conductive spacer 70 side using a pressure device (not shown). As a result, the sintered sheet 105 is compressed and expanded between the opposing surfaces of the connecting electrode 43 and the conductive spacer 70, resulting in a thinner sheet, and is sintered to form a sintered component 101A. The dimensions of the sintered sheet 105 are determined such that the sintered component 101A, relative to the inner peripheral surface 442 of the protective film 44 and the conductive spacer 70, are in the positional relationship specified above.

[0588] <Simulation Results>

[0589] Figure 94 The results of the thermal stress simulation are shown. In this simulation, the strain amplitude generated in the substrate electrode 42 was measured during a power cycle test that alternated between room temperature and 150°C. Figure 94 This indicates the relationship between the distance L30 and the strain amplitude. In Figure 94In the diagram, a distance L30 of 0 (zero) corresponds to the position on the inner circumferential surface 442 of the protective film 44 in planar view. A negative value for distance L30 indicates the distance inward from the inner circumferential surface 442, while a positive value indicates the distance outward.

[0590] like Figure 94 As shown, it is clear that when the distance L30 is 5 μm or more, the strain amplitude generated in the base electrode 42 is approximately 0 (zero). In this embodiment, based on this understanding, the specified distance L30 is set to 5 μm.

[0591] <Summary of Implementation Method 10>

[0592] Figure 95 This indicates a connection structure in which solder 101B is used as the bonding material 101. Figure 95 Corresponding to Figure 93 In the case of solder 101B, solder 101B is reflowed for bonding. During bonding, the molten solder 101B wets and diffuses on the surface of the connecting electrode 43. Therefore, as... Figure 95 As shown by the dashed line, a three-point structure is formed, consisting of the sealing solid 30, the source electrode 40S (connecting electrode 43), and the solder 101B (bonding material 101). Thermal stress is concentrated at this three-point structure due to the difference in their coefficients of linear expansion. In the base electrode 42, thermal stress is concentrated in the portion directly below the outer peripheral end of the connecting electrode 43. This can potentially lead to cracks in the base electrode 42 and further damage to the semiconductor substrate 41.

[0593] In this embodiment, a sintered component 101A is used instead of solder 101B. The sintered component 101A is formed by heating at a temperature below its melting point. Unlike solder 101B, the sintered component 101A does not become molten during bonding. Compared to solder 101B, the sintered component 101A has lower wettability on the connecting electrode 43 and the conductive spacer 70. Therefore, the sintered component 101A does not wet and diffuse on the surface of the connecting electrode 43 and the conductive spacer 70 during bonding, unlike solder 101B.

[0594] Because the sintered component 101A is easily held in a predetermined position, it can be configured with a predetermined distance L30 between it and the inner peripheral surface 442 of the protective film 44. This avoids the formation of a triple junction of the sealing solid 30, the source electrode 40S (connecting electrode 43), and the sintered component 101A (bonding material 101). Therefore, a semiconductor device 20 with suppressed thermal stress concentration and high connection reliability can be provided. Furthermore, the sintered component 101A has a higher thermal conductivity than the solder 101B. This also improves heat dissipation.

[0595] The distance L30 is not particularly limited. The sintered component 101A only needs to be at least separated from the inner peripheral surface 442. In this embodiment, the distance L30 between the sintered component 101A and the inner peripheral surface 442 of the protective film 44 is set to 5 μm or more. This effectively reduces the strain amplitude of the base electrode 42 caused by thermal stress. That is, it further improves the connection reliability.

[0596] In planar view, the positional relationship between the conductive spacer 70 and the sintered component 101A is not particularly limited. For example, in planar view, the sintered component 101A may protrude from the conductive spacer 70. As described above, the sintered component 101A is formed by sintering Ag or Cu particles through heating / pressurization. The portion protruding from the conductive spacer 70, since it is not pressurized, is not sintered and remains, potentially falling off as a conductive foreign object. That is, a short circuit or the like may occur.

[0597] In this embodiment, in planar view, the inner peripheral surface 442 of the protective film 44 encloses the conductive spacer 70, which is either aligned with or encloses the sintered component 101A. This allows pressure to be applied to the entire area of ​​the sintered component 101A (sintered sheet 105) before sintering, through the conductive spacer 70. Consequently, sintering residue can be suppressed while preventing contact between the sintered component 101A and the protective film 44.

[0598] <Variation Example>

[0599] This illustration shows an example of using a sintered sheet 105 to form a sintered component 101A, but it is not limited to this. For example, a sintering paste containing Ag particles and Cu particles dispersed in a solvent can also be used. The sintered sheet 105 is easier to hold in a specified position compared to a sintering paste.

[0600] This example illustrates a second wiring component connected to the source electrode 40S, which includes a substrate 60 serving as a wiring board and a conductive spacer 70, but is not limited to this. A protrusion may be provided on the surface metal body 62 instead of the conductive spacer 70. That is, the second wiring component may be configured to have only the substrate 60 and no conductive spacer 70. In this case, the sintered component 101A is positioned between the front end face of the protrusion on the surface metal body 62 and the source electrode 40S (connecting electrode 43).

[0601] The substrate 50 is shown as an example of a first wiring component, but it is not limited to this. A metal plate (lead frame) may be used instead of the substrate 50. The substrate 60 is shown as an example of a second wiring component, but it is not limited to this. A metal plate (lead frame) may be used instead of the substrate 60. The second wiring component may also have a metal plate and a conductive spacer 70, and a protrusion may be provided on the metal plate instead of the conductive spacer 70.

[0602] This illustrates an example of a semiconductor device 20 having semiconductor elements 40H and 40L, but it is not limited to this. It may also have only one semiconductor element 40 constituting one arm. For example, the semiconductor device 20 may also have only one semiconductor element 40.

[0603] The structure described in this embodiment can be combined with any of the structures described in the first, second, third, fourth, fifth, sixth, seventh, eighth, and ninth embodiments and their variations.

[0604] (11th Embodiment)

[0605] This embodiment is a variation based on the prior embodiment, and the description of the prior embodiment can be referenced. In order to improve heat dissipation, as described in this embodiment, a sintered component can be used at the junction of the main electrode and the wiring component.

[0606] Semiconductor Devices

[0607] First, based on Figure 96 The semiconductor device 20 of this embodiment will be described. Figure 96 Is with Figure 5 The corresponding sectional view. Figure 96 For convenience, the illustration of the external connection terminal 90 has been omitted.

[0608] The semiconductor device 20 of this embodiment has a structure similar to that described in the prior embodiment (see reference). Figures 2 to 13 The same structure. For example... Figure 96 As shown, the semiconductor device 20 includes semiconductor elements 40 (40H, 40L), substrates 50 and 60 arranged as wiring components sandwiching the semiconductor elements 40 in the Z direction, and an encapsulating solid 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D of the semiconductor element 40, which serves as the first main electrode. The surface metal body 62 of the substrate 60 is connected to the source electrode 40S of the semiconductor element 40, which serves as the second main electrode, via a conductive spacer 70. The encapsulating solid 30 encapsulates the semiconductor elements 40, substrates 50 and 60, and conductive spacer 70. The drain electrode 40D and the surface metal body 52 of the substrate 50 are bonded by a sintering component 100A, which serves as a bonding material 100.

[0609] <Configuration of sintered components and uneven oxide films>

[0610] Next, based on Figures 97-99 This describes the arrangement of the sintered component 100A and the uneven oxide film 520 relative to the semiconductor element 40. Figure 97 It is Figure 96The image shows a magnified view of region XCVII. Figure 98 It is a plan view showing the positional relationship between the semiconductor element 40, the sintered component 100A, and the uneven oxide film 520. Figure 99 It is Figure 97 The XCVIX region is a magnified image.

[0611] like Figure 97 and Figure 98 As shown, the upper surface 52a of the surface metal body 52 has a mounting portion 529a, an outer peripheral portion 529b, and a middle portion 529c. The uneven oxide film 520 is not provided in the mounting portion 529a, but is provided in the outer peripheral portion 529b and the middle portion 529c.

[0612] The mounting portion 529a includes a portion that overlaps with the semiconductor element 40 (drain electrode 40D) in a planar view in the Z direction, and is a portion joined to the drain electrode 40D via the sintering member 100A. The outer peripheral portion 529b includes a portion that is outside the outer peripheral end 402 of the semiconductor element 40 in a planar view, and is a portion that surrounds the semiconductor element 40. The middle portion 529c is the portion between the mounting portion 529a and the outer peripheral portion 529b, and surrounds the mounting portion 529a. In this embodiment, the mounting portion 529a is substantially aligned with the semiconductor element 40 (drain electrode 40D) in a planar view. The planar shape of the middle portion 529c is substantially rectangular and annular, and the inner peripheral end of the middle portion 529c is substantially aligned with the outer peripheral end 402 of the semiconductor element 40. The entire area of ​​the middle portion 529c is located outside the semiconductor element 40 in a planar view.

[0613] like Figures 97-99 As shown, the surface metal body 52 of the substrate 50 is similar to the structure described in the prior embodiment (see reference). Figure 67 and Figure 74 Similarly, it has an uneven oxide film 520. For example... Figure 99 As shown, the surface metal body 52 has a base material 521 and a metal film 522 and an uneven oxide film 520 disposed on the surface of the base material 521.

[0614] The metal film 522 of this embodiment has a base film mainly composed of Ni and an upper film mainly composed of a noble metal such as Au or Ag that can be bonded to the sintering component 100A. Specifically, a Ni coating containing P and an Au coating are used as the base film. Multiple recesses 523 are formed in the outer peripheral portion 529b of the upper surface 52a of the metal film 522. No recesses 523 are formed in the mounting portion 529a and the middle portion 529c. In the portion where no recesses 523 are formed, the thickness of the metal film 522 is, for example, about 10 μm. That is, the film thickness before laser irradiation is about 10 μm. The recesses 523 are formed by irradiation with a pulsed laser. Each pulse forms one recess 523. In the outer peripheral portion 529b, the surface of the metal film 522 is scaly due to the multiple recesses 523. The outer peripheral portion 529b is the laser irradiation area, and the mounting portion 529a and the middle portion 529c are the non-irradiation areas.

[0615] An uneven oxide film 520 is formed on a metal film 522. The uneven oxide film 520 is not formed on the mounting portion 529a, but rather on the surrounding portion 529a, namely the outer peripheral portion 529b and the middle portion 529c. As described in the previous embodiment, the uneven oxide film 520 is formed by irradiating the metal film 522 with a laser. The uneven oxide film 520 is a laser-irradiated film formed by laser irradiation. The main component of the uneven oxide film 520 is an oxide of the metal, the main component of the metal film 522.

[0616] In the outer peripheral portion 529b, i.e., the laser irradiation area, the average thickness of the uneven oxide film 520 is 10 nm to several hundred nm. The uneven oxide film 520 is formed by mimicking the unevenness of the surface of the metal film 522 having recesses 523. Furthermore, the unevenness is formed on the surface of the uneven oxide film 520 at a spacing finer than the width of the recesses 523. That is, very fine unevenness (roughness) is formed. In other words, a plurality of protrusions 520a (pillars) are formed at a relatively fine spacing. For example, the average width of the protrusions 520a is 1 nm to 300 nm, and the average spacing between the protrusions 520a is 1 nm to 300 nm. Furthermore, the average height of the protrusions 520a is 10 nm to several hundred nm.

[0617] The uneven oxide film 520 is formed by irradiating the metal film 522 with a laser, melting the surface of the metal film 522, and then vaporizing it. Therefore, it is formed not only on the outer periphery 529b, which is the laser irradiation area, but also on the periphery (nearby area) of the outer periphery 529b. In this embodiment, the uneven oxide film 520 is formed throughout the entire area of ​​the middle portion 529c in the non-laser irradiation area, but not in the mounting portion 529a. The width of the middle portion 529c, where the uneven oxide film 520 is present throughout the entire area, is, for example, 0.2 mm to 0.3 mm.

[0618] The average thickness of the uneven oxide film 520 in the intermediate portion 529c is thinner than that in the outer peripheral portion 529b, but thicker than the natural oxide film, since it is not directly irradiated by the laser. Specifically, it is 0.1 nm to 10 nm. Furthermore, the height of the protrusions 520a on the surface of the uneven oxide film 520 is also lower than that in the outer peripheral portion 529b. Specifically, it is 0.1 nm to 10 nm. Additionally, the average width and average spacing of the protrusions 520a are similar to those in the outer peripheral portion 529b.

[0619] Thus, the uneven oxide film 520 has a thick film portion 520X and a thin film portion 520Y. The thick film portion 520X is the portion of the uneven oxide film 520 disposed in the laser irradiation area, i.e., the outer peripheral portion 529b. The thin film portion 520Y is the portion of the uneven oxide film 520 disposed in the laser non-irradiation area, i.e., the middle portion 529c. Compared with the thick film portion 520X, the uneven oxide film 520 has a thinner film thickness and a lower height for the protrusions 520a. The thick film portion 520X is disposed in the outer peripheral portion 529b. The thin film portion 520Y is disposed in the middle portion 529c.

[0620] Because the height of the protrusion 520a in the thick film portion 520X is greater than that in the thin film portion 520Y, the sealing solid 30 is wound around and an anchoring effect is generated. Furthermore, the contact area with the sealing solid 30 is increased. As a result, the sealing solid 30 is in close contact with the outer peripheral portion 529b. The thick film portion 520X is sometimes referred to as the roughened portion or the close-fitting portion.

[0621] The sintered component 100A, like the sintered component 101A described in the prior embodiment, is made of Ag or Cu. The sintered component 100A is a sintered body formed from Ag particles or Cu particles. The sintered component 100A allows for low-temperature bonding compared to solder. The sintered component 100A is formed by heating / pressurizing a sintered sheet or sintering paste. In planar view, the sintered component 100A extends outward beyond the outer peripheral end 402 of the semiconductor element 40. The sintered component 100A is arranged to overlap with the mounting portion 529a and the intermediate portion 529c in planar view. In this embodiment, the outer peripheral end of the sintered component 100A is substantially aligned with the outer peripheral end of the intermediate portion 529c. The sintered component 100A overlaps with the entire area of ​​the mounting portion 529a and the entire area of ​​the intermediate portion 529c in planar view.

[0622] <Summary of Implementation Method 11>

[0623] As described above, the intermediate portion 529c has a thin film portion 520Y of an uneven oxide film 520. Because of the thin film portion 520Y, the wettability of the intermediate portion 529c to solder is lower than that of the mounting portion 529a. Therefore, solder is less likely to wet and diffuse from the mounting portion 529a to the intermediate portion 529c.

[0624] In this embodiment, a sintered component 100A is used instead of solder. The sintered component 100A is formed by heating at a temperature below its melting point. The sintered component 100A does not become molten like solder during bonding. The sintered component 100A does not wet and diffuse on the surface of the surface metal body 52 during bonding like solder.

[0625] During pressure sintering, the sintered component 100A is compressed and expanded between the opposing surfaces of the drain electrode 40D and the surface metal body 52. ​​Through this compression and expansion, the sintered component 100A is disposed not only on the mounting portion 529a but also on the intermediate portion 529c. The sintered component 100A contacts the thin film portion 520Y through compression and expansion under pressure, rather than through wetting diffusion. Therefore, not only does the junction between the sintered component 100A and the mounting portion 529a function as a heat dissipation path, but the contact portion between the sintered component 100A and the intermediate portion 529c also functions as a heat dissipation path. As a result, a semiconductor device 20 with high heat dissipation performance can be provided. Furthermore, the sintered component 100A has a higher thermal conductivity than solder. This further improves heat dissipation performance.

[0626] Furthermore, the height of the protrusion 520a of the thin film portion 520Y is lower than that of the thick film portion 520X. That is, the adhesion force of the middle portion 529c to the sealing solid 30 is lower than that of the outer peripheral portion 529b. As a result, it is difficult for the sealing solid 30 to adhere tightly to the middle portion 529c. In this embodiment, the sintered member 100A contacts the middle portion 529c. The sintered member 100A covers the portion with low adhesion force in the upper surface 52a. Therefore, it is possible to suppress the peeling of the sealing solid 30 from the upper surface 52a around the semiconductor element 40. As a result, it is possible to suppress the concentration of thermal stress at the junction or drain electrode 40D of the sintered member 100A, thereby improving the connection reliability.

[0627] In this embodiment, the middle portion 529c is positioned further outward than the semiconductor element 40. This allows for a larger joint between the sintered component 100A and the mounting portion 529a. Furthermore, the contact portion between the sintered component 100A, located outside the semiconductor element 40, and the middle portion 529c also functions as a heat dissipation path. Therefore, heat dissipation can be further improved.

[0628] <Variation Example>

[0629] This example illustrates an overlap between the sintered component 100A and the entire area of ​​the intermediate portion 529c, but is not limited to this. At least a portion of the sintered component 100A may overlap with the intermediate portion 529c. That is, at least a portion of the sintered component 100A may contact the thin film portion 520Y of the uneven oxide film 520. This expands the heat dissipation path and improves heat dissipation performance.

[0630] The configuration of the intermediate portion 529c is not limited to the example described above. The intermediate portion 529c may also be located only a portion of its width direction outside the semiconductor element 40. If at least a portion of the intermediate portion 529c is located outside the semiconductor element 40 in the width direction, the junction can be enlarged and the heat dissipation path can be expanded. This improves heat dissipation.

[0631] Furthermore, at least a portion of the intermediate portion 529c in the width direction may be located further inward than the outer peripheral end 402 of the semiconductor element 40. This improves heat dissipation through contact between the sintering member 100A and the thin film portion 520Y (intermediate portion 529c), and brings the position of the outer peripheral portion 529b closer to the semiconductor element 40. In other words, it can suppress the peeling of the sealing solid 30 around the semiconductor element 40.

[0632] exist Figure 100 and Figure 101 In the example shown, the intermediate portion 529c spans the outer peripheral end 402 of the semiconductor element 40 in planar view. That is, a portion of the width direction of the intermediate portion 529c is further outward than the outer peripheral end 402, and another portion is further inward than the outer peripheral end 402. The sintered component 100A overlaps with the entire area of ​​the mounting portion 529a and the entire area of ​​the intermediate portion 529c in planar view. Thus, as described above, heat dissipation can be improved while suppressing the peeling of the sealing solid 30 around the semiconductor element 40. Figure 100 and Figure 101 This is a diagram representing a variation. Figure 100 Corresponding to Figure 97 , Figure 101 Corresponding to Figure 98 .

[0633] exist Figure 102 and Figure 103 In the example shown, the outer peripheral end of the intermediate portion 529c is substantially aligned with the outer peripheral end 402 of the semiconductor element 40 in planar view. The outer peripheral end of the sintered component 100A is also substantially aligned with the outer peripheral end 402 of the semiconductor element 40 in planar view. Thus, in planar view, the outer peripheral portion 529b (thick film portion 520X) is adjacent to the semiconductor element 40. Therefore, heat dissipation can be improved through the contact between the sintered component 100A and the intermediate portion 529c, and the peeling of the sealing solid 30 around the semiconductor element 40 can be more effectively suppressed. Figure 102 and Figure 103 This is a diagram representing a variation. Figure 102 Corresponding to Figure 97 , Figure 103 Corresponding to Figure 98 .

[0634] exist Figure 104In the example shown, a portion of the outer peripheral portion 529b overlaps with the semiconductor element 40 in planar view. The middle portion 529c is located inside the outer peripheral end 402 of the semiconductor element 40. Figure 104 This is a diagram representing a variation. Figure 104 Corresponding to Figure 98 In this case, the sintered component 100A may only contact the thin film portion 520Y. The sintered component 100A may also contact the portion directly below the semiconductor element 40 of the thin film portion 520Y and the thick film portion 520X.

[0635] This example illustrates a surface metal body 520 with an uneven oxide film 520 disposed only on the surface metal body 52 to which the drain electrode 40D is connected, but it is not limited to this. It may also be disposed on the side of the conductive spacer 70 to which the source electrode 40S is connected, and / or on the surface metal body 62 of the substrate 60, in addition to the surface metal body 52. ​​As described above, the thick film portion 520X of the uneven oxide film 520 provides the function of improving the adhesion to the encapsulating solid 30 and suppressing the wetting and diffusion of solder as a bonding material. The uneven oxide film 520 is preferably disposed at the locations where solder overflow is to be suppressed and where the adhesion to the encapsulating solid 30 is to be improved.

[0636] The substrate 50 is shown as an example of a wiring component, but it is not limited to this. A metal plate (lead frame) may be used instead of the substrate 50. Furthermore, a metal plate (lead frame) may be used instead of the substrate 60. A protrusion may be provided on the metal plate on the source electrode 40S side instead of the conductive spacer 70.

[0637] This illustrates an example of a semiconductor device 20 having semiconductor elements 40H and 40L, but it is not limited to this. It may also have only one semiconductor element 40 constituting one arm. For ...

Claims

1. A semiconductor device, characterized by: comprising: a first element and a second element as a plurality of semiconductor elements, each having a first main electrode and a second main electrode formed on a surface opposite to the first main electrode in a plate thickness direction, wherein the first element constitutes one arm of upper and lower arm circuits, the second element constitutes the other arm of the arms, and the second element and the first element are arranged side by side in a first direction orthogonal to the plate thickness direction; a first power terminal and a second power terminal as a plurality of power terminals, arranged such that the first element is located between the plurality of power terminals and the second element in the first direction, wherein the first power terminal is electrically connected to the first main electrode of the first element, and the second power terminal is electrically connected to the second main electrode of the second element; a first substrate, having a first insulating base material, a first surface metal body disposed on a surface of the first insulating base material, and a first back metal body disposed on a back surface of the first insulating base material, wherein the first surface metal body includes a first power wiring that electrically connects the first power terminal to the first main electrode of the first element, and a first relay wiring connected to the first main electrode of the second element, and the first power wiring and the first relay wiring are arranged side by side in the first direction; a second substrate, arranged such that the plurality of semiconductor elements are sandwiched between the second substrate and the first substrate in the plate thickness direction, having a second insulating base material, a second surface metal body disposed on a surface of the second insulating base material, and a second back metal body disposed on a back surface of the second insulating base material, wherein the second surface metal body includes a second power wiring that electrically connects the second power terminal to the second main electrode of the second element, and a second relay wiring connected to the second main electrode of the first element; an arm connection portion, arranged between the first element and the second element in the first direction, and electrically connecting the first relay wiring and the second relay wiring; and a sealing body, sealing the plurality of semiconductor elements, the arm connection portion, a part of each of the plurality of power terminals, the first surface metal body and the second surface metal body; wherein the second power wiring has a base portion on which the second element is disposed, and a pair of extension portions respectively connected to the second power terminal, the base portion and the second relay wiring are arranged side by side in the first direction, the pair of extension portions extend from the base portion along the first direction so as to sandwich the second relay wiring in a second direction, and the second direction is orthogonal to the plate thickness direction and the first direction; in the second direction, when a length of an end portion of the second relay wiring facing the base portion is defined as L1, a length of a facing side of the base portion facing the end portion is defined as L2, and a length of an arrangement region of the second element in the base portion is defined as L3, a relationship of L1<L2<L3 is satisfied.

2. The semiconductor device according to claim 1, characterized in that: The second trunk cable described above has a tapered portion within a specified range in the first direction, starting from the aforementioned end; The length of the second direction of the aforementioned contracted portion is the smallest at the aforementioned end, and at any first position it is less than or equal to the length of the second position which is further away from the aforementioned end than the aforementioned first position.

3. The semiconductor device as claimed in claim 2, characterized in that, The closer to the base, the shorter the length of the second direction of the contracted portion.

4. The semiconductor device as claimed in claim 2, characterized in that, The second relay cable described above has a fixed-width section connected to the aforementioned abduction section and whose length in the aforementioned second direction is fixed within a specified range; The first element is disposed in the amplitude-fixing section.

5. The semiconductor device according to any one of claims 1 to 4, characterized in that, A portion of each of the aforementioned pair of extended configurations is opposite to the aforementioned first power supply wiring in the aforementioned plate thickness direction.

6. The semiconductor device according to any one of claims 1 to 4, characterized in that, The aforementioned plurality of semiconductor elements include a plurality of the aforementioned first elements and a plurality of the aforementioned second elements; The plurality of the first elements described above are arranged in the second direction described above; Multiple of the aforementioned second elements are arranged in the aforementioned second direction.

7. The semiconductor device according to any one of claims 1 to 4, characterized in that, It has two of the aforementioned second power supply terminals; One of the aforementioned second power terminals is connected to one of the aforementioned pair of extended mounting portions, and the other of the aforementioned second power terminal is connected to the other of the aforementioned pair of extended mounting portions.

8. The semiconductor device as claimed in claim 7, characterized in that, It has two of the aforementioned first power supply terminals; It also has signal terminals that connect to the pads of the first component mentioned above; The two aforementioned first power terminals are respectively connected to the aforementioned first trunk wiring; In the second direction described above, the second power terminal, the first power terminal, the signal terminal, the first power terminal, and the second power terminal are arranged in that order.

9. The semiconductor device according to any one of claims 1 to 4, characterized in that, It also has an output terminal that connects to the aforementioned first trunk cabling; The first power terminal and the second power terminal protrude from the first surface of the sealing solid to the outside; The aforementioned output terminal protrudes from the second surface, which is opposite to the first surface in the first direction, to the outside of the aforementioned sealing solid.

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