基准电路、芯片及电子设备
By generating a bias voltage through a bias module and combining the virtual short characteristics of the bandgap reference module and the amplification module, the mismatch problem of electronic components in the reference circuit affected by temperature is solved, and better zero temperature drift characteristics are achieved.
CN117369581BActive Publication Date: 2026-07-17HEFEI CHIPSEA ELECTRONICS TECH CO LTD
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HEFEI CHIPSEA ELECTRONICS TECH CO LTD
- Filing Date
- 2023-10-27
- Publication Date
- 2026-07-17
AI Technical Summary
Technical Problem
The electronic components of the reference circuit are mismatched due to temperature, resulting in poor zero-temperature drift characteristics.
Method used
Instead of generating the bias voltage based on the output of the amplification module, a bias module is used to generate the bias voltage. By combining the virtual short characteristics of the bandgap reference module and the amplification module, the temperature coefficient is eliminated, resulting in a temperature-independent reference voltage.
Benefits of technology
It reduces the mismatch error of electronic components affected by temperature and improves the zero temperature drift characteristics of the reference circuit.
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Figure CN117369581B_ABST
Abstract
本申请实施例提供了一种基准电路、芯片及电子设备，该基准电路包括：偏置模块，用于产生偏置电压；带隙参考模块，与偏置模块连接，包括第一电压节点、第二电压节点和基准电压输出节点；放大模块，包括：偏置电压端，用于接收该偏置电压；第一输入端，与第一电压节点连接；第二输入端，与第二电压节点连接；输出端，与基准电压输出节点连接。本申请实施例，偏置电压由偏置模块产生，而非基于放大模块的输出产生，能够避免基准电路的电子元件受温度影响存在失配时将失配导致的误差引入偏置电压，进而减少电子元件受温度影响存在失配对基准电路的零温漂特性的影响。
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