Switching time algorithm, control method and power supply circuit for power factor correction circuit

CN117375398BActive Publication Date: 2026-10-27GUANGDONG CHIGO HEATING & VENTILATION EQUIP CO LTD
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Patent Information

Application Number
CN202311284527.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-09-28
Publication Date
2026-10-27
Estimated Expiration
2043-09-28

AI Technical Summary

Technical Problem

现有技术中,通常通过调节开关频率的方式来切换电源电路的工作模式,但是PFC电路控制过程中的具体导通时间和关断时间尤为关键,只是采用同样的开关频率并不能控制出理想的效果

Benefits of technology

[0015]根据本发明的技术方案,电感电流纹波率r用于电感的交流分量与直流分量的比例关系,电路在连续导通模式(CCM)下,电感电流纹波率r的有效值范围为0-2,电路在临界导通模式(CRM)下,电感电流纹波率r为固定值2。根据上述的功率因数校正电路的开关时间算法,通过软件将电感电流纹波率r设定为2或小于2的值,从而调节功率因数校正电路的工作模式。

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Abstract

The present application relates to the technical field of power supply, in particular to a switching time algorithm, a working mode control method, a frequency control method and a power supply circuit of a power factor correction circuit.The switching time algorithm of the power factor correction circuit comprises a sampling step of sampling input voltage and output voltage of the power factor correction circuit; and a calculation step of calculating on-time and off-time of the power factor correction circuit according to the input voltage and the output voltage.Through accurately calculating the on-time and the off-time of the power factor correction circuit, the switching period and the frequency of the circuit can be further derived, so as to realize the working mode control of the circuit, i.e., critical conduction mode (CRM) and continuous conduction mode (CCM).
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Description

Technical Field

[0001] This invention relates to the field of power supply technology, and more specifically to a switching time algorithm, control method, and power supply circuit for a power factor correction circuit. Background Technology

[0002] Power factor refers to the relationship between effective power and total power consumption (apparent power). Specifically, it is the ratio of effective power to total power consumption (apparent power). In other words, the higher the power factor of a circuit, the greater the proportion of effective power. In traditional circuits, waveform shifts or distortions caused by nonlinear components often lead to a decrease in the circuit's power factor.

[0003] Generally, the principle of a power factor correction (PFC) circuit is to improve the power factor by controlling the waveform of the power supply input current. PFC circuits have several operating modes. The input voltage of the power supply circuit is applied to the inductor. If the inductor current remains greater than zero throughout a switching cycle, the inductor remains conducting; this is called continuous conduction mode (CCM). If the inductor current immediately resets when it reaches zero within a switching cycle, this is called critical conduction mode (CRM). Critical conduction mode (CRM) can be considered a special case of continuous conduction mode (CCM).

[0004] In practical applications of power supply circuits, the operating mode needs to switch between Critical On-Mode (CRM) and Continuous On-Mode (CCM) based on conditions such as the actual connected load. In existing technologies, the operating mode is typically switched by adjusting the switching frequency. However, the specific on-time and off-time during PFC circuit control are crucial; simply using the same switching frequency cannot achieve the desired control effect. Summary of the Invention

[0005] To address the above problems, this invention provides a switching time algorithm, operating mode control method, frequency control method, and power supply circuit for a power factor correction circuit. The switching time algorithm for the power factor correction circuit in this invention can calculate the on-time and off-time of the power factor correction circuit, thereby achieving precise adjustment of the circuit's operating mode.

[0006] The present invention provides a switching time algorithm for a power factor correction circuit, comprising: a sampling step, sampling the input voltage and output voltage of the power factor correction circuit; and a calculation step, calculating the on-time and off-time of the power factor correction circuit based on the input voltage and output voltage.

[0007] According to the technical solution of the present invention, by accurately calculating the on-time and off-time of the power factor correction circuit, the switching cycle and frequency of the circuit can be further derived, thereby realizing the working mode of the control circuit, namely the critical on-mode (CRM) and the continuous on-mode (CCM).

[0008] In the technical solution of this invention, the calculation steps in the switching time algorithm of the power factor correction circuit include a conduction time calculation step, which includes step a, based on the inductor voltage formula du=L*di / dt and the inductor current ripple rate formula r=(I IN (peak)-I IN (valley)) / I IN (average) gives the conduction time t. on The inductance value L, inductor current ripple r, and average current I of the inductor are related to these parameters. IN (average) and input voltage V IN Relationship t on =L*r*I IN (average) / V IN , where I IN (peak) and I IN (valley) represents the peak and valley values ​​of the inductor current, respectively; step b, average current I IN (average) and input voltage V IN The ratio is defined as the load adjustment factor n = I IN (average) / V IN The conduction time t is obtained. on The relationship between the inductance value L, the inductor current ripple rate r, and the load regulation factor n is expressed as t. on =L*r*n.

[0009] According to the technical solution of the present invention, the load adjustment coefficient n is related to the load parameters of the circuit connection; the heavier the load, the more I... IN The larger the average value, the greater the input voltage V. IN When the load adjustment factor n remains constant, it will increase. Output voltage stabilization can be achieved by dynamically adjusting n according to the load intensity via software. Furthermore, according to the relationship t... on = L*r*n, where L is the inductance value in the circuit and can be considered a constant, representing the inductor's own properties. The larger the inductor current ripple rate r is set, or the heavier the load, the longer the conduction time t will be. on The longer the duration, the better. By combining the inductance value L, the preset inductance current ripple rate r, and the load regulation coefficient n, the conduction time t for each switching cycle can be calculated. on .

[0010] In the technical solution of this invention, the calculation steps in the switching time algorithm of the power factor correction circuit include a turn-off time calculation step. The turn-off time calculation step includes step c, which uses the inductor voltage formula du=L*di / dt and the inductor current ripple rate formula r=(I IN (peak)-I IN (valley)) / I IN (average) gives the shutdown time t. off The inductance value L, inductor current ripple r, and average current I of the inductor are related to these parameters. IN (average) and input voltage V IN Input voltage V O Relationship t off =L*r*I IN (average) / (V O -V IN Step d, average current I IN (average) and input voltage V IN The ratio is defined as the load adjustment factor n = I IN (average) / V IN and conduction time t on =L*r*n, to get the off time t off With conduction time t on and input voltage V IN Input voltage V O Relationship t off =t on *V IN / (V O -V IN ).

[0011] According to the technical solution of the present invention, combined with the sampled input voltage V IN and output voltage V O The conduction time t calculated in the conduction time calculation step on The off-time t of the switching cycle can then be calculated. off The off time t of the switching cycle off It is also related to the inductance value L, the inductance current ripple rate r, and the load adjustment factor n.

[0012] In the technical solution of this invention, the calculation steps in the switching time algorithm of the power factor correction circuit further include a switching period calculation step: switching period T = conduction time t on +Shutdown time t off =L*r*n*V O / (V O -V IN ).

[0013] According to the technical solution of the present invention, the switching period T of the circuit is also related to the inductor current ripple rate r and the load adjustment coefficient n. The switching period T and the switching frequency of the circuit can be adjusted by adjusting the inductor current ripple rate r and / or the load adjustment coefficient n by software.

[0014] The present invention also provides a method for controlling the operating mode of a power factor correction circuit. Based on the switching time algorithm of the power factor correction circuit described above, the operating mode of the power factor correction circuit is adjusted by software adjusting the inductor current ripple rate r in the power factor correction circuit.

[0015] According to the technical solution of the present invention, the inductor current ripple rate *r* is used to determine the ratio of the AC component to the DC component of the inductor. In continuous conduction mode (CCM), the effective value range of the inductor current ripple rate *r* is 0-2. In critical conduction mode (CRM), the inductor current ripple rate *r* is a fixed value of 2. Based on the switching time algorithm of the power factor correction circuit described above, the inductor current ripple rate *r* is set to a value of 2 or less than 2 via software, thereby adjusting the operating mode of the power factor correction circuit.

[0016] The present invention also provides a frequency control method for a power factor correction circuit. Based on the switching time algorithm of the power factor correction circuit described above, the switching frequency of the power factor correction circuit is adjusted by software by adjusting the inductor current ripple rate r and / or the load adjustment coefficient n in the power factor correction circuit.

[0017] According to the technical solution of the present invention, the switching period T and switching frequency of the circuit can be adjusted by software adjustment of the inductor current ripple rate r. By combining the real-time sampled input voltage and output voltage and controlling the dynamic change of the inductor current ripple rate r, the real-time switching frequency of the power factor correction circuit can be adjusted, thereby controlling the switching frequency to either variable frequency or fixed frequency.

[0018] The present invention also provides a power supply circuit, which includes a power factor correction circuit that executes the switching time algorithm, operating mode control method or frequency control method described above. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of a power factor correction circuit provided in an embodiment of the present invention;

[0020] Figure 2 This is a timing diagram corresponding to the input current and the drive signal provided in an embodiment of the present invention;

[0021] Figure 3This is a flowchart of a switching time algorithm for a power factor correction circuit provided in an embodiment of the present invention;

[0022] Figure 4 This is a waveform diagram of the average value of input voltage and input current provided in an embodiment of the present invention;

[0023] Figure 5 It is a waveform diagram of the average value of input voltage and input current over half a power frequency cycle (180°);

[0024] Figure 6 It is a waveform diagram of the input voltage and switching frequency over half a power frequency cycle (180°);

[0025] Figure 7 It is a waveform diagram of switching frequency and inductor current ripple rate r during half a power frequency cycle (180°).

[0026] Explanation of reference numerals in the attached diagram: rectifier bridge BD, capacitor C1, capacitor C2, diode D, inductor L, switching transistor Q, sampling resistor R1, sampling resistor R2, sampling resistor R3, sampling resistor R4, sampling resistor R5. Detailed Implementation

[0027] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present invention.

[0028] Figure 1 This is a schematic diagram of a power factor correction circuit provided in an embodiment of the present invention.

[0029] like Figure 1 As shown, in an embodiment of the present invention, a power factor correction circuit is provided. The rectifier bridge BD is used to correct the AC input voltage V. S After rectification, and then filtering out high-frequency switching noise through capacitor C1, the input voltage V can be obtained. IN Then, through inductor L and switching transistor Q, it is connected to diode D, capacitor C2, and subsequent load. The output voltage at the load terminal is V. O When the power factor correction circuit described above is working, the switching transistor Q performs a high-frequency switching action under the action of the drive signal DRIVE. When the switching transistor Q is turned on, the input voltage V... IN When applied across the inductor L, the current in inductor L is the input current I. INWhen the voltage rises, inductor L is in the energy storage stage; when the switch Q is turned off, inductor L enters the freewheeling stage, charging capacitor C2 through diode D and supplying power to the subsequent load. The voltage divider circuit composed of sampling resistors R1 and R2 is connected to the input voltage V. IN Parallel connection, for input voltage V IN The sampling input signal V is obtained by sampling. IN_S The voltage divider circuit composed of sampling resistors R3 and R4 is related to the output voltage V. O Parallel connection, affecting the output voltage V O The sampling input signal V is obtained by sampling. O_S The sampling resistor R5 affects the input current I. IN The sampling includes the switching current when the switch Q is on and off.

[0030] Figure 2 This is a timing diagram corresponding to the input current and the drive signal provided in an embodiment of the present invention.

[0031] like Figure 2 As shown, in the power factor correction circuit described above, the inductor current is the input current I. IN Related to the drive signal DRIVE, i.e., related to the on-time t of switch Q. on and shutdown time t off Related. Specifically, the on-time t of the switch Q. on The longer the length, the higher the input current I. IN peak I IN The higher the peak value, the longer the turn-off time t of the switching transistor Q. off The longer the length, the higher the input current I. IN The longer the fall time, the greater the input current I. IN Valley value I IN The lower the (valley) value, the better; while for CCM and CRM operating modes, the input current I... IN The average value is the input current I IN peak I IN (peak) and input current I IN Valley value I IN The average value of (valley) can be obtained as follows:

[0032] I IN (average) = (I IN (peak)+I IN (valley)) / 2···············(1)

[0033] Figure 3 This is a flowchart of a switching time algorithm for a power factor correction circuit provided in an embodiment of the present invention.

[0034] like Figure 3 As shown, in an embodiment of the present invention, a switching time algorithm for a power factor correction circuit is provided, including a sampling step, which samples the input voltage V of the power factor correction circuit. IN and output voltage V O ; Calculation steps, based on the input voltage V IN and output voltage V O The on-time t of the power factor correction circuit was calculated. on and shutdown time t off .

[0035] In an embodiment of the present invention, the calculation steps in the switching time algorithm of the power factor correction circuit include a conduction time calculation step, which includes:

[0036] Based on the relationship between the charging and discharging current and the voltage across the inductor:

[0037] du=L*di / dt···················(2)

[0038] When the switching transistor Q is turned on, the voltage across the inductor L is equal to the input voltage V. IN ,

[0039] du = V IN ······················· (3)

[0040] di = I IN (peak)-I IN (valley) ··················· (4)

[0041] dt=t on ······················· (5)

[0042] Substituting equations (3), (4), and (5) into equation (2), we get:

[0043] V IN =L*(I IN (peak)-I IN (valley)) / t on ·············(6)

[0044] Furthermore, there is the inductor current ripple rate r and the input current I. IN The relation is

[0045] r = (I IN (peak)-I IN(valley)) / I IN (average)··············(7)

[0046] That is: (I IN (peak)-I IN (valley)=r*I IN (average)···········(8)

[0047] Substituting formula (8) into formula (6) yields:

[0048] V IN =L*r*I IN (average) / t on ················(9)

[0049] In this embodiment, to simplify the calculation explanation, the input voltage V is measured by setting the resistance values ​​of sampling resistors R1, R2, R3, R4, and R5. IN Output voltage V O and input current I IN By setting the sampling scaling ratio to be equal, all equal to G, we can obtain:

[0050] V IN =V IN_S *G······················(10)

[0051] V O =V O_S *G······················(11)

[0052] I IN (average) = V CS (average)*G···············(12)

[0053] Substituting formulas (10) and (12) into formula (9), we get:

[0054] V IN_S *G=L*r*V CS (average)*G / t on ··············(13)

[0055] After removing the scaling factor G, we get:

[0056] V IN_S =L*r*V CS (average) / ton ···············(14)

[0057] This allows us to obtain the conduction time t of the power factor correction circuit. on :

[0058] t on =L*r*V CS (average) / V IN_S ··············(15)

[0059] Figure 4 This is a waveform diagram of the average value of input voltage and input current provided in an embodiment of the present invention.

[0060] like Figure 4 As shown, when the power factor correction circuit described above achieves power factor correction, its input voltage V IN and input current I IN The average value I IN The waveform of (average) can achieve in-phase operation; in other words, the input current I... IN The average value I IN (average) follows the input voltage V IN Synchronous changes, as seen in the waveform, the input current I IN The average value I IN (average) and input voltage V IN By scaling by a certain ratio n, where n is defined as the load adjustment factor, we obtain:

[0061] n = I IN (average) / V IN =V CS (average) / V IN_S ········· (16)

[0062] The load adjustment factor n is related to the load condition; the heavier the load, the higher the average input current I. IN The larger the average value, the greater the input voltage V. IN When the load adjustment factor n remains constant, the larger it is. Therefore, the software can dynamically increase or decrease the load adjustment factor n according to the load intensity to achieve the desired output voltage V. O Voltage stabilization.

[0063] Substituting (16) into (15) yields the conduction time t of the power factor correction circuit. on for

[0064] t on =L*r*n······················(17)

[0065] The above conduction time t is obtained on The relationship between the inductance value L, the inductor current ripple rate r, and the load regulation factor n is expressed as t. on After setting L*r*n, in a specific circuit, the inductance L is a constant. Combining this with the preset inductor current ripple rate r and the load regulation coefficient n, the conduction time t for each switching cycle can be calculated. on The larger the inductor current ripple rate r is set, or the heavier the load (i.e., the larger the load adjustment coefficient n), the longer the conduction time t will be. on The longer it is.

[0066] In an embodiment of the present invention, the calculation steps in the switching time algorithm of the power factor correction circuit further include a turn-off time calculation step, the turn-off time calculation step including...

[0067] Based on the relationship between the charging and discharging current and the voltage across the inductor:

[0068] du=L*di / dt························(2)

[0069] When the switching transistor Q is turned off, the voltage across the inductor L is the output voltage V. O and input voltage V IN The difference can be obtained

[0070] du = V O -V IN ·························(18)

[0071] di = I IN (peak)-I IN (valley)·····················(4)

[0072] dt=t off ·························(19)

[0073] Substituting formulas (18), (4), and (19) into formula (2) yields:

[0074] V O -V IN =L*(I IN (peak)-I IN (valley)) / t off ·············(20)

[0075] Furthermore, there is the inductor current ripple rate r and the input current I. INThe relation is

[0076] r = (I IN (peak)-I IN (valley)) / I IN (average)··············(7)

[0077] That is: (I IN (peak)-I IN (valley)=r*I IN (average)···········(8)

[0078] Substituting (8) into (20) gives:

[0079] V O -V IN =L*r*I IN (average) / t off ·················(twenty one)

[0080] Similarly, to simplify the calculation, the input voltage V IN Output voltage V O and input current I IN By setting the sampling scaling ratio to be equal, all equal to G, we can obtain the desired result.

[0081] V IN =V IN_S *G······················(10)

[0082] V O =V O_S *G·······················(11)

[0083] I IN (average) = V CS (average)*G···············(12)

[0084] Substituting formulas (10), (11), and (12) into formula (21), we get:

[0085] (V O_S -V IN_S )*G=L*r*V CS (average)*G / t off ···········(twenty two)

[0086] After removing the scaling factor G, we get:

[0087] V O_S -V IN_S =L*r*V CS (average) / t off ···············(twenty three)

[0088] This leads to the determination of the turn-off time t of the power factor correction circuit. off :

[0089] t off =L*r*V CS (average) / (V O_S -V IN_S )·············(twenty four)

[0090] According to formula (16) obtained in the conduction time calculation step, we can get:

[0091] V CS (average) = n * V IN_S ·················(25)

[0092] And, based on the on-time calculation step, the on-time t of the power factor correction circuit. on Formula (17) is used to substituting formulas (25) and (17) into formula (24) to obtain the turn-off time t of the power factor correction circuit. off :

[0093] t off =L*r*n*V IN_S / (V O_S -V IN_S )=t on *V IN_S / (V O_S -V IN_S )·····(26)

[0094] Based on the input voltage V IN The sampling input signal V is obtained by sampling. IN_S and the output voltage V O The sampling input signal V is obtained by sampling. O_S Combined with the conduction time t calculated in the conduction time calculation step on The off-time t of the switching cycle can then be calculated. off The off time t of the switching cycle off It is also positively correlated with the inductor current ripple rate r and the load adjustment factor n.

[0095] Furthermore, in an embodiment of the present invention, the calculation steps in the switching time algorithm of the power factor correction circuit further include a switching period calculation step: switching period T = conduction time t on +Shutdown time t off That is, T = L * r * n * V O / (V O -V IN Therefore, the switching frequency f is the reciprocal of the switching period T, i.e., f = (V O -V IN ) / (L*r*n*V O ).

[0096] In embodiments of the present invention, the inductor current ripple rate r or the average value I of the input current is adjusted by software. IN (average) and input voltage V IN The scaling factor, or load adjustment factor n, can change the switching frequency f of the circuit.

[0097] Preferably, in an embodiment of the present invention, a method for controlling the operating mode of a power factor correction circuit is also provided. Based on the switching time algorithm of the power factor correction circuit described above, the operating mode of the power factor correction circuit is adjusted by software adjusting the inductor current ripple rate r in the power factor correction circuit.

[0098] Specifically, the inductor current ripple rate *r* represents the ratio of the AC to DC components of the inductor. In continuous conduction mode (CCM), the effective value of *r* ranges from 0 to 2, resulting in high output power and suitability for heavy loads. In critical conduction mode (CRM), *r* is a fixed value of 2, exhibiting no conduction losses and high efficiency, suitable for light loads. Based on the switching time algorithm of the power factor correction circuit described above, to improve efficiency under light loads, the inductor current ripple rate *r* can be set to 2 via software, setting the operating mode to critical conduction mode (CRM). When the load increases, the inductor current ripple rate *r* can be set to a value between (0, 2) via software, setting the operating mode to continuous conduction mode (CCM). This allows the circuit to automatically adjust to a more suitable operating mode based on the load conditions, thus balancing circuit performance and efficiency.

[0099] In an embodiment of the present invention, a frequency control method for a power factor correction circuit is also provided. Based on the switching time algorithm of the power factor correction circuit described above, the switching frequency f of the power factor correction circuit is adjusted by software by adjusting the inductor current ripple rate r and / or load adjustment coefficient n in the power factor correction circuit.

[0100] Figure 5It is a waveform diagram of the average value of input voltage and input current over half a power frequency cycle (180°).

[0101] Figure 6 It is a waveform diagram of input voltage and switching frequency over half a power frequency cycle (180°).

[0102] Figure 7 It is a waveform diagram of switching frequency and inductor current ripple rate r during half a power frequency cycle (180°).

[0103] In embodiments of the present invention, the switching period T and switching frequency f of the circuit can be adjusted by software adjustment of the inductor current ripple rate r. This is combined with the real-time sampled input voltage V. IN and output voltage V O By controlling the dynamic change of the inductor current ripple rate r, the real-time switching frequency f of the power factor correction circuit can be adjusted, thereby controlling the switching frequency to either variable frequency or fixed frequency.

[0104] Specifically, refer to Figure 5 After the power factor correction circuit completes power factor correction, the input voltage V IN With the average value of the input current I IN (average) In phase and scaled by a certain ratio n. (Reference) Figure 6 As the phase angle gradually increases from 0°, the input voltage V IN As the input voltage V gradually increases, the switching frequency f gradually decreases. IN After reaching its peak value, the input voltage V IN As the frequency decreases, the switching frequency f gradually increases.

[0105] At the same time, according to the switching frequency f = (V O -V IN ) / (L*r*n*V O The switching frequency f decreases as the inductor current ripple rate r increases. (Reference) Figure 7 The switching frequency f changes with the input voltage V IN As the phase angle gradually increases from 0°, the inductor current ripple rate r is adjusted accordingly via software. For example, as the input voltage V... IN As the switching frequency f gradually decreases, the inductor current ripple rate r is correspondingly reduced by setting it in software to compensate for the decrease in switching frequency f. This ensures that the switching frequency f remains within a stable value or range, achieving fixed-frequency control. Similarly, the inductor current ripple rate r can also be set in software to vary according to other rules for frequency conversion adjustment, which will not be elaborated here.

[0106] In an embodiment of the present invention, a power supply circuit is also provided, which includes a power factor correction circuit. The power factor correction circuit executes the switching time algorithm, operating mode control method, or frequency control method described in the above embodiments.

[0107] The technical solution of the present invention has now been described in conjunction with the accompanying drawings. However, it will be readily understood by those skilled in the art that the scope of protection of the present invention is obviously not limited to the specific embodiments described above. Without departing from the principles of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions resulting from such changes or substitutions will all fall within the scope of protection of the present invention.

Claims

1. A switching time algorithm for a power factor correction circuit, characterized in that, include The sampling process involves sampling the input and output voltages of the power factor correction circuit. The calculation steps involve calculating the on-time and off-time of the power factor correction circuit based on the input voltage and the output voltage. The calculation steps include a conduction time calculation step, which includes: Step a, based on the inductor voltage formula du=L*di / dt and the inductor current ripple rate formula r= (IIN(peak)-IIN(valley)) / IIN(average), the relationship between the conduction time ton and the inductor value L, the inductor current ripple rate r, the average current IIN(average) and the input voltage VIN is obtained as ton=L*r*IIN(average) / VIN, where IIN(peak) and IIN(valley) are the peak and valley values ​​of the inductor current, respectively. Step b, the ratio of average current IIN (average) to input voltage VIN is defined as the load adjustment factor n = IIN (average) / VIN, and the relationship between conduction time ton and inductance value L, inductor current ripple rate r, and load adjustment factor n is obtained as ton = L * r * n.

2. The switching time algorithm for the power factor correction circuit as described in claim 1, characterized in that, The calculation steps include a shutdown time calculation step, which includes: Step c: Based on the inductor voltage formula du=L*di / dt and the inductor current ripple rate formula r= (IIN(peak)-IIN(valley)) / IIN(average), the relationship between the turn-off time tooff and the inductor value L, inductor current ripple rate r, average current IIN(average), input voltage VIN, and input voltage VO is obtained as tooff=L*r*IIN(average) / (VO-VIN). Step d, the ratio of average current IIN to input voltage VIN is defined as the load adjustment coefficient n = IIN(average) / VIN, and the on-time ton = L*r*n, thus obtaining the relationship between the off-time tooff and the on-time ton, input voltage VIN, and input voltage VO: tooff = ton*VIN / (VO -VIN).

3. The switching time algorithm for the power factor correction circuit as described in claim 2, characterized in that, The calculation steps include the switching period calculation step: Switching period T = On time ton + Off time toff = L*r*n*VO / (VO -VIN).

4. A method for controlling the operating mode of a power factor correction circuit, characterized in that, According to the switching time algorithm of the power factor correction circuit according to any one of claims 1-3, the operating mode of the power factor correction circuit is adjusted by software adjusting the inductor current ripple rate r in the power factor correction circuit.

5. A frequency control method for a power factor correction circuit, characterized in that, According to the switching time algorithm of the power factor correction circuit according to any one of claims 1-3, the switching frequency of the power factor correction circuit is adjusted by software by adjusting the inductor current ripple rate r and / or load adjustment coefficient n in the power factor correction circuit.

6. A power supply circuit, characterized in that, The power supply circuit includes a power factor correction circuit, which executes the switching time algorithm as described in any one of claims 1-3, the operating mode control method as described in claim 4, or the frequency control method as described in claim 5.

Citation Information

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