Method for manufacturing double-layer metal lead and MEMS device

Abstract

The present disclosure provides a manufacturing method of a double-layer metal lead and a MEMS device, wherein the manufacturing method comprises: providing a substrate; forming a first metal layer, an insulating layer and a second metal layer which are arranged in a stack on the substrate; the insulating layer and the second metal layer are arranged in the same layer; arranging a hard mask on the insulating layer to cover at least the second metal layer, the hard mask exposes an etching groove on the insulating layer, and the etching groove is used to expose the first metal layer; and using a wet etching method to form an undercut structure on the first metal layer at the etching groove, thereby obtaining the double-layer metal lead. The manufacturing method can avoid uncontrollable undercut of the double-layer metal lead.

Description

Technical Field

[0001] This disclosure relates to the field of microelectromechanical systems (MEMS) technology, and in particular to a method for manufacturing double-layer metal leads and a MEMS device. Background Technology

[0002] In the manufacturing of microelectromechanical systems (MEMS) chips and integrated circuit sensors, various metal and other film deposition and patterning processes are involved, encompassing multiple manufacturing flows including film deposition, photolithography, and etching. Thin film deposition utilizes physical vapor deposition (PVD) or chemical vapor deposition (CVD) methods to grow a film of a specific thickness on the surface of a substrate (such as a wafer). Among these processes, double-layer metal leads in MEMS (Micro Electro Mechanical System) sensors are widely used in the manufacturing of MEMS sensors for acoustics, mechanics, and radio frequency applications due to their excellent adhesion, low residual stress, and superior conductivity.

[0003] However, current manufacturing processes for double-layer metal leads have revealed a serious or uncontrollable problem of metal undercut, which has a significant impact on the reliability, electrical performance, and yield of MEMS devices. Summary of the Invention

[0004] In view of the above problems, this disclosure provides a method for manufacturing a double-layer metal lead and a MEMS device, which can avoid uncontrollable and excessive undercutting of the double-layer metal lead.

[0005] In a first aspect, this disclosure provides the following technical solution through an embodiment:

[0006] A method for manufacturing a double-layer metal lead wire includes:

[0007] Provide substrate;

[0008] A first metal layer, an insulating layer, and a second metal layer are formed on the substrate; the insulating layer and the second metal layer are disposed in the same layer.

[0009] A hard mask is provided on the insulating layer to at least cover the second metal layer, the hard mask exposing an etched groove on the insulating layer, the etched groove being used to expose the first metal layer;

[0010] By using wet etching, an undercut structure is formed on the first metal layer at the etching groove to obtain the double-layer metal lead.

[0011] In some embodiments, the wet etching process for forming an undercut structure on the first metal layer at the etched trench includes:

[0012] The first metal layer at the etching tank is immersed in an etchant and held for a set time to obtain an undercut structure with a set undercut amount; the set time is positively correlated with the set undercut amount.

[0013] In some embodiments, the set undercut amount and the set time satisfy the following:

[0014] y = A4 × t 4 +A3×t 3 +A2×t 2 +A1×t+A0;

[0015] Where y is the set undercut amount in micrometers; t is the set time in minutes; the value range of A4 is [-0.2, -0.1], the value range of A3 is [1.5, 2.0], the value range of A2 is [-7, -8], the value range of A1 is [14, 15], and the value range of A0 is [-9, -8].

[0016] In some embodiments, a first metal layer, an insulating layer, and a second metal layer are formed on the substrate in a stacked manner, including:

[0017] The first metal layer and the insulating layer are formed sequentially on the substrate;

[0018] Deposition and etching trenches exposing the first metal layer are formed on the insulating layer by photolithography;

[0019] A second metal layer is formed within the deposition tank.

[0020] In some embodiments, forming a second metal layer within the deposition tank includes:

[0021] Photoresist is coated on the insulating layer, and the photoresist covers the deposition tank, the etching tank, and the insulating layer;

[0022] The photoresist located in the deposition tank is removed by exposure and development.

[0023] A second metal layer is deposited in the deposition tank and on the photoresist, and the metal material on the photoresist is removed to form the second metal layer located in the deposition tank.

[0024] In some embodiments, the provision of a hard mask on the insulating layer that at least covers the second metal layer includes:

[0025] A hard mask covering the insulating layer and the etching groove is disposed on the insulating layer;

[0026] The hard mask is patterned, and the first metal layer in the etched trench is exposed by dry etching.

[0027] In some embodiments, the first metal layer is molybdenum or a molybdenum alloy, and the insulating layer is made of aluminum nitride.

[0028] In some embodiments, the second metal layer includes a gold layer and a titanium-tungsten alloy layer stacked together.

[0029] Secondly, based on the same inventive concept, this disclosure provides the following technical solution through an embodiment:

[0030] A MEMS device includes a substrate and a double-layer metal trace disposed on the substrate, the double-layer metal trace being manufactured using the manufacturing method provided in the first aspect embodiment.

[0031] In some embodiments, the MEMS device is a MEMS filter.

[0032] Through one or more technical solutions disclosed herein, this disclosure has the following beneficial effects or advantages:

[0033] This disclosure provides a method for manufacturing a double-layer metal lead. By setting a hard mask on an insulating layer that covers at least a second metal layer, when the first metal layer in the wet etching tank is etched, the hard mask can isolate the first and second metal layers from contact through the etchant or etching solution, thereby preventing the galvanic cell effect between them. This can effectively control the undercut of the first metal layer and overcome the problem caused by uncontrollable undercut. On the other hand, using a hard mask to cover the second metal layer as a barrier layer, compared with other materials such as photoresist as a barrier layer, the undercut can be controlled more precisely by utilizing the non-deformable characteristics of the hard mask.

[0034] The above description is merely an overview of the technical solution disclosed herein. In order to better understand the technical means of this disclosure and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this disclosure more apparent and understandable, specific embodiments of this disclosure are described below. Attached Figure Description

[0035] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this disclosure. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0036] Figure 1A A schematic diagram of the formation of a first metal layer and an insulating layer on a substrate according to the present disclosure is shown;

[0037] Figure 1BA schematic diagram of the present disclosure is shown, illustrating the process of applying adhesive, exposing, developing, and etching on an insulating layer to form etched trenches and deposition trenches;

[0038] Figure 1C This disclosure illustrates Figure 1B A schematic diagram after the photoresist has been removed;

[0039] Figure 1D A schematic diagram of the formation of a second metal layer after recoating, exposure and development according to this disclosure is shown;

[0040] Figure 1E A schematic diagram of the formation of the second metal layer of this disclosure is shown;

[0041] Figure 1F A schematic diagram of etching the first metal layer to form an undercut structure is shown in this disclosure;

[0042] Figure 2 A schematic flowchart of a method for manufacturing a double-layer metal lead according to an embodiment of the present disclosure is shown;

[0043] Figure 3A A schematic diagram showing the formation of a first metal layer and an insulating layer on a substrate according to an embodiment of the present disclosure is shown;

[0044] Figure 3B A schematic diagram is shown illustrating the process of applying adhesive, exposing, developing, and etching to form etched trenches and deposition trenches on an insulating layer according to an embodiment of the present disclosure;

[0045] Figure 3C An embodiment according to this disclosure is shown. Figure 1B A schematic diagram after the photoresist has been removed;

[0046] Figure 3D A schematic diagram showing the formation of a second metal layer after recoating, exposure, and development according to an embodiment of the present disclosure is shown.

[0047] Figure 3E A schematic diagram of the formation of a second metal layer according to an embodiment of the present disclosure is shown;

[0048] Figure 3F A schematic diagram of a rigid film plate disposed on an insulating layer according to an embodiment of the present disclosure is shown;

[0049] Figure 3G A schematic diagram of etching a first metal layer to form an undercut structure according to an embodiment of the present disclosure is shown;

[0050] Figure 4 A graph showing the fitting relationship between the undercut amount and soaking time according to an embodiment of the present disclosure is illustrated.

[0051] Explanation of reference numerals in the attached figures:

[0052] 10. Substrate; 20. First metal layer; 30. Insulating layer; 31. Etching trench; 32. Deposition trench; 40. Second metal layer; PR, photoresist; HM, hard mask. Detailed Implementation

[0053] Embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0054] The accompanying drawings illustrate various structural schematics according to embodiments of the present disclosure. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0055] In the context of this disclosure, when a layer / element is referred to as being "above" another layer / element, the layer / element may be directly above the other layer / element, or there may be an intermediate layer / element between them. Additionally, if a layer / element is "above" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element.

[0056] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0057] Studies have shown that the main reason for the uncontrollable undercut of double-layer metal leads is the galvanic cell effect generated by the etching solution between the two metals during wet etching. Figures 1A to 1FA manufacturing process for a double-layer metal lead is shown, specifically including:

[0058] 1) A first metal layer 20 and an insulating layer 30 are deposited sequentially on a substrate 10 (such as a silicon wafer). Figure 1A As shown;

[0059] 2) Using photolithography, photoresist PR is coated on the insulating layer 30, followed by exposure, development, and dry etching to form etching trenches 31 and deposition trenches 32 on the insulating layer 30, exposing the first metal layer 20, such as... Figure 1B As shown;

[0060] 3) Remove residual photoresist (PR) using a wet process, such as... Figure 1C As shown;

[0061] 4) Coat the photoresist PR again, expose the deposition tank 32 by exposure and development, and then grow a second metal layer 40 on the deposition tank 32 and the photoresist PR, as follows. Figure 1D As shown;

[0062] 5) Using a metal stripping process, remove the second metal layer 40 on the photoresist PR, and then remove the photoresist PR, retaining the second metal layer 40 located within the deposition tank 32, such as... Figure 1E As shown;

[0063] 6) Etch the first metal layer 20 to form an undercut structure (UC), such as... Figure 1F As shown.

[0064] The metal etching process in step 6) can be divided into dry etching (anisotropic) and wet etching (isotropic). Dry etching utilizes the reaction between plasma and the surface film to form volatile substances; or plasma directly bombards the material surface to remove the etched material. Wet etching uses different solutions to remove the etched material through chemical reactions. Due to its low cost, high selectivity, and high throughput, wet etching is widely used in the fabrication of micro and nano devices.

[0065] Current wet etching processes mostly employ immersion etching. The general procedure involves placing the wafer to be etched in a specialized basket or device and immersing it in a specific chemical etching solution. An etching time is set, and after the set time is reached, the wafer is transferred to ultrapure deionized water to wash away residual reaction products and etching solution. The wafer is then dried, and finally, the photoresist (PR) is removed, completing the metal patterning etching. During this process, two different types of metals come into contact in the etching solution. Due to the different potentials of the metals, a micro-galvanic cell is formed in the specific etching environment, leading to a galvanic cell effect. This results in the final first metal layer 20 having problems with excessive undercut or uncontrolled undercutting. Undercutting is a crucial control parameter in the etching process, significantly impacting subsequent processes and even affecting device reliability, electrical performance, and yield. The uncontrollable undercutting characteristic of wet etching severely limits its application range.

[0066] Therefore, in order to solve the problem of uncontrollable undercut depth caused by current wet etching, firstly, in an optional embodiment, please refer to... Figure 2 A method for manufacturing a double-layer metal lead is provided, including steps S21 to S24, as follows:

[0067] S21: Provide substrate 10.

[0068] In some embodiments, the substrate 10 may be a semiconductor substrate or a glass substrate; unless otherwise specified, the embodiments of this disclosure use a silicon substrate.

[0069] S22: A first metal layer 20, an insulating layer 30, and a second metal layer 40 are formed on a substrate 10; the insulating layer 30 and the second metal layer 40 are disposed in the same layer.

[0070] In the structure of the double-layer metal leads, the first metal layer 20 can be an adhesive metal layer, which strengthens the adhesion of the insulating layer 30 and reduces residual stress. The insulating layer 30 can serve as both insulation and a functional layer for MEMS devices. The second metal layer 40 has excellent conductivity and can be used as a wire or as an adhesion layer for the next process. The insulating layer 30 and the second metal layer 40 are disposed in the same layer, or the second metal layer 40 can be embedded within the insulating layer 30. In the thickness direction perpendicular to the plane of the substrate 10, the bottom surface of the second metal layer 40 can be flush with or nearly flush with the bottom surface of the insulating layer 30, and the top surface of the second metal layer 40 can be flush with or nearly flush with the top surface of the insulating layer 30.

[0071] Taking a MEMS filter as an example, the first metal layer 20 can be molybdenum or a molybdenum alloy, and the insulating layer 30 can be made of aluminum nitride. Together, they function as a filter. Correspondingly, the second metal layer 40 can be a stacked gold layer (Au) and a titanium-tungsten alloy layer (TiW). Au has excellent conductivity and can be used as a wire or lead, while TiW serves as an adhesion layer for the next process step or film layer. In the thickness direction perpendicular to the substrate 10, the stacking positions of the gold layer and the titanium-tungsten alloy layer can be interchanged. For example, in some regions, the gold layer is closer to the first metal layer 20 than the titanium-tungsten alloy layer, while in other regions, the titanium-tungsten alloy layer is closer to the first metal layer 20 than the gold layer.

[0072] In some embodiments, the second metal layer 40 may also be a composite film of a copper metal layer (Cu) and a titanium metal layer (Ti), wherein Cu is used as a wire and Ti is used as an adhesive layer.

[0073] In some embodiments, the step of forming a first metal layer 20, an insulating layer 30, and a second metal layer 40 stacked on a substrate 10 specifically includes: forming a first metal layer 20 and an insulating layer 30 stacked sequentially on the substrate 10; forming a deposition tank 32 and an etching tank 31 exposing the first metal layer 20 on the insulating layer 30 by photolithography; and forming the second metal layer 40 within the deposition tank 32. Photolithography involves applying photoresist (PR), patterning by exposure and development, and then etching out the deposition tank 32 and the etching tank 31. The deposition tank 32 is used to form the second metal layer 40, and the etching tank 31 is used to form the undercut structure of the first metal layer 20 in subsequent steps.

[0074] In some embodiments, the method for forming the second metal layer 40 may be: coating a photoresist PR on an insulating layer 30, the photoresist PR covering a deposition tank 32, an etching tank 31 and an insulating layer 30; removing the photoresist PR located in the deposition tank 32 by exposure and development; depositing a metal material for the second metal layer 40 in the deposition tank 32 and on the photoresist PR; removing the metal material located on the photoresist PR; and forming the second metal layer 40 located in the deposition tank 32.

[0075] In some embodiments, the method for forming the first metal layer 20 and the second metal layer 40 may be physical vapor deposition or chemical vapor deposition, depositing the corresponding metal material to the thickness required by the device.

[0076] S23: A hard mask HM is provided on the insulating layer 30 to at least cover the second metal layer 40. The hard mask HM exposes the etching groove 31 on the insulating layer 30. The etching groove 31 is used to expose the first metal layer 20.

[0077] Specifically, a hard mask (HM) is an inorganic thin film material generated by chemical vapor deposition (CVD). Its main components typically include TiN, SiN, and SiO2. These materials effectively isolate the second metal layer 40 from the etchant or etching solution used in subsequent wet etching.

[0078] The minimum area of ​​the hard mask HM should ensure that it completely covers the second metal layer 40, that is, the orthogonal projection of the hard mask HM on the substrate 10 covers the orthogonal projection of the second metal layer 40 on the substrate 10. A preferred embodiment is to first completely cover the insulating layer 30 and the second metal layer 40 with the hard mask HM, and then expose the etching trench 31 on the insulating layer 30 through patterning. For example, a hard mask HM covering the insulating layer 30 and the etching trench 31 is provided on the insulating layer 30; the hard mask HM is patterned, and the first metal layer 20 within the etching trench 31 is exposed by dry etching. The patterning of the hard mask HM is achieved by chemical vapor deposition (CVD) or furnace tube deposition of the hard mask HM film, followed by steps such as photoresist coating (PR), exposure, and development to obtain the desired pattern, and then by dry etching to obtain the specific pattern.

[0079] S24: Wet etching is used to form an undercut structure on the first metal layer 20 at the etching groove 31 to obtain a double-layer metal lead.

[0080] As before, wet etching can be performed using an immersion process. The substrate 10 to be etched is placed in a special basket or a specific device and then immersed in a chemical etching solution or etching solution that matches the material of the first metal layer 20. An etching time is set, and after the set etching time is reached, it is transferred to ultrapure deionized water to wash away residual reaction products and etching solution. Then the substrate 10 is dried to complete the patterned etching of the first metal layer 20.

[0081] Therefore, the manufacturing method of the double-layer metal leads provided in this disclosure provides a hard mask (HM) on the insulating layer 30 that covers at least the second metal layer 40. In this way, when the first metal layer 20 in the etching tank 31 is etched by wet etching, the hard mask (HM) can isolate the first metal layer 20 and the second metal layer 40 from contact through the etchant or etching solution, thereby preventing the galvanic cell effect between them. This can effectively control the undercut of the first metal layer 20 and overcome the problem of uncontrollable undercut. On the other hand, using the hard mask (HM) to cover the second metal layer 40 as a barrier layer, compared with other materials such as photoresist (PR) as a barrier layer, the hard mask (HM) can more accurately control the undercut by taking advantage of its non-deformable characteristics.

[0082] The use of a hard mask (HM) not only prevents the first metal layer 20 from being over-cut, but also enables precise control of the undercut amount. In some embodiments, step S24 includes: immersing the first metal layer 20 at the etching tank 31 in an etchant and holding it for a set time to obtain an undercut structure with a set undercut amount; the set time is positively correlated with the set undercut amount. That is, by quantitatively controlling the etching time of wet etching, the undercut amount can be quantitatively controlled, significantly expanding the application range of wet etching.

[0083] Through extensive experiments and data analysis, it was found that under the protection of a hard mask (HM), there is a polynomial fitting relationship between the set undercut amount and the set time (or etching time, immersion time), as follows:

[0084] y = A4 × t 4 + A3×t 3 + A2×t 2 + A1×t+ A0 (1)

[0085] Where y is the set undercut value, t is the set time, the value range of A4 is [-0.2, -0.1], the value range of A3 is [1.5, 2.0], the value range of A2 is [-7, -8], the value range of A1 is [14, 15], and the value range of A0 is [-9, -8].

[0086] To illustrate the above scheme more intuitively, we will now use a MEMS filter sensor as an example. This MEMS filter sensor uses a silicon wafer as the substrate 10. The first metal layer 20 is made of Mo and serves as an adhesion layer. The second metal layer 40 is made of Au / TiW, where Au is the lead and TiW is the adhesion layer. The insulating layer 30 is made of TiW and works with Mo to serve as the filter layer.

[0087] Please refer to the manufacturing process of double-layer metal leads. Figures 3A to 3G The details are as follows:

[0088] 1) An adhesion metal layer and an insulating layer 30 are deposited sequentially on a substrate 10 (such as a silicon wafer). Figure 3A As shown;

[0089] 2) Using photolithography, photoresist PR is coated on the insulating layer 30, followed by exposure, development, and dry etching to form etching trenches 31 and deposition trenches 32 on the insulating layer 30, exposing the first metal layer 20, such as... Figure 3B As shown;

[0090] 3) Remove residual photoresist (PR) using a wet process, such as... Figure 3C As shown;

[0091] 4) Coat the photoresist PR again, expose the deposition tank 32 by exposure and development, and then grow a second metal layer 40 on the deposition tank 32 and the photoresist PR, as follows. Figure 3D As shown;

[0092] 5) Using a metal stripping process, remove the second metal layer 40 on the photoresist PR, and then remove the photoresist PR, retaining the second metal layer 40 located within the deposition tank 32, such as... Figure 3E As shown;

[0093] 6) A hard film is formed on the insulating layer 30, and the etched holes on the insulating layer 30 and the first metal layer 20 inside the etched holes are exposed by patterning and dry etching, such as... Figure 3F As shown;

[0094] 7) Etch the first metal layer 20 to form the undercut structure UC, such as Figure 3G As shown. In Figure 3G In the diagram, the dimension at the position indicated by the arrow represents the undercut amount of the undercut structure.

[0095] Therefore, the above solution, by adding a hard film process to the wet etching process of metal to wrap the second metal layer 40 and exposing the first metal layer 20 to be etched by dry etching, prevents the first metal layer 20 and the second metal layer 40 from absorbing the etchant during the wet etching process from forming a galvanic cell effect. This can very effectively solve the problem of uncontrollable undercutting and avoid excessive undercutting.

[0096] Furthermore, the required precise undercut can be obtained by adjusting the immersion time of the etching solution, i.e., the set time. Table 1 shows the average undercut of a large number of double-layer metal lead samples obtained using M2 etching solution at different immersion times.

[0097] Table 1: Average undercut of the first metal layer 20 (Mo) under different immersion times:

[0098] 1.5 0.982 1.9 1.332 2.5 1.462 3.3 1.652 4.0 1.833

[0099] The fitted curve obtained by fitting the data based on Table 1 can be found in Table 1. Figure 4 The details are as follows:

[0100] y = -0.1498x 4 + 1.7518x 3 - 7.4806x 2 +14.035x-8.3928 (2)

[0101] Where y is the average undercut, in micrometers; and x is the soaking time, which is the set time, in minutes.

[0102] Equation (2) allows for precise control of the undercut amount by adjusting the immersion time of the etching solution, i.e. the etching time. This significantly expands the application range of wet etching and further improves the overall performance of double-layer metal leads and corresponding MEMS devices.

[0103] On the other hand, using a hard mask as the barrier layer of the second metal layer 40 has the following advantages compared to using photoresist as the barrier layer of the second metal layer 40:

[0104] 1) Due to the material properties, photoresist has a certain amount of corrosion under etching solution, while hard mask has no corrosion, thus improving the control accuracy of undercut amount;

[0105] 2) Using photoresist as a barrier layer requires a specific photoresist remover to perform a photoresist removal process, while the removal of hard masks is relatively simple and does not require photoresist removal, which helps to simplify the process flow.

[0106] 3) When measuring the undercut, the photoresist process requires the use of a specific machine for alignment, while the hard mask process can be directly measured using a microscope, which helps to speed up the production cycle;

[0107] 4) Photoresist is a toxic organic substance that requires special treatment; while hard masks are non-toxic and can be treated directly with hydrofluoric acid.

[0108] 5) During the patterning process of dry etching, the etching selectivity of photoresist is uncontrollable and consumes a lot of resources, while the etching selectivity of hard mask is relatively controllable, which helps to improve the control accuracy of undercutting.

[0109] Secondly, based on the same inventive concept, in another optional embodiment, a MEMS device is provided, including a substrate and a double-layer metal trace disposed on the substrate, the double-layer metal trace being fabricated using the manufacturing method provided in the first aspect embodiment. The MEMS device can be an acoustic, mechanical, or radio frequency MEMS sensor. In some embodiments, it is specifically a MEMS filter.

[0110] Since the MEMS devices are obtained using the manufacturing method of the MEMS devices provided in the embodiments of this disclosure, and the specific implementation has been described in the process of introducing the fabrication method, those skilled in the art can understand the specific structure and variations of the MEMS devices based on some embodiments of this disclosure, and therefore will not be repeated here. All MEMS devices manufactured using the double-layer metal lead process of the embodiments of this disclosure are within the scope of protection of this invention.

[0111] In summary, the manufacturing method for double-layer metal leads and the corresponding MEMS device provided in this disclosure have the following advantages:

[0112] 1) Compared with the traditional etching process of double-layer metal leads, the solution provided in this disclosure has a more stable, controllable and repeatable control process for metal undercut structures, the process is more reliable, solves the problem of uncontrollable metal etching undercut to the greatest extent, improves the overall performance of double-layer metal leads and corresponding MEMS devices, and further improves the reliability, electrical performance and yield of devices.

[0113] 2) The scheme disclosed herein uses wet etching of the first metal layer. Compared with dry etching, wet etching has advantages such as low cost, high selectivity and high throughput, and the equipment operation is more reliable.

[0114] 3) By quantitatively controlling the immersion time of the etchant in wet etching, the controllable quantitative adjustment of the undercut amount of the first metal layer is realized, which supports the quantitative adjustment of the undercut amount of wet etching according to design requirements, greatly expanding the application range of wet etching.

[0115] Although preferred embodiments of the present disclosure have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this disclosure.

[0116] Obviously, those skilled in the art can make various modifications and variations to this disclosure without departing from its spirit and scope. Therefore, if such modifications and variations fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include such modifications and variations.

Claims

1. A method for manufacturing a double-layer metal lead wire, characterized in that, The manufacturing method includes: Provide substrate; A first metal layer, an insulating layer, and a second metal layer are formed on the substrate in a stacked manner; the insulating layer and the second metal layer are disposed in the same layer, including the formation of the first metal layer and the insulating layer stacked sequentially on the substrate; a deposition trench and an etching trench exposing the first metal layer are formed on the insulating layer by photolithography; and the second metal layer is formed in the deposition trench. A hard mask is provided on the insulating layer to at least cover the second metal layer, the hard mask exposing an etched groove on the insulating layer, the etched groove being used to expose the first metal layer; By using wet etching, an undercut structure is formed on the first metal layer at the etching groove to obtain the double-layer metal lead; The method employs wet etching to form an undercut structure on the first metal layer at the etching trench, including: The first metal layer at the etching tank is immersed in an etching solution and held for a set time to obtain an undercut structure with a set undercut amount; the set time is positively correlated with the set undercut amount; wherein... The set undercut amount and the set time satisfy: y=A4×t 4 + A3×t 3 + A2×t 2 + A1×t+ A0; Where y is the set undercut amount in micrometers; t is the set time in minutes; the value range of A4 is [-0.2, -0.1], the value range of A3 is [1.5, 2.0], the value range of A2 is [-8, -7], the value range of A1 is [14, 15], and the value range of A0 is [-9, -8].

2. The manufacturing method as described in claim 1, characterized in that, The formation of the second metal layer in the deposition tank includes: Photoresist is coated on the insulating layer, and the photoresist covers the deposition tank, the etching tank, and the insulating layer; The photoresist located in the deposition tank is removed by exposure and development. A second metal layer is deposited in the deposition tank and on the photoresist, and the metal material on the photoresist is removed to form the second metal layer located in the deposition tank.

3. The manufacturing method as described in claim 1, characterized in that, The provision of a hard mask on the insulating layer that at least covers the second metal layer includes: A hard mask covering the insulating layer and the etching groove is disposed on the insulating layer; The hard mask is patterned, and the first metal layer in the etched trench is exposed by dry etching.

4. The manufacturing method as described in claim 1, characterized in that, The first metal layer is molybdenum or a molybdenum alloy, and the insulating layer is made of aluminum nitride.

5. The manufacturing method as described in claim 1, characterized in that, The second metal layer comprises a gold layer and a titanium-tungsten alloy layer stacked together.

6. A MEMS device, characterized in that, It includes a substrate and a double-layer metal trace disposed on the substrate, the double-layer metal trace being manufactured using the manufacturing method described in any one of claims 1 to 5.

7. The MEMS device as described in claim 6, characterized in that, The MEMS device is a MEMS filter.

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