Voltage reference circuit

Abstract

The application discloses a voltage reference circuit, which comprises a current generation module, a flip switch module and an operational amplifier module; the input end of the flip switch module is connected with the current generation module, and the output end of the flip switch module is connected with the operational amplifier module; the current generation module generates a zero-temperature coefficient current when receiving a power signal; the flip switch module turns on a target amplification loop corresponding to a flip switch signal when receiving the flip switch signal input from outside; and the operational amplifier module amplifies and converts the zero-temperature coefficient current according to the target amplification loop, and outputs a reference voltage signal obtained after conversion to an external device. The application can continuously flip the amplification effect of the operational amplifier module through the flip switch module, realize the mean value of the amplification effect, reduce the deviation of the reference voltage caused by non-ideal factors of the device, and further solve the problem of voltage device mismatch at low cost.

Description

Technical Field

[0001] This invention relates to the field of electrical energy storage system technology, and more particularly to a voltage reference circuit. Background Technology

[0002] As an essential component of analog integrated circuits, the voltage reference's temperature characteristics and their variation with process errors directly affect the overall chip performance.

[0003] Currently, temperature-independent current can be generated and applied to a resistor to create a temperature-independent voltage reference, thus avoiding the influence of temperature. However, existing methods neglect device mismatch, requiring additional increases in device area to reduce mismatch, resulting in high costs. Therefore, providing a low-cost voltage reference circuit to address device mismatch has become an urgent problem to solve.

[0004] The above content is only used to help understand the technical solution of the present invention and does not represent an admission that the above content is prior art. Summary of the Invention

[0005] The main objective of this invention is to provide a voltage reference circuit that addresses the technical problem of high costs associated with device mismatch in existing voltage reference circuits.

[0006] This invention discloses a voltage reference circuit, which includes: a current generation module, a flip switch module, and an operational amplifier module;

[0007] The input terminal of the flip switch module is connected to the current generation module, and the output terminal of the flip switch module is connected to the operational amplifier module.

[0008] The current generation module is used to generate a zero-temperature coefficient current when a power signal is received.

[0009] The flip switch module is used to turn on the target amplification circuit corresponding to the flip switch signal when it receives an externally input flip switch signal.

[0010] The operational amplifier module is used to amplify and convert the zero temperature coefficient current according to the target amplification circuit, and output the converted reference voltage signal to an external device.

[0011] Optionally, the zero-temperature coefficient current includes: a first density current signal and a second density current signal; the current generation module includes: a first current submodule and a second current submodule;

[0012] The output terminals of the first current submodule and the second current submodule are both connected to the input terminal of the toggle switch module;

[0013] The first current submodule is used to generate the first density current signal when the power supply signal is received;

[0014] The second current submodule is used to generate the second density current signal when the power supply signal is received;

[0015] The operational amplifier module is further configured to amplify and convert the first density current signal and the second density current signal according to the target amplification circuit to obtain the reference voltage signal.

[0016] Optionally, the voltage reference circuit further includes: a voltage calibration module;

[0017] The voltage calibration module is connected to the input terminal of the first current submodule, the input terminal of the second current submodule, the output terminal of the operational amplifier module, and the external device, respectively.

[0018] The voltage calibration module is used to adjust the voltage amplitude of the reference voltage signal output by the operational amplifier module according to the calibration switch signal input from the outside, and transmit the adjusted calibration voltage signal to the external device. The calibration switch signal and the toggle switch signal are in phase.

[0019] Optionally, the voltage calibration module includes: a current synchronization submodule and a signal conversion submodule;

[0020] The current synchronization submodule is connected to the input terminal of the first current submodule, the input terminal of the second current submodule, the output terminal of the operational amplifier module, and the input terminal of the signal conversion submodule, respectively. The output terminal of the signal conversion submodule is connected to the external device.

[0021] The current synchronization submodule is used to convert the reference voltage signal into a reference current signal according to the externally input calibration switch signal, and output the reference current signal to the voltage adjustment module;

[0022] The signal conversion submodule is used to convert the reference current signal according to the calibration switch signal to obtain the calibration voltage signal, and transmit the calibration voltage signal to the external device.

[0023] Optionally, the current synchronization submodule includes: a current mirror unit and a filter switch unit;

[0024] The current mirror unit is connected to the operational amplifier module and the filter switch unit respectively, and the filter switch unit is connected to the first current submodule, the second current submodule and the signal conversion submodule respectively;

[0025] The filter switch unit is used to turn on the corresponding target current synchronization circuit according to the calibration switch signal;

[0026] The current mirror unit is used to convert the reference voltage signal into a reference current signal according to the target current synchronization circuit, and output the reference current signal to the voltage adjustment module through the target current synchronization circuit.

[0027] Optionally, the first current submodule includes: a first and a second resistor and a first transistor; the second current submodule includes: a third and a fifth resistor and a second transistor;

[0028] The first end of the first resistor and the first end of the third resistor are both connected to the filter switch unit. The second end of the first resistor is connected to the input terminal of the flip switch module, the first end of the third resistor and the emitter of the first transistor, respectively. The second end of the second resistor is connected to the voltage processing module, the first end of the fourth resistor and the first end of the fifth resistor, respectively. The second end of the fourth resistor is connected to the emitter of the second transistor.

[0029] The second terminal of the third resistor, the base of the first transistor, the collector of the first transistor, the second terminal of the fifth resistor, the base of the second transistor, and the collector of the second transistor are all grounded.

[0030] Optionally, the toggle switch module includes: a first to a second switch, and the operational amplifier module includes: a third to a sixth switch, a first to a seventh PMOS transistor, and a first to a fourth NMOS transistor;

[0031] The input terminal of the first switch is connected to the second terminal of the first resistor, the first terminal of the second resistor, and the emitter of the first transistor, respectively. The input terminal of the second switch is connected to the second terminal of the third resistor, the first terminal of the fourth resistor, and the first terminal of the fifth resistor, respectively.

[0032] The first output terminal of the first switch is connected to the first output terminal of the second switch and the gate of the first PMOS transistor, respectively. The second output terminal of the first switch is connected to the second output terminal of the second switch and the gate of the second PMOS transistor, respectively. The sources of the first PMOS transistor and the second PMOS transistor are both connected to the drain of the third PMOS transistor. The gate of the third PMOS transistor is connected to the input power supply, and the source of the third PMOS transistor is connected to the input power supply.

[0033] The input terminal of the third switch is connected to the source of the first NMOS transistor, and the input terminal of the fourth switch is connected to the source of the second NMOS transistor. The first output terminal of the third switch is connected to the first output terminal of the fourth switch, the drain of the third NMOS transistor, and the drain of the second PMOS transistor. The second output terminal of the third switch is connected to the second output terminal of the fourth switch, the drain of the fourth NMOS transistor, and the drain of the first PMOS transistor. The gate of the first NMOS transistor is connected to the gate of the second NMOS transistor, and the gate of the third NMOS transistor is connected to the gate of the fourth NMOS transistor.

[0034] The input terminal of the fifth switch is connected to the drain of the fourth PMOS transistor, the input terminal of the sixth switch is connected to the drain of the fifth PMOS transistor, the first output terminal of the fifth switch is connected to the first output terminal of the sixth switch and the source of the sixth PMOS transistor, the second output terminal of the fifth switch is connected to the second output terminal of the sixth switch and the source of the seventh PMOS transistor, the gate of the fourth PMOS transistor is connected to the gate of the fifth PMOS transistor, the drain of the sixth PMOS transistor and the drain of the first NMOS transistor, the gate of the sixth PMOS transistor is connected to the gate of the seventh PMOS transistor, and the sources of the fourth PMOS transistor and the fifth PMOS transistor are both connected to the input power supply.

[0035] The drain of the seventh PMOS transistor and the drain of the second NMOS transistor are both connected to the external device.

[0036] The gate and source of the third NMOS transistor are both grounded, as are the gate and source of the fourth NMOS transistor.

[0037] Optionally, the current mirror unit includes: an eighth to a ninth PMOS transistor;

[0038] The source of the eighth PMOS transistor and the source of the ninth PMOS transistor are both connected to an external power supply. The gate of the eighth PMOS transistor and the gate of the ninth PMOS transistor are both connected to the drain of the seventh PMOS transistor and the drain of the second NMOS transistor. The drain of the eighth PMOS transistor and the drain of the ninth PMOS transistor are both connected to the filter switch unit.

[0039] Optionally, the filter switching unit includes: a seventh to an eighth switch;

[0040] The input terminal of the seventh switch is connected to the drain of the eighth PMOS transistor, and the input terminal of the eighth switch is connected to the drain of the ninth PMOS transistor.

[0041] The first output terminal of the seventh switch is connected to the first output terminal of the eighth switch, the first terminal of the first resistor, and the first terminal of the third resistor, respectively. The second output terminals of the seventh switch and the second output terminals of the eighth switch are both connected to the signal conversion submodule.

[0042] Optionally, the signal conversion submodule includes: a sixth resistor and a ninth switch;

[0043] The input terminal of the ninth switch is connected to the external device. The first terminal of the sixth resistor is connected to the second output terminal of the seventh switch and the second output terminal of the eighth switch. The first output terminal of the ninth switch is connected to the second terminal of the sixth resistor. The second output terminal of the ninth switch is connected to the third terminal of the sixth resistor. The fourth terminal of the sixth resistor is grounded.

[0044] This invention discloses a voltage reference circuit, comprising: a current generation module, a toggle switch module, and an operational amplifier module; the input terminal of the toggle switch module is connected to the current generation module, and the output terminal of the toggle switch module is connected to the operational amplifier module; the current generation module generates a zero-temperature coefficient current upon receiving a power supply signal; the toggle switch module activates a target amplification circuit corresponding to an externally input toggle switch signal upon receiving such a toggle switch signal; the operational amplifier module amplifies and converts the zero-temperature coefficient current according to the target amplification circuit, and outputs the converted reference voltage signal to an external device. Furthermore, the zero-temperature coefficient current includes: a first density current signal and a second density current signal; the current generation module includes: a first current submodule and a second current submodule; the output terminals of both the first and second current submodules are connected to the input terminal of the toggle switch module; the first current submodule generates a first density current signal upon receiving a power supply signal; the second current submodule generates a second density current signal upon receiving a power supply signal; the operational amplifier module further amplifies and converts the first and second density current signals according to the target amplification circuit to obtain the reference voltage signal. Compared to existing methods, this invention adds a toggle switch at the input of the operational amplifier (and at the symmetrical structure inside the module) to continuously toggle the amplification effect of the operational amplifier module, thereby averaging the amplification effect and reducing the reference voltage deviation caused by non-ideal factors of the devices. This reduces the problem of voltage device mismatch at a low cost. Furthermore, this invention can also filter out device noise with a frequency lower than the switching frequency by continuously switching the switch, thus achieving low-cost noise reduction. Attached Figure Description

[0045] Figure 1 This is a first structural block diagram of a first embodiment of the voltage reference circuit of the present invention;

[0046] Figure 2 This is a second structural block diagram of the first embodiment of the voltage reference circuit of the present invention;

[0047] Figure 3 This is a third structural block diagram of the first embodiment of the voltage reference circuit of the present invention;

[0048] Figure 4 This is a circuit diagram of the flip switch module and the operational amplifier module of the first embodiment of the voltage reference circuit of the present invention;

[0049] Figure 5 This is a first structural block diagram of a second embodiment of the voltage reference circuit of the present invention;

[0050] Figure 6 This is a second structural block diagram of a second embodiment of the voltage reference circuit of the present invention;

[0051] Figure 7 This is a circuit diagram of the current mirror unit in the second embodiment of the voltage reference circuit of the present invention;

[0052] Figure 8 This is a circuit diagram of the signal conversion submodule in the second embodiment of the voltage reference circuit of the present invention;

[0053] Figure 9 This is a schematic diagram of the first phase circuit of the second embodiment of the voltage reference circuit of the present invention;

[0054] Figure 10 This is a schematic diagram of the second phase circuit of the second embodiment of the voltage reference circuit of the present invention.

[0055] Explanation of icon numbers:

[0056] R1~R6 Resistors 1 to 6 Q1~Q2 First to second transistors S1~S9 Switches 1 through 9 PM1~PM9 PMOS transistors 1 to 9 NM1~NM4 First to fourth NMOS transistors VDD Input power 1 The input terminal of the switch 2 The first output terminal of the switch 3 The second output terminal of the switch OP operational amplifier b base e emitter c collector g gate s Source d Drain

[0057] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0058] It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the invention.

[0059] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0060] It should be noted that the descriptions involving "first," "second," etc., in the embodiments of the present invention are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, the user should consider that such a combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.

[0061] Reference Figure 1 , Figure 1 This is a structural block diagram of the first embodiment of the voltage reference circuit of the present invention.

[0062] It is understandable that when there are non-ideal factors causing component mismatch in a voltage reference circuit, and considering the presence of component noise, the final output reference voltage of the circuit will be affected. This necessitates increasing the area of ​​the components, which increases costs and limits the circuit's application scenarios. Therefore, to reduce the impact of mismatch and noise on the accuracy of the voltage reference circuit, this invention proposes a voltage reference circuit that can eliminate component mismatch and reduce the impact of noise on the reference voltage.

[0063] Specifically, such as Figure 1 As shown, the voltage reference circuit described in this embodiment includes: a current generation module 10, a flip switch module 20, and an operational amplifier module 30;

[0064] The input terminal of the flip switch module 20 is connected to the current generation module 10, and the output terminal of the flip switch module 20 is connected to the operational amplifier module 30.

[0065] The current generation module 10 is used to generate a zero temperature coefficient current when a power signal is received.

[0066] The flip switch module 20 is used to turn on the target amplification circuit corresponding to the flip switch signal when it receives an externally input flip switch signal.

[0067] The operational amplifier module 30 is used to amplify and convert the zero temperature coefficient current according to the target amplification circuit, and output the converted reference voltage signal to the external device 1.

[0068] It is easy to understand that common non-ideal factors include transistor area mismatch, resistor value mismatch, and process diffusion. Device mismatch refers to the relative deviation of parameters between two identical devices on the same chip, rather than the absolute deviation of a single device parameter value. To reduce the impact of this deviation, in this embodiment, the aforementioned toggle switch signal may include at least two phase signals, and each phase signal may correspond to an amplification circuit in the operational amplifier module 30. Therefore, the toggle switch module 20 can conduct the amplification circuit corresponding to the toggle switch signal in the operational amplifier module 30, i.e., the aforementioned target amplification circuit, according to the input toggle switch signal, so as to amplify and convert the zero temperature coefficient current generated by the current generation module 10 through the conducted target amplification circuit, generate a reference voltage signal, and output the reference voltage to the external device 1. The external device 1 may be a device that needs to perform voltage calibration through the reference voltage signal.

[0069] It should be understood that, to reduce the impact of temperature on the reference circuit, this embodiment can generate a temperature-independent current, i.e., a zero-temperature coefficient current, by superimposing a current with a positive temperature coefficient and a current with a negative temperature coefficient. A reference voltage signal unaffected by temperature is then generated based on this zero-temperature coefficient current. Therefore, as one possible implementation method, such as... Figure 2 As shown, Figure 2 This is a second structural block diagram of the voltage reference circuit of the present invention. In this embodiment, the zero temperature coefficient current includes: a first density current signal and a second density current signal; the current generation module 10 includes: a first current submodule 101 and a second current submodule 102.

[0070] The output terminals of the first current submodule 101 and the second current submodule 102 are both connected to the input terminal of the toggle switch module 20;

[0071] The first current submodule 101 is used to generate the first density current signal when the power supply signal is received;

[0072] The second current submodule 102 is used to generate the second density current signal when the power supply signal is received;

[0073] The operational amplifier module 30 is further configured to amplify and convert the first density current signal and the second density current signal according to the target amplification circuit to obtain the reference voltage signal.

[0074] It should be noted that for positive temperature coefficient current, this embodiment can achieve this by having two transistors of different areas operate at different current densities. Specifically, this embodiment can generate currents of different densities—namely, the first density current signal and the second density current signal—through the first current submodule 101 and the second current submodule 102. In this case, the interpolation (ΔVBE) between the base-emitter voltage (VBE) of the transistors can be represented as a positive temperature coefficient. Subsequently, a positive temperature coefficient current can be generated through an operational amplifier and ΔVBE. Conversely, a negative temperature coefficient current can be achieved through the negative temperature characteristic of the base-emitter voltage (VBE) of the transistor Q. Therefore, a zero temperature coefficient current can be generated based on the positive and negative temperature coefficient currents, thereby generating a reference voltage signal unaffected by temperature.

[0075] Furthermore, as one possible implementation method, in this embodiment, such as Figure 3 As shown, Figure 3 This is a third structural block diagram of the first embodiment of the voltage reference circuit of the present invention. The first current submodule 101 includes: first and second resistors R2 and a first transistor Q1; the second current submodule 102 includes: third and fifth resistors R5 and a second transistor Q2.

[0076] The first end of the first resistor R1 and the first end of the third resistor R3 are both connected to the filter switch unit. The second end of the first resistor R1 is connected to the input terminal of the flip switch module 20, the first end of the third resistor R3, and the emitter e of the first transistor Q1. The second end of the second resistor R2 is connected to the voltage processing module, the first end of the fourth resistor R4, and the first end of the fifth resistor R5. The second end of the fourth resistor R4 is connected to the emitter e of the second transistor Q2.

[0077] The second terminal of the third resistor R3, the base b of the first transistor Q1, the collector c of the first transistor Q1, the second terminal of the fifth resistor R5, the base b of the second transistor Q2, and the collector c of the second transistor Q2 are all grounded.

[0078] It should be understood that during the generation of the reference voltage in this embodiment, the aforementioned flip switch module 20 will continuously switch the amplification circuit according to the aforementioned flip switch signal, thereby continuously switching back and forth between the two working states to achieve the averaging of the amplification effect, and thus reduce the deviation of the reference voltage caused by non-ideal factors of the device.

[0079] It is easy to understand that another non-ideal factor that cannot be ignored in voltage reference circuits is device noise. At lower frequencies, noise and mismatch often have the same coefficient, and the flicker noise of MOS devices at low frequencies cannot be ignored. Similarly, flicker noise is inversely proportional to the area of ​​the device, so increasing the area to reduce flicker noise usually requires high costs. However, during the continuous switching process of the toggle switch module 20 in this embodiment, common low-frequency device noise can also be averaged. That is, noise with a frequency lower than the switching frequency of the toggle switch in this embodiment will also be covered and eliminated. In other words, this embodiment can also reduce the impact of low-frequency device noise through the above method.

[0080] It should be noted that in this embodiment, a toggle switch module 20 can be added to the input of the operational amplifier to continuously toggle the amplification effect of the operational amplifier module 30 to eliminate device mismatch. However, the components inside the operational amplifier module 30 are usually symmetrically distributed, which can easily lead to operational amplifier mismatch. To solve this problem, this embodiment can also add toggle switches at the symmetrical components inside the operational amplifier.

[0081] Therefore, further, as one possible implementation method, in this embodiment, such as Figure 4 As shown, Figure 4 The circuit diagram of the flip switch module 20 and the operational amplifier module 30 in the first embodiment of the voltage reference circuit of the present invention is shown. The flip switch module 20 includes: first to second switches S2, and the operational amplifier module 30 includes: third to sixth switches S6, first to seventh PMOS transistors PM7 and first to fourth NMOS transistors NM4.

[0082] The input terminal 1 of the first switch S1 is connected to the second terminal of the first resistor R1, the first terminal of the second resistor R2 and the emitter e of the first transistor Q1, respectively. The input terminal 1 of the second switch S2 is connected to the second terminal of the third resistor R3, the first terminal of the fourth resistor R4 and the first terminal of the fifth resistor R5, respectively.

[0083] The first output terminal 2 of the first switch S1 is connected to the first output terminal 2 of the second switch S2 and the gate g of the first PMOS transistor PM1, respectively. The second output terminal 3 of the first switch S1 is connected to the second output terminal 3 of the second switch S2 and the gate g of the second PMOS transistor PM2, respectively. The sources s of the first PMOS transistor PM1 and the second PMOS transistor PM2 are both connected to the drain d of the third PMOS transistor PM3. The gate g of the third PMOS transistor PM3 is connected to the input power supply VDD, and the source s of the third PMOS transistor PM3 is connected to the input power supply VDD.

[0084] The input terminal 1 of the third switch S3 is connected to the source s of the first NMOS transistor NM1, and the input terminal 1 of the fourth switch S4 is connected to the source s of the second NMOS transistor NM2. The first output terminal 2 of the third switch S3 is connected to the first output terminal 2 of the fourth switch S4, the drain d of the third NMOS transistor NM3, and the drain d of the second PMOS transistor PM2. The second output terminal 3 of the third switch S3 is connected to the second output terminal 3 of the fourth switch S4, the drain d of the fourth NMOS transistor NM4, and the drain d of the first PMOS transistor PM1. The gate g of the first NMOS transistor NM1 is connected to the gate g of the second NMOS transistor NM2, and the gate g of the third NMOS transistor NM3 is connected to the gate g of the fourth NMOS transistor NM4.

[0085] The input terminal 1 of the fifth switch S5 is connected to the drain d of the fourth PMOS transistor PM4. The input terminal 1 of the sixth switch S6 is connected to the drain d of the fifth PMOS transistor PM5. The first output terminal 2 of the fifth switch S5 is connected to the first output terminal 2 of the sixth switch S6 and the source s of the sixth PMOS transistor PM6. The second output terminal 3 of the fifth switch S5 is connected to the second output terminal 3 of the sixth switch S6 and the source s of the seventh PMOS transistor PM7. The gate g of the fourth PMOS transistor PM4 is connected to the gate g of the fifth PMOS transistor PM5, the drain d of the sixth PMOS transistor PM6, and the drain d of the first NMOS transistor NM1. The gate g of the sixth PMOS transistor PM6 is connected to the gate g of the seventh PMOS transistor PM7. The sources s of the fourth NMOS transistor PM4 and the fifth PMOS transistor PM5 are both connected to the input power supply VDD.

[0086] The drain d of the seventh PMOS transistor PM7 and the drain d of the second NMOS transistor NM2 are both connected to the external device 1.

[0087] The gate g and source s of the third NMOS transistor NM3 and the gate g and source s of the fourth NMOS transistor NM4 are both grounded.

[0088] It should be noted that, by Figure 4 As can be seen, the first to fourth NMOS transistors (NM4) and the fourth to seventh PMOS transistors (PM7) also have symmetrical structures. Therefore, in this embodiment, the amplification circuit can be continuously switched by placing the third to sixth switches (S6). It should be understood that in this embodiment, the switching of the third to sixth switches (S6) inside the operational amplifier module 30 and the switching of the first to second switches (S2) in the toggle switch module 20 are performed synchronously. Furthermore, the device configuration of the above-described operational amplifier module 30 is only a preferred embodiment and is not limited thereto.

[0089] In summary, this embodiment adds a toggle switch at the input of the operational amplifier (and at the symmetrical structure inside the module) to continuously toggle the amplification effect of the operational amplifier module 30, thereby averaging the amplification effect and reducing the reference voltage deviation caused by non-ideal factors of the devices, thus solving the problem of voltage device mismatch at low cost. Furthermore, this embodiment can also filter out device noise with a frequency lower than the switching frequency by continuously switching the switch S, thereby achieving low-cost noise reduction.

[0090] This embodiment discloses a voltage reference circuit, which includes: a current generation module, a toggle switch module, and an operational amplifier module. The input terminal of the toggle switch module is connected to the current generation module, and the output terminal of the toggle switch module is connected to the operational amplifier module. The current generation module generates a zero-temperature coefficient current upon receiving a power signal. The toggle switch module activates the target amplification circuit corresponding to the toggle switch signal upon receiving an externally input toggle switch signal. The operational amplifier module amplifies and converts the zero-temperature coefficient current according to the target amplification circuit and outputs the converted reference voltage signal to an external device. Furthermore, the zero-temperature coefficient current includes: a first density current signal and a second density current signal. The current generation module includes: a first current submodule and a second current submodule. The output terminals of both the first and second current submodules are connected to the input terminal of the toggle switch module. The first current submodule generates a first density current signal upon receiving a power signal. The second current submodule generates a second density current signal upon receiving a power signal. The operational amplifier module further amplifies and converts the first and second density current signals according to the target amplification circuit to obtain the reference voltage signal. Compared to existing methods, this embodiment adds a toggle switch at the input of the operational amplifier (and at the symmetrical structure inside the module) to continuously toggle the amplification effect of the operational amplifier module, thereby averaging the amplification effect and reducing the reference voltage deviation caused by non-ideal factors of the devices. This reduces the problem of voltage device mismatch at a low cost. In addition, this embodiment can also filter out device noise with a frequency lower than the switching frequency by continuously switching the switch, thereby achieving low-cost noise reduction.

[0091] Reference Figure 5 , Figure 5 This is a first structural block diagram of a second embodiment of the voltage reference circuit of the present invention.

[0092] It should be understood that although the first embodiment described above can achieve averaging of the amplification effect, the final output reference voltage will fluctuate due to the continuous switching of the amplification effect, i.e., the output voltage will have ripple. To solve this problem, based on the first embodiment described above, a second embodiment of the voltage reference circuit of the present invention is proposed. Figure 5As shown, in this embodiment, the voltage reference circuit further includes a voltage calibration module 40;

[0093] The voltage calibration module 40 is connected to the input terminal of the first current submodule 101, the input terminal of the second current submodule 102, the output terminal of the operational amplifier module 30, and the external device 1, respectively.

[0094] The voltage calibration module 40 is used to adjust the voltage amplitude of the reference voltage signal output by the operational amplifier module 30 according to the calibration switch signal input from the outside, and transmit the adjusted calibration voltage signal to the external device 1. The calibration switch signal and the flip switch signal are in phase.

[0095] It should be understood that, in order to solve the voltage ripple problem caused by inconsistent voltage output when the flip switch is switched, this embodiment can adjust the voltage amplitude of the reference voltage signal output by different amplification circuits, that is, perform voltage averaging on the reference voltage signal output by different amplification circuits, thereby stabilizing the output reference voltage around a voltage value.

[0096] It should be noted that this embodiment can average the voltage value corresponding to the reference voltage signal based on the calibration switch signal. The calibration switch signal can be the same as the flip switch signal, including two phase signals with different phases. In this embodiment, the calibration switch signal and the flip switch signal have the same phase, thereby realizing the synchronous flipping of reference voltage generation and reference voltage calibration, so as not to affect the reduction of voltage reference offset and noise during the reference voltage calibration process.

[0097] It is easy to understand that the voltage value of the output reference voltage signal cannot be directly adjusted. In this embodiment, the reference voltage signal can first be converted into a current signal, and then the corrected reference voltage signal can be output through the voltage divider resistor R and the converted current signal. Furthermore, as one possible implementation, such as Figure 6 As shown, Figure 6 This is a second structural block diagram of a second embodiment of the voltage reference circuit of the present invention. In this embodiment, the voltage calibration module 40 includes: a current synchronization submodule 401 and a signal conversion submodule 402.

[0098] The current synchronization submodule 401 is connected to the input terminal of the first current submodule 101, the input terminal of the second current submodule 102, the output terminal of the operational amplifier module 30, and the input terminal of the signal conversion submodule 402, respectively. The output terminal of the signal conversion submodule 402 is connected to the external device 1.

[0099] The current synchronization submodule 401 is used to convert the reference voltage signal into a reference current signal according to the externally input calibration switch signal, and output the reference current signal to the voltage adjustment module;

[0100] The signal conversion submodule 402 is used to convert the reference current signal according to the calibration switch signal to obtain the calibration voltage signal, and transmit the calibration voltage signal to the external device 1.

[0101] It is easy to understand that the aforementioned calibration voltage signal is the corrected reference voltage signal. The aforementioned current synchronization submodule 401 can convert the reference voltage signal into a reference current signal and synchronize the reference current signal to the signal conversion submodule 402. The signal conversion submodule 402 may include voltage divider resistors, so that by continuously adjusting the resistance value of the voltage divider resistors, the calibration voltage signal with the same amplitude can be output at different phases, thereby keeping the final output voltage near the ideal value.

[0102] Furthermore, as one possible implementation, in this embodiment, the current synchronization submodule 401 includes: a current mirror unit and a filter switch unit;

[0103] The current mirror unit is connected to the operational amplifier module 30 and the filter switch unit respectively, and the filter switch unit is connected to the first current submodule 101, the second current submodule 102 and the signal conversion submodule 402 respectively.

[0104] The filter switch unit is used to turn on the corresponding target current synchronization circuit according to the calibration switch signal;

[0105] The current mirror unit is used to convert the reference voltage signal into a reference current signal according to the target current synchronization circuit, and output the reference current signal to the voltage adjustment module through the target current synchronization circuit.

[0106] It should be understood that the target current synchronization circuit described above in this embodiment may include a circuit that performs voltage-to-current conversion on the reference voltage signal through a current mirror structure (but is not limited to) and a circuit that synchronizes the reference current signal. Current mirror structures often use two MOSFETs of the same specification for current synchronization. However, in actual production, different devices of the same specification cannot guarantee completely consistent performance. Therefore, it is impossible to achieve the desired voltage coefficient between the two MOSFETs in the current mirror structure. This embodiment can also use the continuous flipping of a toggle switch, i.e., the aforementioned filter switch unit averages the difference, approximating it to 1:1.

[0107] Furthermore, as one possible implementation method, such as Figure 7 As shown, Figure 7This is a circuit diagram of the current mirror unit in the second embodiment of the voltage reference circuit of the present invention. In this embodiment, the current mirror unit includes: the eighth to ninth PMOS transistors PM9;

[0108] The source s of the eighth PMOS transistor PM8 and the source s of the ninth PMOS transistor PM9 are both connected to an external power supply. The gate g of the eighth PMOS transistor PM8 and the gate g of the ninth PMOS transistor PM9 are both connected to the drain d of the seventh PMOS transistor PM7 and the drain d of the second NMOS transistor NM2. The drain d of the eighth PMOS transistor PM8 and the drain d of the ninth PMOS transistor PM9 are both connected to the filter switch unit.

[0109] Furthermore, as one possible implementation, in this embodiment, the filter switching unit includes: a seventh to an eighth switch S8;

[0110] The input terminal 1 of the seventh switch S7 is connected to the drain d of the eighth PMOS transistor PM8, and the input terminal 1 of the eighth switch S8 is connected to the drain d of the ninth PMOS transistor PM9.

[0111] The first output terminal 2 of the seventh switch S7 is connected to the first output terminal 2 of the eighth switch S8, the first terminal of the first resistor R1 and the first terminal of the third resistor R3 respectively. The second output terminal 3 of the seventh switch S7 and the second output terminal 3 of the eighth switch S8 are both connected to the signal conversion submodule 402.

[0112] It is easy to understand that, in this embodiment, the gates g of the eighth to ninth PMOS transistors PM9 can all be connected to the output of the operational amplifier module 30, namely the drain d of the seventh PMOS transistor PM7 and the drain d of the second NMOS transistor NM2. Simultaneously, the drain d of the eighth PMOS transistor PM8 and the drain d of the ninth PMOS transistor PM9 can both be connected to the input terminals (i.e., the first terminals of the first resistor R1 and the third resistor R3) of the signal conversion submodule 402 or the current generation module 10 via a filter switch unit (i.e., the seventh to eighth switches S8). In this embodiment, when the drain d of either the eighth PMOS transistor PM8 or the ninth PMOS transistor PM9 is connected to the input terminal of the current generation module 10 via a filter switch unit, the drain d of the other must be connected to the signal conversion submodule 402 to form a target current loop, thereby achieving voltage-to-current conversion and current synchronization, and facilitating the subsequent averaging of the final output voltage by the signal conversion submodule 402. Furthermore, the device configuration of the current mirror unit described above is only one preferred embodiment and is not limited thereto.

[0113] Furthermore, as one possible implementation method, such as Figure 8 As shown, Figure 8This is a circuit diagram of the signal conversion submodule 402 in the second embodiment of the voltage reference circuit of the present invention. In this embodiment, the signal conversion submodule 402 includes: a sixth resistor R6 and a ninth switch S9;

[0114] The input terminal 1 of the ninth switch S9 is connected to the external device 1. The first terminal of the sixth resistor R6 is connected to the second output terminal 3 of the seventh switch S7 and the second output terminal 3 of the eighth switch S8. The first output terminal 2 of the ninth switch S9 is connected to the second terminal of the sixth resistor R6. The second output terminal 3 of the ninth switch S9 is connected to the third terminal of the sixth resistor R6. The fourth terminal of the sixth resistor R6 is grounded.

[0115] It is understood that the sixth resistor R6 is an adjustable voltage divider resistor. Therefore, in this embodiment, by adjusting the resistance value of the sixth resistor R6, the voltage amplitude of the calibration voltage signal sent to the external device 1 through the input terminal 1 of the ninth switch S9 remains consistent when the ninth switch S9 switches between different phases. This avoids ripple in the calibration voltage signal, so the ideal output reference voltage waveform can be achieved without filtering the ripple, thus reducing circuit cost.

[0116] In the specific implementation, it is assumed that this embodiment can operate in two working states, corresponding to two phases, namely the first phase and the second phase. For ease of understanding, let's take... Figure 9 and Figure 10 The voltage correction process in this scheme will be illustrated using an example. Figure 9 This is a schematic diagram of the first phase circuit of the second embodiment of the voltage reference circuit of the present invention. Figure 10 This is a schematic diagram of the second phase circuit of a second embodiment of the voltage reference circuit of the present invention. Figure 9 As shown, Figure 9 The amplification module 30 is represented in a simplified form, namely Figure 9 In the first phase The expression for the output voltage V1 before voltage calibration by voltage calibration module 40 can be:

[0117]

[0118] In the formula, VOS is the offset voltage equivalent to the input terminal of the operational amplifier module 30, and RT1 is the resistance value of the variable resistor R6 under the current phase.

[0119] Similarly, such as Figure 10 As shown, in the second phase The expression for the output voltage V2 before voltage calibration by voltage calibration module 40 can be:

[0120]

[0121] In the formula, VOS is the offset voltage equivalent to the input of the clamping operational amplifier, and RT2 is the resistance value of the variable resistor R6 at the current phase.

[0122] Based on the above analysis, it can be seen that by adjusting the sixth resistor R6, the values ​​of the variable resistors R1 and RT2 can be adjusted, thereby achieving V1 = V2.

[0123] In summary, this embodiment can enable two phases and The reference voltages output from the bottom are equal, thus ensuring that the final output reference voltage value remains unchanged while eliminating device mismatch using a flip switch. In other words, this embodiment can guarantee that the output voltage will not generate ripple. Therefore, there is no need for a filter circuit to filter out the ripple, and the ideal output reference voltage waveform can be achieved, thereby improving the output effect while reducing circuit cost.

[0124] This embodiment discloses a voltage reference circuit that further includes: a voltage calibration module; the voltage calibration module is connected to the input terminals of the first current submodule, the second current submodule, the output terminal of the operational amplifier module, and an external device; the voltage calibration module is used to adjust the voltage amplitude of the reference voltage signal output by the operational amplifier module according to the externally input calibration switch signal, and transmit the adjusted calibration voltage signal to the external device, wherein the calibration switch signal and the toggle switch signal are in phase. The voltage calibration module includes: a current synchronization submodule and a signal conversion submodule; the current synchronization submodule is connected to the input terminals of the first current submodule, the second current submodule, the output terminal of the operational amplifier module, and the input terminal of the signal conversion submodule, respectively, and the output terminal of the signal conversion submodule is connected to the external device; the current synchronization submodule is used to convert the reference voltage signal into a reference current signal according to the externally input calibration switch signal, and output the reference current signal to the voltage adjustment module; the signal conversion submodule is used to perform signal conversion on the reference current signal according to the calibration switch signal to obtain a calibration voltage signal, and transmit the calibration voltage signal to the external device. The current synchronization submodule includes a current mirror unit and a filter switch unit. The current mirror unit is connected to the operational amplifier module and the filter switch unit, respectively. The filter switch unit is connected to the first current submodule, the second current submodule, and the signal conversion submodule, respectively. The filter switch unit is used to conduct the corresponding target current synchronization loop according to the calibration switch signal. The current mirror unit is used to convert the reference voltage signal into a reference current signal according to the target current synchronization loop, and output the reference current signal to the voltage adjustment module through the target current synchronization loop. In this embodiment, the voltage calibration module can make the reference voltage output in the two phases equal, thereby ensuring that the final output reference voltage value remains unchanged while using a flip switch to eliminate device mismatch. That is, this embodiment can ensure that the output voltage will not generate ripple. Therefore, the ideal output reference voltage waveform can be achieved without filtering circuit to filter out ripple, thereby improving the output effect while reducing circuit cost.

[0125] To achieve the above objectives, the present invention also proposes a voltage reference circuit device, which includes the voltage reference circuit as described above. The specific structure of this voltage reference circuit is as described in the above embodiments. Since this voltage reference circuit device adopts all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be elaborated upon here.

[0126] To achieve the above objectives, the present invention also proposes a voltage reference circuit system, which includes the voltage reference device as described above. The specific structure of this voltage reference device is as described in the above embodiments. Since this voltage reference circuit system adopts all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be elaborated upon here.

[0127] The above are merely preferred embodiments of the present invention and do not limit the scope of the patent. Any equivalent structural or procedural transformations made based on the description and drawings of the present invention, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of the present invention.

Claims

1. A voltage reference circuit, characterized in that, The voltage reference circuit includes: a current generation module, a toggle switch module, and an operational amplifier module; The input terminal of the flip switch module is connected to the current generation module, and the output terminal of the flip switch module is connected to the input terminal of the operational amplifier module. The current generation module is used to generate a zero temperature coefficient current when a power signal is received. The zero temperature coefficient current includes a first density current signal and a second density current signal with different densities. The flip switch module is used to turn on the target amplification circuit corresponding to the flip switch signal when it receives an externally input flip switch signal. The flip switch signal may include at least two phase signals, and each phase signal corresponds to an amplification circuit in the operational amplifier module. The operational amplifier module is used to amplify and convert the first density current signal and the second density current signal according to the target amplification circuit, and output the converted reference voltage signal to an external device.

2. The voltage reference circuit as described in claim 1, characterized in that, The current generation module includes: a first current submodule and a second current submodule; The output terminals of the first current submodule and the second current submodule are both connected to the input terminal of the toggle switch module; The first current submodule is used to generate the first density current signal when the power supply signal is received; The second current submodule is used to generate the second density current signal when the power supply signal is received; The operational amplifier module is further configured to amplify and convert the first density current signal and the second density current signal according to the target amplification circuit to obtain the reference voltage signal.

3. The voltage reference circuit as described in claim 2, characterized in that, The voltage reference circuit further includes: a voltage calibration module; The voltage calibration module is connected to the input terminal of the first current submodule, the input terminal of the second current submodule, the output terminal of the operational amplifier module, and the external device, respectively. The voltage calibration module is used to adjust the voltage amplitude of the reference voltage signal output by the operational amplifier module according to the calibration switch signal input from the outside, and transmit the adjusted calibration voltage signal to the external device. The calibration switch signal and the toggle switch signal are in phase.

4. The voltage reference circuit as described in claim 3, characterized in that, The voltage calibration module includes: a current synchronization submodule and a signal conversion submodule; The current synchronization submodule is connected to the input terminal of the first current submodule, the input terminal of the second current submodule, the output terminal of the operational amplifier module, and the input terminal of the signal conversion submodule, respectively. The output terminal of the signal conversion submodule is connected to the external device. The current synchronization submodule is used to convert the reference voltage signal into a reference current signal according to the externally input calibration switch signal, and output the reference current signal to the signal conversion submodule; The signal conversion submodule is used to convert the reference current signal according to the calibration switch signal to obtain the calibration voltage signal, and transmit the calibration voltage signal to the external device.

5. The voltage reference circuit as described in claim 4, characterized in that, The current synchronization submodule includes: a current mirror unit and a filter switch unit; The current mirror unit is connected to the operational amplifier module and the filter switch unit respectively, and the filter switch unit is connected to the first current submodule, the second current submodule and the signal conversion submodule respectively; The filter switch unit is used to turn on the corresponding target current synchronization circuit according to the calibration switch signal; The current mirror unit is used to convert the reference voltage signal into a reference current signal according to the target current synchronization circuit, and output the reference current signal to the signal conversion submodule according to the target current synchronization circuit.

6. The voltage reference circuit as described in claim 5, characterized in that, The first current submodule includes: a first and a second resistor and a first transistor; the second current submodule includes: a third and a fifth resistor and a second transistor; The first end of the first resistor and the first end of the third resistor are both connected to the filter switch unit. The second end of the first resistor is connected to the input terminal of the flip switch module, the first end of the second resistor, and the emitter of the first transistor, respectively. The second end of the third resistor is connected to the input terminal of the flip switch module, the first end of the fourth resistor, and the first end of the fifth resistor, respectively. The second end of the fourth resistor is connected to the emitter of the second transistor. The second terminal of the second resistor, the base of the first transistor, the collector of the first transistor, the second terminal of the fifth resistor, the base of the second transistor, and the collector of the second transistor are all grounded.

7. The voltage reference circuit as described in claim 6, characterized in that, The flip switch module includes: a first to a second switch; the operational amplifier module includes: a third to a sixth switch, a first to a seventh PMOS transistor, and a first to a fourth NMOS transistor. The input terminal of the first switch is connected to the second terminal of the first resistor, the first terminal of the second resistor, and the emitter of the first transistor, respectively. The input terminal of the second switch is connected to the second terminal of the third resistor, the first terminal of the fourth resistor, and the first terminal of the fifth resistor, respectively. The first output terminal of the first switch is connected to the first output terminal of the second switch and the gate of the first PMOS transistor, respectively. The second output terminal of the first switch is connected to the second output terminal of the second switch and the gate of the second PMOS transistor, respectively. The sources of the first PMOS transistor and the second PMOS transistor are both connected to the drain of the third PMOS transistor. The gate of the third PMOS transistor is connected to the input power supply, and the source of the third PMOS transistor is connected to the input power supply. The input terminal of the third switch is connected to the source of the first NMOS transistor, and the input terminal of the fourth switch is connected to the source of the second NMOS transistor. The first output terminal of the third switch is connected to the first output terminal of the fourth switch, the drain of the third NMOS transistor, and the drain of the second PMOS transistor. The second output terminal of the third switch is connected to the second output terminal of the fourth switch, the drain of the fourth NMOS transistor, and the drain of the first PMOS transistor. The gate of the first NMOS transistor is connected to the gate of the second NMOS transistor, and the gate of the third NMOS transistor is connected to the gate of the fourth NMOS transistor. The input terminal of the fifth switch is connected to the drain of the fourth PMOS transistor, the input terminal of the sixth switch is connected to the drain of the fifth PMOS transistor, the first output terminal of the fifth switch is connected to the first output terminal of the sixth switch and the source of the sixth PMOS transistor, the second output terminal of the fifth switch is connected to the second output terminal of the sixth switch and the source of the seventh PMOS transistor, the gate of the fourth PMOS transistor is connected to the gate of the fifth PMOS transistor, the drain of the sixth PMOS transistor and the drain of the first NMOS transistor, the gate of the sixth PMOS transistor is connected to the gate of the seventh PMOS transistor, and the sources of the fourth PMOS transistor and the fifth PMOS transistor are both connected to the input power supply. The drain of the seventh PMOS transistor and the drain of the second NMOS transistor are both connected to the external device. The gate and source of the third NMOS transistor are both grounded, as are the gate and source of the fourth NMOS transistor.

8. The voltage reference circuit as described in claim 7, characterized in that, The current mirror unit includes: the eighth to the ninth PMOS transistors; The source of the eighth PMOS transistor and the source of the ninth PMOS transistor are both connected to an external power supply. The gate of the eighth PMOS transistor and the gate of the ninth PMOS transistor are both connected to the drain of the seventh PMOS transistor and the drain of the second NMOS transistor. The drain of the eighth PMOS transistor and the drain of the ninth PMOS transistor are both connected to the filter switch unit.

9. The voltage reference circuit as described in claim 8, characterized in that, The filter switching unit includes: a seventh to an eighth switch; The input terminal of the seventh switch is connected to the drain of the eighth PMOS transistor, and the input terminal of the eighth switch is connected to the drain of the ninth PMOS transistor. The first output terminal of the seventh switch is connected to the first output terminal of the eighth switch, the first terminal of the first resistor, and the first terminal of the third resistor, respectively. The second output terminals of the seventh switch and the second output terminals of the eighth switch are both connected to the signal conversion submodule.

10. The voltage reference circuit as described in claim 9, characterized in that, The signal conversion submodule includes: a sixth resistor and a ninth switch; The input terminal of the ninth switch is connected to the external device. The first terminal of the sixth resistor is connected to the second output terminal of the seventh switch and the second output terminal of the eighth switch. The first output terminal of the ninth switch is connected to the second terminal of the sixth resistor. The second output terminal of the ninth switch is connected to the third terminal of the sixth resistor. The fourth terminal of the sixth resistor is grounded.

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