Dot screen circuit, dot screen method and dot screen device of display panel

CN117392928BActive Publication Date: 2026-10-23HEFEI VISIONOX TECH CO LTD +1
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Patent Information

Application Number
CN202311295911.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-10-07
Publication Date
2026-10-23
Estimated Expiration
2043-10-07

AI Technical Summary

Technical Problem

[0004]本申请主要解决的技术问题是提供一种显示面板的点屏电路、点屏方法及点屏装置,能够解决现有技术中显示面板的点屏电路输出的驱动电源、高电压信号及低电压信号的上电时序无法与显示面板的驱动电路的上电时序相匹配,以致存在上电后显示面板无显示的风险问题

Benefits of technology

[0015]本申请的有益效果是:区别于现有技术,本申请提供的点屏电路点屏电路具有第一侦测端和第一电源输出端,和/或,点屏电路具有第二侦测端、第二电源输出端以及第三电源输出端,该点屏电路用于检测第一侦测端接收的驱动电路的设定差分信号的特征信息或电源使能信号,以基于特征信息或电源使能信号,使第一电源输出端向驱动电路输出第一电源,和/或,检测第二侦测端接收的驱动电路的数据信号输出端提供给显示面板的电压值或电源控制信号,以基于电压值或电源控制信号,使第二电源输出端向像素电路输出高电压信号,使第三电源输出端向像素电路输出低电压信号,从而保证了点屏电路上电的准确性和及时性,也即确保了点屏电路的信号输出与驱动电路的上电时序相匹配,而既不出现上电提前,也不出现上电滞后,从而避免了显示面板出现上电异常、无显示的现象。

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Abstract

The application discloses a point screen circuit, a point screen method and a point screen device of a display panel. The point screen circuit is used for detecting characteristic information of a set differential signal of a driving circuit received by a first detection end or a power supply enable signal, so as to make a first power supply output end output a first power supply to the driving circuit based on the characteristic information or the power supply enable signal, and / or detecting a voltage value provided by a data signal output end of the driving circuit to the display panel or a power supply control signal received by a second detection end, so as to make a second power supply output end output a high-voltage signal to a pixel circuit and make a third power supply output end output a low-voltage signal to the pixel circuit based on the voltage value or the power supply control signal. In the above manner, the point screen circuit in the application guarantees the accuracy and timeliness of power-on, thereby avoiding the phenomenon that the display panel has power-on abnormalities and no display.
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Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a dotting circuit, dotting method and dotting device for a display panel. Background Technology

[0002] In the display driver of a display panel, it is generally necessary to perform a screen test, which means providing various electrical signals to the display panel to light it up; and in the manufacturing process of the display panel, it is also generally necessary to perform a screen test to determine whether its display performance meets the requirements.

[0003] However, in existing display panel dotting devices, there is a risk that the display panel will not display anything after power-on because the power-on timing of the dotting device and the display panel's driving circuit is not matched. Summary of the Invention

[0004] The main technical problem solved by this application is to provide a dot-on circuit, dot-on method and dot-on device for a display panel, which can solve the problem that the power-on sequence of the driving power supply, high voltage signal and low voltage signal output by the dot-on circuit of the display panel cannot match the power-on sequence of the driving circuit of the display panel, resulting in the risk that the display panel will not display after power-on.

[0005] To solve the above-mentioned technical problems, one technical solution adopted in this application is: providing a dot-screen circuit for a display panel, wherein the dot-screen circuit has a first detection terminal and a first power output terminal, and / or, the dot-screen circuit has a second detection terminal, a second power output terminal and a third power output terminal, wherein the dot-screen circuit is used to detect the feature information or power enable signal of the setting differential signal of the driving circuit received by the first detection terminal, so as to output a first power supply to the driving circuit based on the feature information or power enable signal, and / or detect the voltage value or power control signal provided to the display panel by the data signal output terminal of the driving circuit received by the second detection terminal, so as to output a high voltage signal to the pixel circuit by the second power output terminal and output a low voltage signal to the pixel circuit by the third power output terminal based on the voltage value or power control signal.

[0006] The feature information includes the transmission rate. During power-on, when the transmission rate changes from below a set rate threshold to above a set rate threshold, the dot-screen circuit outputs the first power supply to the drive circuit. Optionally, during power-on, when the transmission rate is below the set rate threshold, the dot-screen circuit does not output the first power supply to the drive circuit. Optionally, the first detection terminal is coupled to the mobile industry processor interface of the drive circuit of the display panel. Optionally, the first detection terminal and the first power supply output terminal are coupled to the drive circuit of the display panel.

[0007] The feature information includes digital instructions. When the screen dot circuit parses the digital instructions as an instruction end character, it causes the first power output terminal to output the first power to the driving circuit. Optionally, the screen dot circuit does not output the first power to the driving circuit before parsing the digital instructions as an instruction end character. Optionally, the first detection terminal is coupled to the mobile industry processor interface of the driving circuit of the display panel. Optionally, the first detection terminal and the first power output terminal are coupled to the driving circuit of the display panel.

[0008] The screen dot circuit starts timing when the voltage value changes from below a set threshold level to above a set threshold level. After a first delay, it outputs a high voltage signal to the pixel circuit from the second power output terminal and a low voltage signal to the pixel circuit from the third power output terminal. Optionally, when the voltage value changes from below the set threshold level, the screen dot circuit does not output a high voltage signal to the pixel circuit from the second power output terminal and does not output a low voltage signal to the pixel circuit from the third power output terminal. Optionally, the second detection terminal is coupled to the driving circuit of the display panel, and the second and third power output terminals are coupled to the pixel circuit of the display panel.

[0009] Among them, the set level threshold is greater than or equal to two-thirds of the highest voltage output by the data signal output terminal; the first duration is greater than the duration corresponding to 1 frame of display on the display panel and less than the duration corresponding to 5 frames of display on the display panel.

[0010] In this circuit, when the voltage value is continuously higher than the set level threshold for more than a second time period, the second power output terminal outputs a high voltage signal to the pixel circuit after a third time period, and the third power output terminal outputs a low voltage signal to the pixel circuit. Optionally, the second detection terminal is coupled to the driving circuit of the display panel, and the second power output terminal and the third power output terminal are coupled to the pixel circuit of the display panel.

[0011] Among them, the sum of the second duration and the third duration is greater than the duration corresponding to 1 frame of the display panel and less than the duration corresponding to 5 frames of the display panel.

[0012] The dot-screen circuit is further configured to detect whether a power enable signal is output to the first detection terminal from the driving circuit, and, if a power enable signal is output to the first detection terminal, after a fourth delay, output a first power supply to the driving circuit from the first power output terminal; and / or, detect whether a power control signal is output to the second detection terminal, and, if a power control signal is output to the second detection terminal, after a fourth delay, output a high voltage signal to the pixel circuit from the second power output terminal, and output a low voltage signal to the pixel circuit from the third power output terminal; optionally, the dot-screen circuit may, if no power enable signal is output to the first detection terminal, output a first power supply to the driving circuit from the second power output terminal. When the detection terminal is in operation, the first power output terminal is not allowed to output the first power supply to the driving circuit, and when there is no power control signal output to the second detection terminal, the second power output terminal is not allowed to output a high voltage signal to the pixel circuit, and the third power output terminal outputs a low voltage signal to the pixel circuit; optionally, the fourth duration is greater than or equal to 2 milliseconds and less than the duration corresponding to 1 frame of display on the display panel; optionally, the first detection terminal and the first power output terminal are coupled to the driving circuit of the display panel, and / or, the second detection terminal is coupled to the driving circuit of the display panel, and the second power output terminal and the third power output terminal are coupled to the pixel circuit of the display panel.

[0013] To solve the above-mentioned technical problems, another technical solution adopted in this application is: to provide a screen-lighting method for a display panel, wherein the screen-lighting method includes: detecting characteristic information or power enable signal of a setting differential signal of a driving circuit of the display panel, and outputting a first power supply to the driving circuit based on the characteristic information or power enable signal; and / or detecting the voltage value or power control signal provided to the display panel by the data signal output terminal of the driving circuit, so as to output a high voltage signal and a low voltage signal to the pixel circuit of the display panel based on the voltage value or power control signal, so as to light up the display panel.

[0014] To solve the above-mentioned technical problems, another technical solution adopted in this application is: to provide a screen-dotting device, wherein the screen-dotting device includes a housing and a screen-dotting circuit disposed within the housing; wherein the screen-dotting circuit is a screen-dotting circuit as described in any of the above claims.

[0015] The beneficial effects of this application are as follows: Unlike the prior art, the dot-screen circuit provided in this application has a first detection terminal and a first power output terminal, and / or, a second detection terminal, a second power output terminal, and a third power output terminal. This dot-screen circuit is used to detect the characteristic information or power enable signal of the setting differential signal of the driving circuit received by the first detection terminal, so as to output the first power supply to the driving circuit based on the characteristic information or power enable signal, and / or detect the voltage value or power control signal provided to the display panel by the data signal output terminal of the driving circuit received by the second detection terminal, so as to output a high voltage signal to the pixel circuit by the second power output terminal and output a low voltage signal to the pixel circuit by the third power output terminal based on the voltage value or power control signal. This ensures the accuracy and timeliness of the power-on of the dot-screen circuit, that is, it ensures that the signal output of the dot-screen circuit matches the power-on timing of the driving circuit, without either power-on prematurely or power-on lagging, thereby avoiding the phenomenon of abnormal power-on or no display on the display panel. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of one embodiment of the dot-screen circuit of the display panel of this application;

[0017] Figure 2 This is a schematic diagram of another embodiment of the dot-screen circuit of the display panel in this application;

[0018] Figure 3 This is a circuit diagram of one embodiment of the pixel circuit of the display panel of this application;

[0019] Figure 4 This is a flowchart illustrating one embodiment of the screen dotting method for the display panel of this application;

[0020] Figure 5 This is a schematic diagram of one embodiment of the dot-screen device of this application. Detailed Implementation

[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] The terms "first," "second," and "third" in this application are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. All directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationships and movements between components in a specific orientation (as shown in the figures). If the specific orientation changes, the directional indications also change accordingly. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0023] In this document, the term "implementation" means that a specific feature, structure, or characteristic described in connection with an implementation may be included in at least one implementation of this application. The appearance of this phrase in various places in the specification does not necessarily refer to the same implementation, nor is it a separate or alternative implementation mutually exclusive with other implementations. It will be explicitly and implicitly understood by those skilled in the art that the implementations described herein can be combined with other implementations.

[0024] In related technologies, the dot-screen devices for display panels directly supply the dot-screen voltage (AVDD / ELVDD / ELVSS) of the display module, which is not controlled by the display module's drive circuit. Due to time delays between the dot-screen device's signal detection of the display panel's drive circuit and its control of the various signal outputs, the power-on sequence of the dot-screen device's corresponding output drive power supply, high-voltage signal, and low-voltage signal often cannot match the power-on sequence of the drive circuit, potentially leading to conflicts. This means the dot-screen device may power on prematurely or delayedly, resulting in the risk of no display on the display panel after power-on. To solve this technical problem, this application provides a dot-screen circuit for a display panel.

[0025] The present application will now be described in detail with reference to the accompanying drawings and embodiments.

[0026] Please see Figure 1 ,in, Figure 1This is a schematic diagram of one embodiment of the dot-screen circuit of the display panel of this application. In this embodiment, the dot-screen circuit 10 has a first detection terminal 11 and a first power output terminal 13, and / or, the dot-screen circuit 10 has a second detection terminal 12, a second power output terminal 14, and a third power output terminal 15. Optionally, the dot-screen circuit 10 has a first detection terminal 11, a second detection terminal 12, a first power output terminal 13, a second power output terminal 14, and a third power output terminal 15.

[0027] Specifically, the dot-screen circuit 10 can be understood as a functional circuit in a testing device used to perform dot-screen testing on the display panel 101 before it leaves the factory, in order to determine whether the display performance of the display panel 101 meets the requirements. The power-on sequence of the dot-screen circuit 10 must be consistent with the power-on sequence of the entire display device's dot-screen process to ensure that the dot-screen circuit 10 can still guarantee normal power-on in subsequent products, thus avoiding abnormal power-on and no display phenomena. Furthermore, the dot-screen circuit 10 can also be understood as a functional circuit integrated into the system chip or power management chip of the display device, used to cooperate with the driving circuit 102 of the display panel 101 in the display device to light up the display panel 101. The driving circuit 102 can specifically be a DDIC (Display Driver Integrated Circuit). Optionally, the driving circuit 102 can be bonded to the display panel 101.

[0028] Optionally, the first detection terminal 11 and the first power output terminal 13 are coupled to the driving circuit 102 of the display panel 101. And / or, the second detection terminal 12 is coupled to the driving circuit 102 of the display panel 101. The second power output terminal 14 and the third power output terminal 15 are coupled to the pixel circuit of the display panel 101.

[0029] Specifically, the first detection terminal 11, the second detection terminal 12, and the first power output terminal 13 are coupled to the driving circuit 102 of the display panel 101 for signal interaction with the driving circuit 102, such as initializing and sampling the driving circuit 102.

[0030] The second power output terminal 14 and the third power output terminal 15 are coupled to the pixel circuit of the display panel 101 (not shown in the figure).

[0031] The first detection terminal 11 can be coupled to the Mobile Industry Processor Interface (MIPI) of the driving circuit 102 of the display panel 101.

[0032] It is worth noting that the term "coupled" in this document includes any direct and indirect means of connection. Therefore, if the document describes a first element coupled to a second element, it means that the first element can be directly connected to the second element through electrical connections, communication connections, or signal connections such as wireless transmission or optical transmission, or indirectly connected to the second element electrically or through other elements or connection means.

[0033] The dot-screen circuit 10 is used to detect the characteristic information of the set differential signal MIPI received by the drive circuit 102 from the first detection terminal 11, such as the current transmission rate of the set differential signal MIPI, or any reasonable information or power enable signal corresponding to the set differential signal MIPI. Based on the characteristic information or power enable signal, the first power output terminal 13 can determine whether to output the first power AVDD to the drive circuit 102, so that the drive circuit 102 starts running and sends a drive signal to the pixel circuit of the display panel 101.

[0034] And / or, the dot-screen circuit 10 is specifically used to detect the current voltage value or power control signal of the Source signal provided to the display panel 101 by the data signal output terminal of the driving circuit 102 received by the second detection terminal 12, so that based on the voltage value or power control signal, the second power output terminal 14 can determine whether to output a high voltage signal ELVDD to the pixel circuit of the display panel 101, and the third power output terminal 15 can output a low voltage signal ELVSS to the pixel circuit to light up the display panel 101.

[0035] It is worth noting that the Source signal can be specifically understood as the source drive signal provided by the driving circuit 102 to the pixel circuit of the display panel 101, equivalent to the data signal Data. The display panel 101 can start operating to display corresponding images when the pixel circuit in the display area of ​​the display panel 101 receives corresponding high-voltage signals ELVDD, low-voltage signals ELVSS, reference voltage signals Vref, scan signals Scan, and data signals Data. The first power supply AVDD corresponds to the operating power supply of the driving circuit 102, enabling the driving circuit 102 to start operating and send corresponding drive signals to the display panel 101, such as the scan signal Scan and the data signal Data. The second detection terminal 12 can be coupled to the output terminal of the source drive signal output of the driving circuit 102 of the display panel 101.

[0036] The dot-screen circuit 10 specifically performs corresponding detection through the first detection terminal 11 and the second detection terminal 12, and outputs the first power supply AVDD to the driving circuit 102 of the display panel 101 through the first power output terminal 13, and outputs the high voltage signal ELVDD and the low voltage signal ELVSS to the pixel circuit of the display panel 101 through the second power output terminal 14 and the third power output terminal 15.

[0037] The above scheme determines whether to output the first power supply AVDD to the driving circuit 102 by detecting the characteristic information of the set differential signal MIPI, and determines whether to output the high voltage signal ELVDD and the low voltage signal ELVSS to the pixel circuit of the display panel 101 by detecting the voltage value of the Source signal provided to the display panel 101 by the data signal output terminal of the driving circuit 102. This effectively ensures that the signal output of the dot-screen circuit 10 matches the power-on timing of the driving circuit 102, so as to ensure the accuracy and timeliness of the power-on of the dot-screen circuit 10, without either premature or delayed power-on, thereby avoiding the phenomenon of abnormal power-on or no display on the display panel 101.

[0038] It is worth noting that when the dot-screen circuit 10 is specifically a functional circuit in the dot-screen detection device of the display panel 101, the above solution can effectively ensure that the power-on sequence of the dot-screen circuit 10 is consistent with the power-on sequence of the dot-screen process of the whole display device, so as to ensure that the dot-screen circuit 10 can still be powered on normally in subsequent products, and avoid the phenomenon of abnormal power-on or no display.

[0039] In one embodiment, see Figure 1 The characteristic information of the setting differential signal MIPI of the driving circuit 102 may specifically include the transmission rate. The setting differential signal MIPI specifically includes two types: data signal Data and command signal. That is, the dot screen circuit 10 specifically sends data signal Data and / or command signal to the driving circuit 102 to initialize the driving circuit 102 and / or other arbitrary reasonable command control.

[0040] It is worth noting that during power-on, the mobile industry processor interface (not shown) of the drive circuit 102 first sends an instruction signal and then a data signal. After sending the instruction signal, the drive circuit 102 will start running. The host system sends data signals (Data) and instruction signals to the drive circuit 102 at different rates, specifically, the rate of sending instruction signals is less than the rate of sending data signals (Data). This allows the dot-screen circuit 10 to determine whether the set differential signal (MIPI) currently sent to the drive circuit 102 corresponds to a data signal (Data) or an instruction signal by detecting the rate at which the set differential signal (MIPI) is sent. Specifically, when the dot-screen circuit 10 determines that the set differential signal (MIPI) currently sent by the host system to the drive circuit 102 is a data signal (Data), it indicates that the drive circuit 102 needs to start running, and the dot-screen circuit 10 needs to output a first power supply (AVDD) to the drive circuit 102 to match the power-on timing of the display module and the dot-screen circuit 10. The display module may include a display panel 101 and a drive circuit 102.

[0041] Understandably, by setting any reasonable set rate threshold between the higher rate of sending the data signal Data and the lower rate of sending the command signal, it is possible to distinguish whether the set differential signal MIPI is a data signal Data by detecting whether the current sending rate of the set differential signal MIPI of the dot-screen circuit 10 is lower than the set rate threshold, and thus determine whether to output the first power supply AVDD to the drive circuit 102.

[0042] Specifically, during the power-on process, when the transmission rate of the currently set differential signal MIPI changes from below the set rate threshold to above the set rate threshold, the dot-screen circuit 10 causes the first power output terminal 13 to output the first power supply AVDD to the drive circuit 102; and when the transmission rate is determined to be below the set rate threshold, the dot-screen circuit 10 does not cause the first power output terminal 13 to output the first power supply AVDD to the drive circuit 102.

[0043] Optionally, the first detection terminal 11 is coupled to the mobile industry processor interface of the driving circuit 102 of the display panel 101.

[0044] In another embodiment, the feature information of the setting differential signal MIPI sent by the dot-screen circuit 10 to the driving circuit 102 may further include digital instructions. That is, the dot-screen circuit 10 may also acquire the setting differential signal MIPI and parse the setting differential signal MIPI to obtain the digital instructions specifically corresponding to the setting differential signal MIPI, so as to determine whether to output the first power supply AVDD to the driving circuit 102 of the first power output terminal 13 according to the digital instructions.

[0045] It is worth noting that the digital instruction can specifically be code for initializing the drive circuit 102. When the instruction signal sent by the dot-screen circuit 10 to the drive circuit 102 corresponds to the instruction end character, it indicates that the initialization code sent to the drive circuit 102 has ended, and the drive circuit 102 can be started to run so that the power-on timing of the display module and the dot-screen circuit 10 is matched.

[0046] Therefore, when the dot-screen circuit 10 analyzes the digital instruction corresponding to the characteristic information of the setting differential signal MIPI as the instruction end character, the dot-screen circuit 10 outputs the first power supply AVDD to the drive circuit 102; and when it is determined that the digital instruction is not the instruction end character, that is, before the instruction end character, the dot-screen circuit 10 does not allow the first power output terminal 13 to output the first power supply AVDD to the drive circuit 102.

[0047] Optionally, the end character of the instruction can be any reasonable number base such as binary 11 or 10, or decimal 11, and this application does not limit it in this regard.

[0048] In a specific embodiment, the dot-screen circuit 10 can be connected to the driving circuit 102 through the first differential signal channel (D0P, D0N), the second differential signal channel (D1P, D1N), the third differential signal channel (D2P, D2N), and the fourth differential signal channel (D3P, D3N) of the mobile industry processor interface. Specifically, the data signal Data is sent to the driving circuit 102 through the first differential signal channel (D0P, D0N), the second differential signal channel (D1P, D1N), the third differential signal channel (D2P, D2N), and the fourth differential signal channel (D3P, D3N) of the mobile industry processor interface, and the instruction signal is sent to the driving circuit 102 through the first differential signal channel (D0P, D0N) of the mobile industry processor interface. The dot-screen circuit 10 specifically detects the signal transmission rate in the first differential signal channel (D0P, D0N) of the mobile industry processor interface to determine whether the current transmission rate of the dot-screen circuit 10 to the set differential signal MIPI is lower than the set rate threshold, or detects whether the digital instruction corresponding to the feature information of the set differential signal MIPI is the instruction end character, and then determines whether to output the first power supply AVDD to the driving circuit 102.

[0049] In one embodiment, the voltage value of the Source signal provided by the data signal output terminal of the driving circuit 102 to the display panel 101 can specifically include two states: high level and low level. Specifically, when the voltage value is high level, the display panel 101 is started to run so that the power-on timing of the display module and the dot-screen circuit 10 is matched.

[0050] It is understandable that after setting any reasonable threshold between the high and low levels, it is possible to determine whether the display panel 101 has started running by detecting whether the current voltage value of the Source signal is higher than the set threshold.

[0051] Specifically, the dot-screen circuit 10 starts timing when the voltage value of the Source signal provided to the sub-display panel 101 by the data signal output terminal of the driving circuit 102 changes from below a set level threshold to above a set level threshold, and delays for a first duration T1 to ensure that the display panel 101 has completed startup. Then, the second power output terminal 14 outputs a high voltage signal ELVDD to the pixel circuit of the display panel 101, and the third power output terminal 15 outputs a low voltage signal ELVSS to the pixel circuit to light up the display panel 101.

[0052] Optionally, when the voltage value is lower than a set level threshold, the dot-screen circuit 10 will not allow the second power output terminal 14 to output a high voltage signal to the pixel circuit, nor will it allow the third power output terminal 15 to output a low voltage signal to the pixel circuit.

[0053] Optionally, the set level threshold can be greater than or equal to two-thirds of the highest voltage output by the data signal output terminal of the drive circuit 102, and less than or equal to any reasonable voltage value of the highest voltage. This application does not limit this.

[0054] Optionally, the first duration T1 is greater than the duration corresponding to 1 frame of the display panel and less than the duration corresponding to 5 frames of the display panel. This application does not limit this.

[0055] It is worth noting that the duration of one frame of the display screen 101 is specifically determined by the characteristic parameters of the display panel 101, such as refresh rate and resolution.

[0056] In another embodiment, see Figure 1 Specifically, when the voltage value of the Source signal provided by the data signal output terminal of the driving circuit 102 to the display panel 101 exceeds the second duration T2, the second power output terminal 14 outputs a high voltage signal ELVDD to the pixel circuit of the display panel 101, and the third power output terminal 15 outputs a low voltage signal ELVSS to the pixel circuit, so as to light up the display panel 101.

[0057] In another embodiment, when the dot-screen circuit 10 determines that the voltage value of the Source signal changes from below a set level threshold to above a set level threshold, or when it detects that the voltage value of the Source signal provided by the driving circuit 102 to the display panel 101 is a continuously high voltage value for more than the second duration T2, it may specifically output a high voltage signal ELVDD and a low voltage signal ELVSS to the display panel 101 without delay.

[0058] Optionally, the sum of the second duration T2 and the third duration T3 (equivalent to T2+T3) is greater than the duration corresponding to 1 frame of display on the display panel and less than the duration corresponding to 5 frames of display on the display panel. This application does not limit this.

[0059] In one embodiment, the dot-screen circuit 10 may further send a reset signal RST to the drive circuit 102 to reset the drive circuit 102; and the dot-screen circuit 10 may further send a first dot-screen voltage signal VCI, a second dot-screen voltage signal VDDIO and a third dot-screen voltage signal DVDD to the drive circuit 102 to start the drive circuit 102.

[0060] In another embodiment, please refer to Figure 2 , Figure 2 This is a schematic diagram of another embodiment of the dot-screen circuit of the display panel of this application. Specifically, the dot-screen circuit 10 is further used to detect whether the driving circuit 102 outputs a power enable signal AVDD_EN to the first detection terminal 11, and when the power enable signal AVDD_EN is output to the first detection terminal 11, after a delay of four time T4, to output the first power supply AVDD to the driving circuit 102 from the first power output terminal 13, and / or to detect whether a power control signal Swire is output to the second detection terminal 12, and when the power control signal Swire is output to the second detection terminal 12, after a delay of four time T4, to output a high voltage signal to the pixel circuit from the second power output terminal 14, and to output a low voltage signal to the pixel circuit from the third power output terminal 15.

[0061] Optional, see Figure 2 When there is no power enable signal AVDD_EN output to the first detection terminal 11, the dot screen circuit 10 does not output the first power supply AVDD to the drive circuit 102 from the first power output terminal 13, and when there is no power control signal Swire output to the second detection terminal 12, it does not output a high voltage signal to the pixel circuit from the second power output terminal 12, and outputs a low voltage signal to the pixel circuit from the third power output terminal 15.

[0062] Optionally, the fourth duration T4 is greater than or equal to 2 milliseconds and less than the duration corresponding to 1 frame of display on the display panel; this application does not limit this.

[0063] In one embodiment, the dot-screen circuit 10 further includes a detection circuit (not shown) and a power supply circuit (not shown). The detection circuit includes a first detection terminal 11 and a second detection terminal 12. The power supply circuit includes a first power output terminal 13, a second power output terminal 14, and a third power output terminal 15. Specifically, the detection circuit detects the characteristic information of the set differential signal of the driving circuit 102, and controls the power supply circuit to output or not output the first power supply AVDD to the driving circuit 102 based on the characteristic information. The detection circuit also detects the voltage value of the Source signal provided by the driving circuit 102 to the display panel 101, and controls the power supply circuit to output the high voltage signal ELVDD and the low voltage signal ELVSS to the pixel circuit based on the voltage value. Further details are omitted here.

[0064] Further, please see Figure 3 , Figure 3 This is a circuit diagram of one embodiment of the pixel circuit of the display panel of this application. Optionally, the pixel circuit may include a driving transistor, a data writing transistor, a storage capacitor Cst, and a light-emitting element LED. A high-voltage signal ELVDD is connected to the first terminal of the driving transistor. The second terminal of the driving transistor is electrically connected to the first terminal of the light-emitting element, and the second terminal of the light-emitting element may be connected to a low-voltage signal ELVSS. A data voltage Vdata (i.e., the Source signal) may be connected to the first terminal of the data writing transistor, and the second terminal of the data writing transistor is electrically connected to the control terminal of the driving transistor. A scan signal Scan may be connected to the control terminal of the data writing transistor.

[0065] This application also provides a method for tapping a display panel; please refer to [link / reference]. Figure 4 , Figure 4 This is a flowchart illustrating one embodiment of the display panel dotting method of this application. The display panel dotting method is applied to the dotting circuit of the display panel provided in the above embodiment. Specifically, it may include steps S21 and / or S22.

[0066] S21: Detect the characteristic information or power enable signal of the setting differential signal of the drive circuit of the display panel, and output the first power supply to the drive circuit based on the characteristic information or power enable signal.

[0067] It is understood that the screen-dotting method of the display panel in this embodiment is specifically a method in which the screen-dotting circuit cooperates with the driving circuit of the display panel to perform screen dotting on the display panel. The screen-dotting circuit has a first detection terminal, a second detection terminal, a first power output terminal, a second power output terminal, and a third power output terminal. The first detection terminal, the second detection terminal, and the first power output terminal are coupled to the driving circuit of the display panel, and the second power output terminal and the third power output terminal are coupled to the pixel circuit of the display panel.

[0068] Specifically, the detection circuit detects the characteristic information or power enable signal of the set differential signal sent to the driving circuit, such as the transmission rate of the set differential signal or any reasonable information such as the specific digital instruction corresponding to the set differential signal, so as to determine whether to output the first power to the driving circuit based on the characteristic information or power enable signal, so that the driving circuit sends the driving signal to the pixel circuit of the display panel.

[0069] S22: The data signal output terminal of the detection drive circuit provides the voltage value or power control signal to the display panel, so as to output high voltage signal and low voltage signal to the pixel circuit of the display panel based on the voltage value or power control signal, so as to light up the display panel.

[0070] Furthermore, the detection circuit is specifically used to detect the voltage value of the second power supply provided to the external display panel corresponding to the data signal output terminal of the driving circuit, such as the current voltage value of the second power supply, or any reasonable state or power control signal such as the duration of the high level, so as to determine whether to output a high voltage signal and a low voltage signal to the display panel based on the voltage value or power control signal, so as to light up the display panel.

[0071] Furthermore, in one embodiment, the feature information may specifically include the transmission rate. In the above S21, it further includes: during the power-on process, when the transmission rate changes from below the set rate threshold to above the set rate threshold, the screen circuit outputs a first power supply to the driving circuit, and when the transmission rate is below the set rate threshold, it does not output the first power supply to the driving circuit.

[0072] Furthermore, in one embodiment, the feature information may further include a digital instruction. In the above S21, it may further include: when the digital instruction is parsed as an instruction end character, outputting a first power supply to the driving circuit, and not outputting the first power supply to the driving circuit before the digital instruction is parsed as an instruction end character.

[0073] Furthermore, in one embodiment, S22 above specifically includes: starting timing when the voltage value changes from below a set level threshold to above a set level threshold, outputting a high voltage signal and a low voltage signal to the pixel circuit after a first delay, and not outputting the high voltage signal and the low voltage signal to the pixel circuit when the voltage value changes from below the set level threshold.

[0074] Optionally, the level threshold can be set to be greater than or equal to two-thirds of the highest voltage output at the data signal output terminal.

[0075] Optionally, the first duration is greater than the duration corresponding to 1 frame of the display panel and less than the duration corresponding to 5 frames of the display panel.

[0076] Furthermore, in one embodiment, S22 above specifically includes: when the voltage value is a sustained high voltage value for more than a second duration, outputting a high voltage signal and a low voltage signal to the pixel circuit after a third duration.

[0077] Optionally, the sum of the second duration and the third duration is greater than the duration corresponding to 1 frame of display on the display panel and less than the duration corresponding to 5 frames of display on the display panel.

[0078] Furthermore, in one embodiment, S21 above specifically includes: detecting whether the drive circuit outputs a power enable signal, and when a power enable signal is output, outputting a first power supply to the drive circuit after a fourth delay.

[0079] Furthermore, in one embodiment, S22 above specifically includes: detecting whether a power control signal is output, and when a power control signal is present, delaying for a fourth time period to output a high voltage signal and a low voltage signal to the pixel circuit.

[0080] Optionally, the fourth duration is greater than or equal to 2 milliseconds and less than the duration corresponding to 1 frame of display on the display panel.

[0081] This application also provides a screen dotting device; please refer to [link / reference]. Figure 5 , Figure 5 This is a schematic diagram of one embodiment of the screen dotting device of this application. In this embodiment, the screen dotting device 30 specifically includes a housing 31 and a screen dotting circuit 32 disposed within the housing 31.

[0082] Optionally, the dot-screen device 30 can be a product testing device for the display panel before it leaves the factory, or any terminal device with a display panel such as a smartphone or tablet. This application does not limit this.

[0083] The dot-screen circuit 32 described in this embodiment is the dot-screen circuit 10 described in any of the above embodiments. Please refer to [link / reference] for details. Figure 1 and Figure 2 The relevant textual explanations will not be repeated here.

[0084] The beneficial effects of this application are as follows: Unlike existing technologies, the dot-screen circuit provided in this application has a first detection terminal and a first power output terminal, and / or, the dot-screen circuit has a second detection terminal, a second power output terminal, and a third power output terminal. Optionally, the first detection terminal and the first power output terminal are coupled to the driving circuit of the display panel. And / or, the second detection terminal is coupled to the driving circuit of the display panel, and the second power output terminal and the third power output terminal are coupled to the pixel circuit of the display panel. Optionally, the dot-screen circuit has a first detection terminal, a second detection terminal, a first power output terminal, a second power output terminal, and a third power output terminal; the first detection terminal, the second detection terminal, and the first power output terminal are coupled to the driving circuit of the display panel, and the second power output terminal and the third power output terminal are coupled to the pixel circuit of the display panel.

[0085] The dot-screen circuit is used to detect the characteristic information or power enable signal of the setting differential signal of the driving circuit received by the first detection end, so as to output the first power supply to the driving circuit based on the characteristic information or power enable signal, and / or detect the voltage value or power control signal provided to the display panel by the data signal output terminal of the driving circuit received by the second detection end, so as to output a high voltage signal to the pixel circuit by the second power supply output terminal and output a low voltage signal to the pixel circuit by the third power supply output terminal. This ensures the accuracy and timeliness of the power-on of the dot-screen circuit, that is, it ensures that the signal output of the dot-screen circuit matches the power-on timing of the driving circuit, without either power-on prematurely or power-on lagging, thereby avoiding the phenomenon of abnormal power-on or no display on the display panel.

[0086] The screen-testing circuit can be used to perform screen-testing on display modules of different sizes and specifications. Display modules of different sizes and specifications can be assembled with different clients to form the final product. Different types of clients have different power supply chip response times. The screen-testing circuit can be used before shipment to simulate the client (equivalent to the client's motherboard) and perform screen-testing on display modules of different sizes and specifications. By adjusting the delay duration, such as the first duration T1, the second duration T2, the third duration T3, and the fourth duration T4, different types of clients can be simulated, ensuring that the signal output of the screen-testing circuit matches the power-on timing of the display module's drive circuit.

[0087] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A dot-screen circuit for a display panel, characterized in that, The dot-screen circuit has a first detection terminal and a first power output terminal, and / or the dot-screen circuit has a second detection terminal, a second power output terminal, and a third power output terminal. The dot-screen circuit is used to detect the feature information or power enable signal of the setting differential signal of the driving circuit of the display panel received by the first detection terminal, so as to enable the first power output terminal to output a first power to the driving circuit based on the feature information or power enable signal, and / or detect the voltage value or power control signal provided to the display panel by the data signal output terminal of the driving circuit received by the second detection terminal, so as to enable the second power output terminal to output a high voltage signal to the pixel circuit of the display panel based on the voltage value or power control signal, and enable the third power output terminal to output a low voltage signal to the pixel circuit. The dot-screen circuit starts timing when the voltage value changes from below a set level threshold to above a set level threshold. After a first delay, the second power output terminal outputs the high voltage signal to the pixel circuit, and the third power output terminal outputs the low voltage signal to the pixel circuit.

2. The dot-screen circuit according to claim 1, characterized in that, The feature information includes the transmission rate. During power-on, when the transmission rate changes from below a set rate threshold to above a set rate threshold, the dot-screen circuit causes the first power output terminal to output the first power to the driving circuit.

3. The dot-screen circuit according to claim 2, characterized in that, During power-on, when the transmission rate is lower than a set rate threshold, the dot-screen circuit will not output the first power supply to the driving circuit from the first power output terminal.

4. The dot-screen circuit according to claim 2, characterized in that, The first detection terminal is coupled to the mobile industry processor interface of the driving circuit of the display panel.

5. The dot-screen circuit according to claim 1, characterized in that, The first detection terminal and the first power output terminal are coupled to the driving circuit of the display panel.

6. The dot-screen circuit according to claim 1, characterized in that, The feature information includes digital instructions. When the screen dot circuit parses the digital instructions as instructions end characters, it causes the first power output terminal to output the first power to the driving circuit.

7. The dot-screen circuit according to claim 6, characterized in that, Before the screen dot circuit parses the digital instruction as an instruction end character, it does not output the first power supply to the driving circuit from the first power supply output terminal.

8. The dot-screen circuit according to claim 6, characterized in that, The first detection terminal is coupled to the mobile industry processor interface of the driving circuit of the display panel.

9. The dot-screen circuit according to claim 6, characterized in that, The first detection terminal and the first power output terminal are coupled to the driving circuit of the display panel.

10. The dot-screen circuit according to claim 1, characterized in that, When the voltage value is lower than a set level threshold, the dot-screen circuit prevents the second power output terminal from outputting the high voltage signal to the pixel circuit and prevents the third power output terminal from outputting the low voltage signal to the pixel circuit.

11. The dot-screen circuit according to claim 1, characterized in that, The second detection terminal is coupled to the driving circuit of the display panel, and the second power output terminal and the third power output terminal are coupled to the pixel circuit of the display panel.

12. The dot-screen circuit according to claim 1, characterized in that, The set level threshold is greater than or equal to two-thirds of the highest voltage output by the data signal output terminal; The first duration is greater than the duration corresponding to 1 frame of the display panel and less than the duration corresponding to 5 frames of the display panel.

13. The dot-screen circuit according to claim 1, characterized in that, When the voltage value is continuously higher than the set level threshold for more than a second time period, the dot-screen circuit delays for a third time period, and then outputs the high voltage signal from the second power output terminal to the pixel circuit, and outputs the low voltage signal from the third power output terminal to the pixel circuit.

14. The dot-screen circuit according to claim 13, characterized in that, The second detection terminal is coupled to the driving circuit of the display panel, and the second power output terminal and the third power output terminal are coupled to the pixel circuit of the display panel.

15. The dot-screen circuit according to claim 13, characterized in that, The sum of the second duration and the third duration is greater than the duration corresponding to 1 frame of the display panel and less than the duration corresponding to 5 frames of the display panel.

16. The dot-screen circuit according to claim 1, characterized in that, The dot-screen circuit is also used to detect whether the driving circuit outputs a power enable signal to the first detection terminal, and when a power enable signal is output to the first detection terminal, after a fourth time delay, to output the first power supply to the driving circuit, and / or to detect whether a power control signal is output to the second detection terminal, and when a power control signal is output to the second detection terminal, after a fourth time delay, to output the high voltage signal to the pixel circuit, and to output the low voltage signal to the pixel circuit from the third power output terminal.

17. The dot-screen circuit according to claim 16, characterized in that, When the power enable signal is not output to the first detection terminal, the dot-screen circuit does not output the first power supply to the driving circuit from the first power output terminal, and when the power control signal is not output to the second detection terminal, it does not output the high voltage signal to the pixel circuit from the second power output terminal, and the third power output terminal outputs the low voltage signal to the pixel circuit.

18. The dot-screen circuit according to claim 16, characterized in that, The fourth duration is greater than or equal to 2 milliseconds and less than the duration corresponding to 1 frame of the display panel.

19. The dot-screen circuit according to claim 16, characterized in that, The first detection terminal and the first power output terminal are coupled to the driving circuit of the display panel, and / or the second detection terminal is coupled to the driving circuit of the display panel, and the second power output terminal and the third power output terminal are coupled to the pixel circuit of the display panel.

20. A dot-screen circuit for a display panel, characterized in that, The dot-screen circuit has a first detection terminal and a first power output terminal, and / or the dot-screen circuit has a second detection terminal, a second power output terminal, and a third power output terminal. The dot-screen circuit is used to detect the feature information or power enable signal of the setting differential signal of the driving circuit of the display panel received by the first detection terminal, so as to enable the first power output terminal to output a first power to the driving circuit based on the feature information or power enable signal, and / or detect the voltage value or power control signal provided to the display panel by the data signal output terminal of the driving circuit received by the second detection terminal, so as to enable the second power output terminal to output a high voltage signal to the pixel circuit of the display panel based on the voltage value or power control signal, and enable the third power output terminal to output a low voltage signal to the pixel circuit. When the voltage value is continuously higher than the set level threshold for more than a second time period, the dot-screen circuit delays for a third time period, and then outputs the high voltage signal from the second power output terminal to the pixel circuit, and outputs the low voltage signal from the third power output terminal to the pixel circuit.

21. The dot-screen circuit according to claim 20, characterized in that, The second detection terminal is coupled to the driving circuit of the display panel, and the second power output terminal and the third power output terminal are coupled to the pixel circuit of the display panel.

22. The dot-screen circuit according to claim 20, characterized in that, The sum of the second duration and the third duration is greater than the duration corresponding to 1 frame of the display panel and less than the duration corresponding to 5 frames of the display panel.

23. A dot-screen circuit for a display panel, characterized in that, The dot-screen circuit has a first detection terminal and a first power output terminal, and / or the dot-screen circuit has a second detection terminal, a second power output terminal, and a third power output terminal. The dot-screen circuit is used to detect the feature information or power enable signal of the setting differential signal of the driving circuit of the display panel received by the first detection terminal, so as to enable the first power output terminal to output a first power to the driving circuit based on the feature information or power enable signal, and / or detect the voltage value or power control signal provided to the display panel by the data signal output terminal of the driving circuit received by the second detection terminal, so as to enable the second power output terminal to output a high voltage signal to the pixel circuit of the display panel based on the voltage value or power control signal, and enable the third power output terminal to output a low voltage signal to the pixel circuit. The dot-screen circuit is also used to detect whether the driving circuit outputs a power enable signal to the first detection terminal, and when a power enable signal is output to the first detection terminal, after a fourth time delay, to output the first power supply to the driving circuit, and / or to detect whether a power control signal is output to the second detection terminal, and when a power control signal is output to the second detection terminal, after a fourth time delay, to output the high voltage signal to the pixel circuit, and to output the low voltage signal to the pixel circuit from the third power output terminal.

24. The dot-screen circuit according to claim 23, characterized in that, When the power enable signal is not output to the first detection terminal, the dot-screen circuit does not output the first power supply to the driving circuit from the first power output terminal, and when the power control signal is not output to the second detection terminal, it does not output the high voltage signal to the pixel circuit from the second power output terminal, and the third power output terminal outputs the low voltage signal to the pixel circuit.

25. The dot-screen circuit according to claim 23, characterized in that, The fourth duration is greater than or equal to 2 milliseconds and less than the duration corresponding to 1 frame of the display panel.

26. The dot-screen circuit according to claim 23, characterized in that, The first detection terminal and the first power output terminal are coupled to the driving circuit of the display panel, and / or the second detection terminal is coupled to the driving circuit of the display panel, and the second power output terminal and the third power output terminal are coupled to the pixel circuit of the display panel.

27. A method for tapping a display panel, characterized in that, The screen-activated circuit described in any one of claims 1 to 26, wherein the screen-activated method comprises: The system detects the characteristic information or power enable signal of the setting differential signal of the driving circuit of the display panel, and outputs a first power supply to the driving circuit based on the characteristic information or power enable signal; and / or detects the voltage value or power control signal provided to the display panel by the data signal output terminal of the driving circuit, and outputs a high voltage signal and a low voltage signal to the pixel circuit of the display panel based on the voltage value or power control signal, so as to light up the display panel.

28. A screen dot display device, characterized in that, The dot-screen device includes a housing and a dot-screen circuit disposed within the housing; Wherein, the dot-screen circuit is as described in claim 1 The dot-screen circuit described in any one of the 26.

Citation Information

Patent Citations

  • Lighting signal source

    CN215910750U