Analog information converter and signal processing system

Abstract

This invention discloses an analog information converter and signal processing system. The analog information converter includes: a level intersection detection module, an asynchronous timing control module, and an information sensing module. The level intersection detection module detects the voltage value of the input analog signal based on the current reference level and outputs a trigger signal and a direction signal. The asynchronous timing control module generates an enable signal based on the trigger signal to enable control of the level intersection detection module. The information sensing module determines the current voltage value and current slope value of the input analog signal based on the trigger signal and the direction signal, determines the resolution range of the next sampling of the level intersection detection module based on the current voltage value, and adjusts the resolution of the next sampling based on the current slope value and the resolution range of the next sampling to control the reference level of the next sampling. This invention can adaptively collect information of event signals without redundancy or omission according to the actual application scenario.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to an analog information converter and signal processing system. Background Technology

[0002] An analog-to-digital converter (ADC) serves as the bridge connecting external physical information and internal digital processing units, acting as the front-end interface of an Internet of Things (IoT) system. Considering factors such as cost, size, and portability, achieving effective signal information extraction with minimal hardware and power consumption is crucial for IoT devices.

[0003] Compared to traditional analog-to-digital converters based on the Nyquist sampling mode, analog-to-digital converters based on the level crossing sampling mode (LC-ADC) only sample when the signal amplitude changes to a certain threshold level, and the sampling frequency is directly related to the signal change rate. This sampling mode can adaptively adjust the sampling rate according to the signal amplitude change information. This event-driven, clockless adaptive sampling mode ADC has the potential for ultra-low power consumption in IoT applications.

[0004] For analog-to-digital converters (ADCs) based on level-interlaced sampling, each bit increase in resolution doubles the number of reference levels across the full swing. For the same input signal, the number of level-interlaced events occurs twice as often, and the number of sampling points and power consumption increase exponentially with resolution. Therefore, the signal range that a level-interlaced ADC with fixed resolution can handle is often limited. For example, for a level-interlaced ADC with a fixed high resolution, such as… Figure 1a As shown, when the input signal slope is large, it will generate a lot of power consumption and exhibit serious data redundancy; while using a fixed low-resolution level-interlaced analog-to-digital converter, such as Figure 1b As shown, there may be a problem of insufficient ability to extract signal information of small amplitude, resulting in information loss. Summary of the Invention

[0005] This invention provides an analog information converter and a signal processing system that can overcome the above-mentioned technical problems, enabling the analog information converter to adaptively acquire event signal information without redundancy or omission based on the actual application scenario.

[0006] This invention provides an analog information converter, comprising: a level intersection detection module, an asynchronous timing control module, and an information sensing module.

[0007] The level intersection detection module is used to detect the voltage value of the input analog signal according to the current reference level. When the input analog signal crosses the current reference level, it samples and outputs a trigger signal. When the input analog signal crosses the current reference level and is greater than the current reference level, it outputs a direction signal.

[0008] The asynchronous timing control module is used to generate an enable signal based on the trigger signal output by the level intersection detection module to enable control of the level intersection detection module;

[0009] The information sensing module is used to determine the current voltage value and current slope value of the input analog signal based on the trigger signal and the direction signal, and to determine the resolution range of the next sampling of the level intersection detection module based on the current voltage value, and to adjust the resolution of the next sampling based on the current slope value and the resolution range of the next sampling to control the reference level of the next sampling of the level intersection detection module.

[0010] The present invention also provides a signal processing system, including the analog information converter described above.

[0011] The analog information converter and signal processing system provided in this invention fuse the rate of change and amplitude information of the input signal through a sensing algorithm in the information sensing module, fully reflecting the activity information of the input signal. Based on this, the sampling resolution is determined by fully utilizing the characteristics exhibited by the input signal, and effective information is sensed. Under the event-driven approach, the sampling accuracy and power consumption are decoupled based on the characteristics of the input signal, thereby ensuring that the sampling extracts key information without omission or redundancy. While ensuring the functionality of the extraction system, the energy utilization rate of information acquisition is greatly improved. At the same time, the pressure on the entire system during data processing, storage, and transmission is reduced. Therefore, the data acquisition system of the adaptive resolution analog information converter provided by this invention has the advantages of low power consumption and high data compression rate for Internet of Things applications. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figures 1a-1b This is a sampling diagram of an analog information converter with a fixed resolution in the prior art;

[0014] Figure 2 This is a schematic diagram of the structure of an analog information converter provided in an embodiment of the present invention;

[0015] Figure 3 for Figure 2 A schematic diagram of a specific structure of the embodiment shown;

[0016] Figure 4 for Figure 3 The flowchart of the resolution adjustment process of the information perception module in the embodiment shown is illustrated.

[0017] Figure 5 for Figure 4 A schematic diagram illustrating the logic of medium resolution control adjustment;

[0018] Figure 6 for Figure 2 Another specific structural diagram of the embodiment shown;

[0019] Figure 7 for Figure 6 The flowchart of the resolution adjustment process of the information perception module in the embodiment shown is illustrated.

[0020] Figure 8 for Figure 7 A schematic diagram illustrating the logic of medium resolution control adjustment;

[0021] Figure 9 This is a sampling diagram of an analog information converter provided in an embodiment of the present invention. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0023] As mentioned earlier, in existing technologies, analog-to-digital converters based on level-intersection sampling modes have a limited range of signals that can be processed due to the use of a fixed resolution. Therefore, this invention provides an analog information converter with adaptive resolution, which can adjust its resolution according to the signal rate of change. When the signal rate of change is large, the resolution is reduced to decrease redundant sampling, while when the signal rate of change is small, the resolution is increased to ensure effective extraction of event information. Furthermore, for signals with effective information having different amplitude and slope characteristics, this invention can effectively extract information from signals of any amplitude and signal rate of change, such as large-amplitude QRS complexes and small-amplitude T and U waves in ECG (electrocardiogram) signals. It can also extract information from signals containing the same information but exhibiting proportional changes in signal amplitude due to environmental or equipment conditions, even if the time axis remains unchanged. For such signals containing the same event information but exhibiting different amplitude characteristics, this invention will also show essentially the same event extraction results and a similar number of sampling points for signals of different amplitudes, for example, speaking the same content into a microphone at different distances.

[0024] To make the technical solution of the present invention clearer, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0025] Figure 2 This is a schematic diagram of the structure of an analog information converter provided in an embodiment of the present invention, as shown below. Figure 2 As shown, Figure 3 for Figure 2 A specific structural diagram of the embodiment shown. Figure 6 for Figure 2 The illustrated embodiment shows another specific structural diagram. The analog-to-digital converter in this embodiment includes: a level intersection detection module, an asynchronous timing control module, and an information sensing module. The level intersection detection module detects the voltage value of the input analog signal based on the current reference level. When the input analog signal crosses the current reference level, it samples and outputs a trigger signal. When the input analog signal exceeds the current reference level, it outputs a direction signal. The asynchronous timing control module generates an enable signal based on the trigger signal output by the level intersection detection module to enable control of the level intersection detection module. The information sensing module determines the current voltage value and current slope value of the input analog signal based on the trigger signal and the direction signal. It also determines the resolution range for the next sampling of the level intersection detection module based on the current voltage value, and adjusts the resolution of the next sampling based on the current slope value and the resolution range of the next sampling to control the reference level for the next sampling of the level intersection detection module.

[0026] In this embodiment, the information sensing module can calculate the current voltage value (signal amplitude) and slope value (signal rate of change) of the input analog signal based on the trigger signal and direction signal output by the level intersection detection module. Since the resolution is reduced to reduce redundant sampling when the signal rate of change is large, and the resolution is increased to ensure effective extraction of event information when the signal rate of change is small, the resolution is adjusted by calculating the current voltage value (signal amplitude) and slope value (signal rate of change) of the input analog signal to adjust the resolution of the next sampling, thereby adjusting the threshold reference level of the next sampling to achieve effective sampling of different input analog signals with adaptive resolution without information redundancy or omission.

[0027] In specific applications, such as Figure 3 or Figure 6 As shown, the aforementioned level intersection detection module includes: a first comparator, a second comparator, a digital-to-analog converter (DAC), an OR gate, an inverting circuit, and an AND gate. The positive input of the first comparator and the negative input of the second comparator are simultaneously connected to the input analog signal to be converted. The negative input of the first comparator and the positive input of the second comparator are respectively connected to the reference levels of the DAC, i.e., the negative input of the first comparator is connected to reference level 1, and the positive input of the second comparator is connected to reference level 2. Reference level 1 is two least significant bits higher than reference level 2. The OR gate outputs a trigger signal after the input analog signal has been converted, and the AND gate outputs a direction signal after the input analog signal has been converted. The DAC is used based on the information sensing module. The reference level of the next sample output generates the input reference levels (e.g., reference level 1 and reference level 2) for the first and second comparators, respectively. The output of the first comparator is connected to one input of the OR gate, and the output of the second comparator is connected to the other input of the OR gate. The output of the first comparator is connected to one input of the AND gate, and the output of the second comparator is connected to the other input of the AND gate through an inverting circuit. The trigger signal output by the OR gate is connected to the asynchronous timing control module to generate an enable signal. The enable signal output by the asynchronous timing control module is connected to the enable inputs of the first and second comparators to control the first and second comparators to shield the noise carried by the input analog signal.

[0028] In practical applications, the first and second comparators are continuous-time comparators based on operational amplifiers, and the inverting circuit is an inverter.

[0029] like Figure 3 or Figure 6As shown, the asynchronous timing control module includes: a first delay unit, a second delay unit, a third delay unit, a fourth delay unit, and a D flip-flop. The trigger signal output by the level intersection detection module is input to the input terminals of the first delay unit, the third delay unit, the fourth delay unit, and the slope detection submodule in the information sensing module, respectively. The direction signal output by the level intersection detection module is input to the input terminal of the second delay unit. The output terminals of the first and second delay units are connected to the input terminal of the digital-to-analog conversion control submodule in the information sensing module to generate the current voltage value corresponding to the converted input analog signal. The output terminal of the third delay unit is connected to the clock terminal of the D flip-flop, and the output terminal of the fourth delay unit is connected to the edge reset terminal of the D flip-flop. The delay time of the fourth delay unit, the delay time of the first delay unit, the delay time of the second delay unit, and the delay time of the third delay unit decrease sequentially from large to small. The D flip-flop is edge-triggered and reset, with a high level input to the D terminal.

[0030] Figure 4 for Figure 3 The illustrated embodiment is a schematic diagram of the resolution adjustment process of the information perception module. Figure 5 for Figure 4 A schematic diagram of the logic for adjusting the medium resolution control, as shown below. Figures 3-5 As shown, Figure 4 and Figure 5 V in th V is the current reference threshold level. FS This is the full-amplitude voltage. The level intersection detection module and asynchronous timing control module in this embodiment are as described above. The information sensing module in this embodiment includes: a slope detection submodule, an amplitude detection submodule, an information sensing algorithm submodule, and a digital-to-analog conversion control submodule; the slope detection submodule is used to determine the current slope value of the input analog signal based on the interval between detected adjacent trigger signals; the amplitude detection submodule is used to determine the current reference threshold level V based on the current voltage value output by the digital-to-analog conversion control submodule. thThe information sensing algorithm submodule is used to determine the resolution range of the next sampling based on the current reference threshold level output by the amplitude detection submodule, and to adjust the resolution range of the next sampling within the next sampling range based on the relationship between the current slope value output by the slope detection submodule and the preset high slope threshold and low slope threshold to determine the resolution of the next sampling of the level intersection detection module; the digital-to-analog conversion control submodule is used to determine the current voltage value of the input analog signal based on the trigger signal and the direction signal, and to determine the reference level of the next sampling of the level intersection detection module based on the current voltage value and the resolution of the next sampling output by the information sensing algorithm submodule. The information perception algorithm submodule adjusts the resolution of the next sampling within the resolution range based on the relationship between the current slope value output by the slope detection submodule and preset high and low slope thresholds to determine the resolution of the level intersection detection module's next sampling. Specifically: if the current slope value is greater than the preset high slope threshold and the current sampling resolution is not the lowest resolution, then the current sampling resolution is reduced to the resolution of the next sampling; otherwise, the current sampling resolution remains unchanged. If the current slope value is less than the preset low slope threshold and the current sampling resolution is not the highest resolution, then the current sampling resolution is increased to the resolution of the next sampling; otherwise, the current sampling resolution remains unchanged. If the current slope value is less than or equal to the high slope threshold and greater than or equal to the low slope threshold, then the current sampling resolution remains unchanged. The lowest and highest resolutions are the lowest resolutions within the resolution range of the next sampling determined based on the current reference level output by the amplitude detection submodule (e.g., the lowest resolution is the lowest resolution within the range of the next sampling resolution determined by the current reference level output by the amplitude detection submodule). Figure 5 The lowest resolution (3 bits) and the highest resolution (e.g.) Figure 5 The lowest resolution in the dataset is N bits, where N can be 3, 4, 5, 6, or 7.

[0031] In this embodiment, the slope detection submodule receives the pulse result generated by the OR gate output at its input terminal. By detecting the time length information of two pulse trigger signals, it obtains the current input signal change rate information, providing a time domain basis for subsequent information perception algorithms. The input terminal of the digital-to-analog converter control submodule is connected to the output terminal of the first delay unit (corresponding to the trigger signal) as the asynchronous drive clock of the digital-to-analog converter control submodule, and is connected to the output terminal of the second delay unit (corresponding to the direction signal) to provide the direction information of the level intersection event, as well as the resolution control information provided by the output terminal of the information perception algorithm submodule. This generates a control signal for controlling the digital-to-analog converter, and its output terminal is connected to the digital-to-analog converter to control the generation of the corresponding reference threshold level. It is also connected to the negative input terminal of the first comparator and the positive input terminal of the second comparator, respectively. The output terminal of the digital-to-analog converter is simultaneously connected to the input terminal of the amplitude detection submodule, thereby generating the current input signal amplitude detection information, providing amplitude domain information for subsequent information perception algorithms. The outputs of the slope detection submodule and the amplitude detection submodule are connected to the input of the information sensing submodule. An information sensing algorithm fuses the rate of change and amplitude information of the current signal to determine the most suitable resolution for the current input signal state, updating the resolution for the next sampling. The selection criterion is to minimize the number of samples to reduce power consumption and data redundancy while ensuring complete extraction of current event information, thus alleviating the pressure on subsequent system processing, storage, and transmission. Specifically, the implementation is as follows: First, the selectable resolution range under the current amplitude is determined based on the input signal amplitude information. Then, the resolution is adjusted according to the signal rate of change. When the signal rate of change is large, a smaller resolution is used to sample the input signal. This reduces invalid sampling and redundant information while improving information compression without losing effective information, and simultaneously reduces the power consumption and pressure on the overall system's data processing, storage, and transmission. When the input signal rate of change is low, a higher resolution is used for sampling. Because the input signal has lower activity, this improves sampling accuracy and ensures effective information extraction without loss. The control of resolution by the rate of change of all signals is determined by the control of the amplitude of the input signal. That is, different threshold values ​​of the rate of change of signals are required for different input signal amplitudes as the basis for changing the resolution.

[0032] Figure 7 for Figure 6 The illustrated embodiment is a schematic diagram of the resolution adjustment process of the information perception module. Figure 8 for Figure 7 A schematic diagram of the logic for adjusting the medium resolution control, as shown below. Figures 6-8 As shown, Figure 7 and Figure 8 V in th V is the current reference threshold level. FS For full-amplitude voltage, the time threshold is determined based on the amplitude detection to indicate which range the delay belongs to. Figure 7 The time threshold is divided into 5 delay levels to determine the current slope threshold. The information sensing module in this embodiment includes: a slope detection submodule, an amplitude detection submodule, an information sensing algorithm submodule, and a digital-to-analog conversion control submodule. The amplitude detection submodule is used to determine the current reference level based on the current voltage value output by the digital-to-analog conversion control submodule. The slope detection submodule is used to determine the current slope value of the input analog signal based on the interval between detected adjacent trigger signals, and to determine the current slope threshold for slope detection based on the time threshold corresponding to the current reference level output by the amplitude detection submodule. The current slope threshold includes a current high slope threshold and a current low slope threshold. The information sensing algorithm submodule is used to determine the resolution range of the next sampling based on the current reference level output by the amplitude detection submodule, and to adjust the resolution within the next sampling resolution range based on the relationship between the current slope value output by the slope detection submodule and the current high slope threshold and current low slope threshold to determine the resolution of the next sampling of the level intersection detection module. The digital-to-analog conversion control submodule is used to determine the current voltage value of the input analog signal based on the trigger signal and direction signal, and to determine the reference level of the next sampling of the level intersection detection module based on the current voltage value and the resolution of the next sampling output by the information sensing algorithm submodule. Specifically, the information perception algorithm submodule adjusts the resolution of the next sampling within the resolution range of the next sampling based on the relationship between the current slope value output by the slope detection submodule and the current high slope threshold and the current low slope threshold. Specifically: if the current slope value is greater than the current high slope threshold and the current sampling resolution is not the lowest resolution, then the current sampling resolution is reduced to the resolution of the next sampling; otherwise, the current sampling resolution remains unchanged. If the current slope value is less than the current low slope threshold and the current sampling resolution is not the highest resolution, then the current sampling resolution is increased to the resolution of the next sampling; otherwise, the current sampling resolution remains unchanged. If the current slope value is less than or equal to the current high slope threshold and greater than or equal to the current low slope threshold, then the current sampling resolution remains unchanged. The lowest resolution and the highest resolution are the lowest and highest resolutions within the resolution range of the next sampling determined based on the current reference level output by the amplitude detection submodule, respectively.

[0033] In this embodiment, the slope detection submodule receives the pulse result generated by the OR gate output. By comparing the time length between two pulse trigger signals with the set time threshold, it obtains the current input signal change rate information, providing time domain information for the subsequent information perception algorithm. The result obtained through amplitude domain detection is fed back to the slope detection submodule to adjust the time threshold for slope detection under different amplitude conditions. The input of the digital-to-analog converter control submodule is connected to the output of the first delay unit (corresponding to the trigger signal) as the asynchronous drive clock of the digital-to-analog converter control submodule, and connected to the output of the second delay unit (corresponding to the direction signal) to provide the direction information of the level intersection event, as well as the resolution control information provided by the output of the information perception algorithm submodule, generating a control signal acting on the digital-to-analog converter. The digital-to-analog converter connected to its output is used to control the generation of the corresponding reference threshold level, and is respectively connected to the negative input of the first comparator and the positive input of the second comparator. The output of the digital-to-analog converter control submodule is also connected to the input of the amplitude detection submodule, thereby generating the current input signal amplitude detection information, providing amplitude domain information for the information perception algorithm, and updating the time threshold of the slope detection submodule. The outputs of the slope detection submodule and the amplitude detection submodule are connected to the input of the information sensing submodule. An information sensing algorithm fuses the rate of change and amplitude information of the current signal to determine the most suitable resolution for the current input signal state. This resolution is then used to update the resolution for the next iteration. The evaluation criterion is to minimize the number of samples to reduce power consumption and data redundancy while ensuring complete extraction of current event information, thus alleviating the pressure on subsequent system processing, storage, and transmission. Specifically, the slope detection time threshold and the most suitable resolution at the current amplitude are first determined based on the input signal amplitude information. Then, the resolution is adjusted based on the signal rate of change. The signal rate of change threshold that triggers the resolution change is also affected by the amplitude information. In other words, the control of resolution by the signal rate of change is determined under the control of the input signal amplitude. Different signal rate of change thresholds are required for different input signal amplitudes to adjust the resolution. Specifically, when the signal rate of change is large, a lower resolution is used to sample the input signal, reducing invalid sampling and redundant information while improving information compression without losing effective information. This reduces the power consumption and pressure on the overall system's data processing, storage, and transmission processes. When the rate of change of the input signal is low, a higher resolution is used for sampling. Since the input signal has low activity, the sampling accuracy is improved to ensure effective extraction of information without loss, without generating unacceptable dynamic power consumption and data volume.

[0034] Figure 9 This is a sampling diagram of the analog information converter provided in an embodiment of the present invention, as shown below. Figure 9As shown, the adaptive resolution analog information converter of this invention is based on an event-driven data sampling mode, integrating adaptive resolution technology and signal-related full-swing adjustment technology to form a complete information sensing data acquisition system. When the signal change rate is large, a lower resolution is used to sample the input signal, reducing invalid sampling redundancy while improving information compression rate without losing effective information, and simultaneously reducing the power consumption and pressure of the overall system's data processing, storage, and transmission processes. When the input signal change rate is low, a higher resolution is used for sampling. Because the input signal has low activity, the sampling accuracy is improved, ensuring effective information extraction without loss. Thus, in most practical application scenarios, it can ensure lossless extraction of key information within the input signal while avoiding redundant sampling, improving data acquisition energy utilization while reducing the pressure on subsequent system data processing, storage, and transmission processes.

[0035] This invention, through an information sensing module, integrates the rate of change and amplitude information of the input signal using a sensing algorithm. This fully reflects the activity information of the input signal and, based on this, determines the sampling resolution by fully utilizing the characteristics exhibited by the input signal. It senses effective information and, under an event-driven approach, decouples sampling accuracy from power consumption based on the characteristics of the input signal. This ensures that sampling extracts key information without omission or redundancy, significantly improving energy efficiency while maintaining the functionality of the extraction system. Simultaneously, it reduces the pressure on the entire system during data processing, storage, and transmission. Therefore, the data acquisition system using the adaptive resolution analog converter provided by this invention, for IoT applications, has the advantages of low power consumption and high data compression rate. In practical IoT application scenarios, it achieves decoupling between sampling accuracy and power consumption. That is, regardless of the amplitude and frequency form in which the input signal represents event information, the system designed in this invention can extract effective information from the input signal while avoiding the collection of redundant and invalid information. This improves energy efficiency, reduces sampling data redundancy, and alleviates the pressure on the entire system during data processing, storage, and transmission.

[0036] This invention also provides a signal processing system, including the analog-to-digital converter described in any of the above embodiments. In specific applications, the back-end digital processing system uses the trigger signal output from the OR gate and the direction signal output from the AND gate in the analog-to-digital converter as inputs for signal processing. The signals processed in the signal processing system may include voice, human biosignals, environmental monitoring signals, security signals, and / or human-computer interaction signals. Environmental monitoring signals include information on light intensity, temperature, humidity, and pH; human-computer interaction signals include information such as gesture recognition and facial expression recognition; and security signals include information such as smoke alarms, fingerprint recognition, and image recognition. These processed signals serve as the input signals to the analog-to-digital converter and are input to the signal processing system.

[0037] The analog information converter proposed in this embodiment of the invention can also be used as the front stage of the entire signal processing system, and can complete the functions of data acquisition, processing, storage and transmission.

[0038] The analog-to-digital converter and signal processing system proposed in this invention integrates signal-related full-swing adjustment technology and adaptive resolution technology into an information-sensing adaptive data acquisition and conversion system under a clockless level-interlaced sampling mode. This system analyzes the activity level of the current input signal by combining its amplitude and time-domain characteristics, and selects the most suitable resolution to sense and quantize the event information represented by the current signal. This decouples signal sampling accuracy from power consumption, enabling it to acquire event information without omission or redundancy based on the actual application scenario.

[0039] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An analog information converter, characterized in that, include: The module consists of a level intersection detection module, an asynchronous timing control module, and an information sensing module. The level intersection detection module is used to detect the voltage value of the input analog signal according to the current reference level. When the input analog signal crosses the current reference level, it samples and outputs a trigger signal. When the input analog signal crosses the current reference level and is greater than the current reference level, it outputs a direction signal. The asynchronous timing control module is used to generate an enable signal based on the trigger signal output by the level intersection detection module to enable control of the level intersection detection module; The information sensing module is used to determine the current voltage value and current slope value of the input analog signal based on the trigger signal and the direction signal, and to determine the resolution range of the next sampling of the level intersection detection module based on the current voltage value, and to adjust the resolution of the next sampling based on the current slope value and the resolution range of the next sampling to control the reference level of the next sampling of the level intersection detection module.

2. The analog information converter according to claim 1, characterized in that, The information sensing module includes: a slope detection submodule, an amplitude detection submodule, an information sensing algorithm submodule, and a digital-to-analog conversion control submodule; The slope detection submodule is used to determine the current slope value of the input analog signal based on the interval between detecting adjacent trigger signals; The amplitude detection submodule is used to determine the current reference level based on the current voltage value output by the digital-to-analog conversion control submodule; The information perception algorithm submodule is used to determine the resolution range of the next sampling based on the current reference level output by the amplitude detection submodule, and to adjust the resolution range of the next sampling based on the relationship between the current slope value output by the slope detection submodule and the preset high slope threshold and low slope threshold to determine the resolution of the next sampling by the level intersection detection module. The digital-to-analog conversion control submodule is used to determine the current voltage value of the input analog signal based on the trigger signal and the direction signal, and to determine the reference level of the level intersection detection module for the next sampling based on the current voltage value and the resolution of the next sampling output by the information perception algorithm submodule.

3. The analog information converter according to claim 2, characterized in that, The information perception algorithm submodule adjusts the resolution of the next sampling within the range of the next sampling based on the relationship between the current slope value output by the slope detection submodule and the preset high slope threshold and low slope threshold. Specifically, if the current slope value is greater than the preset high slope threshold and the current sampling resolution is not the lowest resolution, then the current sampling resolution is reduced as the resolution of the next sampling. If the current slope value is less than the preset low slope threshold and the current sampling resolution is not the highest resolution, then the current sampling resolution will be increased as the resolution of the next sampling. The lowest resolution and the highest resolution are the lowest and highest resolutions within the resolution range of the next sampling determined according to the current reference level output by the amplitude detection submodule.

4. The analog information converter according to claim 1, characterized in that, The level intersection detection module includes: a first comparator, a second comparator, a digital-to-analog converter, an OR gate, an inverting circuit, and an AND gate. The positive input terminal of the first comparator and the negative input terminal of the second comparator are simultaneously connected to the analog signal input terminal. The negative input terminal of the first comparator and the positive input terminal of the second comparator are respectively connected to the digital-to-analog converter. The output terminal of the first comparator is connected to one input terminal of the OR gate, the output terminal of the second comparator is connected to the other input terminal of the OR gate, the output terminal of the first comparator is connected to one input terminal of the AND gate, and the output terminal of the second comparator is connected to the other input terminal of the AND gate through the inverting circuit. The OR gate outputs a trigger signal after the input analog signal is converted, and the AND gate outputs a direction signal after the input analog signal is converted. The trigger signal output by the OR gate is connected to the asynchronous timing control module to generate an enable signal. The enable signal output by the asynchronous timing control module is connected to the enable input terminals of the first comparator and the second comparator to control the first and second comparators to shield the noise carried by the input analog signal.

5. The analog information converter according to claim 4, characterized in that, The first and second comparators are continuous-time comparators based on operational amplifiers, and the inverting circuit is an inverter.

6. The analog information converter according to claim 1, characterized in that, The asynchronous timing control module includes: a first delay unit, a second delay unit, a third delay unit, a fourth delay unit, and a D flip-flop. The trigger signal output by the level intersection detection module is input to the input terminals of the first delay unit, the third delay unit, the fourth delay unit, and the information sensing module, respectively. The direction signal output by the level intersection detection module is input to the input terminal of the second delay unit. The output terminals of the first and second delay units are connected to the information sensing module. The output terminal of the third delay unit is connected to the clock terminal of the D flip-flop, and the output terminal of the fourth delay unit is connected to the edge reset terminal of the D flip-flop. The delay time of the fourth delay unit, the delay time of the first delay unit, the delay time of the second delay unit, and the delay time of the third delay unit decrease sequentially.

7. The analog information converter according to claim 6, characterized in that, The D flip-flop is edge-triggered and reset, with a high level input to the D terminal.

8. The analog information converter according to claim 1, characterized in that, The information sensing module includes: a slope detection submodule, an amplitude detection submodule, an information sensing algorithm submodule, and a digital-to-analog conversion control submodule; The amplitude detection submodule is used to determine the current reference level based on the current voltage value output by the digital-to-analog conversion control submodule; The slope detection submodule is used to determine the current slope value of the input analog signal based on the interval time between detected adjacent trigger signals, and to determine the current slope threshold of the slope detection based on the time threshold corresponding to the current reference level output by the amplitude detection submodule. The current slope threshold includes a current high slope threshold and a current low slope threshold. The information perception algorithm submodule is used to determine the resolution range of the next sampling based on the current reference level output by the amplitude detection submodule, and to adjust the resolution range of the next sampling based on the relationship between the current slope value output by the slope detection submodule and the current high slope threshold and the current low slope threshold to determine the resolution of the next sampling of the level intersection detection module. The digital-to-analog conversion control submodule is used to determine the current voltage value of the input analog signal based on the trigger signal and the direction signal, and to determine the reference level of the level intersection detection module for the next sampling based on the current voltage value and the resolution of the next sampling output by the information perception algorithm submodule.

9. The analog information converter according to claim 8, characterized in that, The information perception algorithm submodule adjusts the resolution of the next sampling within the resolution range based on the relationship between the current slope value output by the slope detection submodule and the current high slope threshold and the current low slope threshold to determine the resolution of the level intersection detection module for the next sampling. Specifically, if the current slope value is greater than the current high slope threshold and the current sampling resolution is not the lowest resolution, then the resolution of the current sampling is reduced to the resolution of the next sampling. If the current slope value is less than the current low slope threshold and the current sampling resolution is not the highest resolution, then the current sampling resolution will be increased to be used as the resolution for the next sampling. The lowest resolution and the highest resolution are the lowest and highest resolutions within the resolution range of the next sampling determined by the current reference level output by the amplitude detection submodule, respectively.

10. A signal processing system, characterized in that, Includes an analog information converter as described in any one of claims 1-9.

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