A voltage sampling device and related method
Patent Information
- Application Number
- CN202180098948.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-07-22
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2041-07-22
AI Technical Summary
[0004]然而,在实际应用过程中发现,针对上述隔离采样技术,由于需要增加多个电路模块来处理电压信号,因此会造成其成本增加且不利于批量化生产的问题;针对上述电阻分压差分采样技术,由于电阻元件的制造工艺或者其他环境因素的原因,会造成其电气特性存在偏差的问题,进而降低电压信号采样精度
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Figure CN117413186B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of electronic power technology, and in particular to a voltage sampling device and related methods. Background Technology
[0002] With the advancement and development of digital technology, the electronics industry is gradually entering the digital age. Analog-to-digital conversion (ADC), as the interface between analog and digital technologies—specifically, converting sampled voltage signals into digital signals—is receiving increasing attention and its applications are becoming more diversified. To meet the high-performance requirements of various applications, the sampling requirements for voltage signals are also becoming increasingly stringent.
[0003] Currently, common multi-channel voltage signal sampling techniques include two types: one is isolation sampling technology, which inputs the voltage signal sampled from each channel into a sampling chip. Due to the voltage withstand capability of the sampling chip, signal processing circuits, signal isolation circuits, and isolation circuits are required to process the voltage signal before it is sent to the sampling chip. The other is resistor voltage divider differential sampling technology, which divides the high-side voltage of each channel and sends it differentially to the sampling chip. Due to the voltage withstand capability of the sampling chip, differential resistor elements need to be selected according to the voltage withstand capability of the sampling chip to obtain the required resistor voltage division ratio.
[0004] However, in practical applications, it has been found that the above-mentioned isolated sampling technology requires the addition of multiple circuit modules to process voltage signals, which increases costs and is not conducive to mass production. As for the above-mentioned resistor voltage divider differential sampling technology, the electrical characteristics of the resistors may deviate due to the manufacturing process of the resistors or other environmental factors, thereby reducing the sampling accuracy of the voltage signals.
[0005] Therefore, how to provide a simpler voltage sampling circuit with higher sampling accuracy is an urgent problem to be solved. Summary of the Invention
[0006] This invention provides a voltage sampling device and related methods to offer a simpler voltage sampling device with higher sampling accuracy.
[0007] In a first aspect, embodiments of the present invention provide a voltage sampling device, characterized in that it comprises: a differential circuit, a voltage divider circuit, and a first calibration switch; the voltage divider circuit includes a first voltage divider branch and a second voltage divider branch; a first output terminal of the differential circuit and an input terminal of the first voltage divider branch are connected to a first terminal of the first calibration switch; a second output terminal of the differential circuit and an input terminal of the second voltage divider branch are connected to a second terminal of the first calibration switch; when the first calibration switch is closed, the differential circuit is used to input a target signal to the parallel first voltage divider branch and the second voltage divider branch; the target signal is a first differential output signal output from the first output terminal or a second differential output signal output from the second output terminal; the voltage divider circuit is used to receive the target signal through the first voltage divider branch and divide it according to a first voltage division ratio k1 to output a first voltage signal, and to receive the target signal through the second voltage divider branch and divide it according to a second voltage division ratio k2 to output a second voltage signal; wherein the difference between the first voltage signal and the second voltage signal is a first deviation signal, and the first deviation signal is used to calibrate the difference between the first voltage division ratio and the second voltage division ratio.
[0008] When sampling the voltage signal difference output by a differential circuit, the voltage signals at one end and the other end of the differential circuit are sampled separately to obtain the difference between the voltage signals at both ends of the differential circuit, thus obtaining the differential sampling signal of the differential circuit. (It should be emphasized that, usually, in order to easily reconstruct the difference of the actual output voltage signal of the differential circuit from the sampled voltage signal, two voltage divider branches need to divide the voltage in the same proportion). However, in the process of sampling the voltage signal at both ends of the aforementioned differential circuit, the sampling chip usually cannot withstand the large voltage signal output by the differential circuit. Therefore, it is necessary to reduce the voltage signal provided by the differential circuit by a certain proportion through voltage division. That is, the voltage signal output by one end of the differential circuit is divided by the first voltage divider branch according to the voltage division ratio, and the voltage signal output by the other end of the differential circuit is divided by the second voltage divider branch according to the same voltage division ratio, so that the sampling chip can withstand the voltage signal reduced proportionally by the voltage divider branches. However, during the process of the voltage divider branch providing the function of reducing the voltage signal, there is a certain error between the actual resistance value and the theoretical resistance value of the voltage divider resistor in each voltage divider branch. Therefore, the voltage reduction capability (i.e., voltage division capability) of these two voltage divider branches is different. This results in an error between the voltage signal actually sampled by the sampling chip and the theoretically sampled voltage signal. Consequently, the voltage signal sampled by the sampling chip cannot accurately restore the difference between the voltage signal actually provided by the differential circuit according to the theoretical voltage division ratio. In other words, the sampling result is inaccurate and the sampling accuracy is low.
[0009] In this embodiment of the invention, a first calibration switch is added based on the prior art. This first calibration switch controls the connection state of the first and second voltage divider branches. When the first calibration switch is closed, the voltage sampling device is in a calibration state, calibrating the difference in the voltage division ratio between the first and second voltage divider branches, thereby improving the sampling accuracy of the voltage sampling device. Specifically, assuming the first voltage divider branch in the voltage sampling device consists of multiple resistors connected in series (e.g., R1 and R2), and the second voltage divider branch consists of multiple resistors connected in series (e.g., R3 and R4), with R1 = R3 and R2 = R4, according to the voltage division principle of the voltage divider circuit, the first voltage division ratio of the first voltage divider branch is... The second voltage division ratio of the second voltage division branch is: Theoretically, the voltage division ratios of the first and second voltage divider branches are the same, meaning the theoretical difference between k1 and k2 is 0. However, due to the error between the theoretical and actual resistance values of the resistors in each voltage divider branch, there is an error between the theoretical and actual values of k1 and k2, resulting in an error in the difference between k1 and k2. In reality, k1 - k2 = Δk, and Δk is not zero. Therefore, this error causes the voltage division capabilities of the first and second voltage divider branches to differ. When the voltage signal sampled by the sampling chip is used to reconstruct the difference between the voltage signal actually provided by the differential circuit according to the theoretical voltage division ratio, the error resulting from the superposition of these two voltage division ratio errors affects the reconstruction result, thereby reducing the sampling accuracy of the voltage sampling device. Therefore, to avoid the impact on sampling accuracy caused by the different voltage division capabilities of these two voltage divider branches, in this embodiment of the invention, the first calibration switch is closed, causing the first and second voltage divider branches to be connected in parallel. The first and second voltage divider branches respectively receive the target signal U output by the differential circuit. 目标 (The first differential output signal or the second differential output signal) allows for the actual measurement of the difference in voltage signals output by the voltage divider circuit (the first deviation signal). This signal represents the deviation between the voltage dividing capabilities of the two voltage divider branches. Therefore, superimposing this deviation on one of the voltage divider branches makes the voltage dividing capabilities of the two voltage divider branches equal. Furthermore, the sampling accuracy, originally determined by the superposition of two error factors (the first voltage divider ratio error and the second voltage divider ratio error), is transformed into a sampling accuracy determined by a single error factor (either the first voltage divider ratio error or the second voltage divider ratio error). This reduces the number of error factors, requiring only one error factor to be calibrated subsequently, thereby improving sampling accuracy. In summary, based on the first deviation signal, the error in the difference between the voltage dividing ratios provided by the two voltage divider branches can be calibrated, making the voltage dividing capabilities of the first and second voltage divider branches the same. This effectively eliminates the sampling error caused by the inconsistency in the voltage dividing capabilities of the two voltage divider branches, improving sampling accuracy.
[0010] In one possible implementation, when the first calibration switch is in the off state, the first voltage divider branch and the second voltage divider branch are switched from a parallel state to an open circuit state; the differential circuit is further configured to input the first differential output signal to the first voltage divider branch through the first output terminal, and to input the second differential output signal to the second voltage divider branch through the second output terminal; the voltage divider circuit is further configured to receive the first differential output signal through the first voltage divider branch and divide it according to k1 to output a third voltage signal, and to receive the second differential output signal through the second voltage divider branch and divide it according to k2 to output a fourth voltage signal; the difference between the third voltage signal and the fourth voltage signal is the first sampling signal.
[0011] In this embodiment of the invention, when the first calibration switch changes from a closed state to an open state, the voltage sampling device enters a sampling state. The first and second voltage dividing branches in the voltage divider circuit change from a parallel state to an open circuit state. Different voltage signals are received through the first and second voltage dividing branches respectively, and the voltage is divided according to their respective voltage division ratios to output a voltage signal that the sampling chip can withstand. Specifically, the first voltage dividing branch receives the voltage signal output from one end of the differential circuit, while the second voltage dividing branch receives the voltage signal output from the other end of the differential circuit. Then, these two voltage dividing branches divide the two voltage signals according to their respective voltage division ratios, and the difference between the two voltage signals after voltage division is determined as the first differential sampling signal.
[0012] In one possible implementation, the voltage sampling device further includes a calibration module; the calibration module is configured to: calculate a second sampling signal based on the first deviation signal and the first sampling signal, the second sampling signal representing the difference between the voltage signals obtained by dividing the first differential output signal and the second differential output signal according to the same voltage division ratio; wherein the same voltage division ratio is either the first voltage division ratio or the second voltage division ratio; when the target signal is the first differential output signal, restore the second sampling signal based on k2 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal; when the target signal is the second differential output signal, restore the second sampling signal based on k1 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal.
[0013] In this embodiment of the invention, a second sampling signal can be obtained by removing the aforementioned first deviation signal (i.e., the sampling error caused by the inconsistent voltage division capabilities of the two voltage divider branches) from the first sampling signal using a calibration module. This effectively eliminates the sampling error caused by the inconsistent voltage division capabilities of the two voltage divider branches. In other words, the sampling accuracy, originally determined by the superposition of two error factors (i.e., the first voltage division ratio error and the second voltage division ratio error), is transformed into a sampling accuracy determined by a single error factor (i.e., either the first voltage division ratio error or the second voltage division ratio error), thus reducing the number of error factors. Furthermore, the second sampling signal is restored based on the theoretical voltage division ratio to serve as the sampling value of the difference between the two voltage signals actually output by the differential circuit. This avoids the sampling error caused by the inconsistent voltage division capabilities of the two voltage divider branches, thereby improving the sampling accuracy.
[0014] In one possible implementation, the calibration module is specifically used to: [according to formula U] 采1 -U 差1 (k1-k2)=k2(U 差1 -U 差2 ), or formula U 采1 -U 差2 (k1-k2)=k1(U 差1 -U 差2 ) Calculate the second sampled signal; where, U 采1 U represents the first sampled signal; 差1 U represents the first differential output signal; 差2 This represents the second differential output signal; U 差1 (k1-k2) and U 差2 (k1-k2) represents the first deviation signal; k2(U 差1 -U 差2 ) and k1(U 差1 -U 差2 ) represents the second differential sampling signal.
[0015] In this embodiment of the invention, the calibration module can be used based on formula U. 采1 -U 差1 (k1-k2)=k2(U 差1 -U 差2 ), or formula U 采1 -U 差2 (k1-k2)=k1(U 差1 -U 差2The second sampled signal is calculated, and then the first deviation signal (i.e., the sampling error caused by the inconsistent voltage division capabilities of the two voltage divider branches) is removed from the first sampled signal to obtain the second sampled signal. This effectively eliminates the sampling error caused by the inconsistent voltage division capabilities of the two voltage divider branches. In other words, the sampling accuracy, originally determined by the superposition of two error factors (i.e., the first voltage division ratio error and the second voltage division ratio error), is transformed into a sampling accuracy determined by a single error factor (i.e., either the first voltage division ratio error or the second voltage division ratio error), thus reducing the number of error factors. Furthermore, the second sampled signal is restored based on the theoretical voltage division ratio to serve as the sampled value of the difference between the two voltage signals actually output by the differential circuit. This avoids the sampling error caused by the inconsistent voltage division capabilities of the two voltage divider branches, thereby improving the sampling accuracy.
[0016] In one possible implementation, the differential circuit includes a first switch group and a second switch group; wherein, one end of the i-th first switch in the first switch group is connected to the (2i-1)-th cell in the N series-connected cells, and the other end is connected to the first output terminal; one end of the i-th second switch in the second switch group is connected to the 2i-th cell in the N series-connected cells, and the other end is connected to the second output terminal; N is an integer greater than 1, i = 1, 2, ..., N.
[0017] In this embodiment of the invention, since multiple differential samples can be performed on N series-connected battery cells, a first switch group and a second switch group can be designed in the differential circuit. The first switch group can be used to control the voltage signal flow direction of odd-numbered battery cells; the second switch group can be used to control the voltage signal flow direction of even-numbered battery cells.
[0018] In one possible implementation, the first calibration switch is in a closed state; when the i-th first switch is in a closed state and the i-th second switch is in an open state, the differential circuit is specifically used to receive the first differential input signal output by the (2i-1)-th cell, and input the first differential output signal to the first voltage divider branch and the second voltage divider branch connected in parallel via the closed i-th first switch; or, when the i-th first switch is in an open state and the i-th second switch is in a closed state, the differential circuit is specifically used to receive the second differential input signal output by the 2i-th cell, and input the second differential output signal to the first voltage divider branch and the second voltage divider branch connected in parallel via the closed i-th second switch.
[0019] In this embodiment of the invention, when the first calibration switch is closed, the voltage sampling device is in the voltage signal calibration stage. Since the first voltage divider branch and the second voltage divider branch only receive one identical voltage signal, by closing the i-th first switch and opening the i-th second switch, it can be ensured that the differential circuit only receives the voltage signal input from the (2i-1)-th cell, and thus the differential circuit only outputs the first differential output signal. Alternatively, by closing the i-th second switch and opening the i-th first switch, it can be ensured that the differential circuit only receives the voltage signal input from the 2i-th cell, and thus the differential circuit only outputs the second differential output signal. In summary, the deviation signal obtained based on the first differential output signal, or the deviation signal obtained based on the second differential output signal, can effectively eliminate the sampling error caused by the inconsistent voltage division capabilities of the two voltage divider branches, thereby improving the sampling accuracy.
[0020] In one possible implementation, the first calibration switch is in the off state; when both the i-th first switch and the i-th second switch are in the closed state, the differential circuit is specifically used to receive the first differential input signal output by the (2i-1)-th cell and input the first differential output signal to the first voltage divider branch via the closed i-th first switch, and to receive the second differential input signal output by the 2i-th cell and input the second differential output signal to the second voltage divider branch via the closed i-th second switch.
[0021] In this embodiment of the invention, when the first calibration switch is open, the voltage sampling device is in the voltage signal sampling stage. Since the first voltage divider branch and the second voltage divider branch need to receive two different voltage signals, the differential circuit can be ensured to receive the voltage signals of the (2i-1)th cell and the 2ith cell respectively by closing the i-th first switch and the i-th second switch. Thus, the differential circuit can output two voltage signals (based on the voltage signals of the (2i-1)th cell and the 2ith cell respectively).
[0022] In one possible implementation, the voltage sampling device further includes a second calibration switch; one end of the second calibration switch is connected to the first end of the first calibration switch, and the other end is connected to a reference power supply; when both the i-th first switch and the i-th second switch are in the open state, and the first calibration switch and the second calibration switch are in the closed state, the voltage divider circuit is further configured to: receive the reference voltage signal output by the reference power supply through the second voltage divider branch and divide it according to k2 to output a fifth voltage signal; the fifth voltage signal is used to calibrate k2.
[0023] In this embodiment of the invention, the sampling accuracy, originally determined by the superposition of two error factors (first voltage division ratio error and second voltage division ratio error), is transformed into a sampling accuracy determined by a single error factor (either the first voltage division ratio error or the second voltage division ratio error) through the above steps. Furthermore, to avoid the influence of this single error factor on the sampling, a difference between the two voltage signals more closely approximating the actual output of the differential circuit is obtained. A second calibration switch is added to the voltage sampling device and externally connected to a reference power supply for calibrating the voltage division ratio of each voltage division branch in the voltage divider circuit. Specifically, when the first and second calibration switches are closed, the second voltage division branch in the voltage divider circuit receives the voltage signal output from the reference power supply. The second voltage division branch then divides this voltage signal and outputs a fifth voltage signal, thereby enabling the actual measurement of the value of the fifth voltage signal. Since the reference power supply can output a stable and known voltage signal, the voltage division ratio of the second voltage division branch can be obtained based on the actual measured value of the fifth voltage signal and the value of the reference power supply's voltage signal, thus achieving calibration of the voltage division ratio of the second voltage division branch.
[0024] In one possible implementation, the calibration module is specifically used to: when the target signal is the first differential output signal, restore the second sampled signal based on the calibrated k2 to use it as a sampled value of the difference between the first differential output signal and the second differential output signal.
[0025] In this embodiment of the invention, the second sampled signal is restored based on the calibrated second voltage division ratio to serve as the sampled value of the difference between the two voltage signals actually output by the differential circuit. This avoids the sampling error caused by the voltage division ratio and further improves the sampling accuracy of the voltage sampling device.
[0026] In one possible implementation, when the i-th first switch, the i-th second switch, and the first calibration switch are all in the off state, and the second calibration switch is in the closed state, the voltage divider circuit is further configured to: receive the reference voltage signal output by the reference power supply through the first voltage divider branch and divide it according to k1 to output a sixth voltage signal; the sixth voltage signal is used to calibrate k1.
[0027] In this embodiment of the invention, when the first calibration switch is in the open state and the second calibration switch is in the closed state, the first voltage divider branch in the voltage divider circuit can receive the voltage signal output by the reference power supply. Then, the first voltage divider branch divides this voltage signal and outputs a sixth voltage signal, thereby enabling the actual measurement of the value of the sixth voltage signal. Since the reference power supply can output a stable and known voltage signal, the voltage division ratio of the first voltage divider branch can be obtained based on the actually measured value of the sixth voltage signal and the value of the reference power supply's voltage signal, thereby calibrating the voltage division ratio of the first voltage divider branch.
[0028] In one possible implementation, the calibration module is specifically used to: when the target signal is the second differential output signal, restore the second sampled signal based on the calibrated k1 to use as a sampled value of the difference between the first differential output signal and the second differential output signal.
[0029] In this embodiment of the invention, the second sampled signal is restored based on the calibrated first voltage division ratio to serve as the sampled value of the difference between the two voltage signals actually output by the differential circuit. This avoids the sampling error caused by the voltage division ratio and further improves the sampling accuracy of the voltage sampling device.
[0030] In one possible implementation, the grounding terminals of both the first voltage divider branch and the second voltage divider branch are connected to a ground wire; the first voltage divider branch includes M series-connected first voltage divider resistors, and the second voltage divider branch includes M series-connected second voltage divider resistors, where M is an integer greater than 1; when the first calibration switch is closed, the voltage divider circuit is specifically used to: divide the target signal according to k1 using the M series-connected first voltage divider resistors to output the first voltage signal, and divide the target signal according to k2 using the M series-connected second voltage divider resistors to output the second voltage signal.
[0031] In this embodiment of the invention, the grounding terminals of the two voltage-dividing branches in the voltage divider circuit are connected to the ground wire. The voltage-dividing element can be multiple resistors connected in series, thereby dividing the input voltage signal to output a voltage signal that meets the voltage withstand limit of the sampling chip. Specifically, when the first calibration switch is closed, the first voltage-dividing branch and the second voltage-dividing branch divide the target signal (the first differential output signal or the second differential output signal) through their respective voltage-dividing resistors to output two voltage signals after voltage division.
[0032] In one possible implementation, when the first calibration switch is in the off state, the voltage divider circuit is specifically used to: divide the first differential output signal by the M series-connected first voltage divider resistors according to k1 to output the third voltage signal, and divide the second differential output signal by the M series-connected second voltage divider resistors according to k2 to output the fourth voltage signal.
[0033] In this embodiment of the invention, when the first calibration switch is in the off state, the first voltage divider branch receives the first differential output signal and divides the signal through a voltage divider resistor to output a voltage divided signal; the second voltage divider branch receives the second differential output signal and divides the signal through a voltage divider resistor to output a voltage divided signal.
[0034] In one possible implementation, the voltage sampling device further includes an analog-to-digital converter; the analog-to-digital converter is configured to: receive the output signal of the voltage divider circuit and convert the output signal from an analog signal into a digital signal; the output signal includes the first voltage signal and the second voltage signal, or the third voltage signal and the fourth voltage signal, or the fifth voltage signal, or the sixth voltage signal.
[0035] In this embodiment of the invention, the voltage sampling device may further include an analog-to-digital converter, which can directly convert the analog signal output by the voltage divider circuit into a digital signal, facilitating subsequent digital calculations.
[0036] Secondly, embodiments of the present invention provide a voltage sampling method, characterized in that it is applied to a voltage sampling device, the voltage sampling device including a differential circuit, a voltage divider circuit, and a first calibration switch; the voltage divider circuit includes a first voltage divider branch and a second voltage divider branch; the first output terminal of the differential circuit and the input terminal of the first voltage divider branch are connected to the first terminal of the first calibration switch; the second output terminal of the differential circuit and the input terminal of the second voltage divider branch are connected to the second terminal of the first calibration switch; the method includes: when the first calibration switch is in a closed state, the voltage sampling method provides voltage sampling to the parallel first voltage divider branch and the second voltage divider branch through the differential circuit. The voltage divider branch receives the target signal; the target signal is either a first differential output signal output from the first output terminal or a second differential output signal output from the second output terminal; the first voltage divider branch of the voltage divider circuit receives the target signal and divides it according to a first voltage division ratio k1 to output a first voltage signal, and the second voltage divider branch receives the target signal and divides it according to a second voltage division ratio k2 to output a second voltage signal; wherein, the difference between the first voltage signal and the second voltage signal is a first deviation signal, and the first deviation signal is used to calibrate the difference between the first voltage division ratio and the second voltage division ratio.
[0037] In one possible implementation, when the first calibration switch is in the off state, the first voltage divider branch and the second voltage divider branch are switched from a parallel state to an open circuit state; the method further includes: inputting a first differential output signal to the first voltage divider branch through the first output terminal of the differential circuit, and inputting a second differential output signal to the second voltage divider branch through the second output terminal; receiving the first differential output signal through the first voltage divider branch of the voltage divider circuit and dividing it according to k1 to output a third voltage signal, and receiving the second differential output signal through the second voltage divider branch and dividing it according to k2 to output a fourth voltage signal; the difference between the third voltage signal and the fourth voltage signal is a first sampling signal.
[0038] In one possible implementation, the voltage sampling device further includes a calibration module; the method further includes: calculating a second sampling signal through the calibration module based on the first deviation signal and the first sampling signal, the second sampling signal representing the difference between the voltage signals after the first differential output signal and the second differential output signal are divided according to the same voltage division ratio; wherein, the same voltage division ratio is either the first voltage division ratio or the second voltage division ratio; when the target signal is the first differential output signal, restoring the second sampling signal through the calibration module based on k2 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal; when the target signal is the second differential output signal, restoring the second sampling signal through the calibration module based on k1 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal.
[0039] In one possible implementation, the step of calculating the second sampled signal through the calibration module based on the first deviation signal and the first sampled signal includes: calculating the second sampled signal through the calibration module according to formula U. 采1 -U 差1 (k1-k2)=k2(U 差1 -U 差2 ), or formula U 采1 -U 差2 (k1-k2)=k1(U 差1 -U 差2 ) Calculate the second sampled signal; where, U 采1 U represents the first sampled signal; 差1 U represents the first differential output signal; 差2 This represents the second differential output signal; U 差1 (k1-k2) and U 差2(k1-k2) represents the first deviation signal; k2(U 差1 -U 差2 ) and k1(U 差1 -U 差2 ) represents the second differential sampling signal.
[0040] In one possible implementation, the differential circuit includes a first switch group and a second switch group; wherein, one end of the i-th first switch in the first switch group is connected to the (2i-1)-th cell in the N series-connected cells, and the other end is connected to the first output terminal; one end of the i-th second switch in the second switch group is connected to the 2i-th cell in the N series-connected cells, and the other end is connected to the second output terminal; N is an integer greater than 1, i = 1, 2, ..., N.
[0041] In one possible implementation, the first calibration switch is in a closed state; the step of inputting the target signal to the parallel first voltage divider branch and the second voltage divider branch through the differential circuit includes: when the i-th first switch is in a closed state and the i-th second switch is in an open state, receiving the first differential input signal output by the 2i-1th cell through the differential circuit, and inputting the first differential output signal to the parallel first voltage divider branch and the second voltage divider branch through the closed i-th first switch; or, when the i-th first switch is in an open state and the i-th second switch is in a closed state, receiving the second differential input signal output by the 2i-th cell through the differential circuit, and inputting the second differential output signal to the parallel first voltage divider branch and the second voltage divider branch through the closed i-th second switch.
[0042] In one possible implementation, the first calibration switch is in an open state; the step of inputting the first differential output signal to the first voltage divider branch through the first output terminal of the differential circuit, and inputting the second differential output signal to the second voltage divider branch through the second output terminal, includes: when both the i-th first switch and the i-th second switch are in a closed state, receiving the first differential input signal output by the 2i-1th cell through the differential circuit, and inputting the first differential output signal to the first voltage divider branch through the closed i-th first switch, and receiving the second differential input signal output by the 2i-th cell, and inputting the second differential output signal to the second voltage divider branch through the closed i-th second switch.
[0043] In one possible implementation, the voltage sampling device further includes a second calibration switch; one end of the second calibration switch is connected to the first end of the first calibration switch, and the other end is connected to a reference power supply; when both the i-th first switch and the i-th second switch are in the open state, and the first calibration switch and the second calibration switch are in the closed state; the method further includes: receiving the reference voltage signal output by the reference power supply through the second voltage divider branch of the voltage divider circuit and dividing it according to k2 to output a fifth voltage signal; the fifth voltage signal is used to calibrate k2.
[0044] In one possible implementation, when the target signal is the first differential output signal, restoring the second sampled signal based on k2 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal includes: when the target signal is the first differential output signal, restoring the second sampled signal through the calibration module and based on the calibrated k2 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal.
[0045] In one possible implementation, when the i-th first switch, the i-th second switch, and the first calibration switch are all in the off state, and the second calibration switch is in the closed state; the method further includes: receiving the reference voltage signal output by the reference power supply through the first voltage divider branch of the voltage divider circuit and dividing it according to k1 to output a sixth voltage signal; the sixth voltage signal is used to calibrate k1.
[0046] In one possible implementation, when the target signal is the second differential output signal, restoring the second sampled signal based on k1 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal includes: when the target signal is the second differential output signal, restoring the second sampled signal through the calibration module and based on the calibrated k1 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal.
[0047] In one possible implementation, the grounding terminals of both the first voltage divider branch and the second voltage divider branch are connected to a ground wire; the first voltage divider branch includes M series-connected first voltage divider resistors, and the second voltage divider branch includes M series-connected second voltage divider resistors, where M is an integer greater than 1; when the first calibration switch is closed; the step of receiving the target signal and performing voltage division through the first voltage divider branch of the voltage divider circuit to output a first voltage signal, and receiving the target signal and performing voltage division through the second voltage divider branch to output a second voltage signal, includes: dividing the target signal according to k1 through the M series-connected first voltage divider resistors of the voltage divider circuit to output the first voltage signal, and dividing the target signal according to k2 through the M series-connected second voltage divider resistors to output the second voltage signal.
[0048] In one possible implementation, when the first calibration switch is in the off state, the process of receiving the first differential output signal and dividing it to output a third voltage signal through the first voltage divider branch of the voltage divider circuit, and receiving the second differential output signal and dividing it to output a fourth voltage signal through the second voltage divider branch, includes: dividing the first differential output signal to output the third voltage signal through the M series-connected first voltage divider resistors of the voltage divider circuit according to k1, and dividing the second differential output signal to output the fourth voltage signal through the M series-connected second voltage divider resistors according to k2.
[0049] In one possible implementation, the voltage sampling device further includes an analog-to-digital converter; the method further includes: receiving the output signal of the voltage divider circuit through the analog-to-digital converter, and converting the output signal from an analog signal to a digital signal; the output signal includes the first voltage signal and the second voltage signal, or the third voltage signal and the fourth voltage signal, or the fifth voltage signal, or the sixth voltage signal.
[0050] Thirdly, this application provides a terminal device that has the function of implementing the method in any of the voltage sampling method embodiments described above. This function can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above-described function.
[0051] Fourthly, this application provides a terminal device including a processor configured to support the terminal device in performing corresponding functions in the voltage sampling method provided in the second aspect. The terminal device may also include a memory coupled to the processor, which stores necessary program instructions and data for the terminal device. The terminal device may also include a communication interface for communicating with other devices or communication networks.
[0052] Fifthly, embodiments of the present invention provide a computer program including instructions that, when executed by a computer, enable the computer to perform the process in the voltage sampling method of any one of the second aspects described above.
[0053] Sixthly, this application provides a chip system including a processor for supporting application servers or terminal devices in implementing the functions involved in the above aspects, such as generating or processing the information involved in the above methods. In one possible design, the chip system further includes a memory for storing program instructions and data necessary for the data transmission device. This chip system may be composed of chips or may include chips and other discrete devices.
[0054] In a seventh aspect, this application provides a semiconductor chip, characterized in that the semiconductor chip includes the voltage sampling device described in any one of the first aspects above.
[0055] Eighthly, this application provides an electronic device, characterized in that the electronic device includes the semiconductor chip described in the seventh aspect above. Attached Figure Description
[0056] Figure 1A This is a schematic diagram of the system architecture for an application scenario of a voltage sampling device provided in an embodiment of the present invention.
[0057] Figure 1B This is a schematic diagram of a battery product provided in an embodiment of the present invention.
[0058] Figure 2A This is a schematic diagram of a voltage sampling device provided in an embodiment of the present invention.
[0059] Figure 2B This is a schematic diagram of a voltage signal calibration process provided in an embodiment of the present invention.
[0060] Figure 2C This is a schematic diagram of a voltage signal sampling process provided in an embodiment of the present invention.
[0061] Figure 2D This is a schematic diagram of a differential circuit provided in an embodiment of the present invention.
[0062] Figure 2E This is a schematic diagram of a differential circuit in the voltage signal sampling stage provided in an embodiment of the present invention.
[0063] Figure 2F This is a schematic diagram of a top-down PMOS switch provided in an embodiment of the present invention.
[0064] Figure 3A This is a schematic diagram of another voltage sampling device provided in an embodiment of the present invention.
[0065] Figure 3B This is a schematic diagram of a voltage sampling process based on another voltage sampling device, provided as an embodiment of the present invention.
[0066] Figure 3C This is a schematic diagram of a voltage divider circuit provided in an embodiment of the present invention.
[0067] Figure 3D This is a schematic diagram of another voltage sampling device provided in an embodiment of the present invention.
[0068] Figure 4A This is a schematic diagram of a voltage sampling device using 16 battery cells as an example, provided as an embodiment of the present invention.
[0069] Figure 4B This is a flowchart of a sampling process using 16 battery cells as an example, provided as an embodiment of the present invention.
[0070] Figure 4C This is a detailed flowchart illustrating a sampling process for voltage signals from 16 battery cells, provided as an embodiment of the present invention.
[0071] Figure 4D This is another sampling process flowchart using 16 battery cells as an example, provided for an embodiment of the present invention.
[0072] Figure 5A This is a schematic diagram of another voltage sampling device using 16 battery cells as an example, provided for an embodiment of the present invention.
[0073] Figure 5B This is another sampling process flowchart using 16 battery cells as an example, provided as an embodiment of the present invention.
[0074] Figure 5C A detailed flowchart illustrating another sampling process for the voltage signals of 16 battery cells provided in this embodiment of the invention.
[0075] Figure 6 This is a flowchart of a voltage sampling method provided in an embodiment of the present invention. Detailed Implementation
[0076] The embodiments of the present invention will now be described with reference to the accompanying drawings. The terms "first," "second," "third," and "fourth," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.
[0077] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0078] The following explanations of some terms used in this application are provided to facilitate understanding by those skilled in the art.
[0079] (1) "Multiple" refers to two or more. "And / or" describes the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally indicates that the related objects before and after it are in an "or" relationship.
[0080] (2) Differential circuit: A differential circuit is a circuit that features "suppression of common-mode signals and amplification of differential-mode signals". The input terminals of this circuit are two signals; the difference between these two signals is the effective input signal of the circuit. The output of the circuit is an amplification of the difference between these two input signals. In one scenario, if an interference signal exists, it will cause the same interference to both input signals. By using the difference between the two signals, the effective input of the interference signal is zero, thus achieving the purpose of suppressing common-mode interference.
[0081] (3) The voltage divider principle refers to the fact that in a voltage divider branch (such as one consisting of multiple resistors connected in series), the current through each resistor is equal, and the sum of the voltages across each resistor is equal to the total voltage of the circuit. For example, if the voltage divider branch includes two resistors connected in series, namely R1 and R2, then according to the voltage divider principle, we can obtain R1∶R2=U1∶U2.
[0082] (4) Voltage division is a technique for controlling voltage signals in a circuit based on the principle of voltage division. That is, it's a technique that divides the input voltage signal of a voltage divider branch according to a voltage division ratio and then outputs the voltage. For example, assuming the voltage divider branch includes two series resistors, R1 and R2, the voltage division coefficient can be... When the voltage divider branch receives the input voltage signal U 输入 At that time, the voltage divider branch can supply U 输入 Perform voltage division and output k*U 输入 This enables the regulation of the input voltage signal.
[0083] The embodiments of this application will now be described with reference to the accompanying drawings.
[0084] Please see Figure 1A , Figure 1A This is a schematic diagram of a system architecture for an application scenario of a voltage sampling device provided in an embodiment of the present invention. The system architecture includes at least one server 10 and one or more terminals 20 (two are shown as an example in the figure). The server 10 generates a preset algorithm for analyzing voltage signals. The terminal 20 may include the voltage sampling device 201, N series-connected battery cells 202, and a processing unit 203. The processing unit 203 can analyze the voltage signals of the N series-connected battery cells 202 collected by the voltage sampling device 201 according to the preset algorithm provided by the server 10, thereby predicting the power supply capacity of the N series-connected battery cells 202 or performing battery management, etc. Specifically, the terminal 20 in this system architecture can be at least one of a smartphone, communication base station, data center, or battery-powered device such as a photovoltaic inverter or electric vehicle. Optionally, the battery-powered device includes at least one battery product, and the battery product includes the aforementioned N series-connected battery cells 202 and voltage sampling device 201. For example, as... Figure 1B As shown, Figure 1B This is a schematic diagram of a battery product provided in an embodiment of the present invention. Figure 1B The battery product uses N series-connected cells 202 as a power supply system; the voltage sampling device 201 is connected to the N series-connected cells 202 and is used to collect the voltage signals of the N series-connected cells 202.
[0085] For example, the above Figure 1ABefore a terminal 20 (such as a smartphone) leaves the factory, a server 10 (such as a firmware flashing server) performs batch pre-installation of firmware on other terminals 20 of the same model as the terminal. This firmware may include a preset algorithm for analyzing voltage signals. This preset algorithm can be stored in the internal storage unit of the terminal 20, such as a read-only memory (ROM), which is the default installation location for the terminal 20's system firmware and software. Without root access, these firmware files (including the preset algorithm) cannot be arbitrarily read or written. After the terminal 20 leaves the factory, considering the inconsistencies between different cells in the N series-connected battery cells 202, as the charge-discharge cycles of each cell increase, the voltage of each individual cell gradually diverges, leading to a significant reduction in battery life. Therefore, the voltage sampling device 201 in this application can periodically collect the voltage signal of each individual cell in the N series-connected cells 202, and the arithmetic unit 203 can analyze and manage the sampled voltage signal according to the preset algorithm, thereby keeping the voltage deviation of the individual cells within the expected range, thus ensuring that each individual cell will not be damaged during normal use, and ensuring the safety and stability of the N series-connected cells 202.
[0086] It is understood that the system architectures corresponding to the above application scenarios are only a few exemplary implementation methods in the embodiments of the present invention, and the application scenarios and corresponding system architectures in the embodiments of the present invention include, but are not limited to, those described above.
[0087] The following provides related apparatus according to embodiments of the present invention. Please refer to... Figure 2A , Figure 2A A schematic diagram of a voltage sampling device provided in an embodiment of the present invention is shown below. Figure 2A As shown, the voltage sampling device 30 includes: a differential circuit 301, a voltage divider circuit 302, and a first calibration switch 303; the voltage divider circuit 302 includes a first voltage divider branch 3021 and a second voltage divider branch 3022; the first output terminal 3011 of the differential circuit 301 and the input terminal of the first voltage divider branch 3021 are connected to the first terminal 3031 of the first calibration switch 303; the second output terminal 3012 of the differential circuit 301 and the input terminal of the second voltage divider branch 3022 are connected to the second terminal 3032 of the first calibration switch 303.
[0088] When the first calibration switch 303 is closed, the first voltage divider branch 3021 and the second voltage divider branch 3022 are connected in parallel; the differential circuit 301 is used to input a target signal to the parallel first voltage divider branch 3021 and the second voltage divider branch 3022; the target signal is either the first differential output signal output from the first output terminal 3011 or the second differential output signal output from the second output terminal 3012. For details, please refer to... Figure 2B , Figure 2B This is a schematic diagram of a voltage signal calibration process provided in an embodiment of the present invention, as shown below. Figure 2B As shown, when the first calibration switch 303 is closed, the first voltage divider branch 3021 and the second voltage divider branch 3022 are connected in parallel, meaning the voltages across the first voltage divider branch 3021 and the second voltage divider branch 3022 are the same. Since the differential circuit 301 has two signal output terminals, there are two methods for outputting the target signal. The first method is as follows... Figure 2B As shown in (a), the differential circuit 301 outputs a first differential output signal through the first output terminal 3011 as the target signal, which is then input to the first voltage divider branch 3021 and the second voltage divider branch 3022 respectively; the second type is as follows: Figure 2B As shown in (b), the differential circuit 301 outputs a second differential output signal through the second output terminal 3012, which is then input as the target signal to the first voltage divider branch 3021 and the second voltage divider branch 3022 respectively. It can be understood that the voltage signals output from different output terminals of the differential circuit 301 are different; therefore, the target signal is either the first differential output signal output from the first output terminal 3011 or the second differential output signal output from the second output terminal 3012.
[0089] The voltage divider circuit 302 is used to receive the target signal through the first voltage divider branch 3021 and divide it according to a first voltage division ratio k1 to output a first voltage signal, and to receive the target signal through the second voltage divider branch 3022 and divide it according to a second voltage division ratio k2 to output a second voltage signal; wherein, the difference between the first voltage signal and the second voltage signal is a first deviation signal, and the first deviation signal is used to calibrate the difference between the first voltage division ratio and the second voltage division ratio. Specifically, based on the two methods of outputting the target signal by the differential circuit 301, for the first method, as follows... Figure 2B As shown in (a), the first voltage divider branch 3021 of the voltage divider circuit 302 receives the first differential output signal (target signal) output from the first output terminal 3011, and divides the signal according to the first voltage division ratio using the voltage divider element in the first voltage divider branch 3021 to output a first voltage signal; the second voltage divider branch 3022 of the voltage divider circuit 302 receives the first differential output signal output from the first output terminal 3011, and divides the signal according to the second voltage division ratio using the voltage divider element in the second voltage divider branch 3022 to output a second voltage signal. Regarding the second method, as... Figure 2BAs shown in (b), the first voltage divider branch 3021 of the voltage divider circuit 302 receives the second differential output signal (target signal) output from the second output terminal 3012, and divides the signal according to the first voltage division ratio using the voltage divider element in the first voltage divider branch 3021 to output a first voltage signal; the second voltage divider branch 3022 of the voltage divider circuit 302 receives the second differential output signal output from the second output terminal 3012, and divides the signal according to the second voltage division ratio using the voltage divider element in the second voltage divider branch 3022 to output a second voltage signal, thereby obtaining a first deviation signal from the first voltage signal and the second voltage signal. It can be understood that since the first deviation signal is the difference between two actually measured voltage signals, the first deviation signal can represent the deviation between the actual voltage division capabilities of the first voltage divider branch 3021 and the second voltage divider branch 3022.
[0090] For example, assume that the voltage division ratio (k1) of the first voltage divider branch 3021 is the same as the voltage division ratio (k2) of the second voltage divider branch 3022, i.e., k1 = k2. When the first calibration switch is closed, the first voltage divider branch 3021 and the second voltage divider branch 3022 are in parallel. In this case, the differential circuit 301 can input the same target signal to the first voltage divider branch 3021 and the second voltage divider branch 3022. Since the voltage division ratios of the two branches are theoretically equal, ideally, the difference between the voltage signals output by the two voltage divider branches is zero (k1 * U). 目标 -k2*U 目标 =0), but in reality, due to the certain error between the theoretical and actual resistance values of the resistors in each voltage divider branch, there is an error between the theoretical and actual values of k1 and k2, and consequently, an error in the difference between k1 and k2. That is, in reality, k1-k2=Δk, and Δk is not 0. In summary, this error makes the voltage dividing capability of the first voltage divider branch 3021 different from that of the second voltage divider branch 3022. When the voltage signal sampled by the sampling chip is used to restore the difference between the voltage signal actually provided by the differential circuit according to the theoretical voltage division ratio, the error resulting from the superposition of these two voltage division ratio errors affects the restoration result, thereby reducing the sampling accuracy of the voltage sampling device. Therefore, to avoid the impact on sampling accuracy caused by the different voltage dividing capabilities of these two voltage dividing branches, in this embodiment of the invention, the first calibration switch 303 is closed, so that the first voltage dividing branch 3021 and the second voltage dividing branch 3022 are in parallel. The first voltage dividing branch 3021 and the second voltage dividing branch 3022 respectively receive the target signal U output by the differential circuit 3031. 目标(The first differential output signal or the second differential output signal) allows for the actual measurement of the difference in voltage signals output by the voltage divider circuit 302 (the first deviation signal). This signal represents the deviation between the voltage dividing capabilities of the two voltage divider branches. Therefore, superimposing this deviation on one of the voltage divider branches makes the voltage dividing capabilities of the two voltage divider branches equal. Furthermore, the sampling accuracy, originally determined by the superposition of two error factors (the first voltage divider ratio error and the second voltage divider ratio error), is transformed into a sampling accuracy determined by a single error factor (either the first voltage divider ratio error or the second voltage divider ratio error). This reduces the number of error factors, requiring only one error factor to be calibrated subsequently, thereby improving the sampling accuracy.
[0091] In one possible implementation, such as Figure 2A As shown, when the first calibration switch 303 is in the off state, the first voltage divider branch 3021 and the second voltage divider branch 3022 change from a parallel state to an open circuit state; the differential circuit 301 is further used to input the first differential output signal to the first voltage divider branch 3021 through the first output terminal 3011, and to input the second differential output signal to the second voltage divider branch 3022 through the second output terminal 3012; the voltage divider circuit 302 is further used to receive the first differential output signal through the first voltage divider branch 3021 and divide it according to k1 to output a third voltage signal, and to receive the second differential output signal through the second voltage divider branch 3022 and divide it according to k2 to output a fourth voltage signal; the difference between the third voltage signal and the fourth voltage signal is the first sampling signal. Specifically, as shown... Figure 2A As shown, when the first calibration switch 303 changes from a closed state to an open state, the first voltage divider branch 3021 and the second voltage divider branch 3022 in the voltage divider circuit 302 change from a parallel state to an open circuit state. Then, the first voltage divider branch 3021 and the second voltage divider branch 3022 can receive different voltage signals and perform voltage division to output a voltage signal that meets the chip's withstand voltage limit conditions, thus obtaining the first sampling signal.
[0092] In one possible implementation, the voltage sampling device 30 further includes a calibration module; the calibration module is configured to: calculate a second sampling signal based on the first deviation signal and the first sampling signal, the second sampling signal representing the difference between the voltage signals after the first differential output signal and the second differential output signal are divided according to the same voltage division ratio; wherein, the same voltage division ratio is either the first voltage division ratio or the second voltage division ratio; when the target signal is the first differential output signal, restore the second sampling signal based on k2 to obtain a sample value of the difference between the first differential output signal and the second differential output signal; when the target signal is the second differential output signal, restore the second sampling signal based on k1 to obtain a sample value of the difference between the first differential output signal and the second differential output signal. Specifically, the calibration module can remove the aforementioned first deviation signal (i.e., the sampling error caused by the inconsistent voltage division capabilities of the two voltage divider branches) from the first sampled signal to obtain the second sampled signal. This effectively eliminates the sampling error caused by the inconsistent voltage division capabilities of the two voltage divider branches. In other words, the sampling accuracy, originally determined by the superposition of two error factors (i.e., the first voltage division ratio error and the second voltage division ratio error), is transformed into a sampling accuracy determined by a single error factor (i.e., either the first voltage division ratio error or the second voltage division ratio error), thus reducing the number of error factors. Furthermore, the second sampled signal is restored based on the theoretical voltage division ratio to serve as the sampled value of the difference between the two voltage signals actually output by the differential circuit. This avoids the sampling error caused by the inconsistent voltage division capabilities of the two voltage divider branches, thereby improving the sampling accuracy.
[0093] In one possible implementation, the calibration module is specifically used to: [according to formula U] 采1 -U 差1 (k1-k2)=k2(U 差1 -U 差2 ), or formula U 采1 -U 差2 (k1-k2)=k1(U 差1 -U 差2 ) Calculate the second sampled signal; where, U 采1 U represents the first sampled signal; 差1 U represents the first differential output signal; 差2 This represents the second differential output signal; U 差1 (k1-k2) and U 差2 (k1-k2) represents the first deviation signal; k2(U 差1 -U 差2 ) and k1(U 差1 -U 差2 ) represents the second differential sampling signal.
[0094] For example, assume that the voltage division ratio (k1) of the first voltage divider branch 3021 is the same as the voltage division ratio (k2) of the second voltage divider branch 3022, that is, theoretically k1 = k2. When the first calibration switch 303 changes from a closed state to an open state, the first voltage divider branch 3021 and the second voltage divider branch 3022 change from a parallel state to an open circuit state. The first voltage divider branch 3021 receives the first differential voltage signal (U). 差1 And perform voltage division to obtain the third voltage signal (k1*U) 差1 The second voltage divider branch 3022 receives the second differential voltage signal (U). 差2 And perform voltage division to obtain the fourth voltage signal (k2*U) 差2 At this point, the first sampled signal is the difference between the third and fourth voltage signals, i.e., U. 采 =k1*U 差1 -k2*U 差2 Furthermore, in a theoretical state, it is assumed that the theoretical voltage division ratio of the voltage divider element is K, i.e., K = k1 = k2. When restoring the difference in the voltage signal actually provided by the differential circuit 301 according to the theoretical voltage division ratio, it can be based on the following formula 1.
[0095]
[0096] However, in reality, due to differences in the manufacturing process of the voltage divider components or other environmental factors, the values of K, k1, and k2 are not equal. Therefore, the voltage signal difference calculated based on Formula 1 at the output of the differential circuit 301 has an error compared to the actual voltage signal difference at the output of the differential circuit 301. In the embodiments of this invention, please refer to... Figure 2C , Figure 2C This is a schematic diagram of a voltage signal sampling process provided in an embodiment of the present invention, as shown below. Figure 2C As shown, during the voltage signal calibration stage, a first deviation signal, U, can be obtained based on the first voltage signal output from the first voltage divider branch 3021 and the second voltage signal output from the second voltage divider branch 3022. 差1 The value of (k1-k2) or U 差2 The value of (k1-k2); during the voltage signal sampling stage, the differential sampling signal, i.e., U, can be obtained based on the third voltage signal output from the first voltage divider branch 3021 and the fourth voltage signal output from the second voltage divider branch 3022. 采 =k1*U 差1 -k2*U 差2 .
[0097] Furthermore, the calibration module restores the difference in voltage signals actually provided by the differential circuit 301 according to the voltage division ratio. When the target signal is the first differential output signal, the first deviation signal is represented by U. 差1(k1-k2) represents the expression shown in Formula 2 below.
[0098] U 采1 -U 差1 (k1-k2)=k2(U 差1 -U 差2 )(Formula 2)
[0099] Based on Formula 2 and the theoretical value of k2, a voltage signal difference (U) closer to the actual output of the differential circuit 301 can be calculated. 差1 -U 差2 When the target signal is the second differential output signal, the first deviation signal is represented by U. 差2 (k1-k2) represents the expression shown in Formula 3 below.
[0100] U 采1 -U 差2 (k1-k2)=k1(U 差1 -U 差2 )(Formula 3)
[0101] Similarly, based on Formula 3 and the theoretical value of k1, a voltage signal difference (U) closer to the actual output of the differential circuit 301 can be calculated. 差1 -U 差2 ).
[0102] The voltage sampling device provided in this embodiment of the invention can obtain the deviation signal of the two branches when the first calibration switch 303 is closed, and can obtain the first sampling signal when the first calibration switch 303 is open. The first sampling signal can be calibrated based on the deviation signal, thereby effectively eliminating the sampling error caused by the inconsistent voltage division capabilities of the two voltage-dividing branches and improving the sampling accuracy.
[0103] In one possible implementation, the above Figure 2A The differential circuit 301 may include a first switch group and a second switch group; wherein, one end of the i-th first switch in the first switch group is connected to the (2i-1)-th cell in the N series-connected cells, and the other end is connected to the first output terminal 3011; one end of the i-th second switch in the second switch group is connected to the 2i-th cell in the N series-connected cells, and the other end is connected to the second output terminal 3012; N is an integer greater than 1, i = 1, 2, ..., N. Specifically, since multi-channel differential sampling is required for the N series-connected cells, a first switch group and a second switch group can be designed in the differential circuit 301. The first switch group can be used to control the voltage signal flow direction of odd-numbered cells; the second switch group can be used to control the voltage signal flow direction of even-numbered cells. For example, as... Figure 2D As shown, Figure 2DThis is a schematic diagram of a differential circuit provided in an embodiment of the present invention. Assuming that N is an even number, one end of each first switch in the first switch group is connected to an odd number of cells in N series-connected cells, and the other end is connected to the first output terminal 3011. One end of each second switch in the second switch group is connected to an even number of cells in N series-connected cells, and the other end is connected to the second output terminal 3012.
[0104] In one possible implementation, the above Figure 2A The first calibration switch 303 is in a closed state. When the i-th first switch is closed and the i-th second switch is open, the differential circuit 301 is specifically used to receive the first differential input signal output by the (2i-1)-th cell, and input the first differential output signal to the parallel first voltage divider branch 3021 and the second voltage divider branch 3022 via the closed i-th first switch; or, when the i-th first switch is open and the i-th second switch is closed, the differential circuit 301 is specifically used to receive the second differential input signal output by the 2i-th cell, and input the second differential output signal to the parallel first voltage divider branch 3021 and the second voltage divider branch 3022 via the closed i-th second switch. Specifically, when the first calibration switch 303 is closed, the voltage sampling device 30 is in the voltage signal calibration stage. Since the first voltage divider branch 3021 and the second voltage divider branch 3022 only receive one identical voltage signal (the target signal mentioned above), the differential circuit 301 can be ensured to receive only the voltage signal of the (2i-1)th cell by closing the i-th first switch and opening the i-th second switch, thus outputting only the first differential output signal. Alternatively, the differential circuit 301 can be ensured to receive only the voltage signal of the 2i-th cell by closing the i-th second switch and opening the i-th first switch, thus outputting only the second differential output signal. For example, when it is necessary to collect the voltage signal of the first cell, refer to the above. Figure 2D The voltage signal of the first cell can be input into the differential circuit 301 by closing the first first switch and opening the first second switch, thereby obtaining the first differential output signal; or, the voltage signal of the second cell can be input into the differential circuit 301 by closing the first second switch and opening the first first switch, thereby obtaining the second differential output signal. In summary, the deviation signal obtained based on the first differential output signal or the deviation signal obtained based on the second differential output signal can both calibrate the error of the difference between the voltage division ratios provided by the two voltage division branches.
[0105] In one possible implementation, the above Figure 2AThe first calibration switch 303 is in the open state. When both the i-th first switch and the i-th second switch are in the closed state, the differential circuit 301 is specifically used to receive the first differential input signal output by the (2i-1)-th cell and input the first differential output signal to the first voltage divider branch 3021 via the closed i-th first switch, and to receive the second differential input signal output by the 2i-th cell and input the second differential output signal to the second voltage divider branch 3022 via the closed i-th second switch. Specifically, when the first calibration switch 303 is open, the voltage sampling device 30 is in the voltage signal sampling stage. Since the first voltage divider branch 3021 and the second voltage divider branch 3022 receive two different voltage signals, the differential circuit 301 can be ensured to receive the voltage signals of the (2i-1)th and 2ith battery cells respectively by closing the i-th first switch and the i-th second switch. Therefore, the differential circuit 301 can output two differential output signals (derived based on the voltage signals of the (2i-1)th and 2ith battery cells respectively). For example, Figure 2E As shown, Figure 2E This is a schematic diagram of a differential circuit in the voltage signal sampling stage provided by an embodiment of the present invention. In the voltage signal sampling stage, the first first switch and the first second switch are closed. The voltage signal of the first cell is used as the first differential input signal, and then the differential circuit 301 outputs a first differential output signal from the first output terminal 3011 based on the first differential input signal. The voltage signal of the second cell is used as the second differential input signal, and then the differential circuit 301 outputs a second differential output signal from the second output terminal 3012 based on the second differential input signal.
[0106] Optional, please see Figure 2F As shown, Figure 2F This is a schematic diagram of a top-down PMOS switch provided in an embodiment of the present invention. Since the top-down PMOS switch shown in the figure can prevent current backflow, the switches in the first and second switch groups mentioned above can specifically be the top-down PMOS switches shown in the figure, thus preventing current backflow to the battery cell.
[0107] Based on the above Figure 2A The voltage sampling device 30 in the figure will be further optimized in the following detailed description.
[0108] In one possible implementation, please see Figure 3A , Figure 3A This is a schematic diagram of another voltage sampling device provided in an embodiment of the present invention. Figure 2AThe voltage sampling device 30 may further include a second calibration switch 304; one end of the second calibration switch 304 is connected to the first end 3031 of the first calibration switch 303, and the other end is connected to the reference power supply 305; when the i-th first switch and the i-th second switch are both in the open state, and the first calibration switch 303 and the second calibration switch 304 are in the closed state, the voltage divider circuit 302 is further used to: receive the reference voltage signal output by the reference power supply 305 through the second voltage divider branch 3022 and divide it according to k2 to output a fifth voltage signal; the fifth voltage signal is used to calibrate k2. It should be noted that, based on the above formulas 2 and 3, it can be seen that in calculating the actual differential output signal (U 差1 -U 差2 When U 差1 -U 差2 The coefficients before the signal will affect the result. Therefore, in order to obtain a voltage sampling signal that is closer to the actual output, such as... Figure 3A As shown above, in the above Figure 2A Based on the voltage sampling device 30, a second calibration switch 304 is added and externally connected to a reference power supply 305 to calibrate the voltage division ratio of each voltage dividing branch in the voltage divider circuit. Specifically, when the first calibration switch 303 and the second calibration switch 304 are closed, the second voltage dividing branch 3022 in the voltage divider circuit 302 can receive the voltage signal output by the reference power supply 305. Then, the second voltage dividing branch 3022 divides the voltage signal and outputs a fifth voltage signal. Since the reference power supply 305 can output a stable and known voltage signal, the voltage division ratio (k2) of the second voltage dividing branch 3022 can be obtained based on the value of the fifth voltage signal output by the second voltage dividing branch 3022 and the value of the voltage signal of the reference power supply 305, thereby calibrating the voltage division ratio of the second voltage dividing branch 3022.
[0109] In one possible implementation, the calibration module is specifically used to: when the target signal is the first differential output signal, restore the second sampled signal based on the calibrated k2 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal. Specifically, restoring the second sampled signal based on the calibrated second voltage division ratio to obtain a sampled value of the difference between the two voltage signals actually output by the differential circuit avoids sampling errors caused by the voltage division ratio, further improving the sampling accuracy of the voltage sampling device.
[0110] In one possible implementation, when the i-th first switch, the i-th second switch, and the first calibration switch 303 are all in the off state, and the second calibration switch 304 is in the closed state, the above... Figure 3AThe voltage divider circuit 302 is further configured to: receive the reference voltage signal output by the reference power supply 305 through the first voltage divider branch 3021 and divide it according to k1 to output a sixth voltage signal; the sixth voltage signal is used to calibrate k1. Specifically, when the first calibration switch 303 is in the open state and the second calibration switch 304 is in the closed state, the first voltage divider branch 3021 in the voltage divider circuit 302 can receive the voltage signal output by the reference power supply 305, and then the first voltage divider branch 3021 divides the voltage signal and outputs a sixth voltage signal. Since the reference power supply 305 can output a stable and known voltage signal, the voltage division ratio (k1) of the first voltage divider branch 3021 can be obtained based on the value of the sixth voltage signal output after voltage division by the first voltage divider branch 3021 and the value of the voltage signal of the reference power supply 305, and then the voltage division ratio of the first voltage divider branch 3021 can be calibrated.
[0111] In one possible implementation, the calibration module is specifically used to: when the target signal is the second differential output signal, restore the second sampled signal based on the calibrated k1 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal. Specifically, restoring the second sampled signal based on the calibrated first voltage division ratio to obtain a sampled value of the difference between the two voltage signals actually output by the differential circuit avoids sampling errors caused by the voltage division ratio, further improving the sampling accuracy of the voltage sampling device.
[0112] For example, such as Figure 3B As shown, Figure 3B This is a schematic diagram of a voltage sampling process based on another voltage sampling device provided in an embodiment of the present invention. The diagram is based on the above... Figure 3AIn the voltage sampling device 30, during the voltage signal calibration stage, the first calibration switch 303 and the second calibration switch 304 can be closed first. The reference voltage signal output from the reference power supply 305 is received through the second voltage divider branch 3022, and a fifth voltage signal is output through voltage division. Based on the value of the fifth voltage signal and the value of the reference voltage signal, the voltage division ratio k2 of the second voltage divider branch 3022 can be calculated. Next, the first calibration switch 303 can be opened, and the first voltage divider branch 3021 receives the reference voltage signal output from the reference power supply 305, and a sixth voltage signal is output through voltage division. Based on the value of the sixth voltage signal and the value of the reference voltage signal, the voltage division ratio k1 of the first voltage divider branch 3011 can be calculated. Then, by opening the second calibration switch 304 and closing the first calibration switch 303, the first voltage divider branch 3021 and the second voltage divider branch 3022 respectively receive the target signal output from the differential circuit 301, and output the first voltage signal and the second voltage signal respectively through voltage division. Based on the first voltage signal and the second voltage signal, the first deviation signal, U, is obtained. 差1 (k1-k2) or U 差2 (k1-k2) is used to complete the voltage signal calibration. During the voltage signal sampling stage, the first calibration switch 303 is then disconnected. The first voltage divider branch 3021 receives the first differential output signal and performs voltage division to output the third voltage signal. The second voltage divider branch 3022 receives the second differential output signal and performs voltage division to output the fourth voltage signal. Based on the third and fourth voltage signals, the differential sampling signal, U, is obtained. 采 =k1*U 差1 -k2*U 差2 Furthermore, the difference in voltage signal (U) actually output by the differential circuit 301 can be calculated more accurately using formula 2 or formula 3 above. 差1 -U 差2 ).
[0113] In one possible implementation, as described above Figure 2A or the above Figure 3AThe grounding terminals of the first voltage divider branch 3021 and the second voltage divider branch 3022 are both connected to the ground wire. The first voltage divider branch 3021 includes M series-connected first voltage divider resistors, and the second voltage divider branch 3022 includes M series-connected second voltage divider resistors, where M is an integer greater than 1. When the first calibration switch 303 is closed, the voltage divider circuit 302 is specifically used to: divide the target signal according to k1 using the M series-connected first voltage divider resistors to output the first voltage signal, and divide the target signal according to k2 using the M series-connected second voltage divider resistors to output the second voltage signal. Specifically, the grounding terminals of the two voltage divider branches in the voltage divider circuit 302 are connected to the ground wire, and the voltage divider element can be multiple series-connected resistors, thereby realizing the voltage division of the input voltage signal to output a voltage signal that meets the voltage withstand limit conditions of the sampling chip. For example, as shown in the figure... Figure 3C As shown, Figure 3C This is a schematic diagram of a voltage divider circuit provided in an embodiment of the present invention. In the diagram, the voltage divider element in the first voltage divider branch 3021 is two resistors connected in series, namely R1 and R2; the voltage divider element in the second voltage divider branch 3022 is two resistors connected in series, namely R3 and R4. When the first calibration switch 303 is closed, the first voltage divider branch 3021 divides the target signal through R1 to output a first voltage signal; the second voltage divider branch 3022 divides the target signal through R3 to output a second voltage signal.
[0114] In one possible implementation, as described above Figure 2A or the above Figure 3A When the first calibration switch 303 is in the off state, the voltage divider circuit 302 is specifically used to: divide the first differential output signal according to k1 using the M series-connected first voltage divider resistors to output the third voltage signal, and divide the second differential output signal according to k2 using the M series-connected second voltage divider resistors to output the fourth voltage signal. Specifically, when the first calibration switch 303 is in the off state, the first voltage divider branch 3021 receives the first differential output signal and divides the signal using the voltage divider resistors to output the divided voltage signal; the second voltage divider branch 3022 receives the second differential output signal and divides the signal using the voltage divider resistors to output the divided voltage signal.
[0115] In one possible implementation, please see Figure 3D , Figure 3D This is a schematic diagram of another voltage sampling device provided in an embodiment of the present invention. Figure 3AThe voltage sampling device 30 may further include an analog-to-digital converter 306; the analog-to-digital converter 306 is used to: receive the output signal of the voltage divider circuit 302 and convert the output signal from an analog signal to a digital signal; the output signal includes the first voltage signal and the second voltage signal, or the third voltage signal and the fourth voltage signal, or the fifth voltage signal, or the sixth voltage signal. Specifically, as shown in... Figure 3D As shown above, in the above Figure 3A Based on the voltage sampling circuit, an analog-to-digital converter 306 is added to convert the analog signal output by the voltage divider circuit 302 into a digital signal, which is convenient for subsequent digital calculations.
[0116] In this embodiment of the invention, by optimizing the differential sampling device in the prior art, the voltage sampling signal is calibrated, thereby improving the sampling accuracy of the voltage sampling signal.
[0117] To describe the voltage sampling device in the embodiments of this application in more detail, the following is combined with... Figure 4A An exemplary description is provided. Figure 4A This is a schematic diagram of a voltage sampling device using 16 battery cells as an example, provided as an embodiment of the present invention. It should be noted that... Figure 4A Taking 16 battery cells as an example, where N cells connected in series with the differential circuit 301 in the voltage sampling device 30 are used, each cell can be connected to a switch through a protective resistor. The above... Figure 2A The voltage divider element in the first voltage divider branch 3021 is two resistors connected in series, namely R1 and R2; the voltage divider element in the second voltage divider branch 3022 is two resistors connected in series, namely R3 and R4. 16p For the above Figure 2D The voltage signal of the first cell in the battery, U 15p For the voltage signal of the second cell mentioned above, U 14p This refers to the voltage signal of the third cell mentioned above, and so on, U 1p This refers to the voltage signal of the sixteenth cell mentioned above. K16P is the aforementioned... Figure 2D The first switch in the sequence, K15P is the first second switch mentioned above, K14P is the second first switch mentioned above, and so on, with K1P being the eighth second switch mentioned above. K1 is the aforementioned... Figure 2A The first calibration switch 303 in the middle.
[0118] Please see Figure 4B , Figure 4B This invention provides a sampling process flowchart using 16 battery cells as an example. The flowchart first samples 16 battery cells (as described above). Figure 2D (The first cell in the battery), closing K16P and K1, obtains the first deviation signal, that is, U.16P (k1-k2), such as Figure 4C As shown, Figure 4C This is a detailed flowchart illustrating a sampling process for voltage signals from 16 battery cells, provided as an embodiment of the present invention. Figure 4C As shown in (a), the closure is as follows Figure 4A K16P, K1, and then U 16P The voltage is divided by the first voltage divider branch 3021 and the second voltage divider branch 3022 to obtain U. 16P (k1-k2). Next, disconnect K1 and close K16P and K15P to obtain the differential sampling signal U. 采16 ,like Figure 4C As shown in (b), when K1 is disconnected and K16P and K15P are closed, the first voltage divider branch 3021 receives U. 16P And perform voltage division, the second voltage divider branch 3022 receives U 15P The voltage is then divided to obtain the differential sampling signal U. 采16 Then, when calculating the output signal of 16 battery cells, it is shown in Formula 4 below.
[0119] U 采16 -U 16 (k1-k2)=k2(U 16P -U 15P )(Formula 4)
[0120] Based on Formula 4, a more accurate differential output signal (U) closer to that of 16 battery cells can be calculated. 16P -U 15P It should be noted that Formula 4 is derived from Formula 2 above.
[0121] Next, samples were taken from 15 battery cells (as described above). Figure 2D (Second cell in the battery), disconnect K16P and K15P, then close K15P and K1 to obtain the first deviation signal, i.e., U. 15P (k1-k2), such as Figure 4C As shown in (c), when K15P, K1, U are closed 15P The voltage is divided by the first voltage divider branch 3021 and the second voltage divider branch 3022 to obtain U. 15P (k1-k2). Then disconnect K1 and close K15P and K14P to obtain the differential sampling signal U. 采15 ,like Figure 4C As shown in (d), when K1 is disconnected and K15P and K14P are closed, the first voltage divider branch 3021 receives U. 14P And perform voltage division, the second voltage divider branch 3022 receives U 15P The voltage is then divided to obtain the differential sampling signal U. 采15Then, when calculating the output signal of 15 battery cells, it is shown in Formula 5 below.
[0122] U 采15 -U 15P (k1-k2)=k1(U 15P -U 14P )(Formula 5)
[0123] Based on Formula 5, a more accurate calculation can be made of the actual differential output signal (U) of Section 15. 15P -U 14P Similarly, Formula 5 is derived from Formula 3 above. By analogy, the voltage signals of these 16 battery cells can be collected sequentially, which will not be elaborated further here.
[0124] Please see Figure 4D , Figure 4D This is another sampling process flowchart using 16 battery cells as an example, provided as an embodiment of the present invention. The flowchart first closes the circuit as shown in the diagram. Figure 4A Using K15P and K1, the first deviation signal is obtained, which is U. 15P (k1-k2), the next step is to disconnect K1 and close K16P and K15P to obtain the differential sampling signal U. 采16 Then, when calculating the output signal of 16 battery cells, it is shown in Formula 6 below.
[0125] U 采16 -U 15P (k1-k2)=k1(U 16P -U 15P )(Formula 6)
[0126] Based on Formula 6, a more accurate calculation can be made of the actual differential output signal (U) of the 16th section. 16P -U 15P It should be noted that Formula 6 is derived from Formula 3 above.
[0127] Next, disconnect K16P and K15P, then close K15P and K14P to obtain the differential sampling signal U. 采15 Then, when calculating the output signal of 15 battery cells, based on the above formula 5, a more accurate differential output signal (U) closer to the actual output signal of 15 cells can be calculated. 15P -U 14P Similarly, the voltage signals of these 16 battery cells can be collected sequentially, which will not be described in detail here.
[0128] With the above Figure 4B Compared to the sampling process provided by 4B, the sampling process for each cell requires calibration before sampling. Figure 4DThe sampling process can be modified to calibrate once before sampling every two cells, meaning that odd and even cells share the same calibration result, which can improve the sampling speed.
[0129] The following is combined with Figure 5A An exemplary description is provided. Figure 5A This is a schematic diagram of another voltage sampling device using 16 battery cells as an example, provided as an embodiment of the present invention. It should be noted that... Figure 5A Taking the N series-connected cells in the voltage sampling device 30, which are connected to the differential circuit 301, as an example, as 16 cells. The above... Figure 3A The voltage divider element in the first voltage divider branch 3021 is two resistors connected in series, namely R1 and R2; the voltage divider element in the second voltage divider branch 3022 is two resistors connected in series, namely R3 and R4. 16p For the above Figure 2D The voltage signal of the first cell in the battery, U 15p For the voltage signal of the second cell mentioned above, U 14p This refers to the voltage signal of the third cell mentioned above, and so on, U 1p This refers to the voltage signal of the sixteenth cell mentioned above. K16P is the aforementioned... Figure 2D The first switch in the sequence, K15P is the first second switch mentioned above, K14P is the second first switch mentioned above, and so on, with K1P being the eighth second switch mentioned above. K1 is the aforementioned... Figure 3A The first calibration switch 303, K2 is as described above. Figure 3A The second calibration switch 304 in the middle.
[0130] Please see Figure 5B , Figure 5B This is another sampling process flowchart using 16 battery cells as an example, provided by an embodiment of the present invention. After performing the above... Figure 4B Before the sampling process, K1 and K2 can be closed first to obtain the calibration voltage division ratio k2 of the second voltage division branch, such as... Figure 5C As shown, Figure 5C A detailed flowchart illustrating another sampling process for the voltage signals of 16 battery cells provided in this embodiment of the invention is shown below. Figure 5C As shown in (a), the closure is as follows Figure 5A K1 and K2 in the reference power supply, and then the voltage signal U output from the reference power supply. 基准 The voltage is divided in the second voltage divider branch 3022 to obtain k2. Next, K1 is disconnected and K2 is closed to obtain the calibration voltage division ratio k1 of the first voltage divider branch, as shown below. Figure 5C As shown in (b), K1 is disconnected and K2 is closed, then the voltage signal U output by the reference power supply... 基准 The voltage is divided in the first voltage divider branch 3021 to obtain k1. Then, the above process is performed. Figure 4BThe process described herein will not be repeated here. The apparatus provided by the embodiments of the present invention can further improve the sampling accuracy of voltage signals.
[0131] The voltage sampling device of the present invention has been described in detail above. The related methods of the present invention are provided below.
[0132] Please see Figure 6 , Figure 6 This is a flowchart of a voltage sampling method provided in an embodiment of the present invention, which is applicable to the above-mentioned... Figure 2A , Figure 3A and Figure 3D The method includes any voltage sampling device and a device comprising the voltage sampling device. The method may include steps S601-S602. The voltage sampling device includes a differential circuit, a voltage divider circuit, and a first calibration switch; the voltage divider circuit includes a first voltage divider branch and a second voltage divider branch; the first output terminal of the differential circuit and the input terminal of the first voltage divider branch are connected to the first terminal of the first calibration switch; the second output terminal of the differential circuit and the input terminal of the second voltage divider branch are connected to the second terminal of the first calibration switch.
[0133] Step S601: When the first calibration switch is closed, the target signal is input to the first voltage divider branch and the second voltage divider branch connected in parallel through the differential circuit.
[0134] Specifically, the target signal is either the first differential output signal output from the first output terminal or the second differential output signal output from the second output terminal.
[0135] Step S602: Receive the target signal through the first voltage divider branch of the voltage divider circuit and divide it according to the first voltage division ratio k1 to output a first voltage signal; and receive the target signal through the second voltage divider branch and divide it according to the second voltage division ratio k2 to output a second voltage signal.
[0136] Specifically, the difference between the first voltage signal and the second voltage signal is a first deviation signal, which is used to calibrate the difference between the first voltage division ratio and the second voltage division ratio.
[0137] In one possible implementation, when the first calibration switch is in the off state, the first voltage divider branch and the second voltage divider branch are switched from a parallel state to an open circuit state; the method further includes: inputting a first differential output signal to the first voltage divider branch through the first output terminal of the differential circuit, and inputting a second differential output signal to the second voltage divider branch through the second output terminal; receiving the first differential output signal through the first voltage divider branch of the voltage divider circuit and dividing it according to k1 to output a third voltage signal, and receiving the second differential output signal through the second voltage divider branch and dividing it according to k2 to output a fourth voltage signal; the difference between the third voltage signal and the fourth voltage signal is a first sampling signal.
[0138] In one possible implementation, the voltage sampling device further includes a calibration module; the method further includes: calculating a second sampling signal through the calibration module based on the first deviation signal and the first sampling signal, the second sampling signal representing the difference between the voltage signals after the first differential output signal and the second differential output signal are divided according to the same voltage division ratio; wherein, the same voltage division ratio is either the first voltage division ratio or the second voltage division ratio; when the target signal is the first differential output signal, restoring the second sampling signal through the calibration module based on k2 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal; when the target signal is the second differential output signal, restoring the second sampling signal through the calibration module based on k1 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal.
[0139] In one possible implementation, the step of calculating the second sampled signal through the calibration module based on the first deviation signal and the first sampled signal includes: calculating the second sampled signal through the calibration module according to formula U. 采1 -U 差1 (k1-k2)=k2(U 差1 -U 差2 ), or formula U 采1 -U 差2 (k1-k2)=k1(U 差1 -U 差2 ) Calculate the second sampled signal; where, U 采1 U represents the first sampled signal; 差1 U represents the first differential output signal; 差2 This represents the second differential output signal; U 差1 (k1-k2) and U 差2 (k1-k2) represents the first deviation signal; k2(U差1 -U 差2 ) and k1(U 差1 -U 差2 ) represents the second differential sampling signal.
[0140] In one possible implementation, the differential circuit includes a first switch group and a second switch group; wherein, one end of the i-th first switch in the first switch group is connected to the (2i-1)-th cell in the N series-connected cells, and the other end is connected to the first output terminal; one end of the i-th second switch in the second switch group is connected to the 2i-th cell in the N series-connected cells, and the other end is connected to the second output terminal; N is an integer greater than 1, i = 1, 2, ..., N.
[0141] In one possible implementation, the first calibration switch is in a closed state; the step of inputting the target signal to the parallel first voltage divider branch and the second voltage divider branch through the differential circuit includes: when the i-th first switch is in a closed state and the i-th second switch is in an open state, receiving the first differential input signal output by the 2i-1th cell through the differential circuit, and inputting the first differential output signal to the parallel first voltage divider branch and the second voltage divider branch through the closed i-th first switch; or, when the i-th first switch is in an open state and the i-th second switch is in a closed state, receiving the second differential input signal output by the 2i-th cell through the differential circuit, and inputting the second differential output signal to the parallel first voltage divider branch and the second voltage divider branch through the closed i-th second switch.
[0142] In one possible implementation, the first calibration switch is in an open state; the step of inputting the first differential output signal to the first voltage divider branch through the first output terminal of the differential circuit, and inputting the second differential output signal to the second voltage divider branch through the second output terminal, includes: when both the i-th first switch and the i-th second switch are in a closed state, receiving the first differential input signal output by the 2i-1th cell through the differential circuit, and inputting the first differential output signal to the first voltage divider branch through the closed i-th first switch, and receiving the second differential input signal output by the 2i-th cell, and inputting the second differential output signal to the second voltage divider branch through the closed i-th second switch.
[0143] In one possible implementation, the voltage sampling device further includes a second calibration switch; one end of the second calibration switch is connected to the first end of the first calibration switch, and the other end is connected to a reference power supply; when both the i-th first switch and the i-th second switch are in the open state, and the first calibration switch and the second calibration switch are in the closed state; the method further includes: receiving the reference voltage signal output by the reference power supply through the second voltage divider branch of the voltage divider circuit and dividing it according to k2 to output a fifth voltage signal; the fifth voltage signal is used to calibrate k2.
[0144] In one possible implementation, when the target signal is the first differential output signal, restoring the second sampled signal based on k2 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal includes: when the target signal is the first differential output signal, restoring the second sampled signal through the calibration module and based on the calibrated k2 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal.
[0145] In one possible implementation, when the i-th first switch, the i-th second switch, and the first calibration switch are all in the off state, and the second calibration switch is in the closed state; the method further includes: receiving the reference voltage signal output by the reference power supply through the first voltage divider branch of the voltage divider circuit and dividing it according to k1 to output a sixth voltage signal; the sixth voltage signal is used to calibrate k1.
[0146] In one possible implementation, when the target signal is the second differential output signal, restoring the second sampled signal based on k1 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal includes: when the target signal is the second differential output signal, restoring the second sampled signal through the calibration module and based on the calibrated k1 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal.
[0147] In one possible implementation, the grounding terminals of both the first voltage divider branch and the second voltage divider branch are connected to a ground wire; the first voltage divider branch includes M series-connected first voltage divider resistors, and the second voltage divider branch includes M series-connected second voltage divider resistors, where M is an integer greater than 1; when the first calibration switch is closed; the step of receiving the target signal and performing voltage division through the first voltage divider branch of the voltage divider circuit to output a first voltage signal, and receiving the target signal and performing voltage division through the second voltage divider branch to output a second voltage signal, includes: dividing the target signal according to k1 through the M series-connected first voltage divider resistors of the voltage divider circuit to output the first voltage signal, and dividing the target signal according to k2 through the M series-connected second voltage divider resistors to output the second voltage signal.
[0148] In one possible implementation, when the first calibration switch is in the off state, the process of receiving the first differential output signal and dividing it to output a third voltage signal through the first voltage divider branch of the voltage divider circuit, and receiving the second differential output signal and dividing it to output a fourth voltage signal through the second voltage divider branch, includes: dividing the first differential output signal to output the third voltage signal through the M series-connected first voltage divider resistors of the voltage divider circuit according to k1, and dividing the second differential output signal to output the fourth voltage signal through the M series-connected second voltage divider resistors according to k2.
[0149] In one possible implementation, the voltage sampling device further includes an analog-to-digital converter; the method further includes: receiving the output signal of the voltage divider circuit through the analog-to-digital converter, and converting the output signal from an analog signal to a digital signal; the output signal includes the first voltage signal and the second voltage signal, or the third voltage signal and the fourth voltage signal, or the fifth voltage signal, or the sixth voltage signal.
[0150] It should be noted that the implementation of each step in the voltage sampling method described in the embodiments of the present invention is completed in the voltage sampling device in the above embodiments, and will not be repeated here.
[0151] This application provides a terminal device that has the function of implementing the method in any of the voltage sampling method embodiments described above. This function can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above-described function.
[0152] This application provides a terminal device including a processor configured to support the terminal device in performing corresponding functions in the voltage sampling method described above. The terminal device may also include a memory coupled to the processor, which stores necessary program instructions and data for the terminal device. The terminal device may also include a communication interface for communicating with other devices or communication networks.
[0153] This invention provides a computer program that includes instructions that, when executed by a computer, enable the computer to perform the process in any of the voltage sampling methods described above.
[0154] This application provides a chip system including a processor for supporting application servers or terminal devices in implementing the functions involved in the voltage sampling device described above, such as generating or processing the information involved in the methods described above. In one possible design, the chip system further includes a memory for storing program instructions and data necessary for the data transmission device. This chip system can be composed of chips or may include chips and other discrete devices.
[0155] This application provides a semiconductor chip, characterized in that the semiconductor chip includes the voltage sampling device described in any one of the above-mentioned claims.
[0156] This application provides an electronic device, characterized in that the electronic device includes the semiconductor chip described above.
[0157] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0158] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.
[0159] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the connections or direct or communication connections shown or discussed may be through some interfaces; indirect connections or communication connections between devices or units may be electrical or other forms. For example, different modules in the apparatus may be indirectly connected through protective elements, or they may be directly connected to each other.
[0160] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0161] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0162] If the integrated units described above are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which can be a personal computer, server, or network device, specifically a processor in the computer device) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium may include various media capable of storing program code, such as a USB flash drive, portable hard drive, magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM).
[0163] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.
Claims
1. A voltage sampling device, characterized in that, include: The system comprises a differential circuit, a voltage divider circuit, and a first calibration switch; the voltage divider circuit includes a first voltage divider branch and a second voltage divider branch; the first output terminal of the differential circuit and the input terminal of the first voltage divider branch are connected to the first terminal of the first calibration switch; the second output terminal of the differential circuit and the input terminal of the second voltage divider branch are connected to the second terminal of the first calibration switch. When the first calibration switch is closed, the differential circuit is used to input a target signal to the first voltage divider branch and the second voltage divider branch connected in parallel; the target signal is either the first differential output signal output from the first output terminal or the second differential output signal output from the second output terminal. The voltage divider circuit is used to receive the target signal through the first voltage divider branch and divide it according to a first voltage divider ratio k1 to output a first voltage signal, and to receive the target signal through the second voltage divider branch and divide it according to a second voltage divider ratio k2 to output a second voltage signal; wherein, the difference between the first voltage signal and the second voltage signal is a first deviation signal, and the first deviation signal is used to calibrate the difference between the first voltage divider ratio and the second voltage divider ratio; When the first calibration switch is in the off state, the parallel state of the first voltage divider branch and the second voltage divider branch is changed to the open circuit state. The differential circuit is also used to input the first differential output signal to the first voltage divider branch through the first output terminal, and to input the second differential output signal to the second voltage divider branch through the second output terminal; The voltage divider circuit is further configured to receive the first differential output signal through the first voltage divider branch and divide it according to k1 to output a third voltage signal, and to receive the second differential output signal through the second voltage divider branch and divide it according to k2 to output a fourth voltage signal; the difference between the third voltage signal and the fourth voltage signal is the first sampling signal; The voltage sampling device further includes a calibration module; the calibration module is used for: A second sampling signal is calculated based on the first deviation signal and the first sampling signal. The second sampling signal represents the difference between the voltage signals after the first differential output signal and the second differential output signal are divided according to the same voltage division ratio. The same voltage division ratio is either the first voltage division ratio or the second voltage division ratio. When the target signal is the first differential output signal, the second sampled signal is restored based on k2 to serve as the sampled value of the difference between the first differential output signal and the second differential output signal; When the target signal is the second differential output signal, the second sampled signal is restored based on k1 to serve as the sampled value of the difference between the first differential output signal and the second differential output signal.
2. The apparatus as claimed in claim 1, characterized in that, The calibration module is specifically used for: According to formula U 采2 =U 采1 - U 差1 (k1-k2) = k2(U) 差1 - U 差2 ), or formula U 采2 =U 采1 - U 差2 (k1-k2) = k1(U) 差1 - U 差2 Calculate the second sampled signal; Among them, U 采1 U represents the first sampled signal; 差1 U represents the first differential output signal; 差2 This represents the second differential output signal; U 差1 (k1-k2) and U 差2 (k1-k2) represents the first deviation signal; k2(U 差1 - U 差2 ) and k1(U 差1 - U 差2 ) represents the second differential sampling signal.
3. The apparatus as described in claim 1 or 2, characterized in that, The differential circuit includes a first switch group and a second switch group; wherein, one end of the i-th first switch in the first switch group is connected to the (2i-1)-th cell in the N series-connected cells, and the other end is connected to the first output terminal; one end of the i-th second switch in the second switch group is connected to the 2i-th cell in the N series-connected cells, and the other end is connected to the second output terminal; N is an integer greater than 1, i = 1, 2, ..., N.
4. The apparatus as described in claim 3, characterized in that, The first calibration switch is in the closed state; When the i-th first switch is closed and the i-th second switch is open, the differential circuit is specifically used to receive the first differential input signal output by the 2i-1 cell, and input the first differential output signal to the first voltage divider branch and the second voltage divider branch connected in parallel via the closed i-th first switch; Alternatively, when the i-th first switch is in the open state and the i-th second switch is in the closed state, the differential circuit is specifically used to receive the second differential input signal output by the 2i-th cell, and input the second differential output signal to the parallel first voltage divider branch and the second voltage divider branch via the closed i-th second switch.
5. The apparatus as described in claim 3, characterized in that, The first calibration switch is in the off state; When both the i-th first switch and the i-th second switch are closed, the differential circuit is specifically used to receive the first differential input signal output by the (2i-1)-th cell and input the first differential output signal to the first voltage divider branch via the closed i-th first switch, and to receive the second differential input signal output by the 2i-th cell and input the second differential output signal to the second voltage divider branch via the closed i-th second switch.
6. The apparatus according to any one of claims 3-5, characterized in that, The voltage sampling device further includes a second calibration switch; one end of the second calibration switch is connected to the first end of the first calibration switch, and the other end is connected to a reference power supply; when both the i-th first switch and the i-th second switch are in the open state, and both the first calibration switch and the second calibration switch are in the closed state, the voltage divider circuit is further used for: The reference voltage signal output by the reference power supply is received through the second voltage divider branch and divided according to k2 to output a fifth voltage signal; the fifth voltage signal is used to calibrate k2.
7. The apparatus as claimed in claim 6, characterized in that, The calibration module is specifically used for: When the target signal is the first differential output signal, the second sampled signal is restored based on the calibrated k2 to serve as the sampled value of the difference between the first differential output signal and the second differential output signal.
8. The apparatus as claimed in claim 6 or 7, characterized in that, When the i-th first switch, the i-th second switch, and the first calibration switch are all in the open state, and the second calibration switch is in the closed state, the voltage divider circuit is further used for: The reference voltage signal output by the reference power supply is received through the first voltage divider branch and divided according to k1 to output a sixth voltage signal; the sixth voltage signal is used to calibrate k1.
9. The apparatus as claimed in claim 8, characterized in that, The calibration module is specifically used for: When the target signal is the second differential output signal, the second sampled signal is restored based on the calibrated k1 to serve as the sampled value of the difference between the first differential output signal and the second differential output signal.
10. The apparatus according to any one of claims 3-9, characterized in that, The grounding terminals of both the first and second voltage divider branches are connected to the ground wire; the first voltage divider branch includes M series-connected first voltage divider resistors, and the second voltage divider branch includes M series-connected second voltage divider resistors, where M is an integer greater than 1; when the first calibration switch is closed, the voltage divider circuit is specifically used for: The target signal is divided by the M series-connected first voltage divider resistors according to k1 to output the first voltage signal, and the target signal is divided by the M series-connected second voltage divider resistors according to k2 to output the second voltage signal.
11. The apparatus as claimed in claim 10, characterized in that, When the first calibration switch is in the off state, the voltage divider circuit is specifically used for: The first differential output signal is divided by the M series-connected first voltage divider resistors according to k1 to output the third voltage signal, and the second differential output signal is divided by the M series-connected second voltage divider resistors according to k2 to output the fourth voltage signal.
12. The apparatus according to any one of claims 1-11, characterized in that, The voltage sampling device further includes an analog-to-digital converter; the analog-to-digital converter is used for: The system receives the output signal from the voltage divider circuit and converts the output signal from an analog signal to a digital signal; the output signal includes the first voltage signal and the second voltage signal, or the third voltage signal and the fourth voltage signal, or the fifth voltage signal, or the sixth voltage signal.
13. A voltage sampling method, characterized in that, This is applied to a voltage sampling device, which includes a differential circuit, a voltage divider circuit, and a first calibration switch; the voltage divider circuit includes a first voltage divider branch and a second voltage divider branch; the first output terminal of the differential circuit and the input terminal of the first voltage divider branch are connected to the first terminal of the first calibration switch. The second output terminal of the differential circuit and the input terminal of the second voltage divider branch are connected to the second terminal of the first calibration switch; the method includes: When the first calibration switch is closed, a target signal is input to the first voltage divider branch and the second voltage divider branch connected in parallel through the differential circuit; the target signal is either the first differential output signal output from the first output terminal or the second differential output signal output from the second output terminal. The voltage divider circuit receives the target signal through the first voltage divider branch and divides it according to the first voltage divider ratio k1 to output a first voltage signal, and receives the target signal through the second voltage divider branch and divides it according to the second voltage divider ratio k2 to output a second voltage signal; wherein, the difference between the first voltage signal and the second voltage signal is a first deviation signal, and the first deviation signal is used to calibrate the difference between the first voltage divider ratio and the second voltage divider ratio; When the first calibration switch is in the off state, the parallel connection of the first voltage divider branch and the second voltage divider branch is changed to an open circuit state; the method further includes: The first differential output signal is input to the first voltage divider branch through the first output terminal of the differential circuit, and the second differential output signal is input to the second voltage divider branch through the second output terminal. The voltage divider circuit receives the first differential output signal through the first voltage divider branch and divides it according to k1 to output a third voltage signal, and receives the second differential output signal through the second voltage divider branch and divides it according to k2 to output a fourth voltage signal; the difference between the third voltage signal and the fourth voltage signal is the first sampling signal; The voltage sampling device further includes a calibration module; the method further includes: The calibration module calculates a second sampling signal based on the first deviation signal and the first sampling signal. The second sampling signal represents the difference between the voltage signal obtained by dividing the first differential output signal and the second differential output signal according to the same voltage division ratio. The same voltage division ratio is either the first voltage division ratio or the second voltage division ratio. When the target signal is the first differential output signal, the second sampled signal is restored by the calibration module based on k2 to serve as the sampled value of the difference between the first differential output signal and the second differential output signal; When the target signal is the second differential output signal, the second sampled signal is restored by the calibration module based on k1 to serve as the sampled value of the difference between the first differential output signal and the second differential output signal.
14. The method as described in claim 13, characterized in that, The step of calculating the second sampled signal through the calibration module based on the first deviation signal and the first sampled signal includes: According to formula U, the calibration module is used... 采2 =U 采1 - U 差1 (k1-k2) = k2(U) 差1 - U 差2 ), or formula U 采2 =U 采1 -U 差2 (k1-k2) = k1(U) 差1 - U 差2 ) Calculate the second sampled signal; where, U 采1 U represents the first sampled signal; 差1 U represents the first differential output signal; 差2 This represents the second differential output signal; U 差1 (k1-k2) and U 差2 (k1-k2) represents the first deviation signal; k2(U 差1 - U 差2 ) and k1(U 差1 - U 差2 ) represents the second differential sampling signal.
15. The method as described in claim 13 or 14, characterized in that, The differential circuit includes a first switch group and a second switch group; wherein, one end of the i-th first switch in the first switch group is connected to the (2i-1)-th cell in the N series-connected cells, and the other end is connected to the first output terminal; one end of the i-th second switch in the second switch group is connected to the 2i-th cell in the N series-connected cells, and the other end is connected to the second output terminal; N is an integer greater than 1, i = 1, 2, ..., N.
16. The method as described in claim 15, characterized in that, The first calibration switch is in the closed state; The step of inputting the target signal to the first voltage divider branch and the second voltage divider branch connected in parallel through the differential circuit includes: When the i-th first switch is closed and the i-th second switch is open, the first differential input signal output by the 2i-1 cell is received through the differential circuit, and the first differential output signal is input to the first voltage divider branch and the second voltage divider branch connected in parallel via the closed i-th first switch; Alternatively, when the i-th first switch is in the open state and the i-th second switch is in the closed state, the second differential input signal output by the 2i-th cell is received through the differential circuit, and the second differential output signal is input to the parallel first voltage divider branch and the second voltage divider branch via the closed i-th second switch.
17. The method as described in claim 15, characterized in that, The first calibration switch is in the off state; the step of inputting the first differential output signal to the first voltage divider branch through the first output terminal of the differential circuit, and inputting the second differential output signal to the second voltage divider branch through the second output terminal, includes: When both the i-th first switch and the i-th second switch are closed, the differential circuit receives the first differential input signal output from the 2i-1th cell and inputs the first differential output signal to the first voltage divider branch via the closed i-th first switch. It also receives the second differential input signal output from the 2ith cell and inputs the second differential output signal to the second voltage divider branch via the closed i-th second switch.
18. The method according to any one of claims 15-17, characterized in that, The voltage sampling device further includes a second calibration switch; one end of the second calibration switch is connected to the first end of the first calibration switch, and the other end is connected to a reference power supply; when the i-th first switch and the i-th second switch are both in the open state, and the first calibration switch and the second calibration switch are in the closed state; The method further includes: The reference voltage signal output by the reference power supply is received through the second voltage divider branch of the voltage divider circuit and divided according to k2 to output a fifth voltage signal; the fifth voltage signal is used to calibrate k2.
19. The method as described in claim 18, characterized in that, When the target signal is the first differential output signal, restoring the second sampled signal based on k2 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal includes: When the target signal is the first differential output signal, the second sampled signal is restored by the calibration module based on the calibrated k2 to serve as the sampled value of the difference between the first differential output signal and the second differential output signal.
20. The method as described in claim 18 or 19, characterized in that, When the i-th first switch, the i-th second switch, and the first calibration switch are all in the off state, and the second calibration switch is in the closed state; The method further includes: The voltage divider circuit receives the reference voltage signal output from the reference power supply through the first voltage divider branch and divides it according to k1 to output a sixth voltage signal; the sixth voltage signal is used to calibrate k1.
21. The method as described in claim 20, characterized in that, When the target signal is the second differential output signal, restoring the second sampled signal based on k1 to obtain a sampled value of the difference between the first differential output signal and the second differential output signal includes: When the target signal is the second differential output signal, the second sampled signal is restored by the calibration module based on the calibrated k1 to serve as the sampled value of the difference between the first differential output signal and the second differential output signal.
22. The method according to any one of claims 15-21, characterized in that, The grounding terminals of both the first voltage divider branch and the second voltage divider branch are connected to ground; the first voltage divider branch includes M series-connected first voltage divider resistors, and the second voltage divider branch includes M series-connected second voltage divider resistors, where M is an integer greater than 1; when the first calibration switch is closed; the process of receiving the target signal and performing voltage division through the first voltage divider branch of the voltage divider circuit to output a first voltage signal, and receiving the target signal and performing voltage division through the second voltage divider branch to output a second voltage signal, includes: The target signal is divided by the M series-connected first voltage divider resistors of the voltage divider circuit according to k1 to output the first voltage signal, and the target signal is divided by the M series-connected second voltage divider resistors according to k2 to output the second voltage signal.
23. The method as described in claim 22, characterized in that, When the first calibration switch is in the off state, the process of receiving the first differential output signal through the first voltage divider branch of the voltage divider circuit and dividing it to output a third voltage signal, and receiving the second differential output signal through the second voltage divider branch and dividing it to output a fourth voltage signal, includes: The first differential output signal is divided by the M series-connected first voltage divider resistors according to k1 to output the third voltage signal, and the second differential output signal is divided by the M series-connected second voltage divider resistors according to k2 to output the fourth voltage signal.
24. The method according to any one of claims 13-23, characterized in that, The voltage sampling device further includes an analog-to-digital converter; the method further includes: The analog-to-digital converter receives the output signal of the voltage divider circuit and converts the output signal from an analog signal to a digital signal; the output signal includes the first voltage signal and the second voltage signal, or the third voltage signal and the fourth voltage signal, or the fifth voltage signal, or the sixth voltage signal.
25. A semiconductor chip, characterized in that, The semiconductor chip includes a voltage sampling device as described in any one of claims 1-12.
26. An electronic device, characterized in that, The electronic device includes the semiconductor chip as described in claim 25.
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