A silicon resonant beam accelerometer performance pre-evaluation on-chip test system

Abstract

The application discloses a kind of silicon resonant beam accelerometer performance pre-evaluation on-chip test system, comprising: wafer test probe card circuit, the direct current bias electrode of wafer level MEMS silicon resonant beam accelerometer, drive electrode, detection electrode, for switching the direct current bias voltage of wafer level MEMS silicon resonant beam accelerometer and control drive circuit closed loop, open loop state to realize the control of resonator vibration displacement, and read out the detection voltage signal of the vibration displacement of resonator;Data acquisition card, the output port of wafer test probe card circuit is connected, for the detection voltage signal of wafer level MEMS silicon resonant beam accelerometer is converted into digital signal and is passed to host computer;Host computer is used to solve detection voltage signal, according to the resonant frequency, amplitude collected, and the stiffness ratio, topography coefficient and electrostatic negative stiffness are obtained by calculation from quality factor value, natural frequency. Improve test efficiency, expand test content.

Description

Technical Field

[0001] This invention belongs to the field of MEMS silicon resonant beam accelerometer testing, and in particular, it is an on-chip test system for pre-evaluating the performance of MEMS silicon resonant beam accelerometers. Background Technology

[0002] MEMS (Micro-Electro-Mechanical-Systems) is an integrated miniature device system composed of components such as micro-sensors, micro-actuators, signal processing and control circuits, communication interfaces, and power supplies.

[0003] MEMS silicon resonant beam accelerometers, as core components of modern inertial navigation and guidance systems, offer advantages over traditional accelerometers, including smaller size, lighter weight, lower power consumption, and mass production capabilities. Furthermore, their potential accuracy can reach 0.1 μg, making them promising for both civilian and military applications. After nearly 20 years of development, MEMS silicon resonant beam accelerometers have achieved zero-bias stability of <10 μg and scaling factor stability of <10 ppm at room temperature.

[0004] With the improvement of MEMS process technology and the development of vacuum packaging technology in recent years, MEMS devices can achieve higher dimensional accuracy and mechanical sensitivity. The performance indicators of MEMS silicon accelerometers are gradually approaching the accuracy requirements of navigation-grade devices. After the structural layout is completed, accelerometer MEMS wafers are fabricated using SOI process and wafer-level vacuum packaging technology. After wafer fabrication, the MEMS wafers are diced to release individual accelerometer chips. The accelerometer chips are then mounted into ceramic housings using device-level mounting, and electrical connections are completed by gold wire bonding. Finally, parallel seam welding is used to form a seal, resulting in a silicon resonant beam accelerometer device.

[0005] In the process of transforming wafers into devices, to prevent faulty or low-performance MEMS from entering the subsequent packaging stage, a simple wafer-level fully automated measurement system exists. This system can measure the frequency difference between two resonators, using the magnitude of the frequency difference to reflect the resonator's performance. The advantage of this method is its speed and convenience, but the disadvantage is that the frequency difference alone cannot fully reflect the performance of the internal resonators. Traditional screening methods involve testing, recording, and analyzing data after subsequent module assembly. This process is time-consuming and introduces packaging errors and PCB-related influences. It is difficult to effectively improve the processing capabilities of the front-end manufacturing line, hindering process advancement and failing to meet the supply requirements of large-volume products. Therefore, the ability to evaluate key dynamic performance parameters of accelerometers at the wafer level has become an urgent need in the accelerometer manufacturing process. Summary of the Invention

[0006] The purpose of this invention is to provide an on-chip testing system for pre-evaluating the performance of silicon resonant beam accelerometers. This system uses electrical methods to automate, rapidly, and batch test key parameters of wafer-level MEMS silicon resonant beam accelerometers, such as natural frequency, stiffness ratio K3 / K1, quality factor, shape coefficient, and electrostatic negative stiffness, thereby enabling pre-evaluation of the performance of wafer-level MEMS silicon resonant beam accelerometers.

[0007] The technical solution to achieve the purpose of this invention is as follows:

[0008] An on-chip test system for pre-evaluating the performance of a silicon resonant beam accelerometer includes:

[0009] The wafer test probe circuit connects to the DC bias electrode, drive electrode, and detection electrode of the wafer-level MEMS silicon resonant beam accelerometer. It is used to switch the DC bias voltage of the wafer-level MEMS silicon resonant beam accelerometer and control the closed-loop and open-loop states of the drive circuit to control the vibration displacement of the resonator, and read out the detection voltage signal characterizing the vibration displacement of the resonator.

[0010] The data acquisition card connects to the output port of the wafer test probe circuit and is used to convert the detection voltage signal of the wafer-level MEMS silicon resonant beam accelerometer into a digital signal and transmit it to the host computer.

[0011] The host computer is used to process the detected voltage signal, based on the acquired resonant frequency ω and amplitude V. amp The quality factor Q and natural frequency ω were calculated. n Stiffness ratio K3 / K1, shape coefficient k sp and electrostatic negative stiffness k e .

[0012] The significant advantages of this invention compared to existing technologies are:

[0013] (1) Compared with the traditional method of testing the entire MEMS silicon resonant beam accelerometer, the on-chip closed-loop test system of the present invention for testing the natural frequency, stiffness ratio K3 / K1, quality factor, morphology coefficient and electrostatic negative stiffness of MEMS silicon resonant beam accelerometer is designed for wafer-level MEMS accelerometers. It can eliminate the influence of post-processing such as packaging and dicing, and the test results are more accurate.

[0014] (2) Compared with the previous wafer test probe circuit, the on-chip test system for pre-evaluation of MEMS silicon resonant beam accelerometer performance of the present invention has been further improved on the basis of the original circuit. The main improvements are reflected in the automatic switching of DC bias voltage through FPGA programming, the automatic implementation of the Ring-Down process, and the series connection of the reference voltage VREF with the DC bias voltage. It can not only test the frequency and amplitude of wafer-level MEMS silicon resonant beam accelerometer, but also calculate the natural frequency, stiffness ratio K3 / K1, electrostatic negative stiffness, and morphology coefficient of the resonant beam through the automatically running program, providing a more sufficient basis for further judging the performance level of the accelerometer.

[0015] (3) Compared with the traditional data processing process, the present invention simplifies the data processing flow, improves the algorithm processing capability, and makes the data processing process more convenient. The entire process only requires placing the collected data in a folder, specifying the address of the folder in the program, and running the program to complete the entire data calculation process. The calculation results will be integrated into a table, and the key parameters after calculation can be obtained by importing the data into the table. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the accelerometer resonator structure.

[0017] Figure 2 This is a block diagram of the on-chip closed-loop testing system for the MEMS silicon resonant beam accelerometer of the present invention, which measures the natural frequency, stiffness ratio K3 / K1, quality factor, electrostatic negative stiffness, and morphology coefficient.

[0018] Figure 3 This is a schematic diagram of the disc test probe function of the present invention.

[0019] Figure 4 This is a flowchart illustrating the data processing algorithm.

[0020] Figure 5 This is a graph showing the attenuation of the voltage signal.

[0021] Figure 6 This is a schematic diagram of a first-order linear fit between the square of the resonant frequency and the square of the detection voltage amplitude. Detailed Implementation

[0022] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0023] Combination Figure 1This section introduces the basic working principle of resonators. The MEMS silicon resonant beam accelerometer contains two resonators, resonator 1 and resonator 5. The two resonators are symmetrical in structure and have identical structural parameters. Resonator 1 mainly consists of a resonant beam 3 and a comb structure 4. The comb structure 4 is further divided into movable comb teeth 6, detection comb teeth 7, and driving comb teeth 8. Movable comb teeth 6 are connected to the resonant beam. Detection comb teeth 7 and driving comb teeth 8 are connected to the accelerometer's self-excited oscillation closed-loop drive circuit. Through electrostatic driving effect, a driving voltage is applied to the driving comb teeth 8, generating electrostatic force that causes the resonant beam 3 to resonate at its natural frequency. Simultaneously, detection comb teeth 7 convert the lateral movement of movable comb teeth 6 into a detection current output through a parallel plate capacitor. This detection current is then converted into a driving voltage through the closed-loop drive circuit, completing the closed-loop drive. When mass block 2 senses the Y-direction acceleration input, the resonant frequencies of resonators 1 and 5 change. The interface circuit converts the displacement of movable comb teeth 6 into a voltage change. A DC bias voltage is applied to the resonant beam 3 through connecting block 9.

[0024] Combination Figure 2 A silicon resonant beam accelerometer performance pre-evaluation on-chip test system includes a circular test probe circuit, a data acquisition card, and a host computer;

[0025] The wafer-level MEMS silicon resonant beam accelerometer's DC bias electrode, drive electrode, and detection electrode are connected via probes. An FPGA control module switches the DC bias voltage of the accelerometer and controls the closed-loop and open-loop states of the self-excited oscillation closed-loop drive circuit, outputting a voltage signal VDS. The data acquisition card connects to the output port of the wafer-level MEMS silicon resonant beam accelerometer, transmitting the output signal to the host computer (sampling frequency satisfies Naquist's law), and acquiring the output voltage signal VDS under the control of the host computer. The host computer acquires the data acquisition card's output and saves it as a data file, then processes the saved data to obtain the resonant frequency ω and amplitude V. amp The quality factor Q and natural frequency ω were calculated. n K3 / K1 value, morphology coefficient k sp and electrostatic negative stiffness k e .

[0026] Figure 3This is a functional diagram of the wafer test probe circuit. As shown in the figure, the wafer test probe circuit includes two sets of self-excited oscillation closed-loop drive circuits, as well as a DC-DC module and an FPGA control module. The first set of self-excited oscillation closed-loop drive circuits includes a first C / V interface circuit, a first phase shift circuit, a first automatic gain control circuit, a first multiplier circuit, and a first analog switch circuit; the second set of self-excited oscillation closed-loop drive circuits includes a second C / V interface circuit, a second phase shift circuit, a second automatic gain control circuit, a second multiplier circuit, and a second analog switch circuit.

[0027] Taking the first self-excited oscillation closed-loop drive circuit as an example, the other one works similarly: after the circular probe test circuit is powered on, the FPGA control module outputs five signals, namely FPGA_OUT_1, FPGA_OUT_2, FPGA_OUT_3, FPGA_OUT_4, and FPGA_OUT_5; among them, FPGA_OUT_1, FPGA_OUT_2, and FPGA_OUT_3 control the DC-DC module to output the "high-level" DC bias voltage V. DC The input terminals of the first C / V interface circuit are connected to the driving electrode and the detection electrode via probes, respectively, to convert the detection current signal Ids1 into a detection voltage signal VDS1. A phase-shifting circuit shifts the detection voltage signal VDS1 by 90° to satisfy the closed-loop oscillation condition. The detection voltage signal VDS1 passes through the first automatic gain control (AGC) circuit module, which includes a first full-wave rectifier circuit, a first low-pass filter circuit, and a first PI control circuit. The first full-wave rectifier circuit converts the negative half-cycle signal of the detection voltage signal into a positive half-cycle signal. After passing through the first low-pass filter circuit, the amplitude of the detection voltage signal output by the first full-wave rectifier circuit is extracted. The first PI control circuit compares the amplitude of the detection voltage signal with a reference voltage VREF, where the reference voltage VREF is a DC bias voltage V generated by the DC-DC module. DCThe voltage is divided, and the difference between the comparisons is integrated to output the gain control level PI1. The first multiplier circuit multiplies the gain control level PI1 with the phase-shifted detection voltage signal to obtain the drive signal VD1. The drive signal VD1 is connected to the input of the first analog switch circuit. The FPGA_OUT_4 input is set to low level, and the switch is turned to the S2 terminal (S2 is the ON terminal, S1 is the ground terminal), so that the multiplier output is connected to the disc through the S2 terminal, the circuit is closed loop, and the resonator 1 reaches a stable amplitude oscillation state after a few seconds. Then, the FPGA_OUT_4 input is set to high level, and the switch is turned to the S1 terminal, so that the drive signal VD1 output by the multiplier is disconnected from the disc, the circuit is open loop, and the resonator 1 undergoes free decay. At this time, the output voltage characterizing the displacement of the resonator is collected during the free decay process. After the output voltage decays for a period of time, FPGA_OUT_1, FPGA_OUT_2, and FPGA_OUT_3 control the DC-DC module to output the "medium range" DC bias voltage V. DC The resonator repeats the above process again. After the DC bias voltages for "high," "medium," and "low" settings have all been applied, the next disc of the accelerometer is tested, and the entire process is repeated. The analog switch circuit uses programmable analog switching devices to control the open and closed loop states. The low-level voltage range is 8V to 10V, the medium-level voltage is twice that of the low-level voltage, and the high-level voltage is three times that of the low-level voltage.

[0028] The processing principle of the second set of self-excited oscillation closed-loop drive circuits is the same as that of the first set of self-excited oscillation closed-loop drive circuits. The difference is that the first set of self-excited oscillation closed-loop drive circuits corresponds to... Figure 1 The middle resonator 1, the second set of self-excited oscillation closed-loop drive circuit corresponds to Figure 1 The resonator 5 is used to obtain the driving signal VD1 and detection voltage signal VDS1 of the resonator 1, and the driving signal VD2 and detection voltage signal VDS2 of the resonator 5.

[0029] The principle of amplitude-steady oscillation is as follows: When the detected voltage signal is less than the reference voltage VREF, the drive signal output by the automatic gain control circuit increases, the vibration amplitude of the drive comb increases, which in turn increases the detected current signal, thereby increasing the amplitude of the detected voltage signal; when the detected voltage signal is greater than the reference voltage VREF, the drive signal output by the automatic gain control circuit decreases, the vibration amplitude of the drive comb decreases, the detected current signal decreases, thereby decreasing the amplitude of the detected voltage signal, ultimately achieving a state of amplitude-steady oscillation.

[0030] The principle of the host computer's calculation of the collected data is as follows: When the closed-loop drive circuit is disconnected, the amplitude of the resonator begins to decay due to the damping effect, and the amplitude of the detected voltage signal also decays freely. As shown in Figure (5), the envelope function F(t) of the decay curve of the detected voltage signal is:

[0031]

[0032] Wherein, the accelerometer damping ratio ζ = 1 / 2Q, Q is the quality factor, and ω n The natural frequency is t, and time is t.

[0033] Taking the natural logarithm of both sides of F(t), we can obtain

[0034]

[0035] Let the slope k = -ω n / 2Q, from which we can obtain the expression for the quality factor as:

[0036]

[0037] The dynamic model of the resonator considering a third-order nonlinearity is shown below:

[0038]

[0039] Where c is the second-order system damping coefficient; m is the mass of the resonator; x is the vibration displacement of the resonator; K1 is the first stiffness coefficient of the resonator; K2 is the second stiffness coefficient of the resonator; K3 is the third stiffness coefficient of the resonator; and F is the electrostatic driving force.

[0040] In the formula, ω n Let be the natural frequency of the accelerometer. This MEMS resonator is designed with a symmetrical structure, and the second-order nonlinear stiffness K2 is very small. Neglecting the second-order nonlinear stiffness K2, we can obtain:

[0041]

[0042] Let x = |x|sin(ωt), Substituting them in, we get:

[0043]

[0044] In the formula, displacement x = K VX ·|V amp |, where K VX This refers to the voltage and displacement gain coefficient; V amp This refers to the voltage amplitude. Equation (6) can be expressed as:

[0045]

[0046] In actual testing, the raw data that can be obtained are the voltage amplitude and frequency output by the resonator interface circuit. Therefore, according to formula (7), by squaring the frequency ω... 2 With the square of voltage amplitude V amp 2 A first-order linear fit was performed to obtain its slope value and natural frequency ω. n As shown in Figure (6), the resonant frequency when the displacement is 0 is obtained. In voltage displacement gain coefficient K VX Given the slope value k obtained from the fitting, the stiffness ratio K3 / K1 of the third-order nonlinear stiffness K3 and the first-order nonlinear stiffness K1 can be calculated.

[0047] To separate the K3 coefficient from the electrostatic negative stiffness, it is necessary to maintain a constant mechanical oscillation amplitude while changing the DC bias. The control principle of the closed-loop oscillation circuit can be expressed as V... DC ΔCA amp A recf =V REF K, where V DC The DC bias voltage is given, ΔC is the change in capacitance, and A is the capacitance value. amp For the C / V interface circuit gain, A recf For the gain of the full-wave rectifier circuit, V REF The reference voltage is the amplitude, and K is the ratio of the reference voltage to the rectified voltage.

[0048] The quantity ΔC characterizing the amplitude of mechanical vibration can be expressed as:

[0049]

[0050] Since all other parameters are fixed values, the key to maintaining a constant mechanical amplitude is the reference voltage V. REF With DC bias voltage V DC Proportional variation. If the bias voltage and amplitude control reference voltage maintain a fixed proportional relationship, for example, if the bias voltage increases by a factor of 2, the amplitude control reference voltage also increases by a factor of 2, then the mechanical amplitude remains unchanged. Using this method, combined with Ring-Down data under different bias voltages, the natural resonant frequency ω0 with zero displacement is obtained after fitting. The electrostatic negative stiffness k can be calculated using different bias voltages and their corresponding resonant frequencies ω0. e :

[0051]

[0052] Where ε is the vacuum permittivity, and A0 is... Figure 1The overlapping area of ​​the capacitors between the movable comb tooth 6 and the detection comb tooth 7, where x0 is the capacitor spacing between the movable comb tooth 6 and the detection comb tooth 7, and V DC The resonator's output frequency f is the DC bias voltage. F It can be represented as:

[0053]

[0054] Where, ω F K is the output angular frequency. eff M is the equivalent stiffness of the resonant beam. eff Let be the equivalent mass of the resonator, where:

[0055]

[0056] Where k1 is the mechanical stiffness of the resonant beam, and k1 / M is the value under different DC bias voltages while keeping the mechanical amplitude constant. eff The values ​​are equal, but the values ​​of electrostatic negative stiffness are not equal. Therefore, from equations (10) and (11), we can obtain:

[0057]

[0058] Where, k e1 k e2 The electrostatic negative stiffness is given by f1 and f2 under different bias voltages, and the output frequencies are given by f1 and f2 under different bias voltages. The results can be obtained by combining equations (9) and (12):

[0059]

[0060] Among them, V DC1 V DC2 Define the shape coefficient k for different bias voltages. sp :

[0061]

[0062] Then k sp It is only related to the processing technology; once the sensitive structure has been etched, the value of the morphology coefficient has been determined.

[0063] Figure 4 This is a flowchart illustrating the data processing algorithm. As shown in the figure, the signals acquired by the host computer are frequency ω and voltage amplitude V. amp In the processing program, after adjusting the frequency ω and voltage amplitude V... amp After squaring the equation and performing a first-order linear fit, the natural frequency ω can be obtained from equation (7). n The stiffness ratio K3 / K1; the electrostatic negative stiffness k can be obtained from equation (9). e The value of morphology coefficient k can be obtained from equation (13). sp.

[0064] In summary, this invention employs electrical measurements to perform Ring-Down tests on wafer-level MEMS accelerometers under different bias voltages. This facilitates the separation of structural errors caused by MEMS manufacturing processes, yields key indicators characterizing the resonator's own parameters, and provides a basis for the pre-evaluation of the performance of wafer-level MEMS accelerometers. Furthermore, it provides a fully automated testing scheme for measuring the accelerometer's quality factor, natural frequency, stiffness ratio K3 / K1, shape coefficient, and electrostatic negative stiffness, simplifying testing steps, improving testing efficiency, and expanding testing content.

Claims

1. An on-chip test system for pre-evaluating the performance of a silicon resonant beam accelerometer, characterized in that, include: The wafer test probe circuit connects to the DC bias electrode, drive electrode, and detection electrode of the wafer-level MEMS silicon resonant beam accelerometer. It is used to switch the DC bias voltage of the wafer-level MEMS silicon resonant beam accelerometer and control the closed-loop and open-loop states of the drive circuit to control the vibration displacement of the resonator, and read out the detection voltage signal characterizing the vibration displacement of the resonator. The data acquisition card connects to the output port of the wafer test probe circuit and is used to convert the detection voltage signal of the wafer-level MEMS silicon resonant beam accelerometer into a digital signal and transmit it to the host computer. The host computer is used to process the detected voltage signal and calculate based on the acquired resonant frequency. ,amplitude The quality factor Q and natural frequency were calculated. stiffness ratio Morphology coefficient and electrostatic negative stiffness Specifically: Quality factor Q value: in It is the natural frequency; The slope is obtained by using the envelope function of the attenuation curve of the detected voltage signal. The results were obtained through fitting. Natural frequency It is obtained by performing a first-order linear fit between the square of the resonant frequency and the square of the voltage amplitude; stiffness ratio We obtain it from the following formula: in Resonant frequency, The first stiffness coefficient of the resonator is... The third stiffness coefficient of the resonator is... This represents the vibration displacement of the resonator; Morphology coefficient : in , The output frequency under different bias voltages. , For different bias voltages; electrostatic negative stiffness : in, The vacuum permittivity, This represents the overlapping area of ​​the variable-pitch capacitors. The capacitor spacing, This is the DC bias voltage.

2. The on-chip test system for pre-evaluating the performance of a silicon resonant beam accelerometer according to claim 1, characterized in that, The circular test probe circuit includes: two sets of identical self-excited oscillation closed-loop drive circuits, a DC-DC module, and an FPGA control module; wherein the self-excited oscillation closed-loop drive circuit includes a C / V interface circuit, a phase shift circuit, an automatic gain control circuit, a multiplier circuit, and an analog switch circuit. The FPGA control module is used to control the output of different DC bias voltages and to control the on / off state of the analog switching circuit. The C / V interface circuit has its input terminals connected to the driving electrode and the detection electrode, respectively, to convert the detection current signal into a detection voltage signal. A phase-shifting circuit is used to shift the phase of the detected voltage signal by 90°. The automatic gain control module is used to convert the negative half-cycle signal of the detected voltage signal into the positive half-cycle signal, extract the amplitude of the detected voltage signal and compare it with the reference voltage VREF, and perform integration to output the gain control level. The multiplier is used to multiply the gain control level with the phase-shifted detection voltage signal to obtain the drive signal, which is then connected to the input of the analog switching circuit. The DC-DC module is used to generate the DC bias voltage for the FPGA control module and the reference voltage for the automatic gain control module. The analog switch, controlled by the FPGA, is used to control the open and closed loop states of the circuit: when the analog switch is open, it is an open loop; when the analog switch is closed, it is a closed loop.

3. The on-chip test system for pre-evaluating the performance of a silicon resonant beam accelerometer according to claim 2, characterized in that, The automatic gain control circuit module includes a full-wave rectifier circuit, a low-pass filter circuit, and a PI control circuit. The full-wave rectifier circuit converts the negative half-cycle signal of the detection voltage signal into a positive half-cycle signal. After passing through the low-pass filter circuit, the amplitude of the detection voltage signal output by the full-wave rectifier circuit is extracted. The PI control circuit compares the amplitude of the detection voltage signal with the reference voltage VREF, integrates the difference, and outputs the gain control level.

4. The on-chip test system for pre-evaluating the performance of a silicon resonant beam accelerometer according to claim 2, characterized in that, When the FPGA control module controls the analog switch to a low level, the switch is on, allowing the multiplier output to connect to the wafer through the analog switch; when the FPGA control module controls the analog switch to a high level, the switch is grounded, disconnecting the multiplier output from the wafer through the analog switch.

5. The on-chip test system for pre-evaluating the performance of a silicon resonant beam accelerometer according to claim 2, characterized in that, The FPGA control module outputs five signals: FPGA_OUT_1, FPGA_OUT_2, FPGA_OUT_3, FPGA_OUT_4, and FPGA_OUT_5. FPGA_OUT_1, FPGA_OUT_2, and FPGA_OUT_3 are used to control the DC-DC module to select three voltage levels: high, medium, and low. The low voltage level ranges from 8V to 10V, the medium voltage level is twice that of the low voltage level, and the high voltage level is three times that of the low voltage level. FPGA_OUT_4 and FPGA_OUT_5 are used to control the switching on and off of the two analog switching circuits.

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