Display panel, control method thereof and display device
Patent Information
- Application Number
- CN202311551868.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-20
- Publication Date
- 2026-10-30
- Estimated Expiration
- 2043-11-20
AI Technical Summary
因此,现有的显示装置在出现显示信号异常时会出现瞬间黑屏现象,使得显示效果较差
[0030]本发明提供了一种显示面板及其控制方法和显示装置,显示面板包括:多个像素单元,所述像素单元包括门电路及与所述门电路的输出端电连接的存储电容,所述门电路用于将数据电压传输至所述存储电容;扫描电路,所述扫描电路与所述门电路的控制端电连接;及处理电路,所述处理电路与所述扫描电路电连接,其中,所述处理电路用于检测到输出的显示信号异常时,输出无效控制信号至所述扫描电路,所述扫描电路根据所述无效控制信号而控制所述门电路关断。
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Figure CN117423304B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display technology, and more specifically, to a display panel, its control method, and a display device. Background Technology
[0002] With the continuous development of electronic technology and the continuous improvement of people's living standards, display devices are becoming increasingly common and have gradually been applied to people's daily work and life. The driver IC (Integrated Circuit) is one of the important components of a display device. The driver IC of a display device usually has a self-detection function for the display signal. When the driver IC detects an abnormality in the display signal, it will refresh the display screen until the abnormality disappears, and then control the display device to resume normal display. Therefore, existing display devices may experience a momentary black screen when a display signal abnormality occurs, resulting in poor display quality. Summary of the Invention
[0003] In view of this, the present invention provides a display panel, a control method thereof, and a display device, which effectively solves the technical problems existing in the prior art and optimizes the display effect of the display device.
[0004] To achieve the above objectives, the technical solution provided by the present invention is as follows:
[0005] A display panel, comprising:
[0006] Multiple pixel units, each pixel unit including a gate circuit and a storage capacitor electrically connected to the output terminal of the gate circuit, the gate circuit being used to transmit data voltage to the storage capacitor;
[0007] A scanning circuit, wherein the scanning circuit is electrically connected to the control terminal of the gate circuit;
[0008] The processing circuit is electrically connected to the scanning circuit. When the processing circuit detects an abnormality in the output display signal, it outputs an invalid control signal to the scanning circuit, and the scanning circuit controls the gate circuit to shut down according to the invalid control signal.
[0009] Optionally, the processing circuit includes a driver IC and a selection circuit, wherein the selection circuit is electrically connected between the scanning circuit and the driver IC;
[0010] When the driver IC detects an abnormality in the output display signal, it controls the selection circuit to output an invalid control signal to the scanning circuit, and the scanning circuit controls the gate circuit to shut down according to the invalid control signal.
[0011] Optionally, the selection circuit includes a control module, a first output module, and a second output module;
[0012] The control terminal of the control module is electrically connected to the driver IC, the input terminal of the control module is connected to an enable signal, the first output terminal of the control module is electrically connected to the control terminal of the first output module, and the second output terminal of the control module is electrically connected to the control terminal of the second output module.
[0013] The invalid control signal is connected to the input terminal of the first output module, and the valid control signal is connected to the input terminal of the second output module. Both the output terminals of the first output module and the output terminals of the second output module are electrically connected to the scanning circuit.
[0014] When the driver IC detects an abnormal display signal, it outputs an invalid selection signal to the control terminal of the control module. The control module, based on the invalid selection signal, transmits the enable signal to the control terminal of the first output module, and the first output module transmits the invalid control signal to the scanning circuit.
[0015] Optionally, the control module includes a first transistor and a second transistor, wherein the first transistor and the second transistor have different conduction types, and the first output module includes a third transistor, and the second output module includes a fourth transistor, wherein the third transistor and the fourth transistor have the same conduction type.
[0016] Both the first terminal of the first transistor and the first terminal of the second transistor are connected to an enable signal. Both the control terminal of the first transistor and the control terminal of the second transistor are electrically connected to the driver IC. The second terminal of the first transistor is electrically connected to the control terminal of the third transistor, and the second terminal of the second transistor is electrically connected to the control terminal of the fourth transistor.
[0017] The first terminal of the third transistor is connected to the invalid control signal, the second terminal of the third transistor is electrically connected to the scanning circuit, the first terminal of the fourth transistor is connected to the valid control signal, and the second terminal of the fourth transistor is electrically connected to the scanning circuit.
[0018] Optionally, the selection circuit includes a third output module and a fourth output module;
[0019] The control terminals of the third output module and the fourth output module are both electrically connected to the driver IC. The input terminal of the third output module is connected to the invalid control signal, and the input terminal of the fourth output module is connected to the valid control signal. The output terminals of the third output module and the fourth output module are both electrically connected to the scanning circuit.
[0020] The driver IC is used to output an invalid selection signal when it detects an abnormal display signal. The third output module transmits the invalid control signal to the scanning circuit according to the control of the invalid selection signal.
[0021] Optionally, the third output module includes a fifth transistor, and the fourth output module includes a sixth transistor, wherein the fifth transistor and the sixth transistor have different conduction types;
[0022] The control terminals of the fifth transistor and the sixth transistor are both electrically connected to the driver IC. The first terminal of the fifth transistor is connected to the invalid control signal, and the first terminal of the sixth transistor is connected to the valid control signal. The second terminals of the fifth transistor and the sixth transistor are both electrically connected to the scanning circuit.
[0023] Optionally, the display panel includes a flexible circuit board electrically connected to the driver IC, wherein at least a portion of the components of the selection circuit and the signals connected to it are integrated into the flexible circuit board.
[0024] Optionally, the scanning circuit is a shift register circuit or a Gate IC.
[0025] Accordingly, the present invention also provides a control method for a display panel, for controlling the aforementioned display panel, the control method comprising:
[0026] The processing circuit detects whether the output display signal is abnormal. If so, it outputs an invalid control signal to the scanning circuit, and the scanning circuit controls the gate circuit to shut down according to the invalid control signal.
[0027] If not, a valid control signal is output to the scanning circuit, and the scanning circuit operates normally according to the valid control signal.
[0028] Accordingly, the present invention also provides a display device, the display device including the display panel described above.
[0029] Compared with the prior art, the technical solution provided by the present invention has at least the following advantages:
[0030] This invention provides a display panel, its control method, and a display device. The display panel includes: a plurality of pixel units, each pixel unit including a gate circuit and a storage capacitor electrically connected to the output terminal of the gate circuit, the gate circuit being used to transmit data voltage to the storage capacitor; a scanning circuit electrically connected to the control terminal of the gate circuit; and a processing circuit electrically connected to the scanning circuit, wherein the processing circuit is used to output an invalid control signal to the scanning circuit when it detects an abnormality in the output display signal, and the scanning circuit controls the gate circuit to shut down according to the invalid control signal.
[0031] As can be seen from the above, the technical solution provided by the present invention outputs an invalid control signal to the scanning circuit when the processing circuit detects an abnormality in the output display signal. The scanning circuit controls the gate circuit to turn off according to the invalid control signal, so that the storage capacitor maintains the data voltage of the last scan. This data voltage is used to maintain the display of the screen of the display element, avoiding the black screen situation of the display device and optimizing the display effect of the display device. Attached Figure Description
[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0033] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;
[0034] Figure 2 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;
[0035] Figure 3 This is a schematic diagram of the structure of another display panel provided in an embodiment of the present invention;
[0036] Figure 4 This is a schematic diagram of the structure of another display panel provided in an embodiment of the present invention;
[0037] Figure 5 This is a schematic diagram of the structure of another display panel provided in an embodiment of the present invention;
[0038] Figure 6 This is a schematic diagram of the structure of another display panel provided in an embodiment of the present invention;
[0039] Figure 7 This is a schematic diagram of the structure of another display panel provided in an embodiment of the present invention;
[0040] Figure 8 This is a schematic diagram of the structure of another display panel provided in an embodiment of the present invention;
[0041] Figure 9 This is a schematic diagram of the structure of a shift register provided in an embodiment of the present invention;
[0042] Figure 10 A flowchart illustrating a control method for a display panel provided in an embodiment of the present invention;
[0043] Figure 11 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation
[0044] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0045] As described in the background section, the bezel area of the display device includes a scanning circuit, a data circuit, and a driver IC, and the display area of the display device includes multiple pixel units. Each pixel unit includes a gate circuit, a storage capacitor, and a display element. The control terminal of the gate circuit is electrically connected to the scanning circuit, the input terminal of the gate circuit is electrically connected to the data circuit, and the output terminal of the gate circuit is electrically connected to the storage capacitor and the display element. When the display device is displaying, the driver IC outputs display signals such as clock signals, column synchronization signals, row synchronization signals, and enable signals to control the scanning circuit to turn on the gate circuit. Simultaneously, it controls the data circuit to transmit data voltage through the gate circuit to the storage capacitor for storage and to the display element to respond and display the image.
[0046] Display device driver ICs typically have a self-detection function for the display signal. When the driver IC detects an abnormality in the display signal, it will refresh the display screen until the abnormality disappears, at which point it will resume normal display. Therefore, existing display devices often experience a momentary black screen when a display signal abnormality occurs, resulting in poor display quality.
[0047] Based on this, embodiments of the present invention provide a display panel, a control method thereof, and a display device, which effectively solves the technical problems existing in the prior art and optimizes the display effect of the display device.
[0048] To achieve the above objectives, the technical solutions provided by the embodiments of the present invention are as follows, in detail... Figures 1 to 11The technical solutions provided in the embodiments of the present invention will be described in detail.
[0049] refer to Figure 1 The diagram shown is a structural schematic of a display panel provided in an embodiment of the present invention, wherein the display panel includes:
[0050] Multiple pixel units 100, each pixel unit 100 including a gate circuit 110 and a storage capacitor C electrically connected to the output terminal of the gate circuit 110, the gate circuit 110 being used to transmit the data voltage Vdata to the storage capacitor C.
[0051] Scanning circuit 200, which is electrically connected to the control terminal of gate circuit 110;
[0052] The processing circuit 300 is electrically connected to the scanning circuit 200. When the processing circuit 300 detects an abnormality in the output display signal, it outputs an invalid control signal to the scanning circuit 200. The scanning circuit 200 then controls the gate circuit 110 to shut down based on the invalid control signal.
[0053] Understandably, the technical solution provided in this embodiment of the invention, when the processing circuit detects an abnormality in the output display signal, outputs an invalid control signal to the scanning circuit. The scanning circuit controls the gate circuit to shut down according to the invalid control signal, so that the storage capacitor maintains the data voltage from the previous scan. Furthermore, since the storage capacitor stores the data voltage from the previous scan, it can supply power to the display element through the storage capacitor, using this data voltage to maintain the display of the image on the display element, avoiding a black screen situation and optimizing the display effect of the display device.
[0054] Continue as Figure 1 As shown, the first plate of the storage capacitor C is electrically connected to the output terminal of the gate circuit 110, and the second plate of the storage capacitor C is connected to the reference voltage Vref. Furthermore, the pixel unit 100 provided in this embodiment of the invention also includes a display element 120, which is electrically connected to the output terminal of the gate circuit 110 and the first plate of the storage capacitor C. The display element 120 is used to display an image in response to the data voltage Vdata.
[0055] The multiple pixel units 100 provided in this embodiment of the invention can be arranged in an array, and the control terminals of the gate circuits 110 of the pixel units 100 in the same row are electrically connected to the same output port of the scanning circuit 200. The display panel also includes a data circuit 400, which provides a data voltage Vdata to the pixel units 100, and the input terminals of the gate circuits 110 of the pixel units 100 in the same column can be electrically connected to the same output port of the data circuit 400. The pixel units 100 provided in this embodiment of the invention can be located in the display area of the display panel, and the scanning circuit 200, processing circuit 300, and data circuit 400 are located in the border area of the display panel. Furthermore, the data circuit 400 provided in this embodiment of the invention can be an independent circuit structure, or it can be integrated into the processing circuit 300 (e.g., integrating the data circuit into the driver IC of the processing circuit). This invention does not impose specific limitations on this.
[0056] It should be noted that the embodiments of the present invention do not impose specific limitations on the arrangement of pixel units or their connection with the scanning circuit and data circuit, or the connection between the data circuit and the processing circuit. Furthermore, the embodiments of the present invention do not impose specific limitations on the type of display element; for example, when the display panel is a liquid crystal display panel, an electronic paper display panel, etc., the display element can be a pixel electrode; or, when the display panel is an organic light-emitting display panel, etc., the display element can be a pixel circuit. Specific analysis is required based on the actual application.
[0057] like Figure 2 The diagram shows another display panel structure provided in an embodiment of the present invention. The gate circuit 110 provided in this embodiment may include a transistor M0, which may be an N-type transistor or a P-type transistor. The gate of transistor M0 is electrically connected to the scanning circuit 200, one end of transistor M0 is electrically connected to the data circuit 400, and the other end of transistor M0 is electrically connected to the first plate of the storage capacitor C and the display element 120. Thus, the scanning circuit 200 controls the conduction or cutoff of transistor M0 by outputting a corresponding level signal, thereby achieving the purpose of controlling the conduction or cutoff of gate circuit 110.
[0058] In one embodiment of the present invention, the processing circuit provided includes a driver IC and a selection circuit. The driver IC performs anomaly detection on the display signals (display signals include, but are not limited to, clock signals, column synchronization signals, row synchronization signals, and enable signals), while the selection circuit is used to select whether to output an invalid control signal to the scanning circuit. See details. Figure 3The diagram shows a schematic of another display panel provided in an embodiment of the present invention. The processing circuit 300 provided in this embodiment includes a driver IC 310 and a selection circuit 320. The selection circuit 320 is electrically connected between the scanning circuit 200 and the driver IC 310. When the driver IC 310 detects that the output display signal is abnormal, it controls the selection circuit 320 to output an invalid control signal to the scanning circuit 200. The scanning circuit 200 controls the gate circuit 110 to turn off according to the invalid control signal.
[0059] It is understood that the driver IC provided in this embodiment of the invention has the function of detecting whether its output display signal is abnormal. When the driver IC detects that the display signal is not abnormal, it controls the selection circuit to output a valid control signal to drive the scanning circuit to work normally; or when the driver IC detects that the display signal is not abnormal, it can also directly control the scanning circuit to work normally without going through the selection circuit. This embodiment of the invention does not impose specific limitations on this. In addition, when the driver IC detects that the display signal is abnormal, it controls the selection circuit to output an invalid control signal to the scanning circuit. The scanning circuit controls the gate circuit to turn off according to the signal, and the data voltage stored in the storage capacitor maintains the display of the display element.
[0060] Optionally, when the gate circuit provided in the embodiments of the present invention includes a transistor, if the transistor is an N-type transistor, the invalid control signal is a low-level signal, and the low-level signal controls the N-type transistor to turn off; or, if the transistor is a P-type transistor, the invalid control signal is a high-level signal, and the high-level signal controls the P-type transistor to turn off. This needs to be specifically designed according to the actual application.
[0061] The following describes in more detail several processing circuits provided in embodiments of the present invention with reference to the accompanying drawings. Figure 4The diagram shows a structural schematic of another display panel provided in an embodiment of the present invention. The selection circuit 320 provided in this embodiment includes a control module 3201, a first output module 3211, and a second output module 3212. The control terminal of the control module 3201 is electrically connected to the driver IC 310. The input terminal of the control module 3201 receives an enable signal Vn. The first output terminal of the control module 3201 is electrically connected to the control terminal of the first output module 3211, and the second output terminal of the control module 3201 is electrically connected to the control terminal of the second output module 3212. The input terminal of the first output module 3211 receives an invalid control signal Sn, and the input terminal of the second output module 3212 receives a valid control signal En. Both the output terminals of the first output module 3211 and the second output module 3212 are electrically connected to the scanning circuit 200. The first output module 3211 and the second output module 3212 can be connected to the same port or different ports of the scanning circuit 200. This needs to be analyzed and designed according to the specific composition and structure of the scanning circuit 200. This embodiment of the invention does not impose specific limitations.
[0062] During the operation of the processing circuit 300, when the driver IC 310 detects an abnormal display signal, it outputs an invalid selection signal to the control terminal of the control module 3201. The control module 3201, based on the invalid selection signal, transmits the enable signal Vn to the control terminal of the first output module 3211. The first output module 3211 then transmits the invalid control signal Sn to the scanning circuit 200. Conversely, when the driver IC 310 detects no abnormality in the display signal, it outputs a valid selection signal to the control terminal of the control module 3201. The control module 3201, based on the valid selection signal, transmits the enable signal Vn to the control terminal of the second output module 3212. The second output module 3212 then transmits the valid control signal En to the scanning circuit 200 to control the scanning circuit 200 to operate normally.
[0063] Further integration Figure 5 The diagram shows a structural schematic of another display panel provided in an embodiment of the present invention. The control module 3201, the first output module 3211, and the second output module 3212 provided in this embodiment can be composed of transistors. Specifically, the control module 3201 includes a first transistor M1 and a second transistor M2, with the first transistor M1 and the second transistor M2 having different conduction types. The first output module 3211 includes a third transistor M3, and the second output module 3212 includes a fourth transistor M4, with the third transistor M3 and the fourth transistor M4 having the same conduction type.
[0064] The first terminal of the first transistor M1 and the first terminal of the second transistor M2 are both connected to the enable signal Vn. The control terminals of the first transistor M1 and the second transistor M2 are both electrically connected to the driver IC 310. The second terminal of the first transistor M1 is electrically connected to the control terminal of the third transistor M3, and the second terminal of the second transistor M2 is electrically connected to the control terminal of the fourth transistor M4. The first terminal of the third transistor M3 is connected to the invalid control signal Sn, and the second terminal of the third transistor M3 is electrically connected to the scanning circuit 200. The first terminal of the fourth transistor M4 is connected to the valid control signal En, and the second terminal of the fourth transistor M4 is electrically connected to the scanning circuit 200.
[0065] To illustrate, let's take an example where the first transistor is an N-type transistor and the second transistor is a P-type transistor. When the driver IC detects no abnormality in the display signal, it can output a low-level valid selection signal. This low-level valid selection signal controls the second transistor to conduct, transmitting the enable signal to the control terminal of the fourth transistor. The fourth transistor, controlled by the enable signal, then transmits a valid control signal to the scanning circuit, controlling its normal operation. Alternatively, when the driver IC detects an abnormality in the display signal, it outputs a high-level invalid selection signal. This high-level invalid selection signal controls the first transistor to conduct, transmitting the enable signal to the control terminal of the third transistor. The third transistor, controlled by the enable signal, then transmits an invalid control signal to the scanning circuit, controlling it to turn off the gate circuit.
[0066] It should be noted that the first transistor in this embodiment of the invention can also be a P-type transistor, while the second transistor can be an N-type transistor. In this case, the valid selection signal is high, and the invalid selection signal is low. Furthermore, when the third and fourth transistors in this embodiment are N-type transistors, the enable signal is high; and when the third and fourth transistors are P-type transistors, the enable signal is low. Optionally, the first and second transistors provided in this embodiment of the invention are transistors of different conduction types, allowing the valid and invalid selection signals to be transmitted via the same signal line, reducing the number of lines.
[0067] refer to Figure 6The diagram shows a structural schematic of another display panel provided in an embodiment of the present invention. The selection circuit 320 provided in this embodiment includes a third output module 3213 and a fourth output module 3214. The control terminals of both the third output module 3213 and the fourth output module 3214 are electrically connected to the driver IC 310. The input terminal of the third output module 3213 is connected to the invalid control signal Sn, and the input terminal of the fourth output module 3214 is connected to the valid control signal En. The output terminals of both the third output module 3213 and the fourth output module 3214 are electrically connected to the scanning circuit 200. The third output module 3213 and the fourth output module 3214 can... When the structure of the scanning circuit 200 can be controlled by a line connected to one port to open or close a gate circuit, the third output module 3213 and the fourth output module 3214 can be connected to the same port of the scanning circuit 200. Alternatively, when the structure of the scanning circuit 200 requires two ports to respectively receive valid and invalid control signals to open or close the gate circuit, the third output module 3213 and the fourth output module 3214 can be connected to different ports of the scanning circuit 200. This requires analysis and design based on the specific structure of the scanning circuit 200, and the embodiments of the present invention do not impose specific limitations.
[0068] During the operation of the processing circuit 300, the driver IC 310 outputs an invalid selection signal when it detects an abnormality in the display signal. The third output module 3213, controlled by the invalid selection signal, transmits the invalid control signal Sn to the scanning circuit 200. The scanning circuit 200 then controls the gate circuit 110 to shut down based on the invalid control signal Sn. Conversely, when the driver IC 310 detects no abnormality in the display signal, it outputs a valid selection signal. The fourth output module 3214, controlled by the valid selection signal, transmits the valid control signal En to the scanning circuit 200, thus controlling the scanning circuit 200 to operate normally.
[0069] Further integration Figure 7The diagram shows a structural schematic of another display panel provided in an embodiment of the present invention. The third output module 3213 and the fourth output module 3214 can be composed of transistors. The third output module 3213 provided in this embodiment of the present invention includes a fifth transistor M5, and the fourth output module 3214 includes a sixth transistor M6. The fifth transistor M5 and the sixth transistor M6 have different conduction types. The control terminals of the fifth transistor M5 and the sixth transistor M6 are both electrically connected to the driver IC 310. The first terminal of the fifth transistor M5 is connected to the invalid control signal Sn, and the first terminal of the sixth transistor M6 is connected to the valid control signal En. The second terminals of the fifth transistor M5 and the sixth transistor M6 are both electrically connected to the scanning circuit 200.
[0070] To illustrate this, let's take an example where the fifth transistor is an N-type transistor and the sixth transistor is a P-type transistor. When the driver IC detects no abnormality in the display signal, it can output a low-level valid selection signal to the control terminal of the sixth transistor. The sixth transistor responds to the low-level valid selection signal and turns on, transmitting the valid control signal to the scanning circuit to control its normal operation. Conversely, when the driver IC detects an abnormality in the display signal, it outputs a high-level invalid selection signal to the control terminal of the fifth transistor. The fifth transistor responds to the high-level invalid selection signal and turns on, transmitting the invalid control signal to the scanning circuit to control it to turn off the gate circuit.
[0071] It should be noted that the fifth transistor in this embodiment of the invention can also be a P-type transistor, while the sixth transistor is an N-type transistor. In this case, the valid selection signal is high, and the invalid selection signal is low. Optionally, the fifth and sixth transistors provided in this embodiment of the invention can be transistors of different conduction types, allowing the valid and invalid selection signals to be transmitted via the same signal line, thus reducing the number of lines.
[0072] In any of the above embodiments of the present invention, the display panel provided by the embodiments of the present invention includes a flexible circuit board electrically connected to the driver IC, wherein at least a portion of the components and the signals connected to the selection circuit are integrated into the flexible circuit board. (Reference) Figure 8 The diagram shown is a structural schematic of another display panel provided in an embodiment of the present invention. Figure 8 by Figure 7The improvements are based on the provided circuit structure. In this embodiment, the display panel includes a flexible printed circuit board (FPC) electrically connected to the driver IC 310. The fifth transistor M5 and the sixth transistor M6 can both be disposed on the FPC. The invalid control signal Sn and the valid control signal En provided in this embodiment can be provided by the driver IC 310; this embodiment does not impose specific limitations on this. Furthermore, by disposing of some circuits on the flexible printed circuit board (FPC), the number of circuits in the bezel area of the display panel is reduced, effectively increasing the effective circuit design area in the bezel area of the display panel.
[0073] In any of the above embodiments of the present invention, the scanning circuit used in the embodiments of the present invention can be a shift register circuit or a Gate IC (scan driver IC). The following description uses a shift register circuit as an example. The shift register circuit includes multiple cascaded shift registers, each of which is electrically connected to a selection circuit and is used to receive invalid or valid control signals output by the selection circuit. See details... Figure 9 The diagram shows a schematic of a shift register according to an embodiment of the present invention. The shift register includes nine transistors, T0 to T8, and capacitors C1 and C2. Clock signals CK and CKB are inverted clock signals. The explanation is based on the example where transistors T0 to T8 are N-type transistors and the output terminal Gout outputs a high level. When the shift register is operating, the master control terminal RESET remains low, while control transistors T7 and T8 remain off, ensuring the normal operation of the shift register. When the master control terminal RESET is high, control transistors T7 and T8 are turned on, inputting a low level from the low-level terminal VGL, thereby stopping the shift register and causing the output terminal Gout to output a disabled low level.
[0074] When the shift register is operating, firstly, the scan enable signal STV turns on transistor T0, inputting a high-level enable signal FW to control transistors T3 and T4. Transistor T4 transmits the low-level clock signal CKB to the output Gout, while transistor T3 inputs a low-level signal VGL, controlling transistor T5 to turn off. Simultaneously, the high-level clock signal CK turns on transistor T6, inputting a low-level signal VGL to the output Gout. Then, the scan enable signal STV changes to a low level, turning off transistor T0. Due to the bootstrapping effect of capacitor C2, transistors T4 and T3 remain on. Transistor T4 transmits the high-level clock signal CKB to the output Gout; simultaneously, the low-level clock signal CK turns off transistor T6. Finally, the end-of-scan signal END controls transistor T1 to turn on, inputting the off-level BW to control transistors T3 and T4 to turn off. The holding voltage of capacitor C1 controls transistors T2 and T5 to turn on, so as to output the low level of the low-level terminal VGL to the output terminal Gout. At the same time, the high level of the clock signal CK controls transistor T6 to turn on, so as to output the low level of the low-level terminal VGL to the output terminal Gout.
[0075] The scanning circuit provided in this embodiment of the invention includes the above-described scanning circuit. Figure 8 When the shift register is shown, the processing circuit provided in this embodiment of the invention is electrically connected to the main control terminal RESET of the shift register. By setting the level of the invalid control signal, the main control terminal RESET is connected to the invalid control signal, which controls the shift register to work normally or stop working.
[0076] It should be noted that the shift register provided in the embodiments of the present invention is not limited to the above-described types. Figure 8 The components and connections shown are not limited to those described herein. In other embodiments of the present invention, the shift register may have other components and connections, and the present invention does not impose specific limitations on these. Furthermore, the Gate IC provided in the embodiments of the present invention is the same as that in the prior art, and therefore will not be described in detail in the embodiments of the present invention.
[0077] Accordingly, embodiments of the present invention also provide a method for controlling a display panel, used to control the display panel provided in any of the above embodiments. (See reference) Figure 10 The diagram shown is a flowchart of a control method for a display panel provided in an embodiment of the present invention, wherein the control method includes:
[0078] The processing circuit detects whether the output display signal is abnormal. If so, it outputs an invalid control signal to the scanning circuit, and the scanning circuit controls the gate circuit to shut down according to the invalid control signal.
[0079] If not, a valid control signal is output to the scanning circuit, and the scanning circuit operates normally according to the valid control signal.
[0080] Accordingly, embodiments of the present invention also provide a display device, the display device including the display panel provided in any of the above embodiments.
[0081] refer to Figure 11 The diagram shown is a structural schematic of a display device provided in an embodiment of the present invention, wherein the display device 1000 provided in the embodiment of the present invention can be a mobile terminal device.
[0082] Optionally, the display device provided in the embodiments of the present invention can also be an electronic display device such as a computer or a wearable display device, and the present invention does not impose specific limitations on it.
[0083] This invention provides a display panel, its control method, and a display device. The display panel includes: a plurality of pixel units, each pixel unit including a gate circuit and a storage capacitor electrically connected to the output terminal of the gate circuit, the gate circuit being used to transmit data voltage to the storage capacitor; a scanning circuit electrically connected to the control terminal of the gate circuit; and a processing circuit electrically connected to the scanning circuit. The processing circuit is used to output an invalid control signal to the scanning circuit when it detects an abnormality in the output display signal, and the scanning circuit controls the gate circuit to shut down according to the invalid control signal.
[0084] As can be seen from the above, the technical solution provided by the embodiments of the present invention outputs an invalid control signal to the scanning circuit when the processing circuit detects an abnormality in the output display signal. The scanning circuit controls the gate circuit to turn off according to the invalid control signal, so that the storage capacitor maintains the data voltage at the time of the last scan. This data voltage is used to maintain the display of the screen of the display element, avoiding the black screen situation of the display device and optimizing the display effect of the display device.
[0085] In the description of this invention, it should be understood that terms such as "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.
[0086] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0087] In this invention, unless otherwise explicitly specified and limited, terms such as "installation," "connection," "linking," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between components; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0088] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.
[0089] In this invention, the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0090] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.
Claims
1. A display panel, characterized in that, include: Multiple pixel units, each pixel unit including a gate circuit and a storage capacitor electrically connected to the output terminal of the gate circuit, the gate circuit being used to transmit data voltage to the storage capacitor; A scanning circuit, wherein the scanning circuit is electrically connected to the control terminal of the gate circuit; The processing circuit is electrically connected to the scanning circuit. When the processing circuit detects an abnormality in the output display signal, it outputs an invalid control signal to the scanning circuit, and the scanning circuit controls the gate circuit to shut down according to the invalid control signal. The processing circuit includes a driver IC and a selection circuit, wherein the selection circuit is electrically connected between the scanning circuit and the driver IC; When the driver IC detects an abnormality in the display signal output by the driver IC, it controls the selection circuit to output an invalid control signal to the scanning circuit, and the scanning circuit controls the gate circuit to shut down according to the invalid control signal.
2. The display panel according to claim 1, characterized in that, The selection circuit includes a control module, a first output module, and a second output module; The control terminal of the control module is electrically connected to the driver IC, the input terminal of the control module is connected to an enable signal, the first output terminal of the control module is electrically connected to the control terminal of the first output module, and the second output terminal of the control module is electrically connected to the control terminal of the second output module. The invalid control signal is connected to the input terminal of the first output module, and the valid control signal is connected to the input terminal of the second output module. Both the output terminals of the first output module and the output terminals of the second output module are electrically connected to the scanning circuit. When the driver IC detects an abnormal display signal, it outputs an invalid selection signal to the control terminal of the control module. The control module, based on the invalid selection signal, transmits the enable signal to the control terminal of the first output module, and the first output module transmits the invalid control signal to the scanning circuit.
3. The display panel according to claim 2, characterized in that, The control module includes a first transistor and a second transistor, wherein the first transistor and the second transistor have different conduction types; the first output module includes a third transistor; the second output module includes a fourth transistor, wherein the third transistor and the fourth transistor have the same conduction type. Both the first terminal of the first transistor and the first terminal of the second transistor are connected to an enable signal. Both the control terminal of the first transistor and the control terminal of the second transistor are electrically connected to the driver IC. The second terminal of the first transistor is electrically connected to the control terminal of the third transistor, and the second terminal of the second transistor is electrically connected to the control terminal of the fourth transistor. The first terminal of the third transistor is connected to the invalid control signal, the second terminal of the third transistor is electrically connected to the scanning circuit, the first terminal of the fourth transistor is connected to the valid control signal, and the second terminal of the fourth transistor is electrically connected to the scanning circuit.
4. The display panel according to claim 1, characterized in that, The selection circuit includes a third output module and a fourth output module; The control terminals of the third output module and the fourth output module are both electrically connected to the driver IC. The input terminal of the third output module is connected to the invalid control signal, and the input terminal of the fourth output module is connected to the valid control signal. The output terminals of the third output module and the fourth output module are both electrically connected to the scanning circuit. The driver IC is used to output an invalid selection signal when it detects an abnormal display signal. The third output module transmits the invalid control signal to the scanning circuit according to the control of the invalid selection signal.
5. The display panel according to claim 4, characterized in that, The third output module includes a fifth transistor, and the fourth output module includes a sixth transistor, wherein the fifth transistor and the sixth transistor have different conduction types; The control terminals of the fifth transistor and the sixth transistor are both electrically connected to the driver IC. The first terminal of the fifth transistor is connected to the invalid control signal, and the first terminal of the sixth transistor is connected to the valid control signal. The second terminals of the fifth transistor and the sixth transistor are both electrically connected to the scanning circuit.
6. The display panel according to any one of claims 1-5, characterized in that, The display panel includes a flexible circuit board electrically connected to the driver IC, wherein at least a portion of the components of the selection circuit and the signals connected to it are integrated into the flexible circuit board.
7. The display panel according to claim 1, characterized in that, The scanning circuit is a shift register circuit or a GateIC.
8. A method for controlling a display panel, characterized in that, The method for controlling the display panel according to any one of claims 1-7 includes: The processing circuit detects whether the output display signal is abnormal. If so, it outputs an invalid control signal to the scanning circuit, and the scanning circuit controls the gate circuit to shut down according to the invalid control signal. If not, a valid control signal is output to the scanning circuit, and the scanning circuit operates normally according to the valid control signal.
9. A display device, characterized in that, The display device includes the display panel as described in any one of claims 1-7.
Citation Information
Patent Citations
OLED current detection circuit and OLED screen display show system
CN208421055U
