Led wafer with reduced laser cutting damage, method of manufacture, and led chip

Abstract

The application discloses an LED wafer capable of reducing laser cutting damage, a preparation method and an LED chip, and relates to the technical field of semiconductor devices. The LED wafer comprises a substrate and a plurality of chip units arranged on the substrate, wherein the chip unit comprises an epitaxial layer and a chip layer, and any adjacent chip units are provided with an isolation groove; a passivation layer covers the epitaxial layer and the chip layer, and exposes the metal electrode of the chip layer; a protective layer covers at least the surface of the passivation layer in the isolation groove; and at the bottom of the isolation groove, the protective layer and the passivation layer are etched to form a laser penetration channel. When laser cutting is performed on the adjacent chip units along the laser penetration channel, the laser passes through the laser penetration channel to cut the substrate to form a plurality of separate LED chips. The application solves the technical problem that, in the prior art, when laser cutting is performed on the LED wafer, the reflected laser irradiates the epitaxial layer, causing damage to the epitaxial layer and reducing the epitaxial quality.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device technology, specifically to an LED wafer with reduced laser cutting damage, a fabrication method, and an LED chip. Background Technology

[0002] Flip-chip LEDs are widely used in lighting, backlighting, and other fields due to their advantages such as high current handling and wire-free operation. The flip-chip structure, from bottom to top, consists of a substrate, a substrate PSS (Power Separator Substrate), an epitaxial layer, and a chip layer. The epitaxial layer is composed of N-type semiconductors, quantum wells, and P-type semiconductors. The chip layer, from bottom to top, consists of a transparent conductive layer, a first electrode, a passivation layer, and a second electrode. The passivation layer surrounds the epitaxial layer and all subsequent chip layers. The passivation layer is etched using ICP (Inductively Coupled Printed Process) to create a first electrode connection hole. The second electrode is electrically connected to the first electrode through this first electrode connection hole. The passivation layer serves to reflect light and provide insulation protection.

[0003] Flip-chip LEDs are laser-cut from wafers, with the cut locations called isolation grooves. The passivation layer is typically a DBR structure, composed of stacked high- and low-refractive-index insulating materials such as SiO2 and TiO2, achieving a light reflection rate of over 98% in the 400-600nm wavelength range. The laser cutting wavelength is 1064nm, and the passivation layer has a low reflectivity at this wavelength, generally below 20%, allowing the laser to penetrate it.

[0004] However, during laser cutting, the laser is reflected due to the substrate or substrate PSS. The reflected laser shines on the epitaxial layer, causing damage to the epitaxial layer and resulting in a decrease in the yield of LED chips. Summary of the Invention

[0005] To address the shortcomings of existing technologies, the present invention aims to provide an LED wafer, a preparation method, and an LED chip that reduce laser cutting damage, thereby solving the technical problem in the prior art where laser reflection during laser cutting of LED wafers damages the epitaxial layer and reduces epitaxial quality.

[0006] A first aspect of the present invention is to provide an LED wafer that reduces laser cutting damage, the LED wafer comprising: A substrate, and a plurality of chip units arranged on the substrate, the chip units including an epitaxial layer and a chip layer, and an isolation trench between any adjacent chip units; A passivation layer that covers the epitaxial layer and the chip layer, and exposes the metal electrodes of the chip layer; A protective layer, wherein the protective layer at least covers the surface of the passivation layer within the isolation groove; At the bottom of the isolation trench, the protective layer and the passivation layer are etched to form a laser penetration channel. When the laser cuts adjacent chip units along the laser penetration channel, the laser passes through the laser penetration channel to cut the substrate to form multiple individual LED chips.

[0007] According to one aspect of the above technical solution, the protective layer is a DBR structure, formed by overlapping a first material and a second material.

[0008] According to one aspect of the above technical solution, the first material is one of SiO2 and TiO2, and the second material is the other of SiO2 and TiO2.

[0009] According to one aspect of the above technical solution, the number of overlapping layers between the first material and the second material is ≥15, and the thickness of the protective layer is ≥1.5μm.

[0010] According to one aspect of the above technical solution, the protective layer includes a laser reflective sublayer and a reflective protective sublayer sequentially stacked on the passivation layer, wherein the reflective protective sublayer covers the outer surface of the laser reflective sublayer.

[0011] According to one aspect of the above technical solution, the material used to make the laser reflective sublayer includes Ag, Au, and Cu metals, and the thickness of the laser reflective sublayer is 1000-10000 Å.

[0012] According to one aspect of the above technical solution, the material used to fabricate the reflective protective sublayer is an insulating material, including SiO2, Al2O3, and SiN. X The thickness of the reflective protective sublayer is 2000-20000 Å.

[0013] A second aspect of the present invention is to provide a method for fabricating an LED wafer with reduced laser cutting damage, the method comprising: A substrate is provided, and a plurality of chip cells are fabricated on the substrate; wherein an isolation trench is provided between any adjacent chip cells; A passivation layer is formed on the surface of the chip unit and within the isolation trench; A protective layer is formed on the passivation layer, the protective layer covering the passivation layer and exposing the metal electrodes of the chip layer in the chip unit; At the bottom of the isolation trench, the protective layer is etched to remove at least a portion of the protective layer material, exposing the surface of the substrate to form a laser penetration channel at the bottom of the isolation trench for guiding laser movement.

[0014] According to one aspect of the above technical solution, the step of fabricating a protective layer on the passivation layer, the protective layer covering the passivation layer and exposing the metal electrodes of the chip layer in the chip unit, specifically includes: A protective layer is formed on the passivation layer using a coating method; Photolithography and dry etching are used to etch away at least part of the protective layer material and passivation layer material to expose the N-type metal electrode and P-type metal electrode of the chip layer, respectively. or Photolithography and dry etching are used to etch away at least part of the passivation layer material to expose the substrate at the bottom of the isolation trench, as well as the N-type and P-type metal electrodes of the chip layer; a laser reflective sublayer is fabricated on the passivation layer using photolithography and deposition, so that the laser reflective sublayer covers the passivation layer on the side of the isolation trench. A reflective protective sublayer is fabricated on the laser reflective sublayer; The reflective protective sublayer formed at the bottom of the isolation trench is removed by photolithography and dry etching, resulting in a protective layer containing both a laser reflective sublayer and a reflective protective sublayer.

[0015] A third aspect of the present invention is to provide an LED chip, which is obtained by cutting an LED wafer along a laser penetration path at the bottom of the isolation trench as described in the above technical solution.

[0016] Compared with existing technologies, the LED wafer, fabrication method, and LED chip with reduced laser cutting damage shown in this invention have the following advantages: By arranging multiple chip units, including epitaxial layers and chip layers, on a substrate, and creating isolation trenches between adjacent chip units, a passivation layer covering the epitaxial layers and chip layers is fabricated on the surface of the chip units. A protective layer is also fabricated on the surface of the passivation layer within the isolation trenches. This protective layer, combined with the passivation layer, blocks reflected laser light generated during laser cutting of the substrate. Furthermore, a laser penetration channel at the bottom of the isolation trench guides the laser to act directly on the underlying substrate without generating additional reflected laser light. Thus, the reflected laser light generated during laser cutting of the substrate can be blocked by the protective layer and the passivation layer, protecting the epitaxial layers and chip layers, reducing laser cutting damage to LED wafers, and effectively ensuring the epitaxial quality of the epitaxial layers in LED chips. Attached Figure Description

[0017] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 This is a schematic diagram of the structure of an LED wafer for reducing laser cutting damage in the first embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of an LED wafer for reducing laser cutting damage in the second embodiment of the present invention; Figure 3 This is a schematic flowchart of a method for preparing an LED wafer with reduced laser cutting damage according to an embodiment of the present invention. Explanation of symbols in the attached drawings: Substrate 10, PSS structure 11, chip unit 20, N-type semiconductor layer 21, quantum well layer 22, P-type semiconductor layer 23, transparent conductive layer 24, N-type first electrode 251, P-type first electrode 252, passivation layer 26, N-type second electrode 271, P-type second electrode 272, isolation trench 30, protective layer 40, laser reflective sublayer 41, reflective protective sublayer 42, laser penetration channel 50. Detailed Implementation

[0018] To make the objectives, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Several embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the present invention will be more thorough and complete.

[0019] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0021] A first aspect of the present invention is to provide an LED wafer that reduces laser cutting damage, the LED wafer comprising: A substrate, and a plurality of chip units arranged on the substrate, the chip units including an epitaxial layer and a chip layer, and an isolation trench between any adjacent chip units; A passivation layer that covers the epitaxial layer and the chip layer, and exposes the metal electrodes of the chip layer; A protective layer, wherein the protective layer at least covers the surface of the passivation layer within the isolation groove; At the bottom of the isolation trench, the protective layer and the passivation layer are etched to form a laser penetration channel. When the laser cuts adjacent chip units along the laser penetration channel, the laser passes through the laser penetration channel to cut the substrate to form multiple individual LED chips.

[0022] Furthermore, the protective layer has a DBR structure, which is formed by overlapping a first material and a second material.

[0023] Furthermore, the first material is one of SiO2 and TiO2, and the second material is the other of SiO2 and TiO2.

[0024] Furthermore, the number of overlapping layers between the first material and the second material is ≥15, and the thickness of the protective layer is ≥1.5μm.

[0025] Furthermore, the protective layer includes a laser reflective sublayer and a reflective protective sublayer sequentially stacked on the passivation layer, with the reflective protective sublayer covering the outer surface of the laser reflective sublayer.

[0026] Furthermore, the materials used to fabricate the laser reflective sublayer include Ag, Au, and Cu metals, and the thickness of the laser reflective sublayer is 1000-10000 Å.

[0027] Furthermore, the material used to form the reflective protective sublayer is an insulating material, including SiO2, Al2O3, and SiN. X The thickness of the reflective protective sublayer is 2000-20000 Å.

[0028] A second aspect of the present invention is to provide a method for fabricating an LED wafer with reduced laser cutting damage, the method comprising: A substrate is provided, and a plurality of chip cells are fabricated on the substrate; wherein an isolation trench is provided between any adjacent chip cells; A passivation layer is formed on the surface of the chip unit and within the isolation trench; A protective layer is formed on the passivation layer, the protective layer covering the passivation layer and exposing the metal electrodes of the chip layer in the chip unit; At the bottom of the isolation trench, the protective layer is etched to remove at least a portion of the protective layer material, exposing the surface of the substrate to form a laser penetration channel at the bottom of the isolation trench for guiding laser movement.

[0029] Further, the step of fabricating a protective layer on the passivation layer, the protective layer covering the passivation layer and exposing the metal electrodes of the chip layer in the chip unit, specifically includes: A protective layer is formed on the passivation layer using a coating method; Photolithography and dry etching are used to etch away at least part of the protective layer material and passivation layer material to expose the N-type metal electrode and P-type metal electrode of the chip layer, respectively. or Photolithography and dry etching are used to etch away at least part of the passivation layer material to expose the substrate at the bottom of the isolation trench, as well as the N-type and P-type metal electrodes of the chip layer; a laser reflective sublayer is fabricated on the passivation layer using photolithography and deposition, so that the laser reflective sublayer covers the passivation layer on the side of the isolation trench. A reflective protective sublayer is fabricated on the laser reflective sublayer; The reflective protective sublayer formed at the bottom of the isolation trench is removed by photolithography and dry etching, resulting in a protective layer containing both a laser reflective sublayer and a reflective protective sublayer.

[0030] A third aspect of the present invention is to provide an LED chip, which is obtained by cutting an LED wafer along a laser penetration path at the bottom of the isolation trench as described in the above technical solution.

[0031] Compared with existing technologies, the LED wafer, fabrication method, and LED chip with reduced laser cutting damage shown in this invention have the following advantages: By arranging multiple chip units, including epitaxial layers and chip layers, on a substrate, and creating isolation trenches between adjacent chip units, a passivation layer covering the epitaxial layers and chip layers is fabricated on the surface of the chip units. A protective layer is also fabricated on the surface of the passivation layer within the isolation trenches. This protective layer, combined with the passivation layer, blocks reflected laser light generated during laser cutting of the substrate. Furthermore, a laser penetration channel at the bottom of the isolation trench guides the laser to act directly on the underlying substrate without generating additional reflected laser light. Thus, the reflected laser light generated during laser cutting of the substrate can be blocked by the protective layer and the passivation layer, protecting the epitaxial layers and chip layers, reducing laser cutting damage to LED wafers, and effectively ensuring the epitaxial quality of the epitaxial layers in LED chips.

[0032] Example 1 Please see Figure 1 The first embodiment of the present invention provides an LED wafer that reduces laser cutting damage, and the LED wafer is cut to obtain multiple individual LED chips. In other words, the LED wafer shown in this embodiment is a collection of LED chips to be cut, which includes multiple LED chips.

[0033] In this embodiment, the LED wafer includes: A substrate 10, and a plurality of chip units 20 arranged on the substrate 10, wherein each chip unit 20 includes an epitaxial layer and a chip layer, and an isolation trench 30 is provided between any adjacent chip units 20. Passivation layer 26 covers the epitaxial layer and the chip layer, and exposes the metal electrodes of the chip layer; Protective layer 40, which at least covers the surface of the passivation layer 26 within the isolation groove 30; At the bottom of the isolation trench 30, the protective layer 40 and the passivation layer 26 are etched to form a laser penetration channel 50. When the laser cuts the adjacent chip unit 20 along the laser penetration channel 50, the laser passes through the laser penetration channel 50 to cut the substrate 10 to form multiple individual LED chips.

[0034] In this embodiment, the substrate 10 is a common substrate 10, which is used to support the chip unit 20 of multiple LED chips. There is an isolation groove 30 between any two adjacent chip units 20 for wafer cutting. For example, there is a vertical isolation groove 30 between any two adjacent chip units 20 in the horizontal direction, and a horizontal isolation groove 30 between any two adjacent chip units 20 in the vertical direction. The purpose of forming the isolation groove 30 between adjacent chip units 20 is to separate each chip unit 20 so as to cut the substrate 10, so that the cut substrate 10 and the chip unit 20 form a separate LED chip.

[0035] The substrate 10 is a Si substrate 10 with a PSS structure 11, that is, a Si substrate 10 after patterning.

[0036] In this embodiment, a passivation layer 26 is provided on the LED wafer, that is, a passivation layer 26 is provided on the surface of each chip unit 20 and in the isolation trench 30. The passivation layer 26 covers the epitaxial layer and the chip layer of the chip unit 20 to protect the LED chip. When the passivation layer 26 covers the epitaxial layer and the chip layer, the metal electrodes of the chip layer are exposed so as to achieve electrical connection with the circuit board through the exposed metal electrodes. Therefore, the passivation layer 26 cannot completely wrap the chip unit 20.

[0037] It should be noted that the metal electrode shown in this embodiment includes a first electrode layer and a second electrode layer. The first electrode layer includes an N-type first electrode 251 and a P-type first electrode 252. The N-type first electrode 251 is located within the Mesa step and contacts the N-type semiconductor layer 21 of the epitaxial layer to achieve an electrical connection with the N-type semiconductor layer 21. The P-type first electrode 252 is connected to the P-type semiconductor layer 23 of the epitaxial layer. For example, the P-type first electrode 252 contacts the transparent semiconductor layer of the chip layer above the epitaxial layer to achieve an electrical connection with the P-type semiconductor layer 23.

[0038] In addition, to make the metal electrodes more flush, the metal electrodes in this embodiment also include a second electrode layer, which includes an N-type second electrode 271 and a P-type second electrode 272. The N-type second electrode 271 contacts the N-type first electrode 251 to achieve electrical connection, and the P-type second electrode 272 contacts the P-type first electrode 252 to achieve electrical connection.

[0039] After fabricating the first electrode layer of the chip layer, specifically the N-type first electrode 251 and the P-type first electrode 252, a passivation layer 26 should be fabricated on the surface of each chip unit 20 and within the isolation trench 30 between adjacent chip units 20. The passivation layer 26 covers the chip unit 20 with the first electrode layer and the isolation trench 30; that is, the passivation layer 26 covers the N-type first electrode 251 and the P-type first electrode 252. Therefore, in order to achieve the connection between the N-type first electrode 251 and the N-type second electrode 271, and the connection between the P-type first electrode 252 and the N-type second electrode 271, after fabricating the passivation layer 26, at least a portion of the passivation layer material on the N-type first electrode 251 and the P-type first electrode 252 needs to be removed to achieve the connection between the N-type first electrode 251 and the N-type second electrode 271, and the P-type first electrode 252 and the P-type second electrode 272.

[0040] In this embodiment, the LED wafer also includes a protective layer 40, which covers at least the surface of the passivation layer 26 in the isolation trench 30. It can reflect more than 80% of light with a wavelength of 1064, so as to reflect the laser when the substrate 10 of the LED wafer is cut by the laser. Through the combination of the protective layer 40 and the passivation layer 26, the laser no longer acts on the epitaxial layer located on the sidewall of the isolation trench 30, and is less likely to cause damage to the epitaxial layer.

[0041] It should be noted that the width of the isolation groove 30 is 10-30µm, and the distance between the edge of the laser penetration channel 50 and the edge of the isolation groove 30 is 3-10µm. That is, the range of the passivation layer 26 and the protective layer 40 covering the epitaxial layer is 3-10µm, so that the passivation layer 26 and the laser protective layer can play the role of protecting the epitaxial layer.

[0042] Furthermore, since the LED wafer is cut by laser along the isolation trench 30 to cut the underlying substrate 10, in order to guide the laser and reduce laser reflection, a laser penetration channel 50 is formed by etching the protective layer 40 and the passivation layer 26 at the bottom of the isolation trench 30. During laser cutting, the laser can pass through the laser penetration channel 50 and act directly on the underlying substrate 10, thereby cutting the substrate 10 and reducing laser reflection. Since the substrate 10 is made of a reflective material, some laser reflection is unavoidable during the cutting of the substrate 10. This part of the reflected laser will be reflected onto the protective layer 40 on the side of the isolation trench 30. The protective layer 40 further reflects the reflected laser. Therefore, during the laser cutting of the substrate 10, the laser is less likely to damage the epitaxial layer of the chip unit 20 through the protection of the protective layer 40 and the passivation layer 26, thereby ensuring the epitaxial quality of the epitaxial layer.

[0043] It should be noted that the epitaxial layer in the chip unit 20 shown in this embodiment includes: an N-type semiconductor layer 21, a quantum well layer 22, and a P-type semiconductor layer 23 sequentially stacked on the substrate 10. The chip layer in the chip unit 20 shown in this embodiment includes: a transparent conductive layer 24, a first electrode layer, a second electrode layer, a passivation layer 26, and a protective layer 40.

[0044] In this embodiment, the protective layer 40 is a DBR structure, which is formed by overlapping a first material and a second material. The first material is SiO2 and the second material is TiO2, and the number of overlapping layers of the first material and the second material is 31.

[0045] As shown in Table 1, Table 1 is a parameter table for each layer in the protective layer 40.

[0046] Table 1 LED chips are fabricated using LED wafers with reduced laser cutting damage as shown in this embodiment. During laser cutting, the laser will cut the substrate 10 at the bottom along the laser penetration path 50 at the bottom of the isolation trench 30 between chip units 20. The reflected laser reflected by the substrate 10 will be reflected onto the protective layer 40 on the sidewall of the isolation trench 30. The protective layer 40 will further reflect the reflected laser. With the protection of the protective layer 40 and the passivation layer 26, the laser is less likely to damage the epitaxial layer of the chip unit 20, reducing laser cutting damage and effectively ensuring the epitaxial quality of the epitaxial layer.

[0047] Please see Figure 3 In this embodiment, the method for fabricating the LED wafer with reduced laser cutting damage includes steps S1-S4: Step S1: Provide a substrate and fabricate a plurality of chip cells on the substrate; wherein, an isolation trench is provided between any adjacent chip cells.

[0048] In this process, multiple chip units 20 are fabricated on the substrate 10, that is, multiple crystal depositions are performed on the substrate 10 to obtain epitaxial layers of multiple chip units 20, and a chip layer is fabricated on each epitaxial layer, thereby combining with the substrate 10 to obtain an LED wafer to be cut.

[0049] Step S2: A passivation layer is formed on the surface of the chip unit and in the isolation trench.

[0050] Step S3: A protective layer is formed on the passivation layer, the protective layer covering the passivation layer and exposing the metal electrodes of the chip layer in the chip unit.

[0051] It should be noted that when a protective layer 40 is fabricated on the passivation layer 26, the metal electrodes of the chip layer in the chip unit 20 are exposed when the protective layer 40 covers the passivation layer 26. Specifically, the N-type first electrode 251 and the P-type first electrode 252 of the first electrode layer are exposed, thereby forming through holes on the protective layer 40 to expose the N-type first electrode 251 and the P-type first electrode 252, respectively, for connection with the N-type second electrode 271 and the P-type second electrode 272 of the second electrode layer.

[0052] The purpose of creating the protective layer 40 is to protect the chip unit 20 and prevent the reflected laser from damaging the epitaxial layer of the chip unit 20 during laser cutting, thereby reducing laser cutting losses.

[0053] Step S4: At the bottom of the isolation trench, the protective layer is etched to remove at least a portion of the protective layer material, exposing the surface of the substrate, so as to form a laser penetration channel at the bottom of the isolation trench for guiding laser movement.

[0054] The purpose of forming the laser penetration channel 50 is to allow the laser to act directly on the underlying substrate 10 by pre-fabricating an opening. This prevents the laser from contacting the protective layer 40 or the passivation layer 26 and generating reflected laser. When the laser cuts the substrate 10 along the laser penetration channel 50, the unavoidable reflected laser will be further reflected by the protective layer 40, thus preventing damage to the epitaxial layer of the chip unit 20 and reducing laser cutting damage.

[0055] Compared with existing technologies, the LED wafer, fabrication method, and LED chip with reduced laser cutting damage shown in this invention have the following advantages: By arranging multiple chip units, including epitaxial layers and chip layers, on a substrate, and creating isolation trenches between adjacent chip units, a passivation layer covering the epitaxial layers and chip layers is fabricated on the surface of the chip units. A protective layer is also fabricated on the surface of the passivation layer within the isolation trenches. This protective layer, combined with the passivation layer, blocks reflected laser light generated during laser cutting of the substrate. Furthermore, a laser penetration channel at the bottom of the isolation trench guides the laser to act directly on the underlying substrate without generating additional reflected laser light. Thus, the reflected laser light generated during laser cutting of the substrate can be blocked by the protective layer and the passivation layer, protecting the epitaxial layers and chip layers, reducing laser cutting damage to LED wafers, and effectively ensuring the epitaxial quality of the epitaxial layers in LED chips.

[0056] Example 2 Please see Figure 2 The second embodiment of the present invention also provides an LED wafer with reduced laser cutting damage. This LED wafer is also used for cutting to obtain multiple individual LED chips. The LED wafer shown in this embodiment has a basically similar structure to the LED wafer shown in the first embodiment, except that: In this embodiment, the protective layer 40 includes a laser reflective sublayer 41 and a reflective protective sublayer 42 stacked on the passivation layer 26.

[0057] The material used to fabricate the laser reflective sublayer 41 is Ag metal, and the thickness of the laser reflective sublayer 41 is 1000 Å. The material used to fabricate the reflective protective sublayer 42 is an insulating material, specifically SiO2, and the thickness of the reflective protective sublayer 42 is 2000 Å.

[0058] In other words, in this embodiment, the protective layer 40 is not made of two overlapping reflective materials as in the first embodiment, but is made of two sub-layers stacked together, with each sub-layer achieving different functions by selecting specific materials.

[0059] Compared with existing technologies, the LED wafer, fabrication method, and LED chip with reduced laser cutting damage shown in this invention have the following advantages: By arranging multiple chip units, including epitaxial layers and chip layers, on a substrate, and creating isolation trenches between adjacent chip units, a passivation layer covering the epitaxial layers and chip layers is fabricated on the surface of the chip units. A protective layer is also fabricated on the surface of the passivation layer within the isolation trenches. The protective layer includes a laser reflector sublayer and a laser protection sublayer, which, in combination with the passivation layer, block reflected laser light generated during laser cutting of the substrate. Furthermore, a laser penetration channel at the bottom of the isolation trench guides the laser to act directly on the underlying substrate without generating additional reflected laser light. Thus, the reflected laser light generated during laser cutting of the substrate can be blocked by the protective layer and the passivation layer, protecting the epitaxial layers and chip layers, reducing laser cutting damage to LED wafers, and effectively ensuring the epitaxial quality of the epitaxial layers in LED chips.

[0060] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0061] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this patent should be determined by the appended claims.

Claims

1. An LED wafer with reduced laser cutting damage, characterized in that, The LED wafer includes: A substrate, and a plurality of chip units arranged on the substrate, the chip units including an epitaxial layer and a chip layer, and an isolation trench between any adjacent chip units; A passivation layer that covers the epitaxial layer and the chip layer, and exposes the metal electrodes of the chip layer; A protective layer, wherein the protective layer at least covers the surface of the passivation layer within the isolation groove; At the bottom of the isolation trench, the protective layer and the passivation layer are etched to form a laser penetration channel. When the laser cuts the adjacent chip unit along the laser penetration channel, the laser passes through the laser penetration channel to cut the substrate to form multiple individual LED chips. The protective layer has a DBR structure, which is formed by overlapping a first material and a second material. The number of overlapping layers of the first material and the second material is ≥15, and the thickness of the protective layer is ≥1.5μm.

2. The LED wafer with reduced laser cutting damage according to claim 1, characterized in that, The first material is one of SiO2 and TiO2, and the second material is the other of SiO2 and TiO2.

3. The LED wafer with reduced laser cutting damage according to claim 1, characterized in that, The protective layer includes a laser reflective sublayer and a reflective protective sublayer stacked sequentially on the passivation layer, with the reflective protective sublayer covering the outer surface of the laser reflective sublayer.

4. The LED wafer with reduced laser cutting damage according to claim 3, characterized in that, The materials used to fabricate the laser reflector sublayer include Ag, Au, and Cu metals, and the thickness of the laser reflector sublayer is 1000-10000 Å.

5. The LED wafer with reduced laser cutting damage according to claim 3, characterized in that, The material used to fabricate the reflective protective sublayer is an insulating material, including SiO2, Al2O3, and SiN. X The thickness of the reflective protective sublayer is 2000-20000 Å.

6. A method for fabricating LED wafers with reduced laser cutting damage, characterized in that, The method for preparing the LED wafer according to any one of claims 1-5 includes: A substrate is provided, and a plurality of chip cells are fabricated on the substrate; wherein an isolation trench is provided between any adjacent chip cells; A passivation layer is formed on the surface of the chip unit and within the isolation trench; A protective layer is formed on the passivation layer, the protective layer covering the passivation layer and exposing the metal electrodes of the chip layer in the chip unit; At the bottom of the isolation trench, the protective layer is etched to remove at least a portion of the protective layer material, exposing the surface of the substrate to form a laser penetration channel at the bottom of the isolation trench for guiding laser movement.

7. The method for preparing an LED wafer with reduced laser cutting damage according to claim 6, characterized in that, The step of fabricating a protective layer on the passivation layer, the protective layer covering the passivation layer, and exposing the metal electrodes of the chip layer in the chip unit specifically includes: A protective layer is formed on the passivation layer using a coating method; Photolithography and dry etching are used to etch away at least part of the protective layer material and passivation layer material to expose the N-type metal electrode and P-type metal electrode of the chip layer, respectively. or Photolithography and dry etching are used to etch away at least part of the passivation layer material to expose the substrate at the bottom of the isolation trench, as well as the N-type and P-type metal electrodes of the chip layer; a laser reflective sublayer is fabricated on the passivation layer using photolithography and deposition, so that the laser reflective sublayer covers the passivation layer on the side of the isolation trench. A reflective protective sublayer is fabricated on the laser reflective sublayer; The reflective protective sublayer formed at the bottom of the isolation trench is removed by photolithography and dry etching to obtain a protective layer containing a laser reflective sublayer and a reflective protective sublayer.

8. An LED chip, characterized in that, The LED chip is obtained by cutting the LED wafer according to any one of claims 1-5 along the laser penetration channel at the bottom of the isolation groove.

Images