A gaussian pre-modulation filter and applications
Patent Information
- Application Number
- CN202311356087.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-10-19
- Publication Date
- 2026-09-29
- Estimated Expiration
- 2043-10-19
AI Technical Summary
[0016]在利用波形存储法时,存储表中数据有一半仅是符号不同而模值相同,而且即使是在8行×8列表中也只有不多于48个点是归一化模值非±1的数据,其它点的归一化模值均是1或者-1,这样就造成存储器空间的浪费
[0031]本发明提供的一种高斯预调制滤波器,由输入移位缓存器、符号输出判决器、查表地址计算器、数据表1和数据表2组成数字滤波器,输入移位缓存器接收待调制码元高倍率二进制比特流,驱动查表地址计算器按照移入和移出输入移位缓存器特定比特位的值确定查表类型和计算查表地址,选择对应的数据表1或数据表2进行查表,然后由符号输出判决器确定其符号,即可获得实时的高斯滤波结果数据并输出。相比传统的矩形脉冲响应加权叠加法和波形存储法更节省资源,速度快,精度高。
Smart Images

Figure CN117424580B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of communication and signal processing, and relates to a Gaussian pre-modulation filter that can be applied to systems or products such as radio communication, mobile communication, aviation and marine communication, underwater acoustic communication, Bluetooth, data transmission, vector signal source, remote control, and active RFID. Background Technology
[0002] To achieve a compact frequency spectrum and reduce interference to adjacent channels, digital frequency modulation generally employs continuous phase modulation (CPM). General-purpose smooth frequency modulation (GTFM), which uses Gaussian premodulation, is the most widely used and offers better results. Gaussian premodulation involves applying Gaussian filtering to the modulating signal.
[0003] The transfer function of a Gaussian filter is expressed as:
[0004]
[0005] In the formula, T b It is the symbol period, B is the 3dB bandwidth of the Gaussian filter, and their product BT b This reflects the effect of the Gaussian filter on the modulated signal, BT b The larger the value, the larger the eye diagram opening of the modulated signal, the steeper the symbol transition, the slower the main lobe roll-off, the higher the side lobes, and the reduced inter-symbol crosstalk; BT b The smaller the value, the smaller the eye diagram opening of the modulation signal, the smoother the symbol transition, the faster the main lobe roll-off, the lower the side lobes, and the more severe the inter-symbol crosstalk.
[0006] The rectangular impulse response of a Gaussian filter is:
[0007]
[0008] in,
[0009] A bipolar NRZ sequence can be represented as b(t) = ∑a k δ(t-kT), the function of sequence b(t) after passing through a Gaussian low-pass filter is c(t)=b(t)×s(t).
[0010] Assume the maximum frequency offset is f m (Hz), frequency modulation sensitivity is K f (Hz / v), then By inputting the baseband signal into an FM modulator, a continuous phase frequency modulated signal with a compact spectrum can be obtained, also known as a GFM modulated signal. Its principle is as follows: Figure 2 As shown. Figure 2It is suitable for both analog and digital implementations. Adding a DAC interface before the FM modulator can also make it suitable for mixed digital / analog implementations.
[0011] Theoretically, the response range of a Gaussian filter is (-∞, ∞), but this is impossible to achieve in practice. Therefore, it is necessary to truncate h(t), and the truncation length is related to BT. b It is related to the value.
[0012] When the cutoff length of h(t) is 2T b At this time, the correlation length L = 3 of the partial response system, meaning that the Gaussian filtered waveform within the current symbol period is formed by the superposition of its own response and the responses of the one symbol before and after it. This simplifies the Gaussian premodulation result: there are only 8 possible combinations of three adjacent correlated symbols, thus allowing for the mapping of 8 different Gaussian filtered signals.
[0013] Therefore, the sampled values of the eight Gaussian filtered signals can be stored sequentially in advance. Then, the current symbol and the combination of the two preceding and following symbols can be used as the path address for table lookup, replacing the filter convolution operation or the weighted superposition operation of the rectangular impulse response, thus simplifying the Gaussian premodulation process. If the sampling points on each path are counted as eight points, an 8-row × 8-column table can be created, as follows:
[0014]
[0015] Where c i,j The corresponding Gaussian filter signal sampling point values can be obtained through computer simulation; i takes values from 000 to 111 (binary data), corresponding to the combination of the binary values of the current symbol and the two preceding and following symbols, serving as the row address; j takes values from 1 to 8, corresponding to the Gaussian filter signal sampling point sequence number of the current symbol period, serving as the column address, and c(t) can be obtained by sequentially looking up the table. This method is called the waveform storage method.
[0016] When using waveform storage, half of the data in the storage table differs only in sign but has the same magnitude. Even in an 8-row × 8 list, no more than 48 points have normalized magnitudes other than ±1; the normalized magnitudes of the remaining points are either 1 or -1. This results in wasted memory space. This waste increases further as the sampling rate increases. Conversely, reducing the sampling rate increases the truncation error, necessitating the use of a higher-order low-pass filter after the table lookup output to improve its characteristics; otherwise, it will lead to an increase in sidelobes. Summary of the Invention
[0017] The technical problem to be solved by this invention is:
[0018] To overcome the shortcomings of existing technologies, this invention provides a Gaussian pre-modulation filter. It is more resource-efficient, faster, and more accurate than traditional rectangular impulse response weighted superposition and waveform storage methods.
[0019] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows:
[0020] A Gaussian premodulation filter is characterized in that the Gaussian premodulation filter is a digital filter, the code sequence to be modulated is a binary code, each code is sampled at n points, where n is an even number greater than 2; the signal is fed into the digital filter bit by bit in the form of a bit stream, and the digital filter completes signal processing within the sampling interval and outputs the Gaussian filtering result point by point.
[0021] A further technical solution of the present invention: The digital filter consists of an input shift buffer, a symbol output decision unit, a lookup table address calculator, data table 1, and data table 2; the input shift buffer receives a high-rate binary bit stream of the code to be modulated, drives the lookup table address calculator to determine the lookup table type and calculate the lookup table address according to the values of specific bits shifted into and out of the input shift buffer, selects the corresponding data table 1 or data table 2 for lookup, and then the symbol output decision unit determines its symbol, thereby obtaining and outputting the real-time Gaussian filtering result data.
[0022] A further technical solution of the present invention: The input shift register is composed of a (2n+1)-bit shift register, with low-in and high-out, receiving the binary sequence of the modulated symbol at a multiple of n bit rate bit by bit, arranged from low to high, in the order a0 to a0. 2n Calculate; the digital filter output corresponds to a n The Gaussian filter result at time 1.
[0023] A further technical solution of the present invention: the symbol output decision unit determines the symbol output based on the input shift buffer a. n The decision outputs the sign of the current Gaussian filter result data.
[0024] A further technical solution of the present invention: The lookup address calculator consists of a table 1 counter, a table 2 counter, and a calculation unit, and the input is an input shift buffer a0~a 2n The output generates the valid selection of Table 1 / Table 2 and the offset of the starting address of Table 1 / Table 2; the calculation unit determines whether to maintain or adjust the values of the Table 1 counter and Table 2 counter according to the values of specific bits shifted into and out of the aforementioned input shift registers, combined with a n The decision is made to select either Table 1 or Table 2 as valid, and the absolute values of the counters in Table 1 and Table 2 are processed and output as the offset of the starting address of Table 1 and Table 2, respectively.
[0025] A further technical solution of the present invention: The data table 1 contains (n+1) double-byte hexadecimal data, stored in (n+1) data memory units starting from the first address of table 1; the values in data table 1 are determined by the corresponding BT... b The Gaussian filter signal curve mapped by the symbol combination 0-1-1 of the value is sampled at the sampling rate n and arranged in ascending order. It is obtained by digital quantization using fixed-point numbers. When the output table 1 of the aforementioned lookup address calculator is valid, the modulus value of the Gaussian filter result data is output according to the offset of the first address of table 1. Its sign bit is determined by the sign output decision unit.
[0026] A further technical solution of the present invention: The data table 2 contains (n / 2+1) double-byte hexadecimal data, stored in (n / 2+1) data memory units starting from the first address of table 2; the values in data table 2 are determined by the corresponding BT... b The Gaussian filter signal curve mapped by the 0-1-0 symbol combination of the value is sampled at a sampling rate n, and the first (n / 2+1) values are taken and arranged in ascending order. The result is obtained by digital quantization using a fixed-point number. When the output table 2 of the aforementioned lookup address calculator is valid, the modulus value of the Gaussian filter result data is output according to the offset of the first address of table 2. The sign bit is determined by the sign output decision unit.
[0027] An application of a Gaussian pre-modulated filter, characterized in that it is applied to products or systems in radio communication, mobile communication, aviation and marine communication, underwater acoustic communication, Bluetooth, data transmission, vector signal source, remote control, and active RFID.
[0028] A computer system is characterized by comprising: one or more processors, and a computer-readable storage medium for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors cause the one or more processors to implement the method described above.
[0029] A computer-readable storage medium is characterized by storing computer-executable instructions, which, when executed, are used to implement the above-described method.
[0030] The beneficial effects of this invention are as follows:
[0031] This invention provides a Gaussian premodulation filter, which consists of an input shift buffer, a symbol output decision unit, a lookup table address calculator, and data tables 1 and 2. The input shift buffer receives a high-rate binary bit stream of the symbols to be modulated, driving the lookup table address calculator to determine the lookup type and calculate the lookup address based on the values of specific bits shifted into and out of the input shift buffer. The corresponding data table 1 or data table 2 is then selected for lookup. Finally, the symbol output decision unit determines the symbol, thus obtaining and outputting the real-time Gaussian filtering result data. Compared to traditional rectangular impulse response weighted superposition and waveform storage methods, this method is more resource-efficient, faster, and more accurate.
[0032] This invention is simple in principle, saves resources, has high reliability, and is easy to implement using small-scale embedded systems. It supports high sampling rates; the higher the sampling rate, the more significant the savings compared to the traditional lookup table method, and the more ideal the Gaussian filter characteristics, eliminating the need for a subsequent low-pass filter to eliminate spurious signals. Attached Figure Description
[0033] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.
[0034] Figure 1 Schematic diagram of the principle of this invention.
[0035] Figure 2 GFM modulation principle block diagram.
[0036] Figure 3 BT b =0.3 Gaussian filter signal eye diagram.
[0037] Figure 4 The output result diagram of a specific embodiment of the present invention. Detailed Implementation
[0038] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.
[0039] This invention is used to implement a Gaussian premodulation filter. Before introducing the specific implementation scheme, it is necessary to understand the relevant knowledge and characteristics of Gaussian filters.
[0040] The inventive concept of this invention will be explained below using a symbol sampling rate of n=8 as an example.
[0041] When the correlation length L = 3, the Gaussian filtering result is only affected by one symbol before and after it. There are only 8 possible combinations of three adjacent correlated symbols, therefore 8 different Gaussian filtered signals can be mapped, such as... Figure 3 As shown.
[0042] from Figure 3 As can be seen, the amplitudes of the sampling points of the eight Gaussian filtered signal curves mapped by the associated symbol combinations are finite. When the symbol combination is 0-1-0 or 1-0-1, the amplitude of each sampling point of the corresponding Gaussian filtered signal does not exceed 5 (i.e., n / 2+1) values; when the symbol combination is not 0-1-0 or 1-0-1, the amplitude of each sampling point of the corresponding Gaussian filtered signal does not exceed 9 (i.e., n+1) values. Among them, when the symbol combination is 0-0-0 or 1-1-1, the amplitude of each sampling point of the corresponding Gaussian filtered signal is the same value, which is also the maximum value among the nine values.
[0043] If a 17-point (i.e., 2n+1) shift register is used to perform sliding sampling on the 8x code data, with low-in and high-out, arranged from low to high, using a0 to a0... 16 The result of each sliding sample can contain information about three associated symbol combinations, the state of which is related to the value of shift register a8 and a0~a 16 The number and order of 0s and 1s are related; while the type of Gaussian filtered signal curve and the sampling point position mapped by the associated symbol combination are related to the shift register's a0~a 16 Or a4~a 11 It is related to the number of 0s and 1s in the number.
[0044] Therefore, a certain signal processing method can be used to determine the values of a0 to a0 based on the sliding sample. 16 It determines which symbol combination it belongs to, and which Gaussian filter signal curve and sampling point it corresponds to.
[0045] Having understood the above knowledge and design concepts, we will now introduce the specific implementation schemes of this invention. Obviously, the described embodiments are merely a part of the embodiments of this invention, and not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.
[0046] The Gaussian digital filter used in this invention consists of an input shift buffer, a symbol output decision unit, a lookup table address calculator, data table 1, and data table 2. The sequence of symbols to be modulated uses binary code, with each symbol sampled at n = 8 points. These samples are fed bit-by-bit into the digital filter in the form of a bitstream. The digital filter completes signal processing within the sampling interval and outputs the Gaussian filtering result point-by-point. This digital filter can be implemented as a standalone premodulator or as a module within the signal processor of a digital modulator. Its input is the nth-fold frequency digital signal of the baseband symbols to be modulated, and its output is connected to an FM modulation module or a Σ-Δ modulation module. The data type of the Gaussian filter output, or how it is converted, is determined by subsequent signal processing.
[0047] 1. Input shift buffer
[0048] The input shift register consists of a (2n+1)-bit serial shift register, with low-in and high-out operation. It receives the binary sequence of the modulated symbol at a multiple of n, bit by bit, arranged from low to high, in the order a0 to a0. 2n Calculation, during initialization a0~a 2n All are 0. The digital filter output corresponds to a. n The Gaussian filter result at time 1.
[0049] Specifically: When L=3, the Gaussian filtering result is only affected by one symbol before and after it. A (2n+1)-point shift register is used to slide sample the code data at a multiple of n, each time containing information of three code symbols. Since each code symbol is sampled n=8 points, the length of the input shift register is selected as (2n+1)=17 points, arranged from low to high, with a0 to a... 16 The algorithm can contain information in sequence of three code elements at any given time.
[0050] Input the value of shift buffer a8 and a0~a 16 The relationship between the eight combinations of 0s and 1s and the three sequential symbols, and the sampled values of the Gaussian filtered signal at time a8 is shown in the table below:
[0051]
[0052] a0~a 16 The number and order of 0s and 1s affect the values of the Table 1 counter and Table 2 counter in the lookup address calculator, which can then be mapped to the curve type and sampling point position of the Gaussian filtered signal.
[0053] 2. Symbol Output Decision Controller
[0054] The sign output decision unit outputs the sign of the current Gaussian filter result data, where 1 represents negative and 0 represents positive, and the sign is determined by the logical NOT of the current input shift buffer an.
[0055] Specifically: the sign output decision unit outputs the sign of the current Gaussian filter result data, while the filter outputs the Gaussian filter result corresponding to time a8. From the results in the table above, it can be deduced that the sign bit of the filter output data is determined by the buffer a8 (i.e., a... n The value of ) is logically NOT determined.
[0056] 3. Table lookup address calculator
[0057] The table lookup address calculator generates the valid selection of Table 1 / Table 2 and the offset of the first address of Table 1 / Table 2.
[0058] The lookup address calculator consists of a table 1 counter, a table 2 counter, and a calculation unit. The input is the aforementioned input shift buffer a0 to a0. 2n The output generates the valid selection of Table 1 / Table 2 and the offset of the starting address of Table 1 / Table 2. During initialization, the Table 1 counter is assigned a value of -(2n+1), and the Table 2 counter is assigned a value of -n. When a shift input occurs, the calculation unit processes it sequentially according to the following logic:
[0059] (1) If a is removed 2n The bit shifted into a0 is the same, so the counter value in Table 1 remains unchanged;
[0060] (2) If a is removed 2n The bit shifted into a0 is different from the original bit, so the original counter value in Table 1 is increased by 2 × (2a0 - 1);
[0061] (3) If a is removed (3n / 2-1) and move into a (n / 2) Since the bits are the same, the counter value in Table 2 remains unchanged;
[0062] (4) If a is removed (3n / 2-1) and move into a (n / 2) The bits are different, so the original table 2 counter value is increased by 2 × (2a) (n / 2) -1);
[0063] (5) Whether the selection in Table 1 / Table 2 is valid is determined by a. n The value is determined by the sign bit of the counter in Table 1:
[0064]
[0065] (6) When a 2n ≠a n When, the offset of the starting address of Table 1 is equal to the absolute value of the Table 1 counter + 1 divided by 2; when a 2n =a n At that time, the offset of the first address of Table 1 is equal to the absolute value of the Table 1 counter minus 1 divided by 2.
[0066] (7) The offset of the first address of Table 2 is equal to the absolute value of the counter in Table 2 divided by 2.
[0067] Specifically: Table 1 counter and Table 2 counter are used to assist in calculating the offset of the table's starting address. During initialization, Table 1 counter is assigned a value of -17 (i.e., -(2n+1)), and Table 2 counter is assigned a value of -8 (i.e., -n).
[0068] When a shift input occurs, the following possible scenarios can occur:
[0069] (1) If a is removed 16 (i.e., a) 2n The bits shifted into a0 are the same, a0~a 16 The number of 0s and 1s in the table remains unchanged, and the table address offset of Table 1 remains unchanged, therefore the value of the Table 1 counter remains unchanged.
[0070] (2) If a is removed 16 Unlike the bit shifted into a0, a0~a 16 The number of 0s and 1s in the table changes, and the address offset in Table 1 changes accordingly. The change is related to a0. When a0 = 0, the original address offset decreases by 2; when a0 = 1, the original address offset increases by 2. Therefore, the address offset can be expressed as the original Table 1 counter value + 2 × (2a0 - 1). Because a0 is shifted out... 16 The maximum number of consecutive occurrences where the bit shifted into a0 is different from the bit shifted into a0 is 17, so the value of the counter in Table 1 varies among odd numbers between -17 and 17.
[0071] (3) If a is removed 11 (i.e., a) (3n / 2-1) ) and move into a4 (i.e., a) (n / 2) The bits of a4 to a4 are the same. 11 The number of 0s and 1s in Table 2 remains unchanged, and the table address offset in Table 2 remains unchanged, therefore the counter value in Table 2 remains unchanged.
[0072] (4) If a is removed 11 Unlike the bit shifted into a4, a4~a 11 The number of 0s and 1s in the table changes, and the address offset in Table 2 changes accordingly. The change is related to a4; when a4 = 0, the original address offset decreases by 2; when a4 = 1, the original address offset increases by 2. Therefore, the address offset can be expressed as the original Table 2 counter value + 2 × (2a4 - 1). Because a4 ~ a4... 11 The value of the counter in Table 2 can change from all 0s to all 1s or vice versa, so the value of the counter changes between even numbers in the range of -8 to 8.
[0073] (5) The validity of Table 1 / Table 2 selection is determined by the value of a8 and the sign bit of the current Table 1 counter, as shown in the following table:
[0074]
[0075] (6) When Table 1 is selected, the handling of the offset of the first address of Table 1 is shown in the following table:
[0076]
[0077] Therefore, when a 2n ≠a n When, the offset of the starting address of Table 1 is equal to the absolute value of the Table 1 counter + 1 divided by 2; when a 2n =a n At that time, the offset of the first address of Table 1 is equal to the absolute value of the Table 1 counter minus 1 divided by 2.
[0078] (7) When Table 2 is selected, the handling of the offset of the first address of Table 2 is shown in the following table:
[0079] 0-1-0 2、4、6、8、6、4、2、0 1、2、3、4、3、2、1、0 1-0-1 -2、-4、-6、-8、-6、-4、-2、0 1、2、3、4、3、2、1、0
[0080] Therefore, the offset of the first address of Table 2 is equal to the absolute value of the counter in Table 2 divided by 2.
[0081] 4. Data Table 1
[0082] Data Table 1 contains (n+1) double-byte hexadecimal data entries, stored in (n+1) data memory units starting from the first address of Table 1. The values in Data Table 1 are determined by the corresponding BT... b The Gaussian filter signal curve mapped by the 0-1-1 symbol combination of the value is sampled at a sampling rate n and arranged in ascending order, and then digitally quantized using a fixed-point number. When the output of the aforementioned lookup table address calculator is valid, the modulus value of the Gaussian filter result data is output according to the offset of the first address of Table 1, and its sign bit is determined by the sign output decision unit.
[0083] Specifically: the values in data table 1 are derived from the corresponding BT. b The Gaussian filter signal curve mapped by the 0-1-1 symbol combination of the values is obtained by sampling at a sampling rate of n=8, arranging the samples in ascending order, and performing digital quantization using fixed-point quantization. For example... Figure 3 As shown.
[0084] The following are some different BTs b Gaussian filter data table 1:
[0085] 0 0 0 0 0 0 0 0 1 4967 5644 7478 9661 11891 16088 21446 2 9835 11091 14384 18053 21450 26653 30827 3 14513 16165 20273 24387 27625 31208 32615 4 18918 20727 24913 28540 30832 32496 32762 5 22985 24685 28287 30906 32171 32736 32767 6 26665 27999 30555 32076 32620 32765 32767 7 29929 30678 31961 32579 32741 32767 32767 8 32767 32767 32767 32767 32767 32767 32767
[0086] When the output of table 1 from the lookup address calculator is valid, the magnitude of the Gaussian filter result data is looked up according to the offset of the first address of table 1, and its sign bit is determined by the sign output decision unit.
[0087] 5. Data Table 2
[0088] Data Table 2 contains (n / 2+1) double-byte hexadecimal data, stored in (n / 2+1) data memory units starting from the first address of Table 2. The values in Data Table 2 are determined by the corresponding BT... b The Gaussian filter signal curve mapped by the 0-1-0 symbol combination of the value is sampled at a sampling rate n, and the first (n / 2+1) values are taken, arranged in ascending order, and digitally quantized using fixed-point quantization. When the output table 2 of the aforementioned lookup address calculator is valid, the modulus value of the Gaussian filter result data is output according to the offset of the first address of table 2, and its sign bit is determined by the sign output decision unit.
[0089] Specifically: the values in data table 2 are derived from the corresponding BT. b The Gaussian filter signal curve mapped by the 0-1-0 symbol combination of the values is sampled at a sampling rate of n=8, and the first 5 values are taken, arranged in ascending order, and digitally quantized using fixed-point quantization. For example... Figure 3 As shown.
[0090] The following are some different BTs b Gaussian filter data table 2:
[0091] 0 0 0 0 0 0 0 0 1 2129 3555 6672 9473 11865 16088 21446 2 3733 6323 12172 17362 21303 26651 30827 3 4731 8083 15793 22526 27029 31177 32615 4 5069 8687 17059 24313 28897 32225 32757
[0092] When the output table 2 of the lookup address calculator is valid, the magnitude of the Gaussian filter result data is looked up according to the offset of the first address of table 2, and its sign bit is determined by the sign output decision unit.
[0093] Using the above scheme for BT b The code sequence "0010011000" with a value of 0.3 was processed, and the comparison of its input and output results is shown in the figure. Figure 4 It is evident that the Gaussian filter smooths the input.
[0094] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the scope of the technology disclosed in the present invention, and such modifications or substitutions should all be covered within the scope of protection of the present invention.
Claims
1. A Gaussian premodulation filter, characterized in that, The Gaussian premodulation filter is a digital filter. The sequence of symbols to be modulated uses binary code, and each symbol is sampled at n points, where n is an even number greater than 2. The signals are fed into the digital filter bit by bit in the form of a bitstream. The digital filter completes signal processing within the sampling interval and outputs the Gaussian filtering result point by point. The digital filter consists of an input shift buffer, a symbol output decision unit, a lookup table address calculator, data table 1, and data table 2. The input shift buffer receives the high-rate binary bitstream of the symbols to be modulated, drives the lookup table address calculator to determine the lookup table type and calculate the lookup table address according to the values of specific bits shifted into and out of the input shift buffer, selects the corresponding data table 1 or data table 2 for lookup, and then the symbol output decision unit determines the symbol, thus obtaining and outputting the real-time Gaussian filtering result data. The input shift buffer is composed of a (2n+1)-bit shift register, low-in, high-out, receiving the n-rate binary sequence of the symbols to be modulated bit by bit, arranged from low to high, with a0 to a1. 2n Calculate; the digital filter output corresponds to a n The Gaussian filtering result at time t; the symbol output decision unit is based on the input shift buffer a. n The decision outputs the sign of the current Gaussian filter result data; the lookup table address calculator consists of a table 1 counter, a table 2 counter, and a calculation unit, and its input is the input shift buffer a0~a0. 2n The output generates the valid selection of Table 1 / Table 2 and the offset of the starting address of Table 1 / Table 2; the calculation unit determines whether to maintain or adjust the values of the Table 1 counter and Table 2 counter according to the values of specific bits shifted into and out of the aforementioned input shift registers, combined with a n The decision is made to select either Table 1 or Table 2 as valid, and the absolute values of the counters in Table 1 and Table 2 are processed and output as the offsets of the starting addresses of Table 1 and Table 2, respectively. Table 1 contains (n+1) double-byte hexadecimal data, stored in (n+1) data memory units starting from the first address of Table 1. The values in Table 1 are determined by the corresponding... BT b The Gaussian filter signal curve mapped by the 0-1-1 symbol combination of the value is sampled at a sampling rate n, arranged in ascending order, and digitally quantized using fixed-point quantization. When the output of the aforementioned lookup table calculator, Table 1, is valid, the modulus value of the Gaussian filter result data is output according to the offset of the first address of Table 1, and its sign bit is determined by the sign output decision unit. BT b It is the symbol period T b 3dB bandwidth of Gaussian filter B The product; the data table 2 contains (n / 2+1) double-byte hexadecimal data, stored in (n / 2+1) data memory units starting from the first address of table 2; the values in data table 2 are determined by the corresponding BT b The Gaussian filter signal curve mapped by the 0-1-0 symbol combination of the value is sampled at a sampling rate n, and the first (n / 2+1) values are taken and arranged in ascending order. The result is obtained by digital quantization using a fixed-point number. When the output table 2 of the aforementioned lookup address calculator is valid, the modulus value of the Gaussian filter result data is output according to the offset of the first address of table 2. The sign bit is determined by the sign output decision unit.