Method of forming a semiconductor structure

Abstract

A method for forming a semiconductor structure includes: providing a substrate; forming a first composite structure and a second composite structure on the substrate, the second composite structure having a width greater than that of the first composite structure, the first composite structure including a plurality of first sacrificial layers and a plurality of first channel layers, and the second composite structure including a plurality of second sacrificial layers and a plurality of second channel layers; and performing a plurality of cycles of processing on the first composite structure and the second composite structure until the plurality of first sacrificial layers and the plurality of second sacrificial layers are removed, each cycle of processing including: forming a protective film on surfaces of the first channel layers and the second channel layers; etching the protective film, the plurality of first sacrificial layers, and the plurality of second sacrificial layers until the protective film is removed, thereby forming a plurality of first intermediate sacrificial layers and a plurality of second intermediate sacrificial layers; and continuing the cycle of processing with the first intermediate sacrificial layers as the first sacrificial layers and the second intermediate sacrificial layers as the second sacrificial layers. The performance of a wrap-around gate device is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and in particular to a method for forming a semiconductor structure. Background Technology

[0002] In the current semiconductor field, the FinFET (Fin Field-Effect Transistor) is an emerging multi-gate device. Compared with planar metal-oxide-semiconductor field-effect transistors (MOSFETs), FinFETs have stronger short-channel rejection and higher operating current, and are now widely used in various semiconductor devices. However, with the further development of semiconductor technology, the transistor size has shrunk to below a few nanometers. The size of FinFETs themselves has already reached its limit. Limitations in fin spacing, short-channel effect, leakage current, and materials have made transistor manufacturing precarious, and even the physical structure cannot be completed.

[0003] Gate-all-around (GAA) devices have become a new direction for research and development in the industry. This technology is characterized by the gate completely surrounding the channel on all four sides. The source and drain no longer contact the substrate; instead, multiple source and drain electrodes, arranged laterally and perpendicularly to the gate in linear (rod-like), planar, or sheet-like shapes, are used to achieve the basic structure and function of a MOSFET. This design largely solves various problems caused by reducing the gate spacing, including capacitance effects. Furthermore, since the channel is surrounded by the gate on all four sides, the channel current flows more smoothly than with the three-sided enclosure of a FinFET.

[0004] However, as an important direction for development in the industry, gate-all-around devices still require further improvement. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide a method for forming a semiconductor structure to improve the performance of gate-all-around devices.

[0006] To solve the above-mentioned technical problems, the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a first composite structure and a second composite structure that are mutually discrete on the substrate, wherein the width of the second composite structure is greater than the width of the first composite structure, the first composite structure comprising a plurality of first sacrificial layers and a plurality of first channel layers alternately stacked along the normal direction of the substrate surface, and the second composite structure comprising a plurality of second sacrificial layers and a plurality of second channel layers alternately stacked along the normal direction of the substrate surface; performing a plurality of cyclic processing on the first composite structure and the second composite structure until the plurality of first sacrificial layers and the plurality of second sacrificial layers are removed, wherein each cyclic processing method comprises: forming a protective film on the surface of the first channel layer and the second channel layer by in-situ selective atomic layer deposition; etching the protective film, the plurality of first sacrificial layers and the plurality of second sacrificial layers by in-situ atomic layer etching until the protective film is removed, forming a plurality of first intermediate sacrificial layers and a plurality of second intermediate sacrificial layers; using the first intermediate sacrificial layers as first sacrificial layers and the second intermediate sacrificial layers as second sacrificial layers, and continuing the cyclic processing.

[0007] Optionally, the method for forming a first composite structure and a second composite structure that are mutually independent on the substrate includes: forming a first initial composite structure and a second initial composite structure that are mutually independent on the substrate, wherein the initial first composite structure includes a plurality of first initial sacrificial layers and a plurality of first channel layers that are alternately overlapped along the normal direction of the substrate surface, and the second composite structure includes a plurality of second initial sacrificial layers and a plurality of second channel layers that are alternately overlapped along the normal direction of the substrate surface; etching the plurality of first initial sacrificial layers and the plurality of second initial sacrificial layers to form a plurality of first sacrificial layers and a plurality of second sacrificial layers, wherein the sidewalls of the first sacrificial layers are recessed relative to the sidewalls of the first channel layers, and the sidewalls of the second sacrificial layers are recessed relative to the sidewalls of the second channel layers.

[0008] Optionally, in-situ selective atomic layer deposition and in-situ atomic layer etching processes can be performed in each cycle using an atomic layer etching device.

[0009] Optionally, the method for forming a protective film on the surface of the first channel layer and the second channel layer by in-situ selective atomic layer deposition includes: forming an initial protective film on the surface of the first channel layer, the first sacrificial layer, the second channel layer and the second sacrificial layer by in-situ selective atomic layer deposition, wherein the thickness of the initial protective film on the surface of the first channel layer and the second channel layer is greater than the thickness of the film on the surface of the first sacrificial layer and the second sacrificial layer; etching the initial protective film by in-situ atomic layer etching until the surface of the first sacrificial layer and the second sacrificial layer is exposed, thereby forming a protective film on the surface of the first channel layer and the second channel layer.

[0010] Optionally, the in-situ selective atomic layer deposition process and the in-situ atomic layer etching process can be performed using an atomic layer etching device.

[0011] Optionally, the process parameters of the in-situ selective atomic layer deposition process include: the gas includes SiH4 or SiH6, and the gas also includes SiCl4, O2 and CH4; the gas volume ranges from 5 sccm to 200 sccm; the reaction time ranges from 6 seconds to 120 seconds; the reaction temperature ranges from 20℃ to 120℃; the plasma excitation power ranges from 20W to 1000W; and the bias voltage is 0V.

[0012] Optionally, in the in-situ selective atomic layer deposition process, the materials of the first channel layer and the second channel layer have a first interface settling rate, and the materials of the first sacrificial layer and the second sacrificial layer have a second interface settling rate, and the first interface settling rate is greater than the second interface settling rate.

[0013] Optionally, the materials of the first and second trench layers include silicon, the materials of the first and second sacrificial layers are silicon-germanium, and the material of the protective film includes oxide.

[0014] To address the aforementioned technical problems, the present invention also provides a method for forming a semiconductor structure, comprising: providing a substrate having a first composite structure and a second composite structure that are mutually discrete, the width of the second composite structure being greater than the width of the first composite structure, the first composite structure comprising a plurality of first sacrificial layers and a plurality of first channel layers that alternately overlap along the normal direction of the substrate surface, and the second composite structure comprising a plurality of second initial sacrificial layers and a plurality of second channel layers that alternately overlap along the normal direction of the substrate surface; etching the plurality of first sacrificial layers and the plurality of second initial sacrificial layers until the plurality of first sacrificial layers are removed and a plurality of second sacrificial layers are formed, the sidewalls of the second sacrificial layers being recessed relative to the sidewalls of the second channel layers; after removing the plurality of first sacrificial layers and forming the plurality of second sacrificial layers, forming a protective film on the surfaces of the plurality of first channel layers and the plurality of second channel layers by a selective deposition process; after forming the protective film, etching the plurality of second sacrificial layers until the plurality of second sacrificial layers are removed; and after removing the plurality of second sacrificial layers, removing the protective film.

[0015] Optionally, a plurality of first sacrificial layers and a plurality of second initial sacrificial layers are etched on a first process machine, and the protective film is formed on a second process machine.

[0016] Optionally, the materials of the first and second trench layers include silicon, the materials of the first and second sacrificial layers are silicon-germanium, and the material of the protective film includes oxide.

[0017] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0018] In the semiconductor structure formation method of the present invention, the width of the second composite structure is greater than the width of the first composite structure. The first composite structure includes a plurality of first sacrificial layers and a plurality of first channel layers alternately stacked along the normal direction of the substrate surface. The second composite structure includes a plurality of second sacrificial layers and a plurality of second channel layers alternately stacked along the normal direction of the substrate surface. Furthermore, the first composite structure and the second composite structure are subjected to a plurality of cyclic processing steps until the plurality of first sacrificial layers and the plurality of second sacrificial layers are removed. Each cyclic processing step includes: forming a protective film on the surface of the first channel layer and the second channel layer using an in-situ selective atomic layer deposition process; etching the protective film, the plurality of first sacrificial layers, and the plurality of second sacrificial layers using an in-situ atomic layer etching process until the protective film is removed, forming a plurality of first intermediate sacrificial layers and a plurality of second intermediate sacrificial layers; using the first intermediate sacrificial layers as the first sacrificial layers and the second intermediate sacrificial layers as the second sacrificial layers, and continuing the cyclic processing. Therefore, during each etching process of removing several first sacrificial layers and several second sacrificial layers, the exposed surfaces of the first channel layer and the second channel layer can be reduced by the protective film, thereby protecting the first channel layer and the second channel layer and reducing etching loss. As a result, while removing the first sacrificial layers and the second sacrificial layers with different widths, over-etching of the first channel layer can be reduced. Thus, after removing the wider second sacrificial layer, the thickness deviation between the first channel layer and the second channel layer is small, thereby improving the performance of the all-around gate device.

[0019] In the semiconductor structure formation method of the present invention, the width of the second composite structure is greater than the width of the first composite structure. The first composite structure includes a plurality of first sacrificial layers and a plurality of first channel layers that are alternately overlapped along the normal direction of the substrate surface. The second composite structure includes a plurality of second initial sacrificial layers and a plurality of second channel layers that are alternately overlapped along the normal direction of the substrate surface. Furthermore, the plurality of first sacrificial layers and the plurality of second initial sacrificial layers are etched until the plurality of first sacrificial layers are removed and a plurality of second sacrificial layers are formed, wherein the sidewalls of the second sacrificial layers are recessed relative to the sidewalls of the second channel layers. After the plurality of first sacrificial layers are removed and the plurality of second sacrificial layers are formed, a protective film is formed on the surfaces of the plurality of first channel layers and the plurality of second channel layers by a selective deposition process. After the protective film is formed, the plurality of second sacrificial layers are etched until the plurality of second sacrificial layers are removed. Since a protective film is formed on the surfaces of several first channel layers and several second channel layers by selective deposition after the removal of the first sacrificial layer and before the complete removal of the second initial sacrificial layer (i.e., after the formation of the second sacrificial layer), the protective film can prevent the exposure of the surface of the first channel layer and reduce the exposed surface of the second channel layer during the etching process of removing the second sacrificial layer after the removal of the first sacrificial layer. This protects the first and second channel layers and reduces etching loss. As a result, over-etching of the first channel layer can be reduced while removing the first sacrificial layer and the second initial sacrificial layer with different widths. Therefore, after removing the wider second initial sacrificial layer, the thickness deviation between the first and second channel layers is small, thereby improving the performance of the gate all-around device. Attached Figure Description

[0020] Figures 1 to 2 This is a schematic diagram of the steps involved in forming a semiconductor structure.

[0021] Figures 3 to 9 This is a cross-sectional structural schematic diagram of each step in a method for forming a semiconductor structure according to an embodiment of the present invention;

[0022] Figures 10 to 14 This is a cross-sectional structural schematic diagram of each step in the method for forming a semiconductor structure according to another embodiment of the present invention. Detailed Implementation

[0023] As described in the background section, the performance of all-around gate devices formed in the prior art needs improvement. A method for forming a semiconductor structure will now be explained and analyzed.

[0024] Figures 1 to 2 This is a schematic diagram of the steps involved in forming a semiconductor structure.

[0025] Please refer to Figure 1 Provides a base of 100.

[0026] Please continue to refer to this. Figure 1 A first composite structure 110 and a second composite structure 120 are formed on the substrate 100, which are mutually independent, and the width of the second composite structure 120 is greater than the width of the first composite structure 110.

[0027] The first composite structure 110 includes a plurality of first sacrificial layers 111 and a plurality of first channel layers 112 that are alternately overlapped along the normal direction of the surface of the substrate 100.

[0028] The second composite structure 120 includes a plurality of second sacrificial layers 121 and a plurality of second channel layers 122 that are alternately overlapped along the normal direction of the surface of the substrate 100.

[0029] Specifically, by increasing the width of the second composite structure 120, the width of the second channel layer 122 is increased compared to the width of the first channel layer 112, thereby increasing the startup current of the all-around gate device.

[0030] Please refer to Figure 2 Etch several first sacrificial layers 111 and several second sacrificial layers 121 until several first sacrificial layers 111 and several second sacrificial layers 121 are removed.

[0031] However, in the above-described formation method, the width of the second composite structure 120 is greater than the width of the first composite structure 110. Correspondingly, the width of the second sacrificial layer 121 is greater than the width of the first sacrificial layer 112. Therefore, the first sacrificial layer 111 is removed before the second sacrificial layer 121. As a result, during the overall process of removing the second sacrificial layer 121, the first channel layer 112 experiences more severe losses and forms etching loads compared to the second channel layer 122. This leads to a severe thickness deviation between the first channel layer 112 and the second channel layer 122, causing uncontrollable changes in the electrical characteristics of the all-around gate device at channels of different widths. Consequently, the performance of the all-around gate device is poor.

[0032] To solve the above-mentioned technical problems, the present invention provides a method for forming a semiconductor structure. By forming a protective film on the surface of the first channel layer and the second channel layer before the etching step in the entire process of removing several first sacrificial layers and several second sacrificial layers, the first channel layer and the second channel layer are protected and etching loss is reduced, thereby improving the performance of the all-around gate device.

[0033] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0034] Figures 3 to 9 This is a cross-sectional structural schematic diagram of each step in a method for forming a semiconductor structure according to an embodiment of the present invention.

[0035] Please refer to Figure 3 Provides a base of 200.

[0036] The substrate 200 is made of semiconductor materials.

[0037] In this embodiment, the material of the substrate 200 includes silicon.

[0038] In other embodiments, the substrate material includes silicon carbide, silicon-germanium, a multi-element semiconductor material composed of group III-V elements, silicon-on-insulator (SOI), or germanium-on-insulator (GOI), etc. The multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP, etc.

[0039] Next, a first composite structure and a second composite structure, which are separate from each other, are formed on the substrate 200. For detailed steps on forming the first composite structure and the second composite structure, please refer to [link to documentation]. Figure 4 and Figure 5 .

[0040] Please refer to Figure 4 A first initial composite structure 210a and a second initial composite structure 220a, which are mutually independent, are formed on the substrate 200.

[0041] The width W1 of the first initial composite structure 210a is greater than the width W2 of the second initial composite structure 220a.

[0042] The first initial composite structure 210a includes a plurality of first initial sacrificial layers 211a and a plurality of first channel layers 212 that are alternately overlapped along the normal direction of the surface of the substrate 200.

[0043] The first initial sacrificial layer 211a provides materials for forming the first sacrificial layer.

[0044] In this embodiment, the material of the first initial sacrificial layer 211a is silicon germanium, and the material of the first channel layer 212 is silicon.

[0045] The second initial composite structure 220a includes a plurality of second initial sacrificial layers 221a and a plurality of second channel layers 222 that are alternately overlapped along the normal direction of the surface of the substrate 200.

[0046] The second initial sacrificial layer 221a provides material for forming the second sacrificial layer.

[0047] In this embodiment, the material of the second initial sacrificial layer 221a is silicon germanium, and the material of the second channel layer 222 is silicon.

[0048] In this embodiment, the method for forming the first initial composite structure 210a and the second initial composite structure 220a includes: forming a composite material layer (not shown) on the surface of a substrate 200, the composite material layer including a plurality of sacrificial material layers (not shown) and a plurality of channel material layers (not shown) that alternately overlap along the surface of the substrate 200; forming a first mask structure (not shown) and a second mask structure (not shown) that are mutually independent on the surface of the composite material layer, the width of the second mask structure being greater than the width of the first mask structure; etching the composite material layer using the first mask structure and the second mask structure as masks until the surface of the substrate 200 is exposed, thereby forming the first initial composite structure 210a and the second initial composite structure 220a.

[0049] In this embodiment, the etching process of the composite material layer includes at least one of dry etching and wet etching.

[0050] In this embodiment, after forming the first initial composite structure 210a and the second initial composite structure 220a, the substrate 200 is etched using the first mask structure and the second mask structure as masks to form a first protrusion 201 located below the first initial composite structure 210a and a second protrusion 202 located below the second initial composite structure 220a, so as to form a groove in the substrate 200 to provide space for forming an isolation dielectric layer.

[0051] In this embodiment, after the first protrusion 201 and the second protrusion 202 are formed, an isolation dielectric layer 240 is formed on the surface of the substrate 200.

[0052] Please refer to Figure 5 A number of first initial sacrificial layers 211a and a number of second initial sacrificial layers 221a are etched to form a number of first sacrificial layers 211b and a number of second sacrificial layers 221b.

[0053] Thus, a first composite structure 210b and a second composite structure 220b, which are mutually independent, are formed on the substrate 200. The width of the second composite structure 210b is greater than the width of the first composite structure 220b. The first composite structure 210b includes a plurality of first sacrificial layers 211b and a plurality of first channel layers 212 that are alternately stacked along the normal direction of the surface of the substrate 200. The second composite structure 220b includes a plurality of second sacrificial layers 221b and a plurality of second channel layers 222 that are alternately stacked along the normal direction of the surface of the substrate 200.

[0054] Specifically, the sidewall of the first sacrificial layer 211b is recessed relative to the sidewall of the first channel layer 212, and the sidewall of the second sacrificial layer 221b is recessed relative to the sidewall of the second channel layer 222.

[0055] Because the sidewall of the first sacrificial layer 211b is recessed relative to the sidewall of the first channel layer 212, the in-situ selective atomic layer deposition process is more difficult to deposit the initial protective film material on the sidewall surfaces of the first sacrificial layer 211b and the second sacrificial layer 221b during subsequent cycle processing to form the initial protective film. This further increases the thickness difference between the initial protective film thickness on the surface of the first channel layer 212 and the surface of the first sacrificial layer 211b, as well as the thickness difference between the initial protective film thickness on the surface of the second channel layer 222 and the surface of the second sacrificial layer 221b. This makes the initial protective film on the surfaces of the first sacrificial layer 211b and the second sacrificial layer 221b removed more quickly, thereby further reducing the difficulty of forming the protective film.

[0056] Preferably, the spacing between the sidewall of the first sacrificial layer 211b and the sidewall of the first channel layer 212 is in the range of 1 nanometer to 5 nanometers, and the spacing between the sidewall of the second sacrificial layer 221b and the sidewall of the second channel layer 222 is in the range of 1 nanometer to 5 nanometers.

[0057] In this embodiment, the material of the first sacrificial layer 211b is silicon germanium, and the material of the second sacrificial layer 221b is silicon germanium.

[0058] In this embodiment, the process of etching a plurality of first initial sacrificial layers 211a and a plurality of second initial sacrificial layers 221a includes: a dry etching process.

[0059] Preferably, the dry etching process for etching a plurality of first initial sacrificial layers 211a and a plurality of second initial sacrificial layers 221a includes in-situ atomic layer etching (ALE) to enable the etching process to be completed in the same process chamber as the etching process in subsequent cycle processing, thereby further improving process stability.

[0060] Next, the first composite structure 210b and the second composite structure 220b are subjected to several cycles of processing until several first sacrificial layers 211b and several second sacrificial layers 221b are removed.

[0061] For detailed processing steps in each loop, please refer to [link / reference]. Figures 6 to 8 .

[0062] First, a protective film is formed on the surfaces of the first channel layer 212 and the second channel layer 222 by in-situ selective atomic layer deposition (ALD).

[0063] For details on the steps involved in forming the protective film in this embodiment, please refer to [link / reference]. Figure 6 and Figure 7 .

[0064] Please refer to Figure 6An initial protective film 230 is formed on the surfaces of the first channel layer 212, the first sacrificial layer 211b, the second channel layer 222, and the second sacrificial layer 221b using an in-situ selective atomic layer deposition (ALD) process. The thickness of the initial protective film 230 on the surfaces of the first channel layer 212 and the second channel layer 222 is greater than the thickness of the first sacrificial layer 211b and the second sacrificial layer 221b.

[0065] The initial protective film 230 provides materials for forming the protective film.

[0066] Specifically, the material of the initial protective film 230 includes oxides.

[0067] Since the materials of the first channel layer 212 and the second channel layer 222 are different from the materials of the first sacrificial layer 211b and the second sacrificial layer 221b, the interfacial settling rates of the materials of the first channel layer 212 and the second channel layer 222 can be different from those of the materials of the first sacrificial layer 211b and the second sacrificial layer 221b through in-situ selective atomic layer deposition.

[0068] Specifically, in the in-situ selective atomic layer deposition process, the materials of the first channel layer 212 and the second channel layer 222 have a first interfacial settling rate, and the materials of the first sacrificial layer 211b and the second sacrificial layer 221b have a second interfacial settling rate, wherein the first interfacial settling rate is greater than the second interfacial settling rate. Thus, an initial protective film 230 is formed on the surfaces of the first channel layer 212 and the second channel layer 222, with a film thickness greater than that on the surfaces of the first sacrificial layer 211b and the second sacrificial layer 221b.

[0069] Specifically, since the first channel layer 212 and the second channel layer 222 are made of silicon, and the first sacrificial layer 211b and the second sacrificial layer 221b are made of silicon-germanium, and the in-situ selective atomic layer deposition process can make the deposition rate of oxide at the silicon interface greater than that at the silicon-germanium interface, the deposition rate at the first interface can be greater than that at the second interface.

[0070] Preferably, the thickness difference between the initial protective film 230 on the surface of the first channel layer 212 and the surface of the first sacrificial layer 211b is in the range of 1 nanometer to 2 nanometers, and the thickness difference between the initial protective film 230 on the surface of the second channel layer 222 and the surface of the second sacrificial layer 221b is in the range of 1 nanometer to 2 nanometers.

[0071] In this embodiment, the process parameters of the in-situ selective atomic layer deposition process include: the gas includes SiH4 or SiH6, and the gas also includes SiCl4, O2 and CH4; the gas volume ranges from 5 sccm to 200 sccm; the reaction time ranges from 6 seconds to 120 seconds; the reaction temperature ranges from 20°C to 120°C; the plasma excitation power ranges from 20W to 1000W; and the bias voltage is 0V.

[0072] Please refer to Figure 7 The initial protective film is etched using in-situ atomic layer etching (ALE) until the surfaces of the first sacrificial layer 211b and the second sacrificial layer 221b are exposed, forming a protective film 231 on the surfaces of the first channel layer 212 and the second channel layer 222.

[0073] In this embodiment, the in-situ selective atomic layer deposition (SALD) and in-situ atomic layer etching (ALD) processes are performed using an atomic layer etching (ALD) apparatus to form the protective film 231. This allows the protective film 231 to be formed within the same process chamber, resulting in good process stability.

[0074] In this embodiment, the material of the protective film 231 includes oxides.

[0075] Please refer to Figure 8 The protective film 231, several first sacrificial layers 211b and several second sacrificial layers 221b are etched using an in-situ atomic layer etching (ALE) process until the protective film 231 is removed, forming several first intermediate sacrificial layers 211c and several second intermediate sacrificial layers 221c.

[0076] Specifically, in-situ selective atomic layer deposition and in-situ atomic layer etching processes are performed in each cycle using atomic layer etching equipment.

[0077] Please continue to refer to this. Figure 8 The first intermediate sacrificial layer 211c is used as the first sacrificial layer (in the next cycle), and the second intermediate sacrificial layer 221c is used as the second sacrificial layer (in the next cycle), and the cycle process continues.

[0078] Therefore, by performing several iterations, several first sacrificial layers 211b and several second sacrificial layers 221b are removed (e.g. Figure 9 (As shown).

[0079] Due to the second composite structure 220b (such as...) Figure 5 The width of the composite structure 210b (as shown) is greater than that of the first composite structure 210b (as Figure 5 The width of the first composite structure 210b (as shown) includes a plurality of first sacrificial layers 211b (as shown) alternately stacked along the normal direction of the surface of the substrate 200. Figure 5(as shown) and several first channel layers 212, second composite structure 220b (as shown) Figure 5 The diagram shows a plurality of second sacrificial layers 221b and a plurality of second channel layers 222 alternately stacked along the normal direction of the surface of the substrate 200. The first composite structure 210b and the second composite structure 220b are subjected to the aforementioned plurality of cyclic processes until the plurality of first sacrificial layers 211b and the plurality of second sacrificial layers 221b are removed. Therefore, during the etching process of each cyclic process for removing the plurality of first sacrificial layers 211b and the plurality of second sacrificial layers 221b, the exposed surfaces of the first channel layer 212 and the second channel layer 222 can be reduced by the protective film 231, thereby protecting the first channel layer 212 and the second channel layer 222 and reducing etching losses. Thus, while removing the first sacrificial layers 211b and the second sacrificial layers 221b with different widths, over-etching of the first channel layer 212 can be reduced. Consequently, after removing the wider second sacrificial layer 221b, the thickness deviation between the first channel layer 212 and the second channel layer 222 is small, thereby improving the performance of the all-around gate device.

[0080] Furthermore, since several cycles of processing are performed in the same process chamber in this embodiment, the stability and controllability of the entire process are good, which is conducive to forming a highly reliable semiconductor structure.

[0081] Specifically, in this embodiment, after removing several first sacrificial layers 211b and several second sacrificial layers 221b, the thickness t of the first channel layer 212 is... ch1 (like Figure 9 (as shown in the diagram) and the thickness t of the second channel layer 222 ch2 (like Figure 9 The deviation between (as shown) is less than 0.5 nanometers, and the spacing t between adjacent first channel layers 212 is... sp1 (like Figure 9 The spacing t between the second channel layer 222 and the adjacent second channel layer 222 (as shown in the diagram) sp2 (like Figure 9 The deviation between (as shown in the figure) is less than 0.5 nanometers.

[0082] Figures 10 to 14 This is a cross-sectional structural schematic diagram of each step in the method for forming a semiconductor structure according to another embodiment of the present invention.

[0083] Please refer to Figure 10 A substrate 300 is provided, on which a first composite structure 310 and a second composite structure 320 are mutually independent, wherein the width M2 of the second composite structure 320 is greater than the width M1 of the first composite structure 310.

[0084] The substrate 300 is made of semiconductor materials.

[0085] In this embodiment, the material of the substrate 300 includes silicon.

[0086] In other embodiments, the substrate material includes silicon carbide, silicon-germanium, a multi-element semiconductor material composed of group III-V elements, silicon-on-insulator (SOI), or germanium-on-insulator (GOI), etc. The multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP, etc.

[0087] In this embodiment, the substrate has a first protrusion 301 located below the first composite structure 310 and a second protrusion 302 located below the second composite structure 320.

[0088] In this embodiment, the substrate 300 has an isolation dielectric layer 340 on its surface, and the surface of the isolation dielectric layer 340 is lower than the top surface of the first protrusion 301 and the top surface of the second protrusion 302.

[0089] The first composite structure 310 includes a plurality of first sacrificial layers 311 and a plurality of first channel layers 312 that are alternately overlapped along the normal direction of the surface of the substrate 300.

[0090] In this embodiment, the material of the first sacrificial layer 311 is silicon-germanium, and the material of the first channel layer 312 is silicon.

[0091] The second composite structure 320 includes a plurality of second initial sacrificial layers 321a and a plurality of second channel layers 322 that are alternately overlapped along the normal direction of the surface of the substrate 300.

[0092] In this embodiment, the material of the second initial sacrificial layer 321a is silicon germanium, and the material of the second channel layer 322 is silicon.

[0093] Please refer to Figure 11 The first sacrificial layer 311 and the second initial sacrificial layer 321a are etched until the first sacrificial layer 311 is removed and the second sacrificial layer 321b is formed, wherein the sidewall of the second sacrificial layer 321b is recessed relative to the sidewall of the second channel layer 322.

[0094] In this embodiment, the process of etching a plurality of first sacrificial layers 311 and a plurality of second initial sacrificial layers 321a includes at least one of dry etching process and wet etching process.

[0095] Preferably, a number of first sacrificial layers 311 and a number of second initial sacrificial layers 321a are etched using a dry etching process.

[0096] In this embodiment, the material of the second sacrificial layer 321b is silicon germanium.

[0097] Next, please refer to Figure 12 A protective film 330 is formed on the surfaces of several first trench layers 312 and several second trench layers 322 by a selective deposition process.

[0098] In this embodiment, a plurality of first sacrificial layers 311 and a plurality of second initial sacrificial layers 321a are etched on a first process machine, and the protective film 330 is formed on a second process machine.

[0099] On the one hand, the materials of the first channel layer 212 and the second channel layer 222 are different from the materials of the first sacrificial layer 211b and the second sacrificial layer 221b. On the other hand, several first sacrificial layers 311 and several second initial sacrificial layers 321a are etched on a first process equipment, and the protective film 330 is formed on a second process equipment. That is, the process equipment for forming the protective film 330 has high independence. Therefore, compared with Figures 3 to 9 In the cyclic processing of the illustrated embodiment, the selective deposition process in this embodiment can deposit the material of the protective film 330 with better selectivity for the material (silicon) of the first channel layer 212 and the second channel layer 222 and the material (silicon-germanium) of the second sacrificial layer 221b, so as to achieve the formation of the protective film 330 directly on the surface of several first channel layers 312 and several second channel layers 322 through the selective deposition process.

[0100] Furthermore, since several first sacrificial layers 311 and several second initial sacrificial layers 321a (first process equipment) are etched on different process equipment to form the protective film 330 (second process equipment), the limitations on the process equipment are reduced.

[0101] In this embodiment, the material of the protective film 330 includes oxides.

[0102] Please refer to Figure 13 After the protective film 330 is formed, several second sacrificial layers 321b are etched until several second sacrificial layers 321b are removed.

[0103] Since a protective film 330 is formed on the surfaces of several first channel layers 312 and several second channel layers 322 by selective deposition after removing the first sacrificial layer 311 and before completely removing the second initial sacrificial layer 321a (i.e., after forming the second sacrificial layer 321b), the protective film 330 can prevent the exposure of the surface of the first channel layer 312 and reduce the exposed surface of the second channel layer 322 during the etching process of removing the second sacrificial layer 321b after removing the first sacrificial layer 311. This protects the first channel layer 312 and the second channel layer 322 and reduces etching loss. As a result, while removing the first sacrificial layer 311 and the second initial sacrificial layer 321a with different widths, over-etching of the first channel layer 312 can be reduced. Therefore, after removing the wider second initial sacrificial layer 321a, the thickness deviation between the first channel layer 312 and the second channel layer 322 is small, thereby improving the performance of the all-around gate device.

[0104] In this embodiment, the process of etching several second sacrificial layers 321b includes at least one of dry etching and wet etching.

[0105] Preferably, a number of second sacrificial layers 321b are etched using a wet etching process.

[0106] Wet etching is characterized by high selectivity. Therefore, in the process of etching several second sacrificial layers 321b, wet etching can easily achieve a greater etching selectivity ratio between the second sacrificial layer 321b and the protective film 330, so as to better protect the first channel layer 312 and the second channel layer 322 and reduce etching loss.

[0107] Specifically, in this embodiment, several second sacrificial layers 321b are etched on a third process machine.

[0108] Please refer to Figure 14 After removing several second sacrificial layers 321b, the protective film 330 is removed.

[0109] In this embodiment, the process for removing the protective film 330 includes at least one of dry etching and wet etching.

[0110] Preferably, the protective film 330 is removed using a wet etching process.

[0111] Specifically, in this embodiment, after removing the protective film 330, the thickness t of the first channel layer 312 is... ch3 (like Figure 14 (as shown) and the thickness t of the second channel layer 322 ch4 (like Figure 14 The deviation between (as shown) is less than 0.5 nanometers, and the spacing t between adjacent first channel layers 312 is...sp3 (like Figure 14 The spacing t between the second channel layer 322 and the adjacent second channel layer 322 (as shown in the diagram) sp4 (like Figure 14 The deviation between (as shown in the figure) is less than 0.5 nanometers.

[0112] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, include: Provide a base; A first composite structure and a second composite structure are formed on the substrate, the width of the second composite structure is greater than the width of the first composite structure, the first composite structure includes a plurality of first sacrificial layers and a plurality of first channel layers that are alternately stacked along the normal direction of the substrate surface, and the second composite structure includes a plurality of second sacrificial layers and a plurality of second channel layers that are alternately stacked along the normal direction of the substrate surface. The first composite structure and the second composite structure are subjected to several cycles of processing until several first sacrificial layers and several second sacrificial layers are removed. Each cycle of processing includes forming a protective film on the surface of the first channel layer and the second channel layer by in-situ selective atomic layer deposition. The protective film, several first sacrificial layers, and several second sacrificial layers are etched using an in-situ atomic layer etching process until the protective film is removed, forming several first intermediate sacrificial layers and several second intermediate sacrificial layers; the first intermediate sacrificial layers are used as first sacrificial layers, the second intermediate sacrificial layers are used as second sacrificial layers, and the cycle process continues.

2. The method for forming a semiconductor structure as described in claim 1, characterized in that, The method for forming a first composite structure and a second composite structure that are mutually discrete on the substrate includes: A first initial composite structure and a second initial composite structure are formed on the substrate, the first initial composite structure including a plurality of first initial sacrificial layers and a plurality of first channel layers that are alternately overlapped along the normal direction of the substrate surface, and the second initial composite structure including a plurality of second initial sacrificial layers and a plurality of second channel layers that are alternately overlapped along the normal direction of the substrate surface. A plurality of first initial sacrificial layers and a plurality of second initial sacrificial layers are etched to form a plurality of first sacrificial layers and a plurality of second sacrificial layers, wherein the sidewalls of the first sacrificial layers are recessed relative to the sidewalls of the first channel layers, and the sidewalls of the second sacrificial layers are recessed relative to the sidewalls of the second channel layers.

3. The method for forming a semiconductor structure as described in claim 1, characterized in that, In-situ selective atomic layer deposition and in-situ atomic layer etching processes are performed in each cycle using an atomic layer etching device.

4. The method for forming a semiconductor structure as described in claim 1, characterized in that, A method for forming a protective film on the surfaces of the first channel layer and the second channel layer using an in-situ selective atomic layer deposition process includes: An initial protective film is formed on the surfaces of the first channel layer, the first sacrificial layer, the second channel layer, and the second sacrificial layer using an in-situ selective atomic layer deposition process. The thickness of the initial protective film on the surfaces of the first channel layer and the second channel layer is greater than the thickness of the film on the surfaces of the first sacrificial layer and the second sacrificial layer. The initial protective film is etched using an in-situ atomic layer etching process until the surfaces of the first sacrificial layer and the second sacrificial layer are exposed, forming a protective film on the surfaces of the first channel layer and the second channel layer.

5. The method for forming a semiconductor structure as described in claim 4, characterized in that, The in-situ selective atomic layer deposition process and the in-situ atomic layer etching process are performed using an atomic layer etching device.

6. The method for forming a semiconductor structure as described in claim 4, characterized in that, The process parameters of the in-situ selective atomic layer deposition process include: the gas includes SiH4 or SiH6, and the gas also includes SiCl4, O2 and CH4; the gas volume ranges from 5 sccm to 200 sccm; the reaction time ranges from 6 seconds to 120 seconds; the reaction temperature ranges from 20℃ to 120℃; the plasma excitation power ranges from 20W to 1000W; and the bias voltage is 0V.

7. The method for forming a semiconductor structure as described in claim 4, characterized in that, In the in-situ selective atomic layer deposition process, the materials of the first channel layer and the second channel layer have a first interface settling rate, and the materials of the first sacrificial layer and the second sacrificial layer have a second interface settling rate, and the first interface settling rate is greater than the second interface settling rate.

8. The method for forming a semiconductor structure as described in claim 1, characterized in that, The first and second trench layers are made of silicon, the first and second sacrificial layers are made of silicon-germanium, and the protective film is made of oxide.

9. A method for forming a semiconductor structure, characterized in that, include: A substrate is provided, on which a first composite structure and a second composite structure are mutually independent, the width of the second composite structure being greater than the width of the first composite structure, the first composite structure comprising a plurality of first sacrificial layers and a plurality of first channel layers that are alternately overlapped along the normal direction of the substrate surface, and the second composite structure comprising a plurality of second initial sacrificial layers and a plurality of second channel layers that are alternately overlapped along the normal direction of the substrate surface. Etch several first sacrificial layers and several second initial sacrificial layers until several first sacrificial layers are removed and several second sacrificial layers are formed, wherein the sidewalls of the second sacrificial layers are recessed relative to the sidewalls of the second trench layer; After removing several first sacrificial layers and forming several second sacrificial layers, a protective film is formed on the surfaces of several first trench layers and several second trench layers by a selective deposition process; After the protective film is formed, several second sacrificial layers are etched until several second sacrificial layers are removed; After removing several second sacrificial layers, the protective film is removed.

10. The method for forming a semiconductor structure as described in claim 9, characterized in that, A plurality of first sacrificial layers and a plurality of second initial sacrificial layers are etched on a first process machine, and the protective film is formed on a second process machine.

11. The method for forming a semiconductor structure as described in claim 9, characterized in that, The first and second trench layers are made of silicon, the first and second sacrificial layers are made of silicon-germanium, and the protective film is made of oxide.

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