Lateral insulated gate bipolar transistor and method of manufacturing the same

Abstract

The application relates to a lateral insulated gate bipolar transistor, which comprises a drift region, a first well region, a first electrode lead-out region, a second electrode lead-out region and a conductance modulation structure. The drift region has a first conductive type, the conductance modulation structure is arranged in the drift region between the first electrode lead-out region and the second electrode lead-out region, and the conductance modulation structure comprises a first doped region arranged in an upper layer of the drift region and having the first conductive type, and a second doped region arranged in the first doped region and having a second conductive type. The first conductive type and the second conductive type are opposite, and the doping concentration of the first doped region is greater than the doping concentration of the drift region. The on-state voltage drop of the lateral insulated gate bipolar transistor can be greatly reduced, and the power consumption of the lateral insulated gate bipolar transistor is reduced.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to the lateral insulated gate bipolar transistor and its fabrication method. Background Technology

[0002] Lateral insulated-gate bipolar transistors (LIGBTs) possess advantages such as high current handling capability, low saturation voltage drop, low switching losses, simple drive circuitry, and low drive power, making them the most ideal power switching devices currently available. LIGBTs are widely used in electrode control, medium-frequency switching power supplies, inverters, and air conditioners, among other fields.

[0003] However, traditional lateral insulated gate bipolar transistors have drawbacks such as insufficient on-state voltage drop, high static power consumption, and premature breakdown. Summary of the Invention

[0004] Therefore, it is necessary to provide a lateral insulated gate bipolar transistor and its fabrication method to solve at least one of the above-mentioned technical problems.

[0005] To achieve the objectives of this application, the following technical solution is adopted:

[0006] A lateral insulated gate bipolar transistor, comprising:

[0007] The drift region has the first type of conductivity.

[0008] The first well region, located on the upper surface of the drift region, has a second conductivity type, the first conductivity type being the opposite of the second conductivity type;

[0009] A first electrode lead-out area and a second electrode lead-out area, wherein the first electrode lead-out area is located on the upper surface layer of the first well region, and the second electrode lead-out area is located on the upper surface layer of the drift region;

[0010] A conductivity modulation structure is disposed in the drift region between the first electrode lead-out region and the second electrode lead-out region. The conductivity modulation structure includes a first doped region disposed on the upper surface layer of the drift region and having a first conductivity type, and a second doped region disposed within the first doped region and having a second conductivity type. The doping concentration of the first doped region is greater than the doping concentration of the drift region.

[0011] In one embodiment, the number of the first doped region and the number of the second doped region are both at least one.

[0012] In one embodiment, both the first doped region and the second doped region are suspended in the air; or,

[0013] The first doped region is floating, and the second doped region is connected to an external potential.

[0014] In one embodiment, the doping depth of the first doped region is less than the doping depth of the first well region.

[0015] In one embodiment, the doping concentration values ​​of the first doped region and the second doped region are on the same order of magnitude.

[0016] In one embodiment, the upper surface layer of the drift region is provided with at least one set of conductivity modulation structure components, each of the conductivity modulation structure components including a plurality of conductivity modulation structures spaced apart along the length direction of the conductive channel.

[0017] In one embodiment, the upper surface of the drift region is provided with multiple sets of the conductivity modulation structure components spaced apart along the width direction of the conductive channel.

[0018] In one embodiment, the lateral insulated gate bipolar transistor further includes a second well region disposed on the upper surface of the drift region and having a first conductivity type, the second well region being located on the side of the entire conductivity modulation structure away from the first well region;

[0019] The upper surface layer of the second well region is provided with a second electrode lead-out region, the second electrode lead-out region having the second conductivity type, and the first electrode lead-out region having the first conductivity type.

[0020] In one embodiment, the upper surface layer of the first well region is further provided with a first well region lead-out region having a second conductivity type, and the potential of the first well region lead-out region is shorted to that of the first electrode lead-out region.

[0021] In one embodiment, the lateral insulated gate bipolar transistor further includes a semiconductor substrate, the semiconductor substrate including a substrate and a buried dielectric layer stacked together, the drift region being disposed on the side of the buried dielectric layer opposite to the substrate.

[0022] In one embodiment, the lateral insulated gate bipolar transistor further includes a gate structure located on the first well region, one side of the gate structure extending to cover a portion of the first electrode lead-out region, and the other side of the gate structure extending to cover a portion of the drift region.

[0023] A method for fabricating a lateral insulated gate bipolar transistor, comprising:

[0024] A semiconductor substrate is provided, the semiconductor substrate including a substrate having a second conductivity type;

[0025] A drift region is formed on the semiconductor substrate above the substrate, the drift region having a first conductivity type, the first conductivity type being opposite to the second conductivity type;

[0026] A first well region having a second conductivity type is formed on the upper surface layer of the drift region;

[0027] An electrical conductivity modulation structure is formed in the drift region and spaced apart from the first well region. The electrical conductivity modulation structure includes a first doped region formed on the upper surface of the drift region and having a first conductivity type, and a second doped region formed in the first doped region and having a second conductivity type. The doping concentration of the first doped region is greater than the doping concentration of the drift region.

[0028] A first electrode lead-out region and a second electrode lead-out region are formed. The first electrode lead-out region is formed on the upper surface layer of the first well region, and the second electrode lead-out region is formed on the side of the entire conductivity modulation structure away from the first well region.

[0029] In one embodiment, forming a conductivity modulation structure spaced apart from the first well region within the drift region includes:

[0030] Ions of a first conductivity type are implanted into a portion of the upper surface of the drift region, and a trap is formed to create the first doped region.

[0031] A second type of conductivity ion is implanted into the first doped region, and a trap is formed to create the second doped region.

[0032] The aforementioned lateral insulated-gate bipolar transistor (IGBT) and its fabrication method, when the IGBT is turned on, opens the conductive channel, allowing electrons to enter the drift region from the first electrode extraction region. As the number of electrons increases, a large number of electrons surge towards the second electrode extraction region, gradually forming a voltage drop in the drift region. This voltage drop enables the PN junction formed between the first and second doped regions to conduct forward, injecting a large number of holes into the drift region together with the second electrode extraction region, creating a conductivity modulation effect. This significantly reduces the on-state voltage drop of the IGBT and also reduces its static power consumption. When the IGBT is turned off, a superjunction-like structure forms between the first and second doped regions, which can mutually aid in depletion, preventing premature breakdown of the electric field and maintaining the IGBT's breakdown voltage. In other words, while reducing the device's static power consumption, a significant decrease in breakdown voltage is effectively avoided. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the transverse insulated gate bipolar transistor in the first embodiment;

[0034] Figure 2 This is a schematic diagram of the transverse insulated gate bipolar transistor in the second embodiment;

[0035] Figure 3 This is a schematic diagram of the transverse insulated gate bipolar transistor in the third embodiment;

[0036] Figure 4 This is a flowchart of a method for fabricating a lateral insulated gate bipolar transistor in one embodiment.

[0037] In the figure: 110, semiconductor substrate; 111, substrate; 112, buried dielectric layer; 120, drift region; 130, first electrode lead-out region; 140, second electrode lead-out region; 150, gate structure; 151, field oxide layer; 160, conductivity modulation structure; 161, first doped region; 162, second doped region; 171, first well region; 172, first well region lead-out region; 180, second well region. Detailed Implementation

[0038] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0039] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0040] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this invention, the first element, component, area, layer, or portion discussed below may be referred to as the second element, component, area, layer, or portion.

[0041] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below” or “under” the other element or feature will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0042] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0043] Embodiments of the invention are described herein with reference to cross-sectional views that serve as schematic diagrams of ideal embodiments (and intermediate structures). Thus, variations in the shape shown can be anticipated due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of the invention should not be limited to the specific shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing processes. For example, implantation regions shown as rectangular typically have rounded or curved features at their edges and / or implantation concentration gradients, rather than a binary change from implantation regions to non-implantation regions. Similarly, the buried regions formed by implantation can result in some implantation in the region between the buried region and the surface traversed during implantation. Therefore, the regions shown in the figures are substantially schematic, and their shapes are not intended to show the actual shapes of the regions of the device and are not intended to limit the scope of the invention.

[0044] The semiconductor terminology used in this article is the technical terminology commonly used by those skilled in the art. For example, for P-type and N-type impurities, in order to distinguish the doping concentration, P+ type represents heavily doped P-type, P type represents moderately doped P-type, P- type represents lightly doped P-type, N+ type represents heavily doped N-type, N type represents moderately doped N-type, and N- type represents lightly doped N-type. Figure 1 This is a schematic diagram of the structure of a lateral insulated gate bipolar transistor according to an embodiment of this application.

[0045] In some embodiments, please refer to Figure 1 The lateral insulated gate bipolar transistor provided in one embodiment of this application includes a drift region 120, a first well region 171, a first electrode lead-out region 130, a second electrode lead-out region 140, and a conductivity modulation structure 160.

[0046] The drift region 120 has a first conductivity type, and the first well region 171 is disposed on the upper surface layer of the drift region 120. The first well region 171 has a second conductivity type, and the first conductivity type and the second conductivity type are opposite.

[0047] In this configuration, one of the first and second conductivity types is P-type, and the other is N-type. For example, the first conductivity type is N-type, and the second conductivity type is P-type; or, the first conductivity type is P-type, and the second conductivity type is N-type.

[0048] The first electrode lead-out region 130 is disposed on the upper surface layer of the first well region 171, the second electrode lead-out region 140 is disposed on the upper surface layer of the drift region 120, and the conductivity modulation structure 160 is disposed within the drift region 120 between the first electrode lead-out region 130 and the second electrode lead-out region 140. The conductivity modulation structure 160 includes a first doped region 161 disposed on the upper surface layer of the drift region 120 and having a first conductivity type, and a second doped region 162 located within the first doped region 161 and having a second conductivity type. The doping concentration of the first doped region 161 is greater than the doping concentration of the drift region 120. Since the first doped region 161 has a first conductivity type and the second doped region 162 has a second conductivity type, a PN junction can be formed between the first doped region 161 and the second doped region 162.

[0049] For example, in this embodiment, the first conductivity type is N-type and the second conductivity type is P-type, that is, the conductivity type of the first doped region 161 and the drift region 120 is N-type and the conductivity type of the second doped region 162 is P-type.

[0050] In the aforementioned lateral insulated-gate bipolar transistor (IGBT), when the IGBT is turned on, its conductive channel opens, allowing electrons to enter the drift region 120 from the first electrode lead-out region 130. As the number of electrons increases, a large number of electrons surge towards the second electrode lead-out region 140, gradually forming a voltage drop within the drift region 120. This voltage drop causes the PN junction formed between the first doped region 161 and the second doped region 162 to conduct forward, injecting a large number of holes into the drift region 120 together with the second electrode lead-out region 140, creating a conductivity modulation effect. This significantly reduces the on-state voltage drop of the IGBT and also reduces its static power consumption. When the IGBT is turned off, a superjunction-like structure forms between the first doped region 161 and the second doped region 162, which can mutually aid in depletion, preventing premature breakdown of the electric field and maintaining the IGBT's breakdown voltage. In other words, while reducing the device's static power consumption, a significant decrease in breakdown voltage is effectively avoided.

[0051] In this embodiment, the doping concentration of the first doped region 161 is greater than that of the drift region 120, which increases the doping concentration of the drift region 120 and reduces the on-resistance. Thus, when the lateral gate bipolar transistor (IGBT) is turned on, the conductive channel of the IGBT opens, and electrons enter the drift region 120 through the conductive channel from the first electrode lead-out region 130. Because the doping concentration of the first doped region 161 is greater than that of the drift region 120, the resistance of the drift region 120 to electrons is reduced, allowing more and more electrons to surge into the second electrode lead-out region 140. This results in a faster formation of a voltage drop in the drift region 120 that enables the forward conduction of the PN junction formed between the first doped region 161 and the second doped region 162. After the PN junction is forward-conducting, it can inject a large number of holes into the drift region 120 together with the second electrode lead-out region 140, forming a conductivity modulation effect. This significantly reduces the on-state voltage drop of the IGBT and also reduces the static power consumption of the IGBT.

[0052] It should be noted that if the doping concentration of the first doped region 161 is too high, holes flowing into the parasitic PN diode formed between the first doped region 161 and the second doped region 162 after forward bias will be recombinated by the first doped region 161. From the perspective of breakdown voltage in the off state, if the doping concentration of the first doped region 161 and the second doped region 162 is too high, it will cause the parasitic PN diode formed between the first doped region 161 and the second doped region 162 to introduce a new electric field when the lateral insulated gate bipolar transistor is statically turned off, leading to premature device breakdown. Based on this, the doping concentration and volume of the first doped region 161 and the second doped region 162 need to be reasonably set according to the doping concentration of the drift region 120 and the requirements of the device. While meeting the requirements of the on-state voltage drop and withstand voltage of the lateral insulated gate bipolar transistor, the higher the doping concentration and volume of the first doped region 161, the better.

[0053] In some embodiments, please refer to Figures 1-3 The number of first doped region 161 and second doped region 162 is at least one.

[0054] The number of first doped regions 161 and second doped regions 162 can be one or more. Alternatively, a first doped region 161 may contain multiple independent second doped regions 162, with the first doped region 161 generally having a thin-layer structure. Alternatively, multiple first doped regions 161 may extend along the length of the conductive channel, with each first doped region 161 containing multiple independent second doped regions 162. Of course, multiple first doped regions 161 may also extend along the width of the conductive channel, with each first doped region 161 containing multiple independent second doped regions 162. No specific limitations are imposed here. The number of conductivity modulation structures 160 needs to be reasonably set according to the doping concentration of the drift region 120 and the requirements of the device, so as to meet the requirements of the on-state voltage drop and withstand voltage of the lateral insulated gate bipolar transistor. It can also be understood that the configuration of the conductivity modulation structure 160 in this application can ensure that the first doped region 161 and the second doped region 162 added in the drift region 120 are zero biased in the static state. At this time, it is similar to the mutual depletion of the superjunction. At the same time, it can ensure that the residual concentration and area of ​​the first doped region 161 will not affect the depletion region of the drift region. It is also necessary to avoid adding too much first doped region 161 that cannot be depleted by the second doped region 162, causing the depletion region of the drift region to shrink, thus avoiding affecting the breakdown voltage of the device. Figure 3 An example of a first doped region 161 and a second doped region 162 is given.

[0055] It is understood that the conductivity modulation structure 160 enables the drift region 120 to form a low-resistance path for hole injection, resulting in a significant conductivity modulation effect, which greatly reduces the on-state voltage drop of the lateral insulated gate bipolar transistor and effectively reduces the static power consumption of the lateral insulated gate bipolar transistor.

[0056] In some embodiments, both the first doped region 161 and the second doped region 162 are suspended in the air.

[0057] In other embodiments, the first doped region 161 is floating and the second doped region 162 is externally connected to a potential.

[0058] In some embodiments, the doping depth of the first doped region 161 is less than the doping depth of the first well region 171.

[0059] In some embodiments, the doping concentration values ​​of the first doped region 161 and the second doped region 162 are of the same order of magnitude, which can well meet the requirements of the lateral insulated gate bipolar transistor for on-state voltage drop, withstand voltage, etc.

[0060] In some embodiments, please refer to Figure 1 and Figure 2 The upper surface of the drift region 120 is provided with at least one set of conductivity modulation structure components, each of which includes multiple conductivity modulation structures 160 spaced apart along the length of the conductive channel.

[0061] When the lateral insulated gate bipolar transistor (IGBT) is turned on, the conductive channel of the IGBT opens. It can be understood that this conductive channel is formed in the first well region 171. Thus, as electrons enter the drift region 120 from the first electrode lead-out region 130 through this conductive channel and surge towards the second electrode lead-out region 140, as more and more electrons surge towards the second electrode lead-out region 140, a voltage drop can be formed in the drift region 120 that enables the forward conduction of the PN junction formed between the first doped region 161 and the second doped region 162 in each conductivity modulation structure 160. In this way, multiple PN junctions can inject a large number of holes into the drift region 120 together with the second electrode lead-out region 140, forming a significant conductivity modulation effect. This greatly reduces the on-state voltage drop of the IGBT, effectively reduces the static power consumption of the IGBT, avoids premature breakdown, does not affect the withstand voltage of the device, and the breakdown voltage is not significantly reduced. When the lateral insulated-gate bipolar transistor (IGBT) is turned off, a superjunction-like structure forms between the first and second doped regions. This structure can mutually aid in depletion, preventing premature breakdown of the electric field and maintaining the high breakdown voltage of the IGBT. In other words, while reducing the device's static power consumption, a significant decrease in breakdown voltage is effectively avoided.

[0062] It should be noted that the multiple conductivity modulation structures 160 are not connected together, which allows sufficient carrier movement paths to be provided in the drift region 120.

[0063] Specifically, such as Figure 1 In the embodiment shown, the length direction of the conductive channel is parallel to the x-axis.

[0064] In some embodiments, please refer to Figure 2 The upper surface of the drift region 120 is provided with multiple sets of conductivity modulation structure components arranged at intervals along the width direction of the conductive channel.

[0065] When the lateral insulated-gate bipolar transistor (IGBT) is turned on, its conductive channel opens. As more and more electrons flow from the first electrode extraction region 130 to the second electrode extraction region 140 through this conductive channel, a voltage drop is formed in the drift region 120 that enables the forward conduction of the PN junction formed between the first doped region 161 and the second doped region 162 in each conductivity modulation structure 160. Thus, the conductivity modulation structures 160 in multiple sets of conductivity modulation structure components can all enable the drift region 120 to form a low-resistance path for hole injection, resulting in a significant conductivity modulation effect. This greatly reduces the on-state voltage drop of the IGBT and effectively reduces its static power consumption. Specifically, as... Figure 1 In the embodiment shown, the width direction of the conductive channel is parallel to the y-axis.

[0066] In some embodiments, the lateral insulated gate bipolar transistor further includes a second well region 180 disposed on the upper surface of the drift region 120 and having a first conductivity type. The second well region 180 is located on the side of all conductivity modulation structures 160 away from the first well region 171. The upper surface of the second well region 180 is provided with a second electrode lead-out region 140 having a second conductivity type, and the first electrode lead-out region 130 having a first conductivity type. Alternatively, it can be understood that all conductivity modulation structures 160 are located in the drift region 120 between the first well region 171 and the second well region 180.

[0067] When the lateral insulated-gate bipolar transistor (IGBT) enters the turn-off process, the charge carriers stored in the drift region 120 due to the conductivity modulation effect during the on-state can quickly flow to the drain through the second well region 180 of the first conductivity type, effectively shortening the turn-off time. Simultaneously, when the IGBT is in the on-state, the PN junction formed between the second electrode lead-out region 140 and the second well region 180 is reverse-biased, effectively preventing breakdown of the second electrode lead-out region 140 and improving the breakdown voltage capability of the IGBT.

[0068] In some embodiments, the upper surface of the first well region 171 is further provided with a first well region lead-out region 172 having a second conductivity type, and the first well region lead-out region 172 is short-circuited with the potential of the first electrode lead-out region 130.

[0069] It is understandable that the first electrode lead-out region 130, the first well region lead-out region 172, and the drift region 120 together constitute a parasitic NPN transistor. If the first well region 171 is not provided, when the lateral insulated gate bipolar transistor is turned on and the condition that the minority carriers at the base of the parasitic NPN transistor can cross is met, the parasitic NPN transistor may be turned on, which would cause the lateral insulated gate bipolar transistor to fail during the turn-on phase. Conversely, adding a first well region 171 of the second conductivity type below the first well region lead-out region 172 of the second conductivity type can increase the base concentration of the parasitic NPN transistor, reduce the minority carrier lifetime and prevent them from crossing to the emitter, thus effectively preventing the parasitic NPN transistor at the source end from turning on. Adding a first well region 171 is equivalent to forming a gradually changing channel doping between the first well region lead-out region 172 and the first well region 171. This can adjust the threshold voltage, reduce the substrate resistance 111, prevent parasitic NPN transistors from turning on, and increase the concentration of the first well region 171, shorten the channel length, reduce the on-resistance, and reduce the device area.

[0070] In some embodiments, the lateral insulated gate bipolar transistor further includes a semiconductor substrate 110, which includes a substrate 111 and a buried dielectric layer 112 stacked together, a drift region 120 disposed on the side of the buried dielectric layer 112 away from the substrate 111, and the substrate 111 having a second conductivity type.

[0071] Without the buried dielectric layer 112, the second electrode lead-out region 140, the drift region 120, and the substrate 111 together constitute a PNP transistor. Thus, when the lateral insulated-gate bipolar transistor (LIGBT) is turned on, this PNP transistor is very likely to turn on, causing drain current to flow through it to the substrate 111, leading to failure. Therefore, a buried dielectric layer 112 is provided between the substrate 111 and the drift region 120. The buried dielectric layer 112 provides electrical isolation between the drift region 120 and the substrate 111, preventing the formation of the PNP transistor and effectively preventing leakage. This gives the LIGBT advantages such as low leakage current, low on-state resistance, and latch-up resistance.

[0072] In some embodiments, the lateral insulated gate bipolar transistor further includes a gate structure 150 located on the first well region 171, with one side of the gate structure 150 extending to cover a portion of the first electrode lead-out region 130 and the other side of the gate structure 150 extending to cover a portion of the drift region 120.

[0073] In some embodiments, a field oxide layer 151 is further provided on the upper surface of the drift region 120, and the gate structure 150 extends to cover a portion of the field oxide layer 151, with the gate conductive layer extending to cover the field oxide layer 151 serving as a field plate.

[0074] In some embodiments, the gate structure 150 includes a gate dielectric layer and a gate conductive layer (the gate dielectric layer is described in this application). Figure 1 , Figure 2 , Figure 3 (Not shown in the image), a gate dielectric layer is disposed on the first well region 171, with one end extending to cover a portion of the first electrode lead-out region 130, and the other end extending to cover the drift region 120 not covered by the field oxide layer 151, and contacting the field oxide layer 151. A gate conductive layer is formed on the gate dielectric layer, and the side of the gate conductive layer away from the first electrode lead-out region 130 also extends to cover a portion of the field oxide layer 151.

[0075] It is understandable that the gate structure 150 is disposed on a portion of the first well region 171. On the one hand, under the control of the applied voltage, the overlapping area between the first well region 171 and the gate structure 150 is used to form a conductive channel. On the other hand, during the fabrication of the lateral insulated gate bipolar transistor, the gate structure 150 can also serve as an injection barrier layer for the first electrode lead-out region 130, so that the first electrode lead-out region 130 can be self-aligned for injection, ensuring the width of the conductive channel.

[0076] The material of the gate conductive layer can be polycrystalline silicon, metal, metal nitride, or metal silicide; no specific limitation is made here.

[0077] The gate dielectric layer may include, but is not limited to, a silicon oxide layer. The method for forming the gate dielectric layer may be chemical vapor deposition, physical vapor deposition, atomic layer deposition, or in-situ steam generation (ISSG), and no specific limitation is made here.

[0078] In some embodiments, the orthographic projection of the entire conductivity modulation structure 160 onto the drift region 120 is laterally spaced from the orthographic projection of the gate conductive layer onto the drift region 120. That is, the conductivity modulation structure 160 is not disposed below the gate conductive layer, but rather between the gate conductive layer and the second well region 180. This avoids the gate voltage of the gate conductive layer affecting the conductivity modulation structure 160, thereby better utilizing the conductivity modulation structure 160 to reduce the on-state voltage drop of the lateral insulated gate bipolar transistor.

[0079] This application provides a method for fabricating a lateral insulated gate bipolar transistor, which can be used to manufacture the lateral insulated gate bipolar transistor of any of the foregoing embodiments. Figure 4 This is a flowchart of a method for fabricating a lateral insulated gate bipolar transistor in one embodiment, including the following steps:

[0080] S210. A semiconductor substrate is provided, the semiconductor substrate including a substrate having a second conductivity type.

[0081] S220. A drift region is formed on a semiconductor substrate above the substrate. The drift region has a first conductivity type, which is opposite to the second conductivity type.

[0082] S230, A first well region with a second conductivity type is formed on the upper surface layer of the drift region.

[0083] S240. A conductivity modulation structure is formed in the drift region and spaced apart from the first well region. The conductivity modulation structure includes a first doped region formed on the upper surface of the drift region and having a first conductivity type, and a second doped region formed in the first doped region and having a second conductivity type. The doping concentration of the first doped region is greater than the doping concentration of the drift region.

[0084] S250, forming a first electrode lead-out region and a second electrode lead-out region, the first electrode lead-out region being formed on the upper surface layer of the first well region, and the second electrode lead-out region being formed on the side of the entire conductivity modulation structure away from the first well region.

[0085] The method for fabricating a lateral insulated-gate bipolar transistor (LIGBT) produces an LIGBT that, when turned on, opens its conductive channel. Electrons emerge from the first electrode region and enter the drift region through this channel. As the number of electrons increases, a large number of electrons surge towards the second electrode region, gradually creating a voltage drop in the drift region. This voltage drop causes the PN junction formed between the first and second doped regions to conduct forward, injecting a large number of holes into the drift region along with the second electrode region. This creates a conductivity modulation effect, significantly reducing the on-state voltage drop and static power consumption of the LIGBT. When the LIGBT is turned off, a superjunction-like structure forms between the first and second doped regions, which mutually aid in depletion, preventing premature breakdown and maintaining the LIGBT's breakdown voltage. In other words, while reducing the device's static power consumption, a significant decrease in breakdown voltage is effectively avoided.

[0086] In some embodiments, the semiconductor substrate includes a substrate and a buried dielectric layer stacked together, the second conductivity type is P-type, the first conductivity type is N-type, and correspondingly, the substrate is a P-type silicon substrate, and the drift region is an N-drift region. In other embodiments, the second conductivity type may be N-type and the first conductivity type may be P-type.

[0087] In some embodiments, the buried dielectric layer is made of silicon oxide, such as silicon dioxide.

[0088] In some embodiments, the drift region is achieved by high-temperature push-in after injection, which requires a certain doping concentration to ensure the current path.

[0089] In some embodiments, in step S230, while forming a first well region with a second conductivity type on the upper surface of the drift region, a second well region with a specific first conductivity type is also formed on the upper surface of the drift region, and the second well region and the first well region are spaced apart; then in step S240, a conductivity modulation structure is formed in the drift region between the first well region and the second well region; then in step S250, a second electrode lead-out region is formed on the upper surface of the second well region, the second electrode lead-out region has a second conductivity type, and the first electrode lead-out region has a first conductivity type. When the lateral insulated gate bipolar transistor enters the turn-off process, the carriers stored in the drift region due to the conductivity modulation effect generated in the on state can quickly flow to the drain through the second well region of the first conductivity type, effectively shortening the turn-off time. At the same time, when the lateral insulated gate bipolar transistor is in the on state, the PN junction formed between the second electrode lead-out region and the second well region is reverse biased, which can effectively prevent the second electrode lead-out region from breaking down and improve the breakdown voltage capability of the lateral insulated gate bipolar transistor.

[0090] In some embodiments, step S240, forming a conductivity modulation structure spaced apart from the first well region within the drift region, includes: implanting ions of a first conductivity type into a portion of the upper surface of the drift region and pushing the well to form a first doped region; implanting ions of a second conductivity type into the first doped region and pushing the well to form a second doped region, wherein the second doped region of the second conductivity type is surrounded by the first doped region of the first conductivity type, so that a PN junction can be formed between the first doped region and the second doped region.

[0091] In some embodiments, after step S240 and before step S250, the method further includes:

[0092] S2401, A field oxide layer is formed on a portion of the drift region;

[0093] S2402, A gate dielectric layer is formed on a portion of the first well region, and the gate dielectric layer extends to cover the drift region not covered by the field oxide layer and contacts the field oxide layer.

[0094] S2403. A gate conductive layer is formed on the gate dielectric layer, and the gate conductive layer extends to cover a portion of the field oxide layer; then in step S250, the gate structure serves as an injection barrier layer for the first electrode lead-out region to perform self-aligned injection. The first electrode lead-out region is formed on the upper surface layer of the first well region, and a portion of the first electrode lead-out region extends under the gate structure to ensure the width of the conductive channel.

[0095] In some embodiments, step S250 includes: first forming a first electrode lead-out region; then forming a second electrode lead-out region, and simultaneously forming a first well region lead-out region. The first well region lead-out region is formed on the upper surface layer of the first well region. Both the first well region lead-out region and the second electrode lead-out region have a second conductivity type. The first electrode lead-out region has a first conductivity type. A conductivity modulation structure is formed in a drift region between the first well region and the second electrode lead-out region. Alternatively, it can be understood that the conductivity modulation structure is formed in a drift region between the first electrode lead-out region and the second electrode lead-out region.

[0096] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the above flowcharts may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the sub-steps or stages of other steps. It should be noted that the different embodiments described above can be combined with each other.

[0097] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0098] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A lateral insulated gate bipolar transistor, characterized in that, include: The drift region has the first type of conductivity. A first well region, located on the upper surface of the drift region, has a second conductivity type, wherein the first conductivity type and the second conductivity type are opposite; A first electrode lead-out area and a second electrode lead-out area, wherein the first electrode lead-out area is located on the upper surface layer of the first well region, and the second electrode lead-out area is located on the upper surface layer of the drift region; A conductivity modulation structure is disposed in the drift region between the first electrode lead-out region and the second electrode lead-out region. The conductivity modulation structure includes a first doped region disposed on the upper surface layer of the drift region and having a first conductivity type, and a second doped region disposed in the first doped region and having a second conductivity type. The doping concentration of the first doped region is greater than the doping concentration of the drift region. The upper surface of the drift region is provided with at least one set of conductivity modulation structure components, each of the conductivity modulation structure components including a plurality of conductivity modulation structures spaced apart along the length direction of the conductive channel.

2. The lateral insulated gate bipolar transistor according to claim 1, characterized in that, The number of the first doped region and the number of the second doped region are both at least one.

3. The lateral insulated gate bipolar transistor according to claim 1, characterized in that, Both the first doped region and the second doped region are suspended in the air; or, The first doped region is floating, and the second doped region is connected to an external potential.

4. The lateral insulated gate bipolar transistor according to claim 1, characterized in that, The doping depth of the first doped region is less than the doping depth of the first well region.

5. The lateral insulated gate bipolar transistor according to claim 1, characterized in that, The doping concentration values ​​of the first doped region and the second doped region are on the same order of magnitude.

6. The lateral insulated gate bipolar transistor according to any one of claims 1-5, characterized in that, The upper surface of the drift region is provided with multiple sets of the conductivity modulation structure components arranged at intervals along the width direction of the conductive channel.

7. The lateral insulated gate bipolar transistor according to claim 1, characterized in that, The lateral insulated gate bipolar transistor further includes a second well region disposed on the upper surface of the drift region and having a first conductivity type, the second well region being located on the side of the entire conductivity modulation structure away from the first well region; The upper surface layer of the second well region is provided with the second electrode lead-out region, the second electrode lead-out region has the second conductivity type, and the first electrode lead-out region has the first conductivity type.

8. The lateral insulated gate bipolar transistor according to claim 1, characterized in that, The upper surface of the first well region is further provided with a first well region lead-out region having a second conductivity type, and the potential of the first well region lead-out region is shorted together with that of the first electrode lead-out region.

9. The lateral insulated gate bipolar transistor according to claim 1, characterized in that, The lateral insulated gate bipolar transistor further includes a semiconductor substrate, which includes a substrate and a buried dielectric layer stacked together, and the drift region is located on the side of the buried dielectric layer opposite to the substrate.

10. The lateral insulated gate bipolar transistor according to claim 1, characterized in that, The lateral insulated gate bipolar transistor further includes a gate structure located on the first well region, one side of the gate structure extending to cover a portion of the first electrode lead-out region, and the other side of the gate structure extending to cover a portion of the drift region.

11. A method for fabricating a lateral insulated gate bipolar transistor, characterized in that, include: A semiconductor substrate is provided, the semiconductor substrate including a substrate having a second conductivity type; A drift region is formed on the semiconductor substrate above the substrate, the drift region having a first conductivity type, the first conductivity type being opposite to the second conductivity type; A first well region having a second conductivity type is formed on the upper surface layer of the drift region; An electrical conductivity modulation structure is formed in the drift region and spaced apart from the first well region. The electrical conductivity modulation structure includes a first doped region formed on the upper surface of the drift region and having a first conductivity type, and a second doped region formed in the first doped region and having a second conductivity type. The doping concentration of the first doped region is greater than the doping concentration of the drift region. A first electrode lead-out region and a second electrode lead-out region are formed. The first electrode lead-out region is formed on the upper surface layer of the first well region, and the second electrode lead-out region is formed on the side of all the conductivity modulation structures away from the first well region. The upper surface of the drift region is provided with at least one set of conductivity modulation structure components, each of the conductivity modulation structure components including a plurality of conductivity modulation structures spaced apart along the length direction of the conductive channel.

12. The method for fabricating a lateral insulated gate bipolar transistor according to claim 11, characterized in that, The formation of a conductivity modulation structure spaced apart from the first well region within the drift region includes: Ions of a first conductivity type are implanted into a portion of the upper surface of the drift region, and a trap is formed to create the first doped region. A second type of conductivity ion is implanted into the first doped region, and a trap is formed to create the second doped region.

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