Transparent display device

Abstract

A transparent display device can have both high transmittance and high resolution. The transparent display device includes: a first signal line portion extending in a first direction, comprising a first sensing scan line, a second sensing scan line, an initialization line, and a light emission control line; a second signal line portion extending in a second direction; a transmissive region disposed between two adjacent first signal line portions and between two adjacent second signal line portions; and pixels disposed in an intersection region where the first signal line portion and the second signal line portion intersect each other. The light emission control line overlaps with the initialization line in at least a partial region.

Description

[0001] This application is a divisional application of the original invention patent application No. 202111361045.8 (filed on November 17, 2021, invention title: transparent display device). Technical Field

[0002] This disclosure relates to a transparent display device. Background Technology

[0003] With the advancement towards the information society, the demand for display devices for displaying images has increased in various forms. Recently, various types of display devices, such as liquid crystal displays (LCDs), plasma display panels (PDPs), organic light-emitting diode (OLED) displays, and quantum dot light-emitting diode (QLED) displays, have been widely used.

[0004] Recently, research has been actively conducted on transparent display devices, which allow users to view objects or images located on the opposite side of the display device through the display device.

[0005] Transparent display devices can achieve high light transmittance in the display area due to the transmission region. However, transparent display devices may suffer from reduced resolution due to the transmission region. A common issue with transparent display devices is that higher resolution results in lower transmittance.

[0006] Transparent display devices also have the problem that the spacing between subpixels increases due to the transmission area, so the subpixel spacing may be noticeable, thus reducing image quality. Summary of the Invention

[0007] This disclosure is made in view of the above-mentioned problems, and the purpose of this disclosure is to provide a transparent display device that can improve transmittance while achieving high resolution.

[0008] Another technical benefit of this disclosure is to provide a transparent display device that prevents the perception of subpixel spacing and has optimized image quality.

[0009] In addition to the technical benefits of this disclosure as described above, those skilled in the art will clearly understand from the following description of this disclosure additional technical benefits and features.

[0010] According to one aspect of this disclosure, the above and other technical benefits can be achieved by providing a transparent display device, the transparent display device comprising: a plurality of first signal line portions, each extending in a first direction, each first signal line portion including a first sensing scan line, a second sensing scan line, an initialization line, and a light emission control line; a plurality of second signal line portions, each extending in a second direction; a transmissive region disposed between two adjacent first signal line portions and between two adjacent second signal line portions; and pixels disposed in an intersection region where the first signal line portions and the second signal line portions intersect each other. The light emission control line overlaps with the initialization line in at least a partial region.

[0011] According to another aspect of this disclosure, the above and other technical benefits can be achieved by providing a transparent display device, the transparent display device comprising: a plurality of first signal line portions, each extending in a first direction, each first signal line portion including a first line; a plurality of second signal line portions, each extending in a second direction; a transmissive region disposed between two adjacent first signal line portions and between two adjacent second signal line portions; and a plurality of circuit regions disposed at intersections where the first signal line portions and the second signal line portions intersect each other. The first line includes a straight portion and a branched portion branching from the straight portion, the branched portion providing a signal to each of the plurality of circuit regions. Attached Figure Description

[0012] The above and other objects, features and advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0013] Figure 1 This is a perspective view showing a transparent display device according to one embodiment of the present disclosure;

[0014] Figure 2 This is a schematic plan view showing a transparent display panel according to one embodiment of the present disclosure;

[0015] Figure 3 It shows the setting Figure 2 A schematic diagram illustrating an example of pixels in region A;

[0016] Figure 4 This is a schematic diagram showing the first signal line, the second signal line, and the pixel;

[0017] Figure 5 It is a view showing the arrangement of sub-pixels included in the first unit pixel;

[0018] Figure 6 This is a view showing the arrangement of sub-pixels included in the second unit pixel;

[0019] Figure 7This is a schematic diagram illustrating the structure of a gate driver according to one embodiment of the present disclosure;

[0020] Figure 8 This is a circuit diagram showing an example of a circuit region;

[0021] Figure 9 It is a view showing the connection relationships between multiple circuit regions and multiple lines;

[0022] Figure 10 It is shown Figure 8 and Figure 9 A view of an example of the timing of operation in a circuit region;

[0023] Figure 11 It is a plan view showing an example of multiple lines and multiple circuit regions set in a pixel area;

[0024] Figure 12 It is along Figure 11 A cross-sectional view taken from line I-I'; and

[0025] Figure 13 It is along Figure 11 The cross-sectional view taken from line II-II'. Detailed Implementation

[0026] The advantages and features of this disclosure, and its implementation methods, will be illustrated by the following description of embodiments with reference to the accompanying drawings. However, this disclosure may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to make this disclosure thorough and complete, and to fully convey the scope of this disclosure to those skilled in the art.

[0027] The shapes, dimensions, scales, angles, and quantities disclosed in the drawings used to describe embodiments of this disclosure are merely examples, and therefore, this disclosure is not limited to the details shown. Throughout the specification, the same reference numerals denote the same elements. In the following description, detailed descriptions that determine relevant known functions or configurations will be omitted where such descriptions unnecessarily obscure the essential points of this disclosure. Where terms such as “comprising,” “having,” and “including” are used in this specification, additional terms may be added unless “only” is used. Singular terms may include plural forms unless otherwise stated.

[0028] When constructing an element, it is interpreted to include a range of errors, although this is not explicitly described.

[0029] When describing positional relationships, such as when the positional relationship is described as "above", "on top of", "below", and "beside", one or more parts may be arranged between two other parts, unless "only" or "directly" is used.

[0030] It should be understood that although the terms "first," "second," etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0031] In describing elements of this disclosure, the terms “first,” “second,” etc., may be used. These terms are intended to correspond to elements from other elements, and the basis, order, or number of corresponding elements is not limited by these terms. The expression that an element is “connected” or “linked” to another element should be understood to mean that the element may be directly connected or linked to another element, but may be indirectly connected or linked to another element, unless specifically mentioned, or a third element may be inserted between the corresponding elements.

[0032] Features of the various embodiments of this disclosure may be linked or combined with each other in part or in whole, and may interoperate with each other in various ways and be technically driven, as will be fully understood by those skilled in the art. Embodiments of this disclosure may be performed independently of each other or may be performed together in an interdependent relationship.

[0033] In the following, examples of transparent display devices according to this disclosure will be described in detail with reference to the accompanying drawings. Wherever possible, the same reference numerals will be used in all the drawings to denote the same or similar parts.

[0034] Figure 1 This is a perspective view showing a transparent display device according to one embodiment of the present disclosure. Figure 2 This is a schematic plan view showing a transparent display panel.

[0035] In the following, the X-axis represents the line parallel to the gate line, the Y-axis represents the line parallel to the data line, and the Z-axis represents the height direction of the transparent display device 100.

[0036] Although the transparent display device 100 according to one embodiment of the present disclosure has been described as an organic light-emitting display device, the transparent display device 100 may be implemented as a liquid crystal display device, a plasma display panel (PDP), a quantum dot light-emitting display (QLED) or an electrophoretic display device.

[0037] Reference Figure 1 and Figure 2 According to one embodiment of the present disclosure, a transparent display device 100 includes a transparent display panel 110, a source driver integrated circuit (IC) 210, a flexible film 220, a circuit board 230, and a timing controller 240.

[0038] The transparent display panel 110 includes a first substrate 111 and a second substrate 112 facing each other. The second substrate 112 may be an encapsulation substrate. The first substrate 111 may be a plastic film, a glass substrate, or a silicon wafer substrate formed using semiconductor processes. The second substrate 112 may be a plastic film, a glass substrate, or an encapsulation film. The first substrate 111 and the second substrate 112 may be made of transparent materials.

[0039] The substrate 111 may include a display area DA in which pixels P are formed to display images and a non-display area NDA in which no images are displayed.

[0040] The display area DA may be provided with a first signal line portion SL1, a second signal line portion SL2 and a pixel P, and the non-display area NDA may be provided with a pad area PA for pads and at least one gate driver 205.

[0041] The first signal line portion SL1 may extend in a first direction (e.g., the X-axis direction) and may intersect with the second signal line portion SL2 in the display area DA. The second signal line portion SL2 may extend in a second direction (e.g., the Y-axis direction). Pixel P may be disposed in the area where the first signal line portion SL1 and the second signal line portion SL2 intersect, and emits predetermined light to display an image.

[0042] The gate driver 205 provides a gate signal to the gate line according to a gate control signal provided from the timing controller 240. The gate driver 205 can be disposed on one side of the display area of ​​the transparent display panel 110, or in the non-display areas of the two peripheral sides of the transparent display panel 110, using an in-panel gate driver (GIP) method. Alternatively, the gate driver 205 can be fabricated in a driver chip, mounted on a flexible film, and attached to one or both peripheral sides of the display area of ​​the transparent display panel 110 using a tape autobonding (TAB) method.

[0043] For example, such as Figure 2 As shown, the gate driver 205 may include a first gate driver 205a disposed in a non-display area NDA disposed on a first peripheral side of the display area DA and a second gate driver 205b disposed in a non-display area NDA disposed on a second peripheral side of the display area DA, but is not limited thereto.

[0044] If the source driver IC 210 is manufactured in the driver chip, the source driver IC 140 can be mounted on the flexible film 220 by a chip-on-film (COF) method or a chip-on-plastic (COP) method.

[0045] Pads such as power pads and data pads can be formed in the pad area PA of the transparent display panel 110. Lines connecting the pads to the source driver IC 210 and lines connecting the pads to the circuit board 230 can be formed in the flexible film 220. The flexible film 220 can be made by attaching an anisotropic conductive film to the pads, thereby allowing the pads to be connected to the lines of the flexible film 220.

[0046] Figure 3 It shows the setting Figure 2 A schematic diagram of an example of pixels in region A. Figure 4 This is a schematic diagram showing the first signal line, the second signal line, and the pixel. Figure 5 This is a view showing the arrangement of sub-pixels included in the first unit pixel. Figure 6 This is a view showing the arrangement of subpixels included in the second unit pixel.

[0047] Reference Figure 3 and Figure 6 The transparent display panel 110 may include a display area DA with pixels P for displaying images and a non-display area NDA not used for displaying images.

[0048] The display area DA includes a transmissive area TA and a non-transmissive area NTA. The transmissive area TA is the region through which most external incident light passes, while the non-transmissive area NTA is the region through which most external incident light cannot pass. For example, the transmissive area TA can be an area with a transmittance greater than α% (e.g., about 90%), and the non-transmissive area NTA can be an area with a transmittance less than β% (e.g., about 50%). In this case, α is greater than β. Due to the transmissive area TA, the user can view objects or backgrounds arranged on the rear surface of the transparent display panel 110.

[0049] The non-transmissive region may include a first non-transmissive region NTA1 and a second non-transmissive region NTA2 in which a first signal line portion SL1 is arranged, a third non-transmissive region NTA3 and a fourth non-transmissive region NTA4 in which the second signal line portion SL2 is arranged, and a pixel P.

[0050] A first signal line portion SL1 can extend from the display area DA along a first direction (e.g., the X-axis direction). Multiple first signal line portions SL1 can be arranged to be spaced apart from each other.

[0051] For example, the first signal line portion SL1 may include a sensing scan line. Figure 4As shown, the first signal line portion SL1 may include a first sensing scan line SSL1 and a second sensing scan line SSL2. For example, the first sensing scan line SSL1 may provide a first sensing scan signal to one of a plurality of sub-pixels SP1 and SP3 included in the first unit pixel UP1 and one of a plurality of sub-pixels SP2 and SP3 included in the second unit pixel UP2. The second sensing scan line SSL2 may provide a second sensing scan signal to another of the plurality of sub-pixels SP1 and SP3 included in the first unit pixel UP1 and another of the plurality of sub-pixels SP2 and SP3 included in the second unit pixel UP2.

[0052] In the following text, when the first signal line portion SL1 includes multiple lines, a first signal line portion SL1 may refer to a signal line group including multiple lines. For example, when the first signal line portion SL1 includes a first sensing scan line SSL1 and a second sensing scan line SSL2, an initialization line, and a light emission control line, the first signal line portion SL1 may refer to a signal line group including the first sensing scan line SSL1 and the second sensing scan line SSL2, an initialization line, and a light emission control line.

[0053] The second signal line portion SL2 may extend from the display area DA along a second direction (e.g., the Y-axis direction) and may intersect the first signal line portion SL1 in the display area DA. Multiple second signal line portions SL2 may be arranged to be spaced apart from each other.

[0054] For example, the second signal line portion SL2 may include data lines. In this case, the second signal line portion SL2 may include two data lines, such as... Figure 4 As shown. For example, the second signal line portion SL2 may include: a first data line DL1 for providing a first data voltage to a plurality of sub-pixels SP1 and SP3 included in the first unit pixel UP1; and a second data line DL2 for providing a second data voltage to a plurality of sub-pixels SP2 and SP3 included in the second unit pixel UP2.

[0055] although Figure 4 Although not shown in the diagram, the second signal line portion SL2 may also include at least one of a pixel power line, a common power line, or a reference line.

[0056] In the following text, when the second signal line portion SL2 includes multiple lines, a second signal line portion SL2 may refer to a signal line group including multiple lines. For example, when the second signal line portion SL2 includes a first data line DL1 and a second data line DL2, a pixel power line, a common power line, and a reference line, a second signal line portion SL2 may refer to a signal line group including the first data line DL1 and the second data line DL2, the pixel power line, the common power line, and the reference line.

[0057] The pixel power line can provide a first power supply to the driving transistors of each sub-pixel SP1, SP2, and SP3 included in the display area DA. The common power line can provide a second power supply to the cathode electrodes of the sub-pixels SP1, SP2, and SP3 disposed in the display area DA. In this case, the second power supply can be a common power supply provided to the sub-pixels SP1, SP2, and SP3. The reference line can provide an initialization voltage (or sensing voltage) to the driving transistors of each sub-pixel SP1, SP2, and SP3 included in the display area DA.

[0058] The transmission region TA can be disposed between adjacent first signal line portions SL1. Specifically, the transmission region TA can be disposed between a first non-transmissive region NTA1 and a second non-transmissive region NTA2, with odd-numbered rows of first signal line portions SL1-1 disposed in the first non-transmissive region NTA1 and even-numbered rows of first signal line portions SL1-2 disposed in the second non-transmissive region NTA2. For example, the transmission region TA can be disposed between the odd-numbered rows of first signal line portions SL1-1 and the even-numbered rows of first signal line portions SL1-2.

[0059] Furthermore, the transmission region TA can be positioned between adjacent second signal line portions SL2. Specifically, the transmission region TA can be positioned between the third non-transmissive region NTA3 and the fourth non-transmissive region NTA4, with odd-numbered rows of second signal line portions SL2-1 positioned in the third non-transmissive region NTA3 and even-numbered rows of second signal line portions SL2-2 positioned in the fourth non-transmissive region NTA4. For example, the transmission region TA can be positioned between the odd-numbered rows of second signal line portions SL2-1 and the even-numbered rows of second signal line portions SL2-2. The transmission region TA can be surrounded by two first signal line portions SL1-1 and SL1-2 and two second signal line portions SL2-1 and SL2-2.

[0060] The transmissive region TA can have a shape where its length in the first direction is longer than its length in the second direction. The width of the first signal line portion SL1 extending along the first direction can be smaller than the width of the second signal line portion SL2 extending along the second direction. The first signal line portion SL1 includes sensing scan lines SSL1 and SSL2, an initialization line, and a light emission control line. The second signal line portion SL2, in addition to data lines DL1 and DL2, may also include one of a pixel power line and a common power line. Because a high voltage is applied to the pixel power line and the common power line, the pixel power line and the common power line should have a width wider than the sensing scan lines SSL1 and SSL2, the initialization line, the light emission control line, or the data lines DL1 and DL2. Therefore, the second signal line portion SL2 can have a width wider than the first signal line portion SL1.

[0061] According to one embodiment of the present disclosure, the transparent display panel 110 can improve transmittance by increasing the size of a transmissive region TA. When the size of a transmissive region TA is increased, the length of at least one of a first signal line portion SL1 or a second signal line portion SL2 surrounding a transmissive region TA can be increased.

[0062] When the transmissive region TA is formed to have a relatively long length in the second direction, the length of the second signal line portion SL2 disposed between two adjacent transmissive regions TA can be increased. Conversely, when the transmissive region TA is formed to have a relatively long length in the second direction, the length of the first signal line portion SL1 disposed between two adjacent transmissive regions TA can be increased. The width of the first signal line portion SL1 is smaller than the width of the second signal line portion SL2. The rate of increase in area of ​​the first signal line portion SL1 with increasing length is smaller than the rate of increase in area of ​​the second signal line portion SL2 with increasing length. Since the areas where the first signal line portion SL1 and the second signal line portion SL2 are disposed are opaque, non-transmissive areas, the rate of increase in area of ​​the non-transmissive area is smaller when the length of the transmissive region TA increases along the first direction than when the length of the transmissive region TA increases along the second direction.

[0063] Therefore, the transparent display panel 110 according to one embodiment of the present disclosure can increase the size of the transmission region TA and improve the transmittance by increasing the length of the transmission region TA in the first direction.

[0064] Pixel P is disposed in the intersection or overlap region IA where the first signal line portion SL1 and the second signal line portion SL2 intersect or overlap, and emits predetermined light to display an image. The light-emitting region EA may correspond to the region from which light is emitted from pixel P.

[0065] like Figure 3 As shown, pixel P may include a first pixel P1 that overlaps with at least a portion of the first signal line portion SL1-1 of the odd-numbered rows and a second pixel P2 that overlaps with at least a portion of the first signal line portion SL1-2 of the even-numbered rows.

[0066] The first pixel P1 can be disposed in an intersection or overlap region where the first non-transmissive region NTA1 of the odd-numbered first signal line portion SL1-1 and the third non-transmissive region NTA3 of the odd-numbered second signal line portion SL2-1 intersect or overlap with each other. Furthermore, the first pixel P1 can be disposed in an intersection or overlap region where the first non-transmissive region NTA1 of the odd-numbered first signal line portion SL1-1 and the fourth non-transmissive region NTA4 of the even-numbered second signal line portion SL2-2 intersect or overlap with each other. Since the first pixel P1 overlapping at least a portion of the odd-numbered second signal line portion SL2-1 and the first pixel P1 overlapping at least a portion of the even-numbered second signal line portion SL2-2 have the same arrangement order of sub-pixels SP1, SP2, and SP3, the first pixel P1 can be described as being disposed in an intersection or overlap region where the odd-numbered first signal line portion SL1-1 and the second signal line portion SL2 intersect or overlap with each other.

[0067] The second pixel P2 can be disposed in an intersection or overlap region where the second non-transparent region NTA2 of the first signal line portion SL1-2, in which an even number of rows are disposed, and the third non-transparent region NTA3 of the second signal line portion SL2-1, in which an odd number of rows are disposed, intersect or overlap with each other. Furthermore, the second pixel P2 can be disposed in an intersection or overlap region where the second non-transparent region NTA2 of the first signal line portion SL1-2, in which an even number of rows are disposed, and the fourth non-transparent region NTA4 of the second signal line portion SL2-2, in which an even number of rows are disposed, intersect or overlap with each other. Since the second pixel P2 overlapping at least a portion of the odd-numbered row second signal line portion SL2-1 and the second pixel P2 overlapping at least a portion of the even-numbered row second signal line portion SL2-2 have the same arrangement order of sub-pixels SP1, SP2, and SP3, the second pixel P2 can be described as being disposed in an intersection or overlap region where the first signal line portion SL1-2 and the second signal line portion SL2, in which an even number of rows, intersect or overlap with each other.

[0068] Each of the first pixel P1 and the second pixel P2 may include a first unit pixel UP1 and a second unit pixel UP2. For example, a transparent display panel 110 according to one embodiment of the present disclosure may include two unit pixels UP1 and UP2 in an intersection or overlap region IA where the first signal line portion SL1 and the second signal line portion SL2 intersect or overlap with each other.

[0069] According to one embodiment of the present disclosure, a transparent display panel 110 includes two unit pixels UP1 and UP2 in an intersecting or overlapping area to increase the size of the transmissive area TA, thereby improving transmittance while having high resolution.

[0070] Each of the first unit pixel UP1 and the second unit pixel UP2 may include at least two of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3. In this case, one of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may be repeatedly set in the first unit pixel UP1 and the second unit pixel UP2.

[0071] For example, the second sub-pixel SP2 can be repeatedly set in the first unit pixel UP1 and the second unit pixel UP2. For example, the first unit pixel UP1 includes the first sub-pixel SP1 and the third sub-pixel SP3, and the second unit pixel UP2 may include the second sub-pixel SP2 and the third sub-pixel SP3.

[0072] The first sub-pixel SP1 may include a first emitting region EA1 that emits light of a first color, the second sub-pixel SP2 may include a second emitting region EA2 that emits light of a second color, and the third sub-pixel SP3 may include a third emitting region EA3 that emits light of a third color.

[0073] For example, the first to third emitting regions EA1, EA2, and EA3 can all emit light of different colors. For instance, the first emitting region EA1 can emit green light, the second emitting region EA2 can emit blue light, and the third emitting region EA3 can emit red light, but the emitting regions are not limited to these. Furthermore, the arrangement order of sub-pixels SP1, SP2, and SP3 can be modified in various ways.

[0074] In the following description, for ease of description, it will be based on the premise that the first sub-pixel SP1 is a green sub-pixel emitting green light, the second sub-pixel SP2 is a blue sub-pixel emitting blue light, and the third sub-pixel SP3 is a red sub-pixel emitting red light. Furthermore, this description will be based on the premise that the first unit pixel UP1 includes the first sub-pixel SP1 and the third sub-pixel SP3, and the second unit pixel UP2 includes the second sub-pixel SP2 and the third sub-pixel SP3, but the unit pixels are not limited to these.

[0075] A transparent display panel 110 according to one embodiment of the present disclosure is characterized in that the first pixel P1 and the second pixel P2 are different from each other in the arrangement order of the first to third sub-pixels SP1, SP2 and SP3. The first pixel P1 and the second pixel P2 may be different from each other in the position of at least one of the first sub-pixel SP1, the second sub-pixel SP2 or the third sub-pixel SP3.

[0076] Specifically, the first pixel P1 and the second pixel P2 are positioned differently from each other as first unit pixels UP1 and UP2. The first unit pixel UP1 of the first pixel P1 can be arranged in a first direction (e.g., direction D1) based on an intersecting or overlapping region IA, and the second unit pixel UP2 of the first pixel P1 can be arranged in a second direction (e.g., direction D2) opposite to the first direction (e.g., direction D1). Conversely, unlike the first pixel P1, the first unit pixel UP1 of the second pixel P2 can be arranged in the second direction (e.g., direction D2) based on an intersecting or overlapping region IA, and the second unit pixel UP2 of the second pixel P2 can be arranged in the first direction (e.g., direction D1).

[0077] Furthermore, the arrangement order of the first sub-pixel SP1 and the third sub-pixel SP3 included in the first unit pixel UP1 within the first pixel P1 and the second pixel P2 can be different from each other. Therefore, the positions and shapes of the first sub-pixel SP1 and the third sub-pixel SP3 included in the first unit pixel UP1 within the first pixel P1 and the second pixel P2 can be different from each other.

[0078] Specifically, four sub-pixel regions can be set based on the intersecting or overlapping region IA, such that the four sub-pixels can be set in each of the first pixel P1 and the second pixel P2. Each of the first pixel P1 and the second pixel P2 may include a first sub-pixel region that intersects or overlaps with at least a portion of the first signal line portion SL1, a second sub-pixel region that overlaps with at least a portion of the second signal line portion SL2, a third sub-pixel region facing the intersection of the first sub-pixel region and at least a portion of the first signal line portion SL1, and a fourth sub-pixel region facing the intersection of the second sub-pixel region and at least a portion of the second signal line portion SL2.

[0079] The first unit pixel UP1 of the first pixel P1 can be arranged in a first direction (e.g., direction D1) based on the intersecting or overlapping region IA. The first sub-pixel SP1 included in the first unit pixel UP1 of the first pixel P1 can be disposed on the first signal line portion SL1-1 of the odd-numbered rows. The first sub-pixel SP1 included in the first unit pixel UP1 of the first pixel P1 can be disposed in the first sub-pixel region of the first pixel P1. In one embodiment, the first sub-pixel SP1 included in the first unit pixel UP1 of the first pixel P1 can include a protrusion protruding along the first signal line portion SL1-1 in a first lateral direction.

[0080] The third sub-pixel SP3 included in the first unit pixel UP1 of the first pixel P1 can be disposed on the second signal line portion SL2. The third sub-pixel SP3 included in the first unit pixel UP1 of the first pixel P1 can be disposed in the second sub-pixel region of the first pixel P1. In one embodiment, the third sub-pixel SP3 included in the first unit pixel UP1 of the first pixel P1 can include a protrusion extending along the second signal line portion SL2 in the second lateral direction.

[0081] Unlike the first pixel P1, the first unit pixel UP1 of the second pixel P2 can be arranged in a second direction (e.g., direction D2) based on the intersecting or overlapping region IA. The first sub-pixel SP1 included in the first unit pixel UP1 of the second pixel P2 can be disposed on the first signal line portions SL1-2 of even-numbered rows. Unlike the first pixel P1, the first sub-pixel SP1 included in the first unit pixel UP1 of the second pixel P2 can be disposed in the third sub-pixel region of the second pixel P2. In one embodiment, the first sub-pixel SP1 included in the first unit pixel UP1 of the second pixel P2 can include a protrusion protruding along the first signal line portion SL1-2 in a third side direction opposite to the direction in which the first sub-pixel SP1 of the first pixel P1 protrudes.

[0082] The third sub-pixel SP3, included in the first unit pixel UP1 of the second pixel P2, can be disposed on the second signal line portion SL2. Unlike the first pixel P1, the third sub-pixel SP3, included in the first unit pixel UP1 of the second pixel P2, can be disposed in the fourth sub-pixel region of the second pixel P2. In one embodiment, the third sub-pixel SP3, included in the first unit pixel UP1 of the second pixel P2, can include a protrusion extending along the second signal line portion SL2 in the second lateral direction.

[0083] When the first unit pixel UP1 of the first pixel P1 and the first unit pixel UP1 of the second pixel P2 have the arrangement order described above, the diagonal lengths c1 and c2 of the first sub-pixel SP1 of the first pixel P1 and the first sub-pixel SP1 of the second pixel P2 can be longer than the vertical length 'b' of the first sub-pixel SP1 of the first pixel P1 and the first sub-pixel SP1 of the second pixel P2, such as... Figure 5 As shown. In addition, the diagonal lengths c1 and c2 of the first sub-pixel SP1 of the first pixel P1 and the first sub-pixel SP1 of the second pixel P2 can be shorter than the horizontal length 'a' of the first sub-pixel SP1 of the first pixel P1 and the first sub-pixel SP1 of the second pixel P2.

[0084] When the first sub-pixel SP1 is a green sub-pixel, the brightness of the green light can be higher than the brightness of each of the red and blue lights. According to one embodiment of this disclosure, the transparent display panel 110 can achieve optimal image quality by uniformly arranging high-brightness green sub-pixels.

[0085] First pixel P1 and second pixel P2 have first unit pixels UP1 and UP2 at the same position, and can have first sub-pixels SP1 and third sub-pixels SP3 included in the first unit pixel UP1 in the same arrangement order. Since the first sub-pixel SP1 is set at the same position in each of the first pixel P1 and the second pixel P2, the first sub-pixel SP1 may be set in a line parallel to the second signal line portion SL2 or the first signal line portion SL1. In this case, green sub-pixels can be perceived as lines in the image. When green sub-pixels have high brightness, lines composed of green sub-pixels may be more easily perceived.

[0086] To avoid this situation, in a transparent display panel 110 according to one embodiment of the present disclosure, the first sub-pixel SP1 can be disposed at different positions within the first pixel P1 and the second pixel P2. The first pixel P1 can be positioned within a first sub-pixel region, and the second pixel P2 can be positioned within a third sub-pixel region instead of the first sub-pixel region, at a location facing the first sub-pixel region. Therefore, since the first sub-pixel SP1 is not arranged in a line parallel to the second signal line portion SL2, the first sub-pixel SP1 will not be perceived as a line in the image.

[0087] Furthermore, the first sub-pixel SP1 of the first pixel P1 may include a protrusion protruding along the first signal line portion SL1-1 in a first lateral direction, and the first sub-pixel SP1 of the second pixel P2 may include a protrusion protruding along the first signal line portion SL1-2 in a third lateral direction opposite to the direction in which the first sub-pixel SP1 of the first pixel P1 protrudes.

[0088] In a transparent display panel 110 according to one embodiment of the present disclosure, each of the first sub-pixels SP1 of the first pixel P1 and the first sub-pixels SP1 of the second pixel P2 protrudes along a first signal line portion SL1, thereby increasing the light-emitting area of ​​the first sub-pixel SP1 and reducing the size of the non-light-emitting area NEA. Therefore, the transparent display panel 110 according to one embodiment of the present disclosure can improve luminous efficiency.

[0089] Furthermore, in a transparent display panel 110 according to one embodiment of the present disclosure, protrusions are provided in different directions in the first sub-pixel SP1 of the first pixel P1 and the first sub-pixel SP1 of the second pixel P2, thereby allowing the first sub-pixel SP1 to be arranged more evenly.

[0090] The first pixel P1 and the second pixel P2 may differ from each other in the arrangement order of the second sub-pixels SP2 and SP3 included in the second unit pixel UP2 and the first unit pixel UP1. Therefore, the second sub-pixels SP2 and SP3 included in the second unit pixel UP2 may differ from each other in position and shape within the first pixel P1 and the second pixel P2.

[0091] Specifically, the second unit pixel UP2 of the first pixel P1 can be arranged in a second direction (e.g., direction D2) based on the intersecting or overlapping region IA. The second sub-pixel SP2 included in the second unit pixel UP2 of the first pixel P1 can be disposed on the first signal line portion SL1-1 of the odd-numbered rows. The second sub-pixel SP2 included in the second unit pixel UP2 of the first pixel P1 can be disposed in the third sub-pixel region of the first pixel P1. In one embodiment, the second sub-pixel SP2 included in the second unit pixel UP2 of the first pixel P1 can include a protrusion protruding along the first signal line portion SL1-1 in a third side direction opposite to the direction in which the first sub-pixel SP1 of the first unit pixel UP1 protrudes.

[0092] The third sub-pixel SP3 included in the second unit pixel UP2 of the first pixel P1 can be disposed on the second signal line portion SL2. The third sub-pixel SP3 included in the second unit pixel UP2 of the first pixel P1 can be disposed in the fourth sub-pixel region of the first pixel P1. In one embodiment, the third sub-pixel SP3 included in the second unit pixel UP2 of the first pixel P1 can include a protrusion protruding along the second signal line portion SL2 in a second side direction opposite to the direction in which the third sub-pixel SP3 of the first unit pixel UP1 protrudes.

[0093] Unlike the first pixel P1, the second unit pixel UP2 of the second pixel P2 can be arranged in the first direction (e.g., direction D1) based on the intersecting or overlapping region IA. Unlike the first pixel P1, the second sub-pixel SP2 included in the second unit pixel UP2 of the second pixel P2 can be disposed on the second signal line portion SL1-2 instead of the first signal line portion SL1. Unlike the first pixel P1, the second sub-pixel SP2 included in the second unit pixel UP2 of the second pixel P2 can be disposed in the second sub-pixel region of the second pixel P2. In one embodiment, the second sub-pixel SP2 included in the second unit pixel UP2 of the second pixel P2 can include a protrusion extending along the second signal line portion SL2 in the second lateral direction.

[0094] Unlike the first pixel P1, the third sub-pixel SP3 included in the second unit pixel UP2 of the second pixel P2 can be disposed on the first signal line portion SL1-2 of the even-numbered rows instead of the second signal line portion SL2. Unlike the first pixel P1, the third sub-pixel SP3 included in the second unit pixel UP2 of the second pixel P2 can be disposed in the first sub-pixel region of the second pixel P2. In one embodiment, the third sub-pixel SP3 included in the second unit pixel UP2 of the second pixel P2 can include a protrusion extending along the first signal line portion SL1-2 of the even-numbered rows in a first lateral direction. The third sub-pixel SP3 included in the second unit pixel UP2 of the second pixel P2 can be disposed parallel to the first sub-pixel SP1 of the first unit pixel UP1 of the first pixel P1.

[0095] When the second unit pixel UP2 of the first pixel P1 and the second unit pixel UP2 of the second pixel P2 have the arrangement order described above, the horizontal length 'a1' between two adjacent second sub-pixels SP2 of the first pixel P1 can be different from the horizontal length 'a2' between two adjacent second sub-pixels SP2 of the second pixel P2. Specifically, the horizontal length 'a1' between two adjacent second sub-pixels SP2 of the first pixel P1 can be longer than the horizontal length 'a2' between two adjacent second sub-pixels SP2 of the second pixel P2, such as... Figure 6 As shown.

[0096] Each of the first pixel P1 and the second pixel P2 may include two third sub-pixels SP3. The two third sub-pixels SP3 of the first pixel P1 may be arranged to face each other along the second signal line portion SL2. One of the two third sub-pixels SP3 of the second pixel P2 may be disposed on the first signal line portion SL1, and the other may be disposed on the second signal line portion SL2. In a transparent display panel 110 according to one embodiment of the present disclosure, the third sub-pixels SP3 are disposed differently in the first pixel P1 and the second pixel P2, thereby preventing the third sub-pixels SP3 from being perceived as lines in the image.

[0097] Two third sub-pixels SP3 can be configured to face each other along the second signal line portion SL2 between the first pixel P1 and the second pixel P2. In this case, since the third sub-pixels SP3 are arranged as a line along the second signal line portion SL2, the third sub-pixels SP3 can be perceived as a line in the image. Since the second signal line portions SL2 are spaced apart from each other by a distance greater than that of the first signal line portions SL1, the line formed by the third sub-pixels SP3 can be perceived more easily.

[0098] In a transparent display panel 110 according to one embodiment of the present disclosure, the third sub-pixel SP3 is disposed separately in the first pixel P1 and the second pixel P2, thereby preventing the third sub-pixel SP3 from being arranged as a line along the second signal line portion SL2. Therefore, the transparent display panel 110 according to one embodiment of the present disclosure can prevent the third sub-pixel SP3 from being perceived as a line in the image.

[0099] As described above, in a transparent display panel 110 according to one embodiment of the present disclosure, the sub-pixels SP1, SP2, and SP3 provided in each of the first pixel P1 provided on the first signal line portion SL1-1 of the odd-numbered rows and the second pixel P2 provided on the first signal line portion SL1-2 of the even-numbered rows can be arranged differently. The transparent display panel 110 provided with the first pixel P1 and the second pixel P2 can have high transmittance and high resolution, and furthermore, can provide optimal image quality.

[0100] Furthermore, in a transparent display panel 110 according to one embodiment of the present disclosure, a pixel P includes a plurality of sides facing a transmissive region TA, and each of the plurality of sides of the pixel P has an inclination relative to each of the first signal line portion SL1 and the second signal line portion SL2.

[0101] In detail, pixel P may include a first side S1 and a second side S2 facing the transmission region TA, a third side S3 facing the first side S1, and a fourth side S4 facing the second side S2. For example, pixel P may have a protrusion in the shape of a rhombus protruding along the portion SL1 of the first signal line, which is composed of the four sides S1, S2, S3, and S4. In this case, depending on the size and arrangement of pixel P, the transmission region TA may be hexagonal or octagonal.

[0102] Each of the first side S1, second side S2, third side S3, and fourth side S4 of pixel P may have an inclination that is neither parallel nor perpendicular to the first signal line portion SL1. For example, each of the first side S1, second side S2, third side S3, and fourth side S4 of pixel P may have an inclination greater than 0 and less than 90° relative to the first signal line portion SL1. For example, each of the first side S1, second side S2, third side S3, and fourth side S4 of pixel P may be a diagonal line with an inclination greater than 30° and less than 60° relative to the first signal line portion SL1.

[0103] Furthermore, each of the first side S1, second side S2, third side S3, and fourth side S4 of pixel P may have an inclination that is neither parallel nor perpendicular to the second signal line portion SL2. For example, each of the first side S1, second side S2, third side S3, and fourth side S4 of pixel P may have an inclination greater than 0 and less than 90° relative to the second signal line portion SL2. For example, each of the first side S1, second side S2, third side S3, and fourth side S4 of pixel P may be a diagonal line with an inclination greater than 30° and less than 60° relative to the second signal line portion SL2.

[0104] Furthermore, non-transmissive areas can be classified into luminescent areas EA, which are equipped with pixels P to emit light, and non-luminescent areas NEA, which do not emit light.

[0105] The light-emitting area EA can be provided with multiple sub-pixels SP1, SP2 and SP3 to emit light of a predetermined color, and can include a first light-emitting area EA1, a second light-emitting area EA2 and a third light-emitting area EA3 respectively provided with sub-pixels SP1, SP2 and SP3.

[0106] The black matrix BM can be set in the non-emitting region NEA. The black matrix BM may include a first black matrix BM1, a second black matrix BM2, a third black matrix BM3, and a fourth black matrix BM4.

[0107] The first black matrix BM1 can be set between multiple sub-pixels SP1, SP2 and SP3 to prevent color mixing between the multiple sub-pixels SP1, SP2 and SP3.

[0108] The second black matrix BM2 is positioned between each of the plurality of sub-pixels SP1, SP2 and SP3 and the transmission region TA to prevent light generated from each of the plurality of sub-pixels SP1, SP2 and SP3 from being perceived as light of a different color depending on the viewing angle.

[0109] The third black matrix BM3 can be set between pixels P that are adjacent to each other along the first direction to prevent color mixing between pixels P that are adjacent to each other along the first direction and to prevent external incident light from being reflected from the first signal line portion SL1.

[0110] The fourth black matrix BM4 can be set between pixels P that are adjacent to each other along the second direction to prevent color mixing between pixels P that are adjacent to each other along the second direction and to prevent external incident light from being reflected from the second signal line portion SL2.

[0111] Since the black matrix BM is formed of a material that shields or absorbs light, light generated from sub-pixels SP1, SP2, and SP3 cannot pass through the area forming the black matrix BM, and external incident light also cannot pass through this area. Therefore, the area forming the black matrix BM corresponds to the non-emitting region NEA.

[0112] Because the black matrix BM shields or absorbs light, it can significantly affect the transmittance of the transparent display panel 110. Specifically, the transmittance of the transparent display panel 110 may decrease as the area forming the black matrix BM, i.e., the non-light-emitting area NEA, increases. Conversely, the transmittance of the transparent display panel 110 may increase as the non-light-emitting area NEA decreases.

[0113] A transparent display panel 110 according to one embodiment of the present disclosure has a pixel P structure for reducing the area forming the black matrix BM (e.g., the non-emitting area NEA). In the transparent display panel 110 according to one embodiment of the present disclosure, the pixel P is disposed in an intersection or overlap area IA where the first signal line portion SL1 and the second signal line portion SL2 intersect or overlap each other, and each of the plurality of edges S1, S2, S3, and S4 of the pixel P is inclined relative to each of the first signal line portion SL1 and the second signal line portion SL2. The transparent display panel 110 having such a pixel P can reduce the outer length of the transmissive area TA more than a transparent display panel having a plurality of edges S1, S2, S3, and S4 of the pixel P that are parallel or perpendicular to the first signal line portion SL1 and the second signal line portion SL2.

[0114] For example, the transparent display panel 110 according to one embodiment of the present disclosure can reduce the total area of ​​the second black matrix BM2 disposed between each of the plurality of sub-pixels SP1, SP2, and SP3 and the transmissive region TA, the third black matrix BM3 disposed between pixels P disposed adjacent to each other along the first direction, and the fourth black matrix BM4 disposed between pixels P disposed adjacent to each other along the second direction. Therefore, the transparent display panel 110 according to one embodiment of the present disclosure can increase transmittance as the area forming the black matrix BM (e.g., the non-light-emitting region NEA) is reduced.

[0115] Furthermore, in a transparent display panel 110 according to one embodiment of the present disclosure, a pixel P is disposed in an intersection or overlap region IA where the first signal line portion SL1 and the second signal line portion SL2 intersect or overlap each other, and includes a plurality of sub-pixels SP1, SP2, and SP3 disposed based on the intersection or overlap region IA. The transparent display panel 110 according to one embodiment of the present disclosure can improve the clarity and readability of image quality by collectively distributing the plurality of sub-pixels SP1, SP2, and SP3 based on the intersection or overlap region IA.

[0116] In a transparent display panel 110 according to one embodiment of the present disclosure, a first non-emitting region NEA1 disposed in a plurality of sub-pixels SP1, SP2, and SP3 may be tilted relative to each of the first signal line portion SL1 and the second signal line portion SL2. For example, a black matrix BM may be provided at the midpoint of each edge S1, S2, S3, and S4 from the intersecting or overlapping region IA to pixel P. In this way, the transparent display panel 110 with the black matrix BM can have a smaller first non-emitting region NEA1 than a transparent display panel in which the black matrix BM is disposed in the plurality of sub-pixels SP1, SP2, and SP3 along the first signal line portion SL1 or the second signal line portion SL2.

[0117] For example, the transparent display panel 110 according to one embodiment of the present disclosure can reduce the area of ​​the first black matrix BM1 disposed among a plurality of sub-pixels SP1, SP2 and SP3. Therefore, the transparent display panel 110 according to one embodiment of the present disclosure can increase transmittance as the area forming the black matrix BM (e.g., the non-light-emitting area NEA) is reduced.

[0118] Furthermore, the transparent display panel 110 according to one embodiment of the present disclosure can be driven using a dual-speed drive (DRD) method. Specifically, in the transparent display panel 110 according to one embodiment of the present disclosure, sub-pixels disposed in a unit pixel can share a data line and can be connected to two sensing scan lines. Therefore, the transparent display panel 110 according to one embodiment of the present disclosure can provide data voltages to adjacent sub-pixels connected to a data line in a time-division manner. As described above, the transparent display panel 110 according to one embodiment of the present disclosure can be driven using a DRD method to reduce the number of data lines, thereby reducing the area used to form the second signal line portion SL2.

[0119] However, while the DRD method can reduce the number of data lines to half, it may double the number of scan lines. Therefore, in the transparent display panel 110 driven by the DRD method, the size of the area forming the second signal line portion SL2 is reduced, but the size of the area forming the first signal line portion SL1 is increased.

[0120] This disclosure aims to provide a transparent display panel 110 that can minimize the area used to form the first signal line portion SL1 in a DRD driving method.

[0121] In the following text, reference will be made to Figures 7 to 13 The gate driver 205 and the first signal line portion for receiving signals from the gate driver 205 are described in more detail.

[0122] Figure 7 This is a schematic diagram illustrating the structure of a gate driver according to one embodiment of the present disclosure.

[0123] Reference Figure 7 The gate driver 205 sequentially provides sensing scan signals to multiple sensing scan lines to sequentially drive the multiple sensing scan lines.

[0124] The gate driver 205 may include: a first sensing signal generator SS1[1], SS1[2], ..., SS1[n-1] and SS1[n], a second sensing signal generator SS2[1], SS2[2], ..., SS2[n-1] and SS2[n], an initialization signal generator IS[1], IS[2], ..., IS[n-1] and IS[n], and a light emission control signal generator EM[1], EM[2], ..., EM[n-1] and EM[n].

[0125] The first sensing signal generators SS1[1], SS1[2], ..., SS1[n-1] and SS1[n] can be circuits for generating first sensing scan signals SSS1[1], SSS1[2], ..., SSS1[n-1] and SSS1[n], which are used to turn on or off the switching transistors included in the sub-pixels SP1, SP2 and SP3. The first sensing signal generators SS1[1], SS1[2], ..., SS1[n-1] and SS1[n] can provide the first sensing scan signals SSS1[1], SSS1[2], ..., SSS1[n-1] and SSS1[n] through the first sensing scan line SSL1.

[0126] The second sensing signal generators SS2[1], SS2[2], ..., SS2[n-1] and SS2[n] can be circuits for generating second sensing scan signals SSS2[1], SSS2[2], ..., SSS2[n-1] and SSS2[n], which are used to turn on or off the switching transistors included in the sub-pixels SP1, SP2 and SP3. The second sensing signal generators SS2[1], SS2[2], ..., SS2[n-1] and SS2[n] can provide the second sensing scan signals SSS2[1], SSS2[2], ..., SSS2[n-1] and SSS2[n] through the second sensing scan line SSL2.

[0127] The first sensing signal generators SS1[1], SS1[2], ..., SS1[n-1] and SS1[n] and the second sensing signal generators SS2[1], SS2[2], ..., SS2[n-1] and SS2[n] can be set on a horizontal line and can be driven sequentially.

[0128] Initialization signal generators IS[1], IS[2], ..., IS[n-1] and IS[n] can be circuits used to generate initialization signals ISS[1], ISS[2], ..., ISS[n-1] and ISS[n], which are used to turn on or off the initial switching transistor. Initialization signal generators IS[1], IS[2], ..., IS[n-1] and IS[n] can provide initialization signals ISS[1], ISS[2], ..., ISS[n-1] and ISS[n] through initialization line IL.

[0129] The light emission control signal generators EM[1], EM[2], ..., EM[n-1] and EM[n] can be circuits for generating light emission control signals EM[1], EM[2], ..., EM[n-1] and EM[n], which are used to turn on or off the light emission control transistors included in sub-pixels SP1, SP2 and SP3. The light emission control signal generators EM[1], EM[2], ..., EM[n-1] and EM[n] can provide the light emission control signals EM[1], EM[2], ..., EM[n-1] and EM[n] through the light emission control line EML.

[0130] In one implementation, such as Figure 7 The light emission control signal generators EM[1], EM[2], ..., EM[n-1] and EM[n] shown can be shared by two horizontal lines, but are not limited thereto. In another embodiment, the light emission control signal generators EM[1], EM[2], ..., EM[n-1] and EM[n] can be shared by four horizontal lines.

[0131] A transparent display panel 110, including the gate driver 205 as described above, may include two sensing scan lines SSL1 and SSL2, an initialization line IL, and a light emission control line EML in a horizontal line. According to one embodiment of the present disclosure, the transparent display panel 110 allows sub-pixels connected to the first sensing scan line SSL1 and sub-pixels connected to the second sensing scan line SSL2 to share the initialization line IL and the light emission control line EML. Therefore, the transparent display panel 110 according to one embodiment of the present disclosure can reduce the number of each of the initialization lines IL and the number of the light emission control lines EML.

[0132] Figure 8 This is a circuit diagram showing an example of a circuit region. Figure 9 It is a diagram showing the connection relationships between multiple circuit regions and multiple lines, and Figure 10 It is shown Figure 8 and Figure 9 A diagram illustrating an example of the timing of operation in a circuit region. Figure 11 This is a plan view showing an example of multiple lines and multiple circuit regions set in a pixel area. Figure 12 It shows along Figure 11 A cross-sectional view of an example intercepted by line I-I'. Figure 13 It shows along Figure 11 A sectional view of an example taken from line II-II'.

[0133] Reference Figures 8 to 13According to one embodiment of the present disclosure, the transparent display panel 110 may include a pixel P in an intersection or overlap region IA where the first signal line portion SL1 and the second signal line portion SL2 intersect or overlap with each other.

[0134] Pixel P may include a first unit pixel UP1 and a second unit pixel UP2. For example, a transparent display panel 110 according to one embodiment of the present disclosure may include two unit pixels UP1 and UP2 in an intersection or overlap area IA where the first signal line portion SL1 and the second signal line portion SL2 intersect or overlap with each other.

[0135] Each of the first unit pixel UP1 and the second unit pixel UP2 may include at least two of the first sub-pixel SP1, the second sub-pixel SP2, or the third sub-pixel SP3. In this case, one of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may be repeatedly set in the first unit pixel UP1 and the second unit pixel UP2.

[0136] For ease of description, the first unit pixel UP1 includes the first sub-pixel SP1 and the third sub-pixel SP3, and the second unit pixel UP2 includes the second sub-pixel SP2 and the third sub-pixel SP3, but the unit pixels are not limited to these.

[0137] Furthermore, a transparent display panel 110 according to one embodiment of this disclosure may include a plurality of circuit regions CA based on an intersection or overlap region IA where a first signal line portion SL1 and a second signal line portion SL2 intersect or overlap each other. The plurality of circuit regions CA may correspond to sub-pixels. For example, when a pixel P disposed in the intersection or overlap region IA comprises four sub-pixels, it may be based on... Figure 11 The shown intersection or overlap area IA is set to correspond to the four circuit areas CA of the four sub-pixels.

[0138] Multiple circuit regions CA may include a first circuit region CA1 corresponding to the first sub-pixel SP1 of the first unit pixel UP1, a second circuit region CA2 corresponding to the third sub-pixel SP3 of the first unit pixel UP1, a third circuit region CA3 corresponding to the second sub-pixel SP2 of the second unit pixel UP2, and a fourth circuit region CA4 corresponding to the third sub-pixel SP3 of the second unit pixel UP2.

[0139] Each of the first to fourth circuit regions CA1 to CA4 may include multiple switching transistors T1 to T6, a driving transistor DT, a capacitor Cst, and a light-emitting diode ED, such as Figure 8 As shown.

[0140] The gate electrode of the first transistor T1 can be connected to the initialization line IL, and its first electrode can be connected to the initialization voltage line Vini. Furthermore, the second electrode of the first transistor T1 can be connected to one end of the capacitor Cst, the second electrode of the third transistor T3, and the gate electrode of the driving transistor DT.

[0141] The first transistor T1 can be turned on in response to a low-level initial scan signal applied via the initialization line IL. When the first transistor T1 is turned on, the gate node N2 of the drive transistor DT can be initialized based on the initialization voltage Vini.

[0142] The gate electrode of the second transistor T2 can be connected to the nth sensing scan line SSL(n), and its first electrode can be connected to the anode electrode of the light-emitting diode ED. Furthermore, the second electrode of the second transistor T2 can be connected to the initialization voltage line Vini.

[0143] The second transistor T2 can be turned on in response to a low-level scan signal SCAN(n) applied through the nth sensing scan line SSL(n). When the second transistor T2 is turned on, the light-emitting diode ED can be initialized based on the initialization voltage Vini.

[0144] The gate electrode of the third transistor T3 can be connected to the nth sensing scan line SSL(n), and its first electrode can be connected to the first electrode of the driving transistor DT. Furthermore, the second electrode of the third transistor T3 can be connected to the gate electrode of the driving transistor DT.

[0145] The third transistor T3 can be turned on in response to a low-level scan signal SCAN[n] applied through the nth sensing scan line SSL[n]. When the third transistor T3 is turned on, the driving transistor DT can be in a diode-connected state.

[0146] The gate electrode of the fourth transistor T4 can be connected to the nth sensing scan line SSL[n], and its first electrode can be connected to the second electrode of the fifth transistor T5 and the source node N1 of the driving transistor DT. Furthermore, the second electrode of the fourth transistor T4 can be connected to the data line DL.

[0147] The fourth transistor T4 can be turned on in response to a low-level scan signal SCAN[n] applied through the nth sensing scan line SSL[n]. When the fourth transistor T4 is turned on, the data voltage Data applied through the data line DL can charge the second electrode of the fourth transistor T4.

[0148] The gate electrode of the fifth transistor T5 can be connected to the nth light emission control line EML[n], and its first electrode can be connected to the pixel power line VDDL. Furthermore, the second electrode of the fifth transistor T5 can be connected to the first electrode of the fourth transistor T4.

[0149] The fifth transistor T5 can be turned on in response to a low-level light-emitting control signal EM[n] applied through the nth light-emitting control line EML[n]. When the fifth transistor T5 is turned on, the data voltage Data charged in the second electrode of the fourth transistor T4 can be transferred to the other end of the capacitor Cst.

[0150] The gate electrode of the sixth transistor T6 can be connected to the nth light-emitting control line EML[n], and its first electrode can be connected to the first electrode of the driving transistor DT. Furthermore, the second electrode of the sixth transistor T6 can be connected to the anode electrode of the light-emitting diode ED.

[0151] The sixth transistor T6 can be turned on in response to a low-level light emission control signal EM[n] applied through the nth light emission control line EML[n]. When the sixth transistor T6 is turned on, the light-emitting diode ED can emit light in response to the drive current generated by the driving transistor DT.

[0152] One end of capacitor Cst can be connected to the second electrode of the first transistor T1, and the other end can be connected to the reference line VREF. The anode electrode of the organic light-emitting diode (OLED) can be connected to the second electrode of the sixth transistor T6, and its cathode electrode can be connected to the common power supply electrode VSS.

[0153] As described above, multiple circuit regions CA can be connected to the first signal line section SL1 and the second signal line section SL2 to receive signals. Specifically, the first signal line section SL1 may include a first sensing scan line SSL1, a second sensing scan line SS2, an initialization line IL, and a light emission control line EML. The second signal line section SL2 may include a first data line DL1 and a second data line DL2.

[0154] like Figure 9 As shown, the first data line DL1 can be connected to each of the first circuit region CA1 and the second circuit region CA2 to provide a first data voltage. For example, the first data line DL1 can provide the first data voltage to sub-pixels SP1 and SP3 included in the first unit pixel UP1.

[0155] The second data line DL2 can be connected to each of the third circuit region CA3 and the fourth circuit region CA4 to provide a second data voltage. For example, the second data line DL2 can provide a second data voltage to sub-pixels SP2 and SP3 included in the second unit pixel UP2.

[0156] The initialization line IL can be connected to each of the first through fourth circuit regions CA1, CA2, CA3, and CA4 to provide an initial scan signal. When the initial switching transistor is turned on by the initial scan signal, the gate node of the driving transistor can be initialized based on the initialization voltage Vinif.

[0157] The first sensing scan line SSL1 can be connected to the first circuit region CA1 and the third circuit region CA3 to provide a first sensing scan signal Scan(n). For example, the first sensing scan line SSL1 can provide the first sensing scan signal Scan(n) to one of the sub-pixels SP1 and SP3 included in the first unit pixel UP1 and one of the sub-pixels SP2 and SP3 included in the second unit pixel UP2.

[0158] The second sensing scan line SSL2 can be connected to the second circuit region CA2 and the fourth circuit region CA4 to provide the second sensing scan signal Scan(n+1). For example, the second sensing scan line SSL2 can provide the second sensing scan signal Scan(n+1) to another of the sub-pixels SP1 and SP3 included in the first unit pixel UP1 and another of the sub-pixels SP2 and SP3 included in the second unit pixel UP2.

[0159] As a result, sub-pixels SP1 and SP3 included in the first unit pixel UP1 can share a first data line DL1. One of the sub-pixels SP1 and SP3 included in the first unit pixel UP1 (e.g., the first sub-pixel SP1) can be connected to the first sensing scan line SSL1, while the other (e.g., the third sub-pixel SP3) can be connected to the second sensing scan line SSL2.

[0160] When the first sensing scan signal Scan(n) is input to the first sensing scan line SSL1, the first data voltage input to the first data line DL1 can be charged in the gate node N of the first sub-pixel SP1 of the first unit pixel UP1. When the second sensing scan signal Scan(n+1) is input to the second sensing scan line SSL2 after 0.5 horizontal cycles (0.5H), the first data voltage input to the first data line DL1 can be charged in the gate node (n+1) of the third sub-pixel SP3 of the first unit pixel UP1. In this way, the sub-pixels SP1 and SP3 of the first unit pixel UP1 can share the first data line DL1 and can therefore be driven as DRD.

[0161] Subpixels SP2 and SP3, which are included in the second unit pixel UP2, can share a second data line DL2. Furthermore, one of the subpixels SP2 and SP3 included in the second unit pixel UP2 (e.g., the second subpixel SP2) can be connected to the first sensing scan line SSL1, while the other (e.g., the third subpixel SP3) can be connected to the second sensing scan line SSL2.

[0162] When the first sensing scan signal Scan(n) is input to the first sensing scan line SSL1, the second data voltage input to the second data line DL2 can be charged in the gate node (n) of the second sub-pixel SP2 of the second unit pixel UP2. When the second sensing scan signal is input to the second sensing scan line SSL2 after 0.5 horizontal cycles (0.5h), the second data voltage input to the second data line DL2 can be charged in the gate node (n+1) of the third sub-pixel SP3 of the second unit pixel UP2. In this way, the sub-pixels SP2 and SP3 of the second unit pixel UP2 can share the second data line DL2 and can therefore be driven as DRD.

[0163] The light emission control line EML can be connected to each of the first through fourth circuit regions CA1, CA2, CA3, and CA4 to provide the light emission control signal EM. When the light emission control transistor is turned on by the light emission control signal EM, the pixel power supply voltage Vdd can be applied to the pixel power line. Therefore, a data current determined based on the gate node of the driving transistor and the pixel power supply voltage Vdd can be supplied to the anode electrode of the light emission diode. The common power supply voltage applied to the common power line can be supplied to the cathode electrode of the light emission diode.

[0164] In a transparent display panel 110 according to one embodiment of the present disclosure, a first sensing scan line SSL1, a second sensing scan line SSL2, an initialization line IL, and a light emission control line EML can extend along a first direction. In this case, the transparent display panel 110 according to one embodiment of the present disclosure is characterized in that the light emission control line EML overlaps with the initialization line IL in at least a partial region.

[0165] In detail, the light emission control line EML may include a straight portion and a branched portion from which the straight portion branches off.

[0166] The straight portion of the light emission control line EML can be positioned between pixels P that are adjacent to each other along a first direction. The branched portion of the light emission control line EML can branch from the straight portion and connect to each of multiple circuit regions CA1, CA2, CA3, and CA4 to provide signals. In this case, the branched portion of the light emission control line EML can be positioned around the multiple circuit regions CA1, CA2, CA3, and CA4.

[0167] The emission control line EML can extend in a straight line between adjacent pixels P, branch within pixel P, and then merge again to surround multiple circuit regions CA1, CA2, CA3, and CA4. On the other hand, the initialization line IL can pass in a straight line through the multiple circuit regions CA1, CA2, CA3, and CA4 within pixel P, as well as between adjacent pixels P. Therefore, the emission control line EML can overlap with the initialization line IL in its straight sections, and may not overlap with the initialization line IL in its branched sections.

[0168] A light emission control line (EML) can include multiple lines instead of a single line. Specifically, an EML can include multiple first light emission control lines (EML1) and multiple second light emission control lines (EML2). For example... Figures 11 to 13 As shown, each of the plurality of first light emission control lines EML1 can be set in a different layer from the initialization line IL, and at least a portion of the plurality of first light emission control lines EML1 can overlap with the initialization line IL.

[0169] In one embodiment, each of the first light-emitting control lines EML1 may be provided on the initialization line IL. Each of the plurality of circuit regions CA1, CA2, CA3, and CA4 may include a driving transistor, which includes an active layer, a gate electrode, a source electrode, and a drain electrode. For example, the first light-emitting control line EML1 may be formed in the same layer as the source and drain electrodes of the driving transistor using the same material. The initialization line IL may be formed in the same layer as the gate electrode of the driving transistor using the same material.

[0170] Multiple first light emission control lines EML1 can be respectively disposed between pixels P that are adjacent to each other along the first direction, and can be spaced apart from each other. Two first light emission control lines EML1 that are adjacent to each other along the first direction can be electrically connected to each other through at least one second light emission control line EML2.

[0171] Each of the multiple first light-emitting control lines EML1 can branch off at one end into a first branch line and a second branch line, and at the other end into a third branch line and a fourth branch line. Each of the first branch line, the second branch line, the third branch line, and the fourth branch line can be connected to a second light-emitting control line EML2 through a contact hole CH.

[0172] In one embodiment, two first light-emitting control lines EML1 arranged adjacent to each other along a first direction can be electrically connected to each other through two second light-emitting control lines EML2.

[0173] As an example, each of a first branch line of a first light-emitting control line EML1 and a third branch line of another first light-emitting control line EML1 (arranged adjacent to the first branch line) can be connected to a second light-emitting control line EML2 via a contact hole CH. Furthermore, each of a second branch line of a first light-emitting control line EML1 and a fourth branch line of another first light-emitting control line EML1 (arranged adjacent to the second branch line) can be connected to another second light-emitting control line EML2 via a contact hole CH.

[0174] Each of the multiple second light emission control lines EML2 can be set in a different layer than the first light emission control line EML1.

[0175] In one embodiment, each second light-emitting control line EML2 can be disposed in the same layer as the initialization line IL. For example, the second light-emitting control line EML2 and the initialization line IL can be formed in the same layer as the source and drain electrodes of the driving transistor using the same material. In this case, the second light-emitting control line EML2 can be spaced apart from the initialization line IL.

[0176] Although the transparent display panel 110 according to one embodiment of the present disclosure is driven by the DRD method, the increase in area for forming the first signal line portion SL1 extending in the first direction can be reduced or minimized.

[0177] In detail, in a transparent display panel 110 according to one embodiment of the present disclosure, the first unit pixel UP1 and the second unit pixel UP2 can share the initialization line IL and the light emission control line EML, thereby reducing the number of initialization lines IL and the number of light emission control lines EML to 1 / 2.

[0178] Furthermore, in a transparent display panel 110 according to one embodiment of the present disclosure, the light emission control line EML can be formed to overlap with the initialization line IL in at least a partial area. In a transparent display panel 110 according to one embodiment of the present disclosure, the light emission control line EML can branch into multiple branch lines in a pixel P having a large design space, and these branch lines can be respectively connected to multiple circuit regions CA1, CA2, CA3 and CA4, thereby stably providing the light emission control signal to the multiple circuit regions CA1, CA2, CA3 and CA4.

[0179] Furthermore, in a transparent display panel 110 according to one embodiment of the present disclosure, the light emission control line EML and the initialization line IL overlap each other between pixels P1, thereby reducing or minimizing the area used to form the first signal line portion SL1.

[0180] The following advantages can be obtained according to this disclosure.

[0181] In this disclosure, two unit pixels can correspond to one transmission region. Therefore, the total size of the transmission region can be increased, thereby obtaining high transmittance and high resolution.

[0182] When the transparent display panel of this disclosure is driven using the DRD method, the area used to form the portion of the second signal line extending along the second direction can be reduced. Furthermore, although the transparent display panel of this disclosure is driven using the DRD method, the increase in the area used to form the portion of the first signal line extending along the first direction can be reduced or minimized. As a result, this disclosure can improve transmittance.

[0183] Furthermore, the order of subpixels can differ in the first pixel overlapping with the first signal line in the odd-numbered row and the second pixel overlapping with the second signal line in the even-numbered row. This disclosure can achieve an optimal pixel structure, thereby preventing image quality degradation.

[0184] Furthermore, since multiple sub-pixels are collectively set based on the intersection or overlap area where the first signal line and the second signal line intersect or overlap with each other, this disclosure can improve the clarity and readability of image quality.

[0185] It will be apparent to those skilled in the art that this disclosure is not limited to the embodiments and drawings described above, and that various substitutions, modifications, and variations may be made in this disclosure without departing from its spirit or scope. Therefore, the scope of this disclosure is defined by the appended claims, and all variations or modifications derived from the meaning, scope, and equivalent concepts of the claims are intended to fall within the scope of this disclosure.

Claims

1. A transparent display device, the transparent display device comprising: Each of the multiple first signal line portions extending in a first direction includes a first line; Each of the multiple second signal line portions extending in the second direction; A transmission region is provided between two adjacent first signal line portions in the plurality of first signal line portions and between two adjacent second signal line portions in the plurality of second signal line portions; as well as Multiple circuit regions are provided at the intersections where one of the multiple first signal line portions and one of the multiple second signal line portions intersect each other. The first line includes a straight portion and a branched portion that branches off from the straight portion, the branched portion providing a signal to each of the plurality of circuit regions, and Each of the plurality of first signal line portions further includes a second line that overlaps with a portion of the first line.

2. The transparent display device according to claim 1, wherein, The second line is located in a different layer than the first line.

3. The transparent display device according to claim 1, wherein, The first line overlaps with the second line in the straight section.

4. The transparent display device according to claim 1, wherein, The first line is configured such that the bifurcation portion surrounds the plurality of circuit regions, and the second line is disposed between the plurality of circuit regions.

5. The transparent display device according to claim 1, wherein, The first line is a light emission control line for providing light emission control signals to the plurality of circuit regions, and the second line is an initialization line for providing initialization signals to the plurality of circuit regions.

6. The transparent display device according to claim 5, wherein, Each of the plurality of first signal line portions further includes a first sensing scan line for providing a first sensing scan signal to a portion of the plurality of circuit regions and a second sensing scan line for providing a second sensing scan signal to other portions of the plurality of circuit regions, wherein the first sensing scan line and the second sensing scan line are symmetrical to each other based on the initialization line.

7. The transparent display device according to claim 5, wherein, The light emission control line includes a plurality of first light emission control lines disposed in a layer different from the initialization line and a plurality of second light emission control lines disposed in the same layer as the initialization line. The first light emission control lines have at least a portion of their area overlapping with the initialization line, and the second light emission control lines are spaced apart from the initialization line.

8. The transparent display device according to claim 7, wherein, Each of the plurality of first light-emitting control lines has one end that branches into a first branch line and a second branch line and another end that branches into a third branch line and a fourth branch line, and each of the first branch line, the second branch line, the third branch line and the fourth branch line is connected to the second light-emitting control line of the plurality of second light-emitting control lines through a contact hole.

9. The transparent display device according to claim 7, wherein, Each circuit region includes a driving transistor, the driving transistor including an active layer, a gate electrode, a source electrode, and a drain electrode, the first light emission control line of the plurality of first light emission control lines is disposed in the same layer as the source electrode and the drain electrode, and the second light emission control line of the plurality of second light emission control lines is disposed in the same layer as the gate electrode.

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