Temporary bonding method, processing method and structure of high patterned structure wafer

Abstract

The application discloses a temporary bonding method, a processing method and a structure of a high-pattern-structure wafer, and belongs to the technical field of semiconductor manufacturing. The method comprises the following steps: coating bonding glue on a wafer with a high-pattern-structure on the surface multiple times after completing a front process, and / or coating bonding glue on a carrier plate for temporary bonding multiple times; the baking temperature of the multiple bonding glue coatings decreases from high to low, so that the total thickness of the bonding glue exceeds the height of the pattern structure; and the wafer is temporarily bonded with the carrier plate to obtain a temporary bonding structure. The multiple bonding glue coatings are distributed on the wafer and / or the bonding carrier plate, so that better bonding glue uniformity can be obtained; the baking temperature of the multiple bonding glue coatings adopts a decreasing mode from high to low, so that the bonding glue can be prevented from being excessively baked due to multiple baking, and the purpose of reducing bubble generation is achieved, and the risk of wafer fragmentation and edge breakage in a thinning process is reduced.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a temporary bonding method, processing method and structure for a high-pattern wafer. Background Technology

[0002] To meet the demands for thinner and smaller products in fields such as mobile consumer electronics and aerospace, chip sizes are becoming increasingly smaller and their integration levels are increasing. To achieve high-density integration within the limited surface area of ​​chips, various advanced technologies are emerging, with multi-contact, leadless, multi-chip, modular, and three-dimensional packaging methods becoming the development trend of advanced semiconductor packaging technology.

[0003] In the field of radio frequency (RF), with the continuous development of high data rate wireless communication networks and automotive radar technologies, the requirements for the integration and frequency of next-generation RF front-ends are becoming increasingly stringent. Existing wire-bonded chips are increasingly limited in terms of high I / O ports, small pitch, and high frequency, while leadless chip technologies such as flip chips are becoming the focus of industry attention.

[0004] In the fabrication of GaAs RF flip chips based on copper pillar structures, copper pillar structures tens of micrometers high need to be fabricated on the front electrode of the chip. The wafer with copper pillars is then temporarily bonded to a bonding substrate such as sapphire to complete back-side thinning and via processes. Due to the complex back-side processes such as back vias and back gold bonding, back-side photolithography alignment is also required. Therefore, these chips have higher requirements for temporary bonding strength and post-bonding thinning of chip edges.

[0005] Conventional methods of applying bonding adhesive once to the patterned surface of a wafer are difficult to cover such a high-profile pattern. On the other hand, simply applying bonding adhesive multiple times to the patterned surface leads to problems such as decreased uniformity and increased thickness differences with each application. It is also prone to generating air bubbles during the bonding process, resulting in fragmentation and broken edges during the thinning process, which makes it impossible to perform subsequent back via and back gold photolithography alignment processes. Summary of the Invention

[0006] The purpose of this invention is to overcome the problems of the prior art and provide a temporary bonding method, processing method and structure for high-pattern wafers.

[0007] The objective of this invention is achieved through the following technical solution: a temporary bonding method for a highly patterned wafer, comprising the following steps:

[0008] Bonding adhesive is applied multiple times to a wafer with a high pattern structure after the front-side process is completed, and / or bonding adhesive is applied multiple times to a substrate for temporary bonding, with the baking temperature of the multiple bonding adhesive applications decreasing from high to low, so that the total thickness of the bonding adhesive exceeds the height of the pattern structure.

[0009] Temporary bonding is performed between the wafer and the substrate to obtain a temporary bonding structure.

[0010] In one example, the temporary bonding of the wafer to the carrier plate specifically refers to:

[0011] Temporary bonding is performed by applying multiple bonding pressures, gradually increasing the bonding pressure.

[0012] In one example, the baking temperature is 100-200°C, with a decreasing gradient of 5-20°C.

[0013] In one example, the bonding pressure is 400-1200N, with an increasing gradient of 200-400N.

[0014] In one example, making the total thickness of the bonding adhesive exceed the height of the pattern structure includes:

[0015] When bonding adhesive is applied multiple times on a wafer, or when bonding adhesive is applied multiple times on a substrate, the total thickness of the bonding adhesive exceeds the height of the pattern structure.

[0016] When bonding adhesive is coated on both the wafer and the substrate, the sum of the thicknesses of the bonding adhesive on the wafer and the bonding adhesive on the substrate is greater than the height of the pattern structure.

[0017] In one example, the height of the graphic structure is greater than 30 μm.

[0018] In one example, the wafer material is any one of Si, GaAs, GaN, InP, and SiC.

[0019] It should be further noted that the technical features corresponding to the above examples can be combined or substituted to form new technical solutions.

[0020] The present invention also includes a temporary bonding structure for a high-pattern wafer, which is prepared by a bonding method according to any one or more of the above examples.

[0021] This invention also includes a method for fabricating a high-pattern structure wafer, which, based on the bonding method formed by any or more of the above examples to obtain a temporary bond structure, further includes:

[0022] The temporary bonding structure is fabricated using a back-side process, and then debonded to obtain a high-pattern chip.

[0023] The present invention also includes a high-graphics structure chip, which is prepared by the above-described processing method.

[0024] Compared with the prior art, the beneficial effects of the present invention are:

[0025] 1. In one example, the present invention applies bonding adhesive multiple times and distributes it on the wafer and / or bonding substrate, which can achieve better bonding adhesive uniformity; the baking temperature between the multiple bonding adhesive applications adopts a decreasing method from high to low, which can avoid over-baking of the bonding adhesive due to multiple baking, and achieve the purpose of reducing bubble generation, thereby reducing the risk of wafer fragmentation and edge breakage during the thinning process.

[0026] 2. In one example, during the temporary bonding process, a multiple pressing method with bonding pressure gradually increasing is used, which helps to slowly expel bubbles and further reduces the risk of wafer fragmentation and edge breakage during the thinning process. Attached Figure Description

[0027] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings, which are used to provide a further understanding of the present application and constitute a part of the present application. The same reference numerals are used in these drawings to denote the same or similar parts. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation of the present application.

[0028] Figure 1 This is a flowchart of a method in an example of the present invention;

[0029] Figure 2 This is a schematic diagram of a wafer with the front-side process completed in an example of the present invention;

[0030] Figure 3 This is a schematic diagram of the structure after multiple coatings of adhesive on a wafer and a carrier in one example of the present invention;

[0031] Figure 4 This is a schematic diagram of a temporary bonding structure in an example of the present invention.

[0032] In the figure: wafer 1, copper pillar structure 11, carrier 2, temporary bonding composite adhesive layer 3, first composite adhesive layer 31, and second composite adhesive layer 32. Detailed Implementation

[0033] The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0034] In the description of this invention, it should be noted that the directions or positional relationships indicated by terms such as "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer" are based on the directions or positional relationships shown in the accompanying drawings. They are used only for the convenience of describing this invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention. Furthermore, the use of ordinal numbers (e.g., "first and second," "first to fourth," etc.) is for distinguishing objects and is not limited to this order, and should not be construed as indicating or implying relative importance.

[0035] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0036] Furthermore, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0037] In one example, such as Figure 1 As shown, a temporary bonding method for a highly patterned wafer includes the following steps:

[0038] S1: Bonding adhesive is applied multiple times to a wafer with a high pattern structure after the front-side process is completed, and bonding adhesive is also applied multiple times to a carrier plate used for temporary bonding; wherein, the baking temperature of the bonding adhesive coating decreases from high to low, and the thickness of the bonding adhesive coating on the wafer surface or the carrier plate bonding surface can be less than the height of the pattern structure, but the total thickness of the bonding adhesive coating on the wafer surface and the carrier plate bonding surface exceeds the height of the pattern structure.

[0039] S2: Temporarily bond the wafer to the carrier to obtain a temporary bonding structure.

[0040] Specifically, step S1 includes the following steps:

[0041] S11: Provides a semiconductor wafer with completed front-side fabrication processes; the wafer can be Si-based, or any compound semiconductor wafer such as GaAs, InP, SiC, or GaN. The front-side fabrication process of the device has been completed through a series of steps on the semiconductor wafer. At this point, a patterned structure tens of micrometers high is formed on the semiconductor wafer, including but not limited to copper pillars (Cu Pillars) and bump structures. Taking a GaAs-based copper pillar flip chip as an example, transistors, resistors, inductors, capacitors, and other devices have been formed on the GaAs wafer 1 through previous processes, and a copper pillar structure 11 with a height of approximately 60μm is fabricated at the corresponding PAD positions, such as... Figure 2 As shown.

[0042] S12: Apply bonding adhesive to the GaAs wafer surface with the copper pillar structure and dry it. The bonding adhesive thickness is t1, and the bonding adhesive baking temperature is T1. In a specific embodiment, HT10 bonding adhesive is used, and the coating method is spin coating. Rolling, spraying, printing, etc., can also be used for bonding adhesive coating. The bonding adhesive thickness is approximately 30 μm, and the bonding adhesive baking temperature is 180°C. Due to the high height of the copper pillar bumps, a single bonding adhesive coating cannot completely cover the copper pillar structure to obtain a smooth surface.

[0043] S13: Repeat step S12 to coat and dry the wafer surface with the copper pillar structure using bonding adhesive. The bonding adhesive coating thickness is t2, and the bonding adhesive baking temperature is T2. In a specific embodiment, the bonding adhesive coating thickness is approximately 20 μm, and the bonding adhesive baking temperature is 170°C, i.e., the temperature decrease gradient is 10°C. The number of bonding adhesive coatings can be adjusted as needed until the bonding adhesive substantially or completely covers the copper pillar structure. Preferably, the bonding adhesive substantially covers the copper pillar structure. Figure 3 As shown, the first composite adhesive layer 31 with a thickness less than that of the patterned structure is obtained at this point. The thicknesses t1, t2...tn of the bonding adhesive applied multiple times can be set as needed, and the thickness of each application can be the same or different. The baking temperatures T1, T2...Tn for multiple adhesive applications satisfy T1>T2>...Tn.

[0044] S14: Provide a temporary bonding substrate and apply bonding adhesive multiple times; taking a sapphire substrate as an example, apply multiple coats of HT10 bonding adhesive similar to those on a wafer surface to the bonding surface of the sapphire substrate. The thickness of the bonding adhesive applied multiple times and the thickness of each coat on the wafer surface can be the same or different. The baking temperatures for the multiple coatings are T1, T2...Tn, satisfying T1>T2>...Tn. After multiple coatings of bonding adhesive on the substrate, a second composite adhesive layer 32 is obtained. Figure 3As shown, the thickness of the first composite adhesive layer 31 and the second composite adhesive layer 32 can each be less than the height of the pattern structure, but the total thickness of the first composite adhesive layer 31 and the second composite adhesive layer 32 exceeds the height of the pattern structure (copper pillar structure), so as to cover the pattern structure on the wafer surface and further protect the pattern structure in the subsequent backside fabrication process. Optionally, step S14 may be performed before step S11 or S12, or may be performed simultaneously with step S12.

[0045] In the present invention, bonding adhesive is coated multiple times on both the pattern surface of the wafer and the bonding surface of the carrier, and direct bonding between bonding adhesive and bonding adhesive is achieved in the subsequent bonding process. Compared with coating bonding adhesive only on one side of the wafer or the carrier and then bonding the bonding adhesive to the pattern surface of the carrier or the wafer, the method of the present invention in which bonding adhesive is coated on both the pattern surface of the wafer and the bonding surface of the carrier is beneficial to obtaining higher bonding strength. Optionally, bonding adhesive may also be coated multiple times separately on the pattern surface of the wafer or the bonding surface of the carrier, in which case the thickness of the bonding adhesive on the wafer or the thickness of the bonding adhesive on the carrier is greater than the height of the pattern structure, so that the bonding adhesive can completely cover the pattern structure.

[0046] In step S2, a bonding machine is specifically used for hot pressing to achieve temporary bonding of the wafer and the carrier, so as to obtain a temporary bonded structure.

[0047] In the present invention, the multiple coatings of bonding adhesive are distributed on the wafer and / or the bonding carrier, which can achieve better uniformity of the bonding adhesive; the baking temperatures between multiple coatings of bonding adhesive adopt a decreasing manner from high to low, which can avoid excessive curing of the bonding adhesive caused by multiple bakings, achieve the purpose of reducing bubble generation, and lower the risk of wafer chipping and edge cracking during the thinning process.

[0048] In one example, the temporary bonding of the wafer and the carrier is specifically:[

[0049] Temporary bonding is performed by means of multiple pressing with bonding pressure increasing from low to high. Specifically, for example Figure 4 As shown, the wafer coated with bonding adhesive and the temporary bonding carrier are temporarily bonded by means of multiple hot pressing, and the bonding pressures of the multiple hot pressing are F1, F2 ... Fn respectively, which satisfy F1 < F2 < ... < Fn. In this example, an EVG temporary bonding machine is specifically used, the bonding pressures are 500N, 800N and 1100N respectively, that is, the increasing gradient of bonding pressure is 300N, and the first composite adhesive layer and the second composite adhesive layer are directly bonded to obtain a temporary bonding composite adhesive layer 3 with a thickness greater than that of the high pattern structure, thereby completing the temporary bonding of the wafer and the carrier and obtaining a bonded structure. In this example, during the temporary bonding process, the multiple pressing method with bonding pressure increasing from low to high is beneficial to the gradual and slow discharge of air bubbles, further reducing the risk of wafer chipping and edge cracking during the thinning process.

[0050] Combining the above examples, a preferred example of the present invention is obtained, and the bonding method in this case comprises the following steps:

[0051] S11': Provides semiconductor wafers with completed front-side process fabrication;

[0052] S12': Multiple bonding adhesive coatings are applied to the surface of a wafer with a high pattern structure. The baking temperatures for each coating are T1, T2, ..., Tn, respectively, satisfying T1>T2>...Tn, to obtain the first composite adhesive layer.

[0053] S14': Provide a temporary bonding carrier plate, and apply bonding adhesive multiple times to the bonding surface of the carrier plate. The baking temperatures for each coating are T1, T2...Tn, respectively, satisfying T1>T2>...Tn, to obtain the second composite adhesive layer;

[0054] S2': The wafer coated with bonding adhesive is temporarily bonded to the temporary bonding substrate using multiple hot-pressing processes. The bonding pressures for each hot press are F1, F2...Fn, respectively, satisfying F1...Fn. <F2<……Fn。

[0055] The present invention also includes a wafer temporary bonding structure, which is prepared based on a bonding method formed by any or a combination of the above examples.

[0056] The present invention also includes a method for processing a high-pattern structure wafer, which, based on the temporary wafer bonding method formed by any or more of the above examples, further includes:

[0057] The wafer that has completed temporary bonding is subjected to back-side process fabrication, including thinning, back vias, and back gold bonding, and then debonding is performed to finally obtain a GaAs-based RF flip chip with copper pillar structure.

[0058] The present invention also includes a chip with a high-pattern structure, which is prepared based on the above processing method, such as obtaining a GaAs-based RF flip chip with a copper pillar structure.

[0059] The above detailed embodiments are a description of the present invention. It should not be considered that the specific embodiments of the present invention are limited to these descriptions. For those skilled in the art, several simple deductions and substitutions can be made without departing from the concept of the present invention, and all of these should be considered to fall within the protection scope of the present invention.

Claims

1. A temporary bonding method for a highly patterned wafer, characterized in that: It includes the following steps: Bonding adhesive is applied multiple times to a wafer with a high pattern structure after the front-side process is completed. Bonding adhesive is also applied multiple times to a carrier for temporary bonding. The baking temperature of the multiple bonding adhesive coatings decreases from high to low, so that the total thickness of the bonding adhesive exceeds the height of the pattern structure. Temporary bonding is performed between the wafer and the substrate to obtain a temporary bonding structure; The temporary bonding of the wafer to the carrier plate specifically involves: Temporary bonding is performed by applying multiple bonding pressures, gradually increasing the bonding pressure.

2. The temporary bonding method for a highly patterned wafer according to claim 1, characterized in that: The baking temperature is 100-200℃, with a decreasing gradient of 5-20℃.

3. The temporary bonding method for a highly patterned wafer according to claim 2, characterized in that: The bonding pressure is 400-1200N, with an increasing gradient of 200-400N.

4. The temporary bonding method for a highly patterned wafer according to claim 1, characterized in that: The step of making the total thickness of the bonding adhesive exceed the height of the pattern structure includes: The sum of the thicknesses of the bonding adhesive on the wafer and the bonding adhesive on the carrier is greater than the height of the pattern structure.

5. The temporary bonding method for a highly patterned wafer according to claim 1, characterized in that: The height of the graphic structure is greater than 30 μm.

6. The temporary bonding method for a highly patterned wafer according to claim 1, characterized in that: The wafer material is any one of Si, GaAs, GaN, InP, and SiC.

7. A temporary bonding structure for a highly patterned wafer, characterized in that: It is prepared by the bonding method described in any one of claims 1-6.

8. A method for fabricating a wafer with a high pattern structure, characterized in that: The temporary bonded structure prepared by the bonding method according to any one of claims 1-6 further includes: The temporary bonding structure is fabricated using a back-side process, and then debonded to obtain a high-pattern chip.

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