LED chip preparation method and LED chip

CN117457815BActive Publication Date: 2026-10-23JIANGXI ZHAO CHI SEMICON CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202311625676.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-11-30
Publication Date
2026-10-23
Estimated Expiration
2043-11-30

AI Technical Summary

Technical Problem

[0005]基于此,本发明的目的是提供一种LED芯片制备方法及LED芯片,旨在解决现有技术中在制备LED芯片时,电流阻挡层容易形成锯齿状,导致芯片质量差的问题

Benefits of technology

[0015] This invention first prepares a hard mask layer with low density at the bottom and high density at the top. Utilizing this morphology, a trapezoidal region exposing the epitaxial layer is etched out. Then, a current blocking layer is deposited. Simultaneously, by utilizing the thickness difference between the hard mask layer and the current blocking layer, the current blocking layer production line on the epitaxial layer surface and on the hard mask layer material is broken and discontinuous. This facilitates the etching solution to etch the hard mask layer material from the side, achieving the effect of removing the remaining hard mask layer material. This causes the other remaining current blocking layer materials on the hard mask layer to fall off. The final preparation of the electron blocking layer is achieved without etching the current blocking layer with an etching solution, avoiding the difference in etching rate between the two materials in the current blocking layer, which would otherwise result in a jagged appearance.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN117457815B_ABST
    Figure CN117457815B_ABST
Patent Text Reader

Abstract

The application provides an LED preparation method and an LED chip, and the method comprises the following steps: providing a semi-finished chip with a deposited epitaxial layer; depositing a hard mask layer on the epitaxial layer, the compactness of the hard mask layer gradually increases from the side close to the epitaxial layer to the other side; etching the middle part of the hard mask layer to etch a trapezoidal area exposing the epitaxial layer on the hard mask layer; depositing a current blocking layer on the surface of the semi-finished chip after etching, the thickness of the current blocking layer is less than the thickness of the hard mask layer; cleaning the semi-finished chip after etching the hard mask layer under the current blocking layer to obtain an LED chip only retaining the current blocking layer in the trapezoidal area. The application solves the problem that the current blocking layer is easy to form a sawtooth shape in the prior art, which leads to poor chip quality.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for preparing an LED chip and an LED chip. Background Technology

[0002] LED (Light Emitting Diode) is a semiconductor light-emitting device that converts electrical energy into light energy. With the development and advancement of LED chip manufacturing technology, it has gradually become a new mainstream lighting source after incandescent and fluorescent lamps. Due to its advantages such as small size, fast response, long life, environmental friendliness and energy saving, it is widely used in lighting, display screens and other fields.

[0003] Currently, the mainstream lighting fixtures on the market still use standard LED chips, with power connections achieved through wire bonding. Their structure consists of an epitaxial layer and a chip layer. The epitaxial layer typically includes a substrate, an N-type semiconductor, a multiple quantum well layer, and a P-type semiconductor. The chip structure, from bottom to top, consists of a current blocking layer, a transparent conductive layer, electrodes, and a passivation layer. Traditionally, the current blocking layer is prepared by PECVD deposition of SiO2. The electrodes are located directly above the current blocking layer, with a transparent conductive layer between the electrodes and the current blocking layer. The current blocking layer prepared by PECVD deposition of SiO2 has the characteristics of being transparent and insulating, with a light transmittance of over 98% and almost no light reflection. However, because the electrodes are opaque, they block light emission, so it is desirable for the light beneath the electrodes to be reflected as much as possible.

[0004] Currently, there are technologies that utilize DBR (distributed Bragg reflection) equipment to deposit DBR as a current blocking layer to improve light reflection at the bottom of the electrode. However, using DBR as a current blocking layer still presents problems. If DBR is etched using photolithography and wet etching techniques to prepare the current blocking layer, a serrated pattern will form on the sidewalls. This is because DBR is composed of SiO2 and Ti3O5, and the etching solution has different etching rates for the two materials, resulting in the serrated pattern. Summary of the Invention

[0005] Based on this, the purpose of the present invention is to provide an LED chip manufacturing method and an LED chip, which aims to solve the problem in the prior art that the current blocking layer is prone to forming a serrated shape during the manufacturing of LED chips, resulting in poor chip quality.

[0006] The embodiments of the present invention are implemented as follows: On one hand, the present invention proposes a method for manufacturing an LED chip, the method comprising: Provide a semi-finished chip with a deposited epitaxial layer; A hard mask layer is deposited on the epitaxial layer, and the compactness of the hard mask layer gradually increases from the side closest to the epitaxial layer to the other side; The middle portion of the hard mask layer is etched to create a trapezoidal region on the hard mask layer that exposes the epitaxial layer. A current blocking layer is deposited on the surface of the etched semi-finished chip, the thickness of which is less than the thickness of the hard mask layer; After etching away the hard mask layer under the current blocking layer, the semi-finished chip is cleaned to obtain an LED chip that retains only the current blocking layer in the trapezoidal region.

[0007] Furthermore, in the above-mentioned LED chip fabrication method, the thickness of the hard mask layer is 2.5µm to 7µm.

[0008] Furthermore, in the above-mentioned LED chip fabrication method, the thickness of the current blocking layer is 0.4µm to 1µm.

[0009] Furthermore, in the above-mentioned LED chip fabrication method, the material of the hard mask layer is either Al2O3 or ITO.

[0010] Furthermore, in the above-mentioned LED chip fabrication method, the current blocking layer includes alternating SiO2 layers and Ti3O5 layers, with the bottom layer and the top layer both being SiO2 layers. Furthermore, in the above-mentioned LED chip fabrication method, the step of etching the middle portion of the hard mask layer to etch a trapezoidal region on the hard mask layer to expose the epitaxial layer includes: The hard mask layer is etched using an etching solution, wherein the etching solution is an acid pickling solution without element F, the etching temperature is 25~70℃, and the etching time is 7~35min.

[0011] Furthermore, in the above-mentioned LED chip fabrication method, the etching solution is any one of hydrochloric acid, sulfuric acid, and nitric acid.

[0012] Furthermore, in the above-mentioned LED chip fabrication method, the step of cleaning the semi-finished chip after etching away the hard mask layer under the current blocking layer includes: The current blocking layer is ultrasonically cleaned by immersion in an immersion solution, wherein the immersion solution is a hydrochloric acid solution, the solution temperature is 25~70℃, and the immersion time is 7~35min.

[0013] Furthermore, in the above-mentioned LED chip fabrication method, after the step of cleaning the semi-finished chip after etching away the hard mask layer under the current blocking layer to obtain an LED chip that retains only the current blocking layer in the trapezoidal region, the method further includes: A transparent conductive layer is deposited and prepared by photolithography and wet etching. Electrodes were fabricated using photolithography and metal coating equipment; A passivation layer is deposited and prepared by photolithography and dry etching.

[0014] In another aspect, the present invention provides an LED chip, which is prepared by any of the above-mentioned LED chip preparation methods.

[0015] This invention first prepares a hard mask layer with low density at the bottom and high density at the top. Utilizing this morphology, a trapezoidal region exposing the epitaxial layer is etched out. Then, a current blocking layer is deposited. Simultaneously, by utilizing the thickness difference between the hard mask layer and the current blocking layer, the current blocking layer production line on the epitaxial layer surface and on the hard mask layer material is broken and discontinuous. This facilitates the etching solution to etch the hard mask layer material from the side, achieving the effect of removing the remaining hard mask layer material. This causes the other remaining current blocking layer materials on the hard mask layer to fall off. The final preparation of the electron blocking layer is achieved without etching the current blocking layer with an etching solution, avoiding the difference in etching rate between the two materials in the current blocking layer, which would otherwise result in a jagged appearance. Attached Figure Description

[0016] Figure 1 This is a flowchart of an LED manufacturing method according to an embodiment of the present invention; Figure 2 This is a flowchart illustrating the preparation of the hard mask layer in an LED fabrication method according to an embodiment of the present invention. Figure 3 This is a flowchart illustrating the fabrication process of the current blocking layer in an LED fabrication method according to an embodiment of the present invention. Figure 4 This is a flowchart illustrating the etching process of the current blocking layer in an LED fabrication method according to an embodiment of the present invention.

[0017] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0018] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of the invention are illustrated in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0019] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0021] This invention addresses the problem in the prior art where the current blocking layer easily forms a serrated shape during LED chip fabrication, leading to poor chip quality. It proposes an LED chip fabrication method and an LED chip, mainly by avoiding the formation of the final current blocking layer through etching.

[0022] Please see Figure 1 The diagram shows a flowchart of the LED chip fabrication method of the present invention, which includes steps S10 to S14.

[0023] Step S10: Provide a semi-finished chip with a deposited epitaxial layer.

[0024] In this process, the prerequisite for chip fabrication is the preparation of an epitaxial layer. Specifically, an epitaxial wafer is fabricated on a substrate, and an epitaxial layer is deposited. In the embodiments of this invention, the epitaxial layer may include an N-type semiconductor, a multiple quantum well layer, and a P-type semiconductor.

[0025] Step S11: A hard mask layer is deposited on the epitaxial layer, and the density of the hard mask layer gradually increases from the side closest to the epitaxial layer to the other side.

[0026] The density of the hard mask layer material increases sequentially from bottom to top, with low density at the bottom and high density at the top. This allows for the etching of trapezoidal morphologies during the etching process. Specifically, the hard mask layer material can be Al2O3, ITO, or other materials, and the thickness of the hard mask layer ranges from 2.5µm to 7µm.

[0027] Step S12: Etch the middle position of the hard mask layer to etch a trapezoidal region on the hard mask layer that exposes the epitaxial layer.

[0028] Specifically, the hard mask layer is etched using an etching solution, which is an acid pickling solution without sulfur (F). The etching temperature is 25-70°C, and the etching time is 7-35 minutes. Preferably, the etching temperature is 45°C, and the etching time is 15 minutes. For example, the etching solution can be any one of hydrochloric acid, sulfuric acid, or nitric acid. Specifically, photoresist can be applied to the areas of the hard mask layer that need etching for photolithography. For example, ... Figure 2 As shown, the hard mask layer is located in the middle. It is then immersed in the etching solution for etching, and finally the resist is removed and cleaned to obtain the hard mask layer.

[0029] Step S13: Deposit a current blocking layer on the surface of the etched semi-finished chip, wherein the thickness of the current blocking layer is less than the thickness of the hard mask layer.

[0030] Among them, such as Figure 3 As shown, a current blocking layer is deposited on the surface of the epitaxial layer and the remaining hard mask layer. Specifically, a DBR coating machine can be used to deposit the current blocking layer, and the thickness of the current blocking layer is 0.4µm to 1µm. The material is composed of SiO2 and Ti3O5 repeatedly stacked, with SiO2 at the bottom and SiO2 at the top. The repeated stacking of SiO2 and Ti3O5 as the current blocking layer can improve the light reflection at the bottom of the electrode.

[0031] In addition, the thickness of the current blocking layer is less than the thickness of the hard mask layer, and the difference between the thicknesses of the current blocking layer and the hard mask layer is controlled within 1.5~5µm. This creates a discontinuity between the current blocking layer on the epitaxial layer surface and the current blocking layer on the hard mask layer material, allowing the etching solution to etch the hard mask layer material from the side, thereby removing the remaining hard mask layer material and causing the other remaining current blocking layer material to detach.

[0032] Step S14: After etching away the hard mask layer under the current blocking layer, the semi-finished chip is cleaned to obtain an LED chip that retains only the current blocking layer in the trapezoidal region.

[0033] Among them, such as Figure 4 As shown, the current blocking layer is ultrasonically cleaned by immersing it in an immersion solution to obtain a current blocking layer that retains only the trapezoidal region. The immersion solution is a hydrochloric acid solution that cannot etch the current blocking layer. The solution temperature is 25~70℃ and the immersion time is 7~35min. Preferably, the temperature is 45℃ and the time is 20min.

[0034] In addition, after the current blocking layer is prepared, a transparent conductive layer of ITO material with a thickness of 600 Å is deposited. The transparent conductive layer is prepared by photolithography and wet etching. On the above structure, electrodes are prepared by photolithography and metal coating equipment. On the above structure, a passivation layer of SiO2 material with a thickness of 600 Å is deposited. The passivation layer is prepared by photolithography and dry etching, thereby preparing a complete LED chip.

[0035] In addition, the present invention also proposes an LED chip, which is prepared by the above-described LED chip preparation method.

[0036] In summary, the LED chip fabrication method and LED chip proposed in this invention first prepare a hard mask layer with low density at the bottom and high density at the top. Utilizing this morphology, a trapezoidal region exposing the epitaxial layer is etched out. Then, a current blocking layer is deposited. Simultaneously, the thickness difference between the hard mask layer and the current blocking layer is used to break the discontinuous production line between the current blocking layer on the epitaxial layer surface and the current blocking layer on the hard mask layer material. This facilitates the etching solution to etch the hard mask layer material from the side, achieving the effect of removing the remaining hard mask layer material. This causes the remaining current blocking layer material on the hard mask layer to fall off. The final fabrication of the electron blocking layer is achieved without etching the current blocking layer with an etching solution, avoiding the difference in etching rates of the two materials in the current blocking layer, which could lead to a jagged appearance.

[0037] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A method for fabricating an LED chip, characterized in that, The method includes: Provide a semi-finished chip with a deposited epitaxial layer; A hard mask layer is deposited on the epitaxial layer, and the compactness of the hard mask layer gradually increases from the side closest to the epitaxial layer to the other side; The middle portion of the hard mask layer is etched to create a trapezoidal region on the hard mask layer that exposes the epitaxial layer. A current blocking layer is deposited on the surface of the etched semi-finished chip, the thickness of which is less than the thickness of the hard mask layer; After etching away the hard mask layer under the current blocking layer, the semi-finished chip is cleaned to obtain an LED chip that retains only the current blocking layer in the trapezoidal region.

2. The LED chip fabrication method according to claim 1, characterized in that, The thickness of the hard mask layer is 2.5µm to 7µm.

3. The LED chip fabrication method according to claim 1, characterized in that, The thickness of the current blocking layer is 0.4µm to 1µm.

4. The LED chip fabrication method according to claim 1, characterized in that, The hard mask layer is made of either Al2O3 or ITO.

5. The LED chip fabrication method according to claim 4, characterized in that, The current blocking layer comprises alternating layers of SiO2 and Ti3O5, with both the bottom and top layers being SiO2 layers.

6. The LED chip fabrication method according to claim 1, characterized in that, The step of etching the middle portion of the hard mask layer to etch a trapezoidal region on the hard mask layer to expose the epitaxial layer includes: The hard mask layer is etched using an etching solution, wherein the etching solution is an acid pickling solution without element F, the etching temperature is 25~75℃, and the etching time is 7~35min.

7. The LED chip fabrication method according to claim 6, characterized in that, The etching solution is any one of hydrochloric acid, sulfuric acid, or nitric acid.

8. The LED chip fabrication method according to claim 1, characterized in that, The step of cleaning the semi-finished chip after etching away the hard mask layer under the current blocking layer includes: The current blocking layer is ultrasonically cleaned by immersion in an immersion solution, wherein the immersion solution is a hydrochloric acid solution, the solution temperature is 25~75℃, and the immersion time is 7~35min.

9. The LED chip fabrication method according to any one of claims 1 to 8, characterized in that, After the step of cleaning the semi-finished chip after etching away the hard mask layer under the current blocking layer to obtain an LED chip that retains only the current blocking layer in the trapezoidal region, the method further includes: A transparent conductive layer is deposited and prepared by photolithography and wet etching. Electrodes were fabricated using photolithography and metal coating equipment; A passivation layer is deposited and prepared by photolithography and dry etching.

10. An LED chip, characterized in that, The LED chip is prepared by any one of claims 1 to 9.

Citation Information

Patent Citations

  • Luminescent semiconductor device with complementary electrode layer and manufacturing method thereof

    CN102332518A

  • Nitride semiconductor element and its fabrication process

    JP2006313845A