A port statistics method and apparatus

CN117459478BActive Publication Date: 2026-10-09NEW H3C TECH CO LTD
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Patent Information

Application Number
CN202311230697.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-09-21
Publication Date
2026-10-09
Estimated Expiration
2043-09-21

AI Technical Summary

Technical Problem

[0005]但是,一旦转发端口配置的内部转发端口动态变化时,CPU读取更改后内部转发端口的直连统计芯片端口的端口硬件计数器时,导致转发端口的接收的报文计数值错误

Benefits of technology

[0006] The purpose of this application is to provide a port statistics method and device to achieve continuous port traffic statistics.

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Abstract

The application provides a port statistics method and device, the method comprising: finding an internal forwarding port of a polled forwarding port mapping; identifying a statistics chip port directly connected to the internal forwarding port; calculating an entry direction count difference value of a current count value of the statistics chip port minus a history software count value of the statistics chip port; calculating an exit direction count difference value of a current count value of the statistics chip port minus a history software count value of the statistics chip port; accumulating and summing the entry direction count difference value of the statistics chip port and an entry direction software cumulative summation value of the polled forwarding port; accumulating and summing the exit direction count difference value of the statistics chip port and an exit direction software cumulative summation value of the polled forwarding port; and assigning the entry direction and exit direction current count values of the statistics chip port to the entry direction and exit direction of the statistics chip port respectively.
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Description

Technical Field

[0001] This application relates to communication technology, specifically a port statistics method and device. Background Technology

[0002] The financial securities industry's demand for high-frequency trading is growing stronger, leading to an explosive increase in demand for ultra-low latency trading systems composed of ultra-low latency switches. It is against this backdrop that ultra-low latency switches, with their advantages of extremely low latency and minimal functionality, have emerged. Ultra-low latency switches have only one layer of forwarding functionality, enabling ultra-low latency forwarding.

[0003] However, ultra-low latency switches cannot perform traffic statistics on packets, resulting in functional defects such as inaccurate counting of forwarded packets and inability to calculate port rates. This limits the use of ultra-low latency switches.

[0004] An existing ultra-low latency switch, for the purpose of statistically analyzing the traffic of the forwarding ports (panel ports), copies the Ethernet data packets arriving at each forwarding port to the corresponding internal forwarding port; each internal forwarding port then sends the copied Ethernet data packets to the directly connected statistical chip port; the CPU of the ultra-low latency switch periodically polls and reads the count values ​​recorded by the port hardware counters of each statistical chip port on the statistical chip to count the packets received by each forwarding port and the packet forwarding rate in each period.

[0005] However, when the internal forwarding port configuration changes dynamically, the CPU reads the port hardware counter of the directly connected statistical chip port of the changed internal forwarding port, resulting in an incorrect message count value received by the forwarding port. Summary of the Invention

[0006] The purpose of this application is to provide a port statistics method and device to achieve continuous port traffic statistics.

[0007] To achieve the above objectives, this application provides a port statistics method, which includes: finding a first internal forwarding port mapped to the polled forwarding port; identifying a first statistics chip port directly connected to the internal forwarding port; calculating the inbound count difference between the current inbound count value and the historical inbound software count value of the first statistics chip port; calculating the outbound count difference between the current outbound count value and the historical outbound software count value of the first statistics chip port; summing the inbound count difference of the first statistics chip port with the cumulative sum of the inbound software counts of the polled forwarding port; summing the outbound count difference of the first statistics chip port with the cumulative sum of the outbound software counts of the polled forwarding port; assigning the current inbound count value of the first statistics chip port to its historical inbound software count value; and assigning the current outbound count value of the first statistics chip port to its historical outbound software count value.

[0008] To achieve the above objectives, this application also provides a port statistics device, which includes a processor and a memory. The memory stores processor-executable instructions. The processor executes the processor-executable instructions in the memory to perform the following operations: locate a first internal forwarding port mapped to the polled forwarding port; identify a first statistics chip port directly connected to the internal forwarding port; calculate the inbound count difference between the current inbound count value and the historical inbound software count value of the first statistics chip port; calculate the outbound count difference between the current outbound count value and the historical outbound software count value of the first statistics chip port; sum the inbound count difference of the first statistics chip port with the cumulative sum of the inbound software counts of the polled forwarding port; sum the outbound count difference of the first statistics chip port with the cumulative sum of the outbound software counts of the polled forwarding port; assign the current inbound count value of the first statistics chip port to its historical inbound software count value; and assign the current outbound count value of the first statistics chip port to its historical outbound software count value.

[0009] The beneficial effect of this application is that it enables the continuity of port traffic statistics, giving ultra-low latency switches a more robust traffic statistics function. Attached Figure Description

[0010] Figure 1 A flowchart illustrating an embodiment of the port statistics method for ultra-low latency switches provided in this application;

[0011] Figure 2 A schematic diagram of a statistical embodiment of the switching ports of the ultra-low latency switch provided in this application;

[0012] Figure 3A schematic diagram of an embodiment of modifying the mapping relationship of switching ports on the ultra-low latency switch provided in this application;

[0013] Figure 4 This is a schematic diagram of an embodiment of the port statistics device for ultra-low latency switches provided in this application. Detailed Implementation

[0014] The following detailed description will be provided with reference to several examples illustrated in the accompanying figures. In this detailed description, numerous specific details are used to provide a comprehensive understanding of the present application. Known methods, steps, components, and circuits are not described in detail in the examples to avoid obscuring their meaning.

[0015] In the terminology used, the term "including" means including but not limited to; the term "containing" means including but not limited to; the terms "above," "within," and "below" include the number itself; the terms "greater than" and "less than" mean not including the number itself. The term "based on" means based on at least a portion of them.

[0016] Figure 1 A flowchart illustrating an embodiment of a port statistics method for ultra-low latency switches provided in this application; the method includes,

[0017] Step 101: Locate the internal forwarding port mapped to the polled forwarding port;

[0018] Step 102: Identify the statistical chip port directly connected to the internal forwarding port;

[0019] Step 103: Calculate the difference between the current inbound direction count value of the statistical chip port and its historical inbound direction count value.

[0020] Step 104: Calculate the difference between the current outgoing direction count value of the statistical chip port and its historical outgoing direction software count value.

[0021] Step 105: The difference in the incoming direction count of the statistical chip port is summed with the cumulative sum of the incoming direction counts of the polled forwarding port.

[0022] Step 106: The difference in outgoing direction counts of the statistical chip port is summed with the cumulative sum of the outgoing direction counts of the polled forwarding port.

[0023] Step 107: Assign the current count values ​​of the inbound and outbound directions of the statistical chip port to the historical software count values ​​of the inbound and outbound directions, respectively.

[0024] Figure 1 The beneficial effect of the embodiment is that it enables the continuity of port traffic statistics, giving the ultra-low latency switch a more robust traffic statistics function.

[0025] Figure 2 This is a schematic diagram of a statistical embodiment of the switching ports of the ultra-low latency switch provided in this application.

[0026] like Figure 2 As shown, this application adds a statistical unit (chip) with a PCIE physical layer interface (Physical Interface for PCI Express, PIPE) to the ultra-low latency switch 2A to realize port statistics, thereby solving the problem of providing traffic statistics for the switch unit (chip) of the ultra-low latency switch.

[0027] In this application, a certain number of forwarding ports of the switching unit of the ultra-low latency switch 2A are configured as internal forwarding ports to send data packets sent by the forwarding ports to be counted by the switching chip to the statistics unit.

[0028] Figure 2 In the case of the ultra-low time switch 2A, the CPU settings of the switching ports 21-40 on the switching unit are respectively connected to the statistical chip ports (PIPE ports) P1-P20 of the statistical chip.

[0029] When configuring any one of the forwarding ports 1-20 on the CPU of the Ultra-Low Latency Switch 2A, it can select one from internal forwarding ports 21-40 for allocation. The internal forwarding ports mapped to forwarding ports 1-20 are modifiable and not fixed.

[0030] Figure 2 In the process, the ultra-low latency switch 2A selects internal forwarding port 25 and assigns it to forwarding port 3. The CPU software of the ultra-low latency switch 2A records the internal forwarding ports mapped to forwarding ports 1-20; it also records the correspondence between internal forwarding ports 21-40 and the PIPE ports P1-P20 of the statistical unit.

[0031] When a switching unit of the ultra-low latency switch 2A receives a data packet 201 from a certain service flow through forwarding port 3, it copies the data packet 201' and sends the data packet 201' to the PIPE port P5 through internal forwarding port 25. Similarly, when a switching unit of the ultra-low latency switch 2A receives a data packet 201 from a certain service flow through forwarding port 3, it also copies the sent data packet and sends the copied sent data packet to the PIPE port through internal forwarding port 25.

[0032] Figure 2 The following explanation uses a data packet received from forwarding port 3 as an example.

[0033] When the CPU of the ultra-low latency switch 2A arrives at each statistical cycle (T), it polls forwarding port 3, searches for the internal forwarding port 25 mapped to forwarding port 3; identifies the statistical chip port P5 directly connected to the internal forwarding port 25; reads the historical software count value (software variable) of the incoming direction of the identified statistical chip port P5; reads the current incoming direction count value of the port hardware counter of statistical chip port P5; subtracts the historical software count value of the incoming direction of statistical chip port P5 from the current incoming direction count value of the port hardware counter of statistical chip port P5 to calculate the incoming direction count difference of statistical chip port P5; and sums the incoming direction count difference of statistical chip port P5 with the cumulative sum of the incoming direction software of forwarding port 3, Port3 SUMIngress, to calculate the new cumulative sum value of the cumulative sum of the incoming direction software of forwarding port 3, Port3 SUM Ingress.

[0034] The CPU of the ultra-low latency switch 2A calculates the outbound software cumulative sum value (Port3 SUM Egress) of forwarding port 3 in the same way: it locates the internal forwarding port 25 mapped to forwarding port 3; identifies the statistical chip port P5 directly connected to internal forwarding port 25; reads the historical outbound software count value (software variable) of the identified statistical chip port P5; reads the current outbound count value of the port hardware counter of statistical chip port P5; subtracts the historical outbound software count value of statistical chip port P5 from the current outbound count value of the port hardware counter of statistical chip port P5 to calculate the outbound count difference of statistical chip port P5; and sums the outbound count difference of statistical chip port P5 with the outbound software cumulative sum value (Port3 SUM Egress) of forwarding port 3 to calculate the new cumulative sum value (Port3 SUM Egress) of outbound software cumulative sum value (Port3 SUM Egress) of forwarding port 3.

[0035] The CPU of the ultra-low latency switch 2A assigns the current inbound count value of the statistical chip port P5 to the historical inbound count value of the statistical chip port P5, and assigns the current outbound count value of the statistical chip port P5 to the historical outbound count value of the statistical chip port P5, thus completing the counting of received packets on the forwarding port 3 in this polling cycle.

[0036] When the next polling cycle arrives, the CPU of the ultra-low latency switch 2A will sum the difference between the inbound and outbound counts of PIPE port P5 in the same way, and calculate the software cumulative sum value of the inbound direction of forwarding port 3, Port3 SUMIngress and Port3 SUMEgress, respectively.

[0037] Figure 3A schematic diagram of an embodiment of modifying the mapping relationship of switching ports on the ultra-low latency switch provided in this application;

[0038] When the CPU of the ultra-low latency switch 2A modifies the internal forwarding port mapped to switching port 3, it searches for the internal forwarding port 25 of forwarding port 3 according to the recorded mapping relationship; identifies the statistical chip port P5 directly connected to the internal forwarding port 25; reads the historical software count values ​​of the inbound and outbound directions of the statistical chip port P5; reads the current count values ​​of the inbound and outbound directions of the port hardware counter of the statistical chip port P5; subtracts the historical software count value of the inbound direction of P5 from the current count value of the inbound direction of the statistical chip port P5 to calculate the inbound count difference of the statistical chip port P5; subtracts the historical software count value of the outbound direction of P5 from the current count value of the outbound direction of the statistical chip port P5 to calculate the outbound count difference of the statistical chip port P5.

[0039] The CPU of the ultra-low latency switch 2A sums the inbound count difference of the statistical chip port P5 with the inbound software cumulative sum value Port3 SUM Ingress of the forwarding port 3, and calculates a new software cumulative sum value Port3 SUM Ingress for the forwarding port 3; it also sums the outbound count difference of the statistical chip port P5 with the outbound software cumulative sum value Port3 SUM Egress of the forwarding port 3, and calculates a new software cumulative sum value Port3 SUM Egress for the forwarding port 3.

[0040] The CPU of the ultra-low latency switch 2A assigns the current inbound count value of the statistical chip port P5 to the historical inbound count value of the statistical chip port P5; assigns the current outbound count value of the statistical chip port P5 to the historical outbound count value of the statistical chip port P5; and deletes the mapping relationship between the switch port 3 and the mapped internal forwarding port 25.

[0041] The CPU of the ultra-low latency switch 2A sets the temporary counting software values ​​Port3 Temp Ingress and Port3 Temp Egress (temporary software variables) for the switching ports; it assigns the value of Port3 SUM Ingress of switching port 3 to Port3Temp Ingress; and it assigns the value of Port3 SUM Egress of switching port 3 to Port3 Temp Egress.

[0042] The CPU of the ultra-low latency switch 2A sets the mapping relationship between switching port 3 and the mapped internal forwarding port 24; identifies the statistical chip port P4 directly connected to the mapped internal forwarding port 24; reads the current inbound and outbound count values ​​of the port hardware counter of the statistical chip port P4; assigns the current inbound count value of the statistical chip port P4 to the historical inbound count value of the statistical chip port P4; and assigns the current outbound count value of the statistical chip port P4 to the historical outbound count value of the statistical chip port P4.

[0043] The CPU of the ultra-low latency switch 2A assigns the value of Port3 Temp Ingress of forwarding port 3 to Port3SUM Ingress, and assigns the value of Port3 Temp Egress to Port3 SUM Egress; it then deletes Port3 Temp Ingress and Port3 Temp Egress of forwarding port 3.

[0044] When dynamically switching the internal forwarding port mapped to forwarding port 3, the CPU of the ultra-low latency switch 2A updates the Port3 SUM Ingress and Port3 SUM Egress of forwarding port 3 before the polling cycle arrives, to prevent the inbound and outbound port counts of forwarding port 3 from being less than the actual counts. Then, the CPU of the ultra-low latency switch 2A temporarily stores the Port3 SUM Ingress and Port3 SUM Egress of forwarding port 3 through Port3 Temp Ingress and Port3 Temp Egress; it refreshes the historical software count values ​​of the inbound and outbound directions of the directly connected statistics chip port P4 of the newly mapped internal forwarding port 24 of forwarding port 3, to prevent the inbound and outbound port counts of forwarding port 3 from being greater than the actual counts; and then copies the values ​​of Port3 Temp Ingress and Port3 Temp Egress from forwarding port 3 to Port3 SUM Ingress and Port3 SUM Egress in reverse, to achieve the continuity of port traffic statistics for forwarding port 3.

[0045] When the next training cycle arrives, the ultra-low latency switch 2A will, according to... Figure 2 The implementation method updates the Port3 SUM Ingress and Port3 SUM Egress of forwarding port 3, so that the Port3 SUM Ingress of forwarding port 3 is equal to the cumulative sum of the differences in the inbound counts of chip ports P3 and P4; the Port3 SUM Egress of forwarding port 3 is equal to the cumulative sum of the differences in the outbound counts of chip ports P3 and P4.

[0046] when Figure 3 In the process, when the CPU of the ultra-low latency switch 2A receives a down event of forwarding port 3; it searches for the internal forwarding port 24 mapped to forwarding port 3; identifies the statistical chip port P4 directly connected to the internal forwarding port 24; reads the historical software count values ​​of the inbound and outbound directions of the statistical chip port P4; and reads the current count values ​​of the inbound and outbound directions of the port hardware counter of the statistical chip port P4.

[0047] The CPU of the low-latency switch 2A subtracts the historical software count value of the incoming direction from the current count value of the statistical chip port P4 to calculate the incoming direction count difference of the statistical chip port P4; and sums the incoming direction count difference of the statistical chip port P4 with the Port3 SUM Ingress of the forwarding port 3 to calculate the new software cumulative sum value of the Port3 SUM Ingress of the forwarding port 3.

[0048] The CPU of the low-latency switch 2A subtracts the historical software count value of the outgoing direction from the current count value of the outgoing direction of the statistics chip port P4 to calculate the outgoing direction count difference of the statistics chip port P4; and sums the outgoing direction count difference of the statistics chip port P4 with the Port3 SUM Egress of the forwarding port 3 to calculate the new software cumulative sum value of the Port3 SUM Egress of the forwarding port 3.

[0049] The low-latency switch 2A assigns the current inbound and outbound count values ​​of the statistical chip port P4 to the historical software count values ​​of the inbound and outbound directions of the statistical chip port P4.

[0050] The CPU of the ultra-low latency switch 2A adds a stop counting flag to forwarding port 3. When the next polling cycle arrives, when the CPU of the ultra-low latency switch 2A polls forwarding port 3, it reads the stop counting flag of forwarding port 3, skips forwarding port 3, and polls the next forwarding port.

[0051] When forwarding port 3 restarts, the CPU of the ultra-low latency switch 2A receives the UP event of forwarding port 3; sets another inbound temporary counter software value Port3 Temp Ingress' and another outbound temporary counter software value Port3 Temp Egress' for forwarding port 3; assigns the value of Port3 SUM Ingress of forwarding port 3 to Port3 Temp Ingress' and assigns the value of Port3 SUM Egress to Port3 Temp Egress'.

[0052] The CPU of low-latency switch 2A locates the internal forwarding port 24 mapped to forwarding port 3; identifies the statistical chip port P4 directly connected to internal forwarding port 24; reads the historical software count values ​​of the inbound and outbound directions of statistical chip port P4; reads the current count values ​​of the inbound and outbound directions of the port hardware counter of statistical chip port P4; assigns the current inbound count value of statistical chip port P4 to the historical software count value of the inbound direction of statistical chip port P4; and assigns the current outbound count value of statistical chip port P4 to the historical software count value of the outbound direction of statistical chip port P4.

[0053] The CPU of the ultra-low latency switch 2A assigns the values ​​of Port3 Temp Ingress' and Port3 TempEgress' of forwarding port 3 to Port3 SUM Ingress and Port3 SUM Egress respectively; and deletes Port3 Temp Ingress' and Port3 Temp Egress' of forwarding port 3.

[0054] When the state of forwarding port 3 changes from up to down, the CPU of the ultra-low latency switch 2A first temporarily stores the count values ​​of Port3 SUM Ingress and Port3 SUM Egress of forwarding port 3, updates the historical software count values ​​of the inbound and outbound directions of the statistical chip port P4 directly connected to the internal forwarding port 24 of forwarding port 3, and then copies the values ​​temporarily stored in Port3Temp Ingress' and Port3 Temp Egress' of forwarding port 3 in reverse to Port3 SUM Ingress and Port3 SUM Egress of forwarding port 3 to maintain the counting continuity of forwarding port 3.

[0055] When there is no need to count forwarding port 3, the CPU of the ultra-low latency switch 2A identifies the statistical chip port P4 directly connected to the internal forwarding port 24; reads the historical software count values ​​of the inbound and outbound directions of the statistical chip port P4; and reads the current count values ​​of the inbound and outbound directions of the port hardware counter of the statistical chip port P4.

[0056] The CPU of the ultra-low latency switch 2A subtracts the historical software count value of the incoming direction from the current count value of the statistical chip port P4 to calculate the incoming direction count difference of the statistical chip port P4; it then sums the incoming direction count difference of the statistical chip port P4 with the Port3 SUM Ingress of the forwarding port 3, and assigns the current incoming direction count value of the statistical chip port P4 to the historical software count value of the incoming direction of the statistical chip port P4.

[0057] The CPU of the ultra-low latency switch 2A subtracts the historical software count value of the outgoing direction from the current outgoing count value of the statistical chip port P4 to calculate the outgoing count difference of the statistical chip port P4; it sums the outgoing count difference of the statistical chip port P4 with the Port3 SUM Egress of the forwarding port 3, and assigns the current outgoing count value of the statistical chip port P4 to the historical software count value of the outgoing direction of the statistical chip port P4.

[0058] The CPU of the ultra-low latency switch 2A removes Port3 SUM Ingress and Port3 SUM Egress from forwarding port 3 to ensure that the historical software count values ​​of port P4 in the inbound and outbound directions based on the updated statistics chip do not affect the accuracy of subsequent forwarding port counts.

[0059] Figure 4 This is a schematic diagram of an embodiment of a port statistics device for an ultra-low latency switch provided in this application. The device 400 includes a network interface, a switching unit, a statistics unit, a CPU, and a memory. The switching unit can be an FPGA or ASIC chip with switching functionality; the statistics unit is a PIPE chip with statistical functionality; the processor executes processor-executable instructions in the memory to configure multiple forwarding ports of the switching unit as multiple internal forwarding ports, and each of the multiple internal forwarding ports of the switching unit is directly connected to a port of the statistics chip located in the statistics unit.

[0060] The processor also performs the following operations by executing processor-executable instructions in memory:

[0061] Locate the first internal forwarding port mapped to the polled forwarding port; identify the first statistical chip port directly connected to the internal forwarding port; calculate the inbound count difference between the current inbound count value and the historical inbound software count value of the first statistical chip port; calculate the outbound count difference between the current outbound count value and the historical outbound software count value of the first statistical chip port; sum the inbound count difference of the first statistical chip port with the cumulative sum of the inbound software counts of the polled forwarding port; sum the outbound count difference of the first statistical chip port with the cumulative sum of the outbound software counts of the polled forwarding port; assign the current inbound count value of the first statistical chip port to its historical inbound software count value; assign the current outbound count value of the first statistical chip port to its historical outbound software count value.

[0062] The processor, by executing processor-executable instructions in memory, also performs the following operations: locates the second internal forwarding port mapped to the switched forwarding port; identifies the second statistical chip port directly connected to the second internal forwarding port; calculates the inbound count difference between the current inbound count value and the historical inbound software count value of the second statistical chip port; calculates the outbound count difference between the current outbound count value and the historical outbound software count value of the second statistical chip port; sums the inbound count difference of the second statistical chip port with the cumulative sum of the inbound software counts of the switched forwarding port; sums the outbound count difference of the second statistical chip port with the cumulative sum of the outbound software counts of the switched forwarding port; assigns the current inbound count value of the second statistical chip port to its historical inbound software count value; and assigns the current outbound count value of the second statistical chip port to its historical outbound software count value.

[0063] The processor, by executing processor-executable instructions in memory, also performs the following operations: sets the inbound temporary count software value and the outbound temporary count software value of the switched forwarding port; the inbound and outbound temporary count software values ​​are temporary software variables; assigns the inbound software cumulative sum value and the outbound software cumulative sum value of the switched forwarding port to the inbound temporary count software value and the outbound temporary count software value, respectively; sets the mapping relationship between the switched forwarding port and the third internal forwarding port; identifies the third statistical chip port directly connected to the third internal forwarding port; assigns the current inbound count value of the third statistical chip port to its inbound historical software count value; assigns the current outbound count value of the third statistical chip port to its outbound historical software count value; assigns the inbound temporary count software value and the outbound temporary count software value of the switched forwarding port to its inbound software cumulative sum value and the outbound software cumulative sum value, respectively; and deletes the inbound and outbound temporary count software values ​​of the switched forwarding port.

[0064] The processor, by executing processor-executable instructions in memory, also performs the following operations: receiving a down event of a forwarding port; locating the fourth internal forwarding port mapped to the downed forwarding port; identifying the fourth statistical chip port directly connected to the fourth internal forwarding port; calculating the inbound count difference between the current inbound count value and the historical inbound software count value of the fourth statistical chip port; calculating the outbound count difference between the current outbound count value and the historical outbound software count value of the fourth statistical chip port; summing the inbound count difference of the fourth statistical chip port with the cumulative sum of the inbound software counts of the downed forwarding port; summing the outbound count difference of the fourth statistical chip port with the cumulative sum of the outbound software counts of the downed forwarding port; assigning the current inbound count value of the fourth statistical chip port to its historical inbound software count value; assigning the current outbound count value of the fourth statistical chip port to its historical outbound software count value; adding a stop counting flag to the downed forwarding port; so that the next polling cycle skips the downed forwarding port and polls the next forwarding port.

[0065] The processor also performs the following operations by executing processor-executable instructions in memory: receiving a startup UP event from a forwarding port; setting a temporary counter software value for the started forwarding port; assigning the software cumulative sum of the started forwarding port to the temporary counter software value of the started forwarding port; locating the fifth internal forwarding port mapped to the started forwarding port; identifying the fifth statistical chip port directly connected to the fifth internal forwarding port; assigning the current counter value of the fifth statistical chip port to the historical software counter value of the fifth statistical chip port; assigning the temporary counter software value of the started forwarding port to the software cumulative sum of the started forwarding port; and deleting the temporary counter software value of the started forwarding port.

[0066] The processor, by executing processor-executable instructions in memory, also performs the following operations: locates the sixth internal forwarding port mapped to the forwarding port whose count is to be deleted; identifies the sixth statistical chip port directly connected to the sixth internal forwarding port; calculates the outbound count difference between the current outbound count value of the sixth statistical chip port and its historical outbound software count value; sums the inbound count difference of the sixth statistical chip port and the inbound software cumulative sum of the forwarding port whose count is to be deleted; sums the outbound count difference of the sixth statistical chip port and the outbound software cumulative sum of the forwarding port whose count is to be deleted; assigns the current inbound count value of the sixth statistical chip port to its historical inbound software count value; assigns the current outbound count value of the sixth statistical chip port to its historical outbound software count value; and deletes the software cumulative sum of the forwarding port whose count is to be deleted.

[0067] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A port statistics method, characterized in that, The method includes, Find the first internal forwarding port mapped to the polled forwarding port; Identify the first statistical chip port directly connected to the internal forwarding port; Calculate the inbound direction count difference between the current inbound direction count value of the first statistical chip port and its historical inbound direction software count value; Calculate the outgoing direction count difference between the current outgoing direction count value of the first statistical chip port and its historical outgoing direction software count value; The difference in the incoming direction count at the first statistical chip port is summed with the cumulative sum of the incoming direction software at the polled forwarding port. The outgoing direction count difference of the first statistical chip port is summed with the outgoing direction software cumulative sum of the polled forwarding port. Assign the current inbound count value of the first statistical chip port to its historical inbound count value; assign the current outbound count value of the first statistical chip port to its historical outbound count value.

2. The method according to claim 1, characterized in that, The method further includes: Locate the second internal forwarding port mapped to the switched forwarding port; Identify the second statistical chip port directly connected to the second internal forwarding port; Calculate the inbound direction count difference between the current inbound direction count value of the second statistical chip port and its historical inbound direction software count value; Calculate the outgoing direction count difference between the current outgoing direction count value of the second statistical chip port and its historical outgoing direction software count value; The difference in the incoming direction counts of the second statistical chip port is summed with the sum of the incoming direction software counts of the switched forwarding port; the difference in the outgoing direction counts of the second statistical chip port is summed with the sum of the outgoing direction software counts of the switched forwarding port. Assign the current inbound count value of the second statistical chip port to its historical inbound count value; assign the current outbound count value of the second statistical chip port to its historical outbound count value.

3. The method according to claim 2, characterized in that, The method further includes: Set the inbound temporary count software value and the outbound temporary count software value of the switched forwarding port; the inbound and outbound temporary count software values ​​are temporary software variables; The cumulative sum of the inbound and outbound software values ​​of the switched forwarding port is assigned to the inbound temporary counting software value and the outbound temporary counting software value, respectively. Configure the mapping relationship between the switched forwarding port and the third internal forwarding port; Identify the third statistical chip port directly connected to the third internal forwarding port; Assign the current inbound count value of the third statistical chip port to its inbound historical software count value; assign the current outbound count value of the third statistical chip port to its outbound historical software count value; Assign the inbound temporary count software value and the outbound temporary count software value of the switched forwarding port to its inbound software cumulative sum value and outbound software cumulative sum value, respectively. Delete the temporary software count values ​​for the inbound and outbound directions of the switched forwarding port.

4. The method according to claim 1, characterized in that, The method further includes: Receive the down event of the forwarding port; Locate the fourth internal forwarding port mapped to the closed forwarding port; Identify the fourth statistical chip port directly connected to the fourth internal forwarding port; Calculate the inbound direction count difference between the current inbound direction count value of the fourth statistical chip port and its historical inbound direction software count value; Calculate the outgoing direction count difference between the current outgoing direction count value of the fourth statistical chip port and its historical outgoing direction software count value; The input direction count difference of the fourth statistical chip port is summed with the input direction software cumulative sum of the closed forwarding port; the output direction count difference of the fourth statistical chip port is summed with the output direction software cumulative sum of the closed forwarding port. Assign the current inbound count value of the fourth statistical chip port to its historical inbound count value; assign the current outbound count value of the fourth statistical chip port to its historical outbound count value. Add a stop counting flag to the closed forwarding port so that the next polling cycle skips the closed forwarding port and polls the next forwarding port.

5. The method according to claim 1, characterized in that, The method further includes: Receive the UP event from the forwarding port; The temporary counting software value set for the activated forwarding port; Assign the cumulative summation value of the software of the initiated forwarding port to the temporary counter software value of the initiated forwarding port; Locate the fifth internal forwarding port mapped to the initiated forwarding port; Identify the fifth statistical chip port directly connected to the fifth internal forwarding port; Assign the current count value of the fifth statistical chip port to the historical software count value of the fifth statistical chip port; Assign the temporary counting software value of the initiated forwarding port to the software cumulative sum value of the initiated forwarding port; Delete the temporary counter software value of the initiated forwarding port.

6. The method according to claim 1, characterized in that, The method also includes, Find the sixth internal forwarding port mapped to the forwarding port whose count is to be deleted; Identify the sixth statistical chip port directly connected to the sixth internal forwarding port; Calculate the outgoing direction count difference between the current outgoing direction count value of the sixth statistical chip port and its historical outgoing direction software count value; The input direction count difference of the sixth statistical chip port is summed with the input direction software cumulative sum of the forwarding port to be deleted; the output direction count difference of the sixth statistical chip port is summed with the output direction software cumulative sum of the forwarding port to be deleted. Assign the current inbound count value of the sixth statistical chip port to its historical inbound count value; assign the current outbound count value of the sixth statistical chip port to its historical outbound count value. Delete the software cumulative summation value of the forwarding port whose count is to be deleted.

7. A port counting device, characterized in that, The device includes a processor and a memory; the memory stores processor-executable instructions; wherein the processor executes the processor-executable instructions in the memory to perform the following operations: Find the first internal forwarding port mapped to the polled forwarding port; Identify the first statistical chip port directly connected to the internal forwarding port; Calculate the inbound direction count difference between the current inbound direction count value of the first statistical chip port and its historical inbound direction software count value; Calculate the outgoing direction count difference between the current outgoing direction count value of the first statistical chip port and its historical outgoing direction software count value; The difference in the inbound count of the first statistical chip port is summed with the cumulative sum of the inbound software count of the polled forwarding port; the difference in the outbound count of the first statistical chip port is summed with the cumulative sum of the outbound software count of the polled forwarding port. Assign the current inbound count value of the first statistical chip port to its historical inbound count value; assign the current outbound count value of the first statistical chip port to its historical outbound count value.

8. The device according to claim 7, characterized in that, The processor also performs the following operations by executing processor-executable instructions in the memory: Locate the second internal forwarding port mapped to the switched forwarding port; Identify the second statistical chip port directly connected to the second internal forwarding port; Calculate the inbound direction count difference between the current inbound direction count value of the second statistical chip port and its historical inbound direction software count value; Calculate the outgoing direction count difference between the current outgoing direction count value of the second statistical chip port and its historical outgoing direction software count value; The difference in the incoming direction count at the second statistical chip port is summed with the sum of the incoming direction software counts at the switched forwarding port. The outgoing direction count difference of the second statistical chip port is summed with the outgoing direction software cumulative sum of the switched forwarding port. Assign the current inbound count value of the second statistical chip port to its historical inbound count value; assign the current outbound count value of the second statistical chip port to its historical outbound count value.

9. The device according to claim 8, characterized in that, The processor also performs the following operations by executing processor-executable instructions in the memory: Set the inbound temporary count software value and the outbound temporary count software value of the switched forwarding port; the inbound and outbound temporary count software values ​​are temporary software variables; The cumulative sum of the inbound and outbound software values ​​of the switched forwarding port is assigned to the inbound temporary counting software value and the outbound temporary counting software value, respectively. Configure the mapping relationship between the switched forwarding port and the third internal forwarding port; Identify the third statistical chip port directly connected to the third internal forwarding port; Assign the current inbound count value of the third statistical chip port to its inbound historical software count value; assign the current outbound count value of the third statistical chip port to its outbound historical software count value; Assign the inbound temporary count software value and the outbound temporary count software value of the switched forwarding port to its inbound software cumulative sum value and outbound software cumulative sum value, respectively. Delete the temporary software count values ​​for the inbound and outbound directions of the switched forwarding port.

10. The device according to claim 7, characterized in that, The processor also performs the following operations by executing processor-executable instructions in the memory: Receive the down event of the forwarding port; Locate the fourth internal forwarding port mapped to the closed forwarding port; Identify the fourth statistical chip port directly connected to the fourth internal forwarding port; Calculate the inbound direction count difference between the current inbound direction count value of the fourth statistical chip port and its historical inbound direction software count value; Calculate the outgoing direction count difference between the current outgoing direction count value of the fourth statistical chip port and its historical outgoing direction software count value; The difference in the incoming direction count at the fourth statistical chip port is summed with the cumulative sum of the incoming direction software values ​​at the closed forwarding port. The outgoing direction count difference of the fourth statistical chip port is summed with the outgoing direction software cumulative sum of the closed forwarding port. Assign the current inbound count value of the fourth statistical chip port to its historical inbound count value; assign the current outbound count value of the fourth statistical chip port to its historical outbound count value. Add a stop count flag to the closed forwarding port; This allows the next polling cycle to skip the closed forwarding port and poll the next forwarding port.

11. The device according to claim 7, characterized in that, The processor also performs the following operations by executing processor-executable instructions in the memory: Receive the UP event from the forwarding port; The temporary counting software value set for the activated forwarding port; Assign the cumulative summation value of the software of the initiated forwarding port to the temporary counter software value of the initiated forwarding port; Locate the fifth internal forwarding port mapped to the initiated forwarding port; Identify the fifth statistical chip port directly connected to the fifth internal forwarding port; Assign the current count value of the fifth statistical chip port to the historical software count value of the fifth statistical chip port; Assign the temporary counting software value of the initiated forwarding port to the software cumulative sum value of the initiated forwarding port; Delete the temporary counter software value of the initiated forwarding port.

12. The device according to claim 8, characterized in that, The processor also performs the following operations by executing processor-executable instructions in the memory: Find the sixth internal forwarding port mapped to the forwarding port whose count is to be deleted; Identify the sixth statistical chip port directly connected to the sixth internal forwarding port; Calculate the outgoing direction count difference between the current outgoing direction count value of the sixth statistical chip port and its historical outgoing direction software count value; The input direction count difference of the sixth statistical chip port is summed with the input direction software cumulative sum of the forwarding port to be deleted; the output direction count difference of the sixth statistical chip port is summed with the output direction software cumulative sum of the forwarding port to be deleted. Assign the current inbound count value of the sixth statistical chip port to its historical inbound count value; assign the current outbound count value of the sixth statistical chip port to its historical outbound count value. Delete the software cumulative summation value of the forwarding port whose count is to be deleted.

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