Gate drive circuit and display device

Abstract

The application relates to a gate driving circuit and a display device, the gate driving circuit comprising: a plurality of cascaded gate driving units, an nth gate driving unit being used for outputting a scanning signal to a corresponding scanning line, and comprising: a pull-up transistor used for pulling up the scanning signal to a first potential; a pull-down transistor used for pulling down the scanning signal to a second potential, the second potential being lower than the first potential; and a pull-down compensation unit used for detecting a threshold voltage of the pull-down transistor when the pull-up transistor is working, and compensating the threshold voltage of the pull-down transistor by using the detected threshold voltage when the pull-down transistor is working. Thus, the threshold voltage of the pull-down transistor can be detected and compensated without affecting the normal working of the pull-down transistor, so as to reduce the influence of threshold voltage drift on the operation of the gate driving circuit, thereby improving the reliability of long-term operation of the gate driving circuit and prolonging the service life of the gate driving circuit.

Description

[Technical Field]

[0001] This application relates to the field of display technology, specifically to a gate driving circuit and a display device. [Background Technology]

[0002] In gate drive circuits, since pull-down transistors need to be in the on state for a long time, their threshold voltage (Vth) is easily drifted due to charge trapping of the gate insulating film when the high potential input to the gate is maintained for a long time. Moreover, when the drift of the threshold voltage is large, the pull-down transistor may fail to work properly, which will shorten the life of the gate drive circuit and affect the reliability of the gate drive circuit. [Summary of the Invention]

[0003] This application provides a gate driving circuit and a display device to extend the lifespan of the gate driving circuit and improve its reliability.

[0004] To address the aforementioned problems, embodiments of this application provide a gate driving circuit comprising cascaded multi-stage gate driving units. The nth stage gate driving unit outputs a scan signal to a corresponding scan line and includes: a pull-up transistor for pulling the scan signal up to a first potential; a pull-down transistor for pulling the scan signal down to a second potential, the second potential being lower than the first potential; and a pull-down compensation unit for detecting the threshold voltage of the pull-down transistor when the pull-up transistor is operating, and compensating the threshold voltage of the pull-down transistor using the detected threshold voltage when the pull-down transistor is operating.

[0005] The pull-down compensation unit includes: a first switching element, the input of which is electrically connected to the stage transmission signal output of the (n+1)th stage gate drive unit, and the output of which is electrically connected to the control terminal of the pull-down transistor; a second switching element, the input of which is connected to a second potential, and the output of which is electrically connected to the input of the pull-down transistor; and a third switching element, the input of which is electrically connected to the output of the pull-down transistor, and the output of which is electrically connected to the nth stage scan signal output. When the pull-down compensation unit detects the threshold voltage of the pull-down transistor, the first, second, and third switching elements are in an off state; when the pull-down transistor is working, the first, second, and third switching elements are in a conducting state.

[0006] The control terminals of the first, second, and third switching elements are electrically connected to the stage transmission signal output terminal of the (n+1)th stage gate drive unit.

[0007] The pull-down compensation unit further includes: a fourth switching element, the input of which is connected to a third potential, and the output of which is electrically connected to the control terminal of the pull-down transistor; a fifth switching element, the input of which is connected to a fourth potential, and the output of which is electrically connected to the output terminal of the pull-down transistor, wherein the fourth potential is lower than the third potential; and a sixth switching element, the input of which is connected to a fifth potential, and the output of which is electrically connected to the input of the pull-down transistor, wherein the fifth potential is higher than the fourth potential. When the pull-down compensation unit detects the threshold voltage of the pull-down transistor, the fourth and sixth switching elements are always in a conducting state, and the fifth switching element is first in a conducting state and then in a de-conducting state.

[0008] The pull-down compensation unit further includes a first capacitor, one plate of which is electrically connected to the control terminal of the pull-down transistor, and the other plate is electrically connected to the output terminal of the pull-down transistor.

[0009] The control terminal of the sixth switching element is electrically connected to the reset signal. When the reset signal is at a high potential, the sixth switching element is turned on, and when the reset signal is at a low potential, the sixth switching element is turned off.

[0010] The control terminals of the fourth and sixth switching elements are electrically connected to the output terminal of the nth-level scanning signal.

[0011] The nth gate drive unit further includes: a pull-down sustaining transistor for maintaining the scan signal at the second potential; and a pull-down sustaining compensation unit for detecting the threshold voltage of the pull-down sustaining transistor when the pull-up transistor is working, and compensating the threshold voltage of the pull-down sustaining transistor using the detected threshold voltage when the pull-down sustaining transistor is working.

[0012] The pull-down sustaining transistors are multiple, and the pull-down sustaining compensation units are multiple, with each pull-down sustaining transistor corresponding to one pull-down sustaining compensation unit.

[0013] To address the aforementioned problems, this application provides a display device that includes the gate driving circuit described above.

[0014] The beneficial effects of this application are as follows: Unlike the prior art, the gate driving circuit and display device provided in this application, by adding a pull-down compensation unit for the pull-down transistor in the gate driving circuit, can detect the threshold voltage of the pull-down transistor when the pull-up transistor is working, and can compensate the threshold voltage of the pull-down transistor by using the detected threshold voltage when the pull-down transistor is working. Thus, the threshold voltage of the pull-down transistor can be detected and compensated without affecting the normal operation of the pull-down transistor, so as to reduce the impact of threshold voltage drift on the operation of the gate driving circuit, thereby improving the reliability of the long-term operation of the gate driving circuit and extending the life of the gate driving circuit. [Attached Image Description]

[0015] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of the gate driving circuit provided in an embodiment of this application;

[0017] Figure 2 This is another schematic diagram of the gate drive circuit provided in the embodiments of this application;

[0018] Figure 3 This is a timing diagram of the gate drive circuit provided in an embodiment of this application;

[0019] Figure 4 This is a schematic diagram of the gate drive circuit provided by existing technology;

[0020] Figure 5 This is a schematic diagram of the structure of the display device provided in the embodiments of this application.

Detailed Implementation Methods

[0021] The present application will now be described in further detail with reference to the accompanying drawings and embodiments. It should be particularly noted that the following embodiments are for illustrative purposes only and do not limit the scope of the application. Similarly, the following embodiments are only some, not all, embodiments of the present application, and all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of the present application.

[0022] Please see Figure 1 , Figure 1 This is a schematic diagram of the gate drive circuit provided in an embodiment of this application. Figure 1As shown, the gate drive circuit includes cascaded multi-stage gate drive units. The nth-stage gate drive unit 10 outputs a scan signal to the corresponding scan line and may include a pull-up transistor T21, a pull-down transistor T31, and a pull-down compensation unit 11. The pull-up transistor T21 pulls the scan signal up to a first potential, and the pull-down transistor T31 pulls the scan signal down to a second potential, which is lower than the first potential. The pull-down compensation unit 11 detects the threshold voltage of the pull-down transistor T31 when the pull-up transistor T21 is operating, and compensates for the threshold voltage of the pull-down transistor T31 using the detected threshold voltage. This enables the gate drive circuit to achieve self-compensation, reducing the impact of the threshold voltage drift of the pull-down transistor T31 on the operation of the gate drive circuit, thereby improving the long-term reliability of the gate drive circuit.

[0023] Specifically, the nth-level gate driving unit 10 can be any of the multi-level gate driving units in the gate driving circuit, and the number of levels between these multi-level gate driving units can be cyclical. That is, when n in the nth-level gate driving unit 10 is the last level, the (n+1)th-level gate driving unit can represent the first-level gate driving unit; when n in the nth-level gate driving unit 10 is the first level, the (n-1)th-level gate driving unit can represent the last-level gate driving unit, and so on. The pull-up transistor T21 and the pull-down transistor T31 can be P-type thin-film transistors or N-type thin-film transistors. The second potential can be a constant low potential VGL2.

[0024] It should be noted that in this embodiment, a pull-down compensation unit 11 is designed for the pull-down transistor T31 to detect the threshold voltage Vth of the pull-down transistor T31 when the pull-up transistor T21 is working, and to compensate for the threshold voltage Vth of the pull-down transistor T31 using the detected threshold voltage Vth when the pull-down transistor T31 is working. The threshold voltage Vth can be compensated whether it is positive or negative, thereby reducing the signal disturbance caused by the shift of the threshold voltage Vth of the pull-down transistor T31, improving the reliability of the gate drive circuit 10, improving the panel quality, and enhancing market competitiveness. Even when the pull-down transistor T31 uses silicon nitride or silicon oxynitride with a high dielectric constant, the charge is easily captured, which causes the threshold voltage to shift. However, the pull-down compensation unit according to this embodiment can effectively compensate for the threshold voltage Vth of the pull-down transistor T31.

[0025] Furthermore, this embodiment does not limit the specific structure of the pull-down compensation unit 11. The pull-down compensation unit 11 can detect the threshold voltage Vth of the pull-down transistor T31 when the pull-up transistor T21 is working, and compensate the threshold voltage Vth of the pull-down transistor T31 using the detected threshold voltage Vth when the pull-down transistor T31 is working. In some examples, such as Figure 1 The pull-down compensation unit 11 can be electrically connected to the control terminal g, input terminal d, and output terminal s of the pull-down transistor T31.

[0026] In this embodiment, the input terminal of the pull-up transistor T21 can be electrically connected to the nth clock signal CK(n), and the output terminal of the pull-up transistor T21 can be electrically connected to the nth scan signal output terminal G(n). Furthermore, when the pull-up transistor T21 is working, it is in a conducting state, and the nth clock signal CK(n) inputs a high-potential (i.e., first potential) clock signal to the pull-up transistor T21. Correspondingly, the nth scan signal output terminal G(n) outputs a scan signal with the first potential to the corresponding scan line (e.g., the nth scan line) in the display panel, thereby driving the pixels in the corresponding row of the display panel to emit light.

[0027] When the pull-down transistor T31 is working, the pull-up transistor T21 will be in the off state, the pull-down transistor T31 will be in the on state, and the input terminal of the pull-down transistor T31 will be connected to a low potential (i.e., the second potential). The corresponding nth level scan signal output terminal G(n) will output the scan signal of the second potential to the corresponding scan line in the display panel (e.g., the nth scan line) so that the pixels of the corresponding row in the display panel are turned off.

[0028] In some embodiments, such as Figure 2 As shown, the pull-down compensation unit 11 may include a first switching element T71, a second switching element T72, and a third switching element T73. The input terminal of the first switching element T71 can be electrically connected to the stage transmission signal output terminal Cout(n+1) of the (n+1)th stage gate drive unit, and the output terminal of the first switching element T71 can be electrically connected to the control terminal g of the pull-down transistor T31. The input terminal of the second switching element T72 can be connected to the aforementioned second potential (e.g., a constant low voltage potential VGL2), and the output terminal of the second switching element T72 can be electrically connected to the input terminal d of the pull-down transistor T31. The input terminal of the third switching element T73 can be electrically connected to the output terminal s of the pull-down transistor T31, and the output terminal of the third switching element T73 can be electrically connected to the nth stage scan signal output terminal G(n).

[0029] Specifically, when the pull-down compensation unit 11 detects the threshold voltage Vth of the pull-down transistor T31, the first switching element T71, the second switching element T72 and the third switching element T73 will be in the off state, thereby preventing the detection of the threshold voltage Vth of the pull-down transistor T31 from interfering with the output of the nth level scan signal output terminal G(n).

[0030] Furthermore, when the pull-down transistor T31 is working, the first switching element T71, the second switching element T72, and the third switching element T73 are in the on state, thereby enabling the threshold voltage Vth of the pull-down transistor T31 to be detected and compensated without affecting the normal output of the second voltage of the pull-down transistor T31.

[0031] In some specific embodiments, such as Figure 2 As shown, the control terminals of the first switching element T71, the second switching element T72, and the third switching element T73 can be electrically connected to the stage transmission signal output terminal Cout(n+1) of the (n+1)th stage gate drive unit. Specifically, when the pull-up transistor T21 is working, as follows... Figure 3 As shown, the stage transmission signal output by the stage transmission signal output terminal Cout(n) of the nth stage gate driving unit 10 will be at a high potential, while the stage transmission signals output by the stage transmission signal output terminals of other stage gate driving units (for example, the stage transmission signals output by the stage transmission signal output terminal Cout(n-1) of the (n-1)th stage gate driving unit and the stage transmission signals output by the stage transmission signal output terminal Cout(n+1) of the (n+1)th stage gate driving unit) will be at a low potential. This low potential is insufficient to drive the first switching element T71, the second switching element T72 and the third switching element T73 to conduct.

[0032] When pull-down transistor T31 is working, such as Figure 3 As shown, the stage transmission signal output terminal Cout(n+1) of the (n+1)th stage gate drive unit will be at a high potential, which is sufficient to drive the first switching element T71, the second switching element T72, and the third switching element T73 to conduct. Meanwhile, the stage transmission signals output by the stage transmission signal output terminals of other stage gate drive units (e.g., the stage transmission signal output terminal Cout(n-1) of the (n-1)th stage gate drive unit and the stage transmission signal output terminal Cout(n) of the nth stage gate drive unit 10) will be at a low potential. This ensures that the first switching element T71, the second switching element T72, and the third switching element T73 are in the off state when the pull-up transistor T21 is working, and in the on state when the pull-down transistor T31 is working.

[0033] Specifically, the first switching element T71, the second switching element T72, and the third switching element T73 can be thin-film transistors, and the control terminal, input terminal, and output terminal of the first switching element T71, the second switching element T72, and the third switching element T73 can be the gate, the drain, and the source, respectively.

[0034] In some specific embodiments, such as Figure 2 As shown, the pull-down compensation unit 11 may further include a fourth switching element T74, a fifth switching element T75, and a sixth switching element T76. The input terminal of the fourth switching element T74 can be connected to a third potential Vref, and the output terminal of the fourth switching element T74 can be electrically connected to the control terminal g of the pull-down transistor T31. The input terminal of the fifth switching element T75 can be connected to a fourth potential Vinit, and the output terminal of the fifth switching element T75 can be electrically connected to the output terminal s of the pull-down transistor T31. The input terminal of the sixth switching element T76 can be connected to a fifth potential VGH, and the output terminal of the sixth switching element T76 can be electrically connected to the input terminal of the pull-down transistor T31. Furthermore, when the pull-down compensation unit 11 detects the threshold voltage Vth of the pull-down transistor T31, the fourth switching element T74 and the sixth switching element T76 will always be in a conducting state, while the fifth switching element T75 will first be in a conducting state and then in a de-conducting state.

[0035] Specifically, the third potential Vref can be higher than the fourth potential Vinit, and the difference between the third potential Vref and the fourth potential Vinit can be greater than the threshold voltage Vth of the pull-down transistor T31, so as to ensure that the pull-down transistor T31 is turned on when the fourth switching element T74 and the fifth switching element T75 are in the on state.

[0036] It is understandable that when designing the values ​​of the third potential Vref and the fourth potential Vinit in the gate drive circuit 10, the potential for the threshold voltage Vth of the pull-down transistor T31 to drift should be fully considered. This ensures that regardless of the degree of drift in the threshold voltage Vth of the pull-down transistor T31, the difference between the third potential Vref and the fourth potential Vinit will always be greater than the threshold voltage Vth of the pull-down transistor T31. Therefore, during the conduction of the fourth switching element T74 and the fifth switching element T75, the pull-down transistor T31 is ensured to be in the conducting state. Consequently, in the subsequent stage when the fifth switching element T75 is turned off and the fourth switching element T74 and the sixth switching element T76 are turned on, the fifth potential VGH connected to the input terminal of the sixth switching element T76 can be transmitted to the input terminal d of the pull-down transistor T31 and then charge the output terminal s of the pull-down transistor T31, thereby raising the potential of the output terminal s of the pull-down transistor T31.

[0037] Furthermore, when the potential at the output terminal s of pull-down transistor T31 is raised to (the third potential Vref - the threshold voltage Vth of pull-down transistor T31), since pull-down transistor T31 will be turned off (i.e., disconnected), the potential at the output terminal s of pull-down transistor T31 will no longer rise. At this point, it can be considered that the current threshold voltage Vth of pull-down transistor T31 has been detected and stored at the output terminal s of pull-down transistor T31 in the form of (the third potential Vref - the threshold voltage Vth of pull-down transistor T31).

[0038] Specifically, such as Figure 3 As shown, the third potential Vref, the fourth potential Vinit, and the fifth potential VGH can all be constant voltage potentials. In one example, the third potential Vref can be 2V, the fourth potential Vinit can be 0V, and the fifth potential VGH can be 20V.

[0039] In some specific embodiments, such as Figure 2 As shown, the control terminal of the sixth switching element T36 can be electrically connected to a reset signal (such as...). Figure 3 As shown, when the reset signal Reset is high, the sixth switching element T76 is turned on, and when the reset signal Reset is low, the sixth switching element T76 is turned off.

[0040] In some specific embodiments, such as Figure 2 As shown, the control terminals of the fourth switching element T74 and the sixth switching element T76 can be electrically connected to the nth-level scan signal output terminal G(n) to ensure that the fourth switching element T74 and the sixth switching element T76 are turned on when the nth-level scan signal output terminal G(n) outputs a high potential (that is, the aforementioned first potential).

[0041] In some specific embodiments, such as Figure 2 As shown, the pull-down compensation unit 11 may further include a first capacitor C7. One plate of the first capacitor C7 (e.g., the positive plate) can be electrically connected to the control terminal g of the pull-down transistor T31, and the other plate (e.g., the negative plate) can be electrically connected to the output terminal s of the pull-down transistor T31. Thus, after the potential of the output terminal s of the pull-down transistor T31 is raised to (the third potential Vref - the threshold voltage Vth of the pull-down transistor T31), the first capacitor C7 can maintain the potential of the output terminal s of the pull-down transistor T31 at (the third potential Vref - the threshold voltage Vth of the pull-down transistor T31), thereby ensuring the compensation effect of the pull-down compensation unit 11 on the threshold voltage Vth of the pull-down transistor T31.

[0042] It should be noted that the gate drive circuit in this embodiment can be derived from any existing gate drive circuit with a pull-down transistor T31 (such as...). Figure 4 This is obtained by adding the aforementioned pull-down compensation unit 11 to the (shown). Figure 2 The nth gate drive unit 10 in the middle can specifically be Figure 4 The structure within the dashed box was obtained by adding a pull-down compensation unit 11.

[0043] In some specific embodiments, such as Figure 4 As shown, the nth gate driving unit 10 may further include pull-down sustaining transistors T41 / T42 / T43, which are used to maintain the scan signal output by the nth gate driving unit 10 at the second potential.

[0044] Furthermore, the nth-stage gate drive unit 10 may also include a pull-down sustaining compensation unit (not shown in the figure). This unit detects the threshold voltages of the pull-down sustaining transistors T41 / T42 / T43 when the pull-up transistor T21 is operating, and compensates for these threshold voltages using the detected values. This reduces the impact of threshold voltage drift of the pull-down sustaining transistors T41 / T42 / T43 on the operation of the gate drive circuit 10, thereby further improving the long-term reliability of the gate drive circuit 10.

[0045] Specifically, there can be multiple pull-down sustaining transistors T41 / T42 / T43, for example, three (e.g., a first pull-down sustaining transistor T41, a second pull-down sustaining transistor T42, and a third pull-down sustaining transistor T43). Correspondingly, there can also be multiple pull-down sustaining compensation units, and these multiple pull-down sustaining transistors T41 / T42 / T43 can correspond one-to-one with the multiple pull-down sustaining compensation units. Thus, threshold voltage compensation can be performed for each pull-down sustaining transistor T41 / T42 / T43 in the gate drive circuit, further improving the reliability of long-term operation of the gate drive circuit.

[0046] Furthermore, the specific implementation of the pull-down sustaining compensation unit can refer to the implementation of the pull-down compensation unit 11 described above, and therefore will not be repeated here. It is also understood that in some other embodiments, a similar approach to adding the pull-down compensation unit 11 can be used to compensate the threshold voltage of other key thin-film transistors in the gate drive circuit, in order to improve the reliability of the gate drive circuit as much as possible.

[0047] As can be seen from the above, the gate driving circuit provided in this embodiment adds a pull-down compensation unit for the pull-down transistor in the gate driving circuit. The pull-down compensation unit can detect the threshold voltage of the pull-down transistor when the pull-up transistor is working, and can compensate the threshold voltage of the pull-down transistor by using the detected threshold voltage when the pull-down transistor is working. In this way, the threshold voltage of the pull-down transistor can be detected and compensated without affecting the normal operation of the pull-down transistor, so as to reduce the impact of threshold voltage drift on the operation of the gate driving circuit, thereby improving the reliability of the long-term operation of the gate driving circuit and extending the life of the gate driving circuit.

[0048] Please see Figure 5 , Figure 5 This is a schematic diagram of the structure of the display device provided in the embodiments of this application. Figure 5 As shown, the display device 300 includes the gate driving circuit 301 of any of the above-mentioned embodiments. In some embodiments, the display device 300 may further include a display panel, and the gate driving circuit 301 may be integrated into the display panel and electrically connected to each scan line of the display panel.

[0049] Specifically, the gate driving circuit 301 may include cascaded multi-stage gate driving units. The nth stage gate driving unit outputs a scan signal to a corresponding scan line and may include a pull-up transistor, a pull-down transistor, and a pull-down compensation unit. The pull-up transistor pulls the scan signal output by the nth stage gate driving unit up to a first potential. The pull-down transistor pulls the scan signal output by the nth stage gate driving unit down to a second potential, which is lower than the first potential. The pull-down compensation unit detects the threshold voltage of the pull-down transistor when the pull-up transistor is operating and compensates for the threshold voltage of the pull-down transistor using the detected threshold voltage when the pull-down transistor is operating.

[0050] It should be noted that the display device in this application embodiment has the same beneficial effects as the gate driving circuit described above because it is equipped with the gate driving circuit provided in this application embodiment.

[0051] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A gate driving circuit, characterized in that, It includes cascaded multi-stage gate driving units, wherein the nth stage gate driving unit is used to output scan signals to the corresponding scan lines, and includes: A pull-up transistor is used to pull the scan signal up to a first potential; A pull-down transistor is used to pull the scan signal down to a second potential, which is lower than the first potential; A pull-down compensation unit is used to detect the threshold voltage of the pull-down transistor when the pull-up transistor is working, and to compensate the threshold voltage of the pull-down transistor using the detected threshold voltage when the pull-down transistor is working. The pull-down compensation unit includes: The first switching element has its input terminal electrically connected to the stage transmission signal output terminal of the (n+1)th stage gate drive unit, and its output terminal electrically connected to the control terminal of the pull-down transistor. The second switching element has its input terminal connected to the second potential and its output terminal electrically connected to the input terminal of the pull-down transistor. The third switching element has its input terminal electrically connected to the output terminal of the pull-down transistor, and its output terminal electrically connected to the output terminal of the nth level scan signal. Specifically, when the pull-down compensation unit detects the threshold voltage of the pull-down transistor, the first switching element, the second switching element, and the third switching element are in an off state; when the pull-down transistor is working, the first switching element, the second switching element, and the third switching element are in a conducting state.

2. The gate driving circuit according to claim 1, characterized in that, The control terminals of the first switching element, the second switching element, and the third switching element are electrically connected to the stage transmission signal output terminal of the (n+1)th stage gate drive unit.

3. The gate driving circuit according to claim 1, characterized in that, The pull-down compensation unit also includes: The fourth switching element has its input terminal connected to the third potential and its output terminal electrically connected to the control terminal of the pull-down transistor. The fifth switching element has its input terminal connected to a fourth potential and its output terminal electrically connected to the output terminal of the pull-down transistor. The fourth potential is lower than the third potential. A sixth switching element, wherein the input terminal of the sixth switching element is connected to a fifth potential, and the output terminal is electrically connected to the input terminal of the pull-down transistor, wherein the fifth potential is higher than the fourth potential; Specifically, when the pull-down compensation unit detects the threshold voltage of the pull-down transistor, the fourth and sixth switching elements are always in the on state, and the fifth switching element is first in the on state and then in the off state.

4. The gate driving circuit according to claim 3, characterized in that, The pull-down compensation unit also includes: A first capacitor, one plate of which is electrically connected to the control terminal of the pull-down transistor, and the other plate of which is electrically connected to the output terminal of the pull-down transistor.

5. The gate driving circuit according to claim 3, characterized in that, The control terminal of the fifth switching element is electrically connected to a reset signal. When the reset signal is at a high potential, the fifth switching element is turned on; when the reset signal is at a low potential, the fifth switching element is turned off.

6. The gate driving circuit according to claim 3, characterized in that, The control terminals of the fourth and sixth switching elements are electrically connected to the output terminal of the nth level scanning signal.

7. The gate driving circuit according to claim 1, characterized in that, The nth-stage gate driving unit further includes: A pull-down sustaining transistor is used to maintain the scan signal at the second potential; A pull-down sustaining compensation unit is used to detect the threshold voltage of the pull-down sustaining transistor when the pull-up transistor is working, and to compensate the threshold voltage of the pull-down sustaining transistor using the detected threshold voltage when the pull-down sustaining transistor is working.

8. The gate driving circuit according to claim 7, characterized in that, The number of pull-down sustaining transistors is multiple, the number of pull-down sustaining compensation units is multiple, and the multiple pull-down sustaining transistors correspond one-to-one with the multiple pull-down sustaining compensation units.

9. A display device, characterized in that, Includes the gate drive circuit as described in any one of claims 1-8.

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