Display device and display driving method

Abstract

The application discloses a display device and a display driving method. The device comprises a panel display area and a binding area. The panel display area comprises pixel units arranged in an array and pixel driving circuits connected with the pixel units. Each of the pixel driving circuits corresponding to a pixel unit in the top area and the bottom area of the panel display area is provided with at least two detection points. The detection points are any node in the potential transmission line in the pixel driving circuit. The top area and the bottom area are respectively located on both sides of the stacking direction of the panel display area and the binding area. The binding area comprises a display driving chip. The display driving chip is used for receiving top voltage signals collected by any two detection points in the top area and bottom voltage signals collected by any two detection points in the bottom area, and outputting a target driving voltage corresponding to a display panel according to the top voltage signals and the bottom voltage signals. The application can reduce the power consumption of the display driving integrated circuit and save resources.

Description

Technical Field

[0001] This application relates to the field of display panel driving technology, specifically to a display device and a display driving method. Background Technology

[0002] With the development of AMOLED display technology, which boasts numerous advantages such as high contrast, ultra-thinness, and foldability, AMOLED screen display performance has improved dramatically, with high refresh rates, low blue light, 10-bit color depth, and wide color gamut becoming commonplace. Users are demanding increasingly higher standards from display screens, requiring not only high image quality but also excellent brightness uniformity and a flicker-free overall display.

[0003] In traditional display devices, the ELVSS voltage is often set inappropriately. For example, if it is too low, the display brightness may be insufficient, and if it is too high, unnecessary power consumption may result. Therefore, how to accurately set and obtain the ELVSS voltage is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0004] This application provides a display device and a display driving method that can reduce the power consumption of the display driver integrated circuit and save resources.

[0005] In a first aspect, embodiments of this application provide a display device, the display device including a display panel, the display panel including a panel display area and a bonding area, the panel display area including pixel units arranged in an array and a pixel driving circuit connected to the pixel units;

[0006] In the top and bottom regions of the panel display area, each pixel driving circuit corresponding to a pixel unit is provided with at least two detection points. Each detection point is any node in the potential transmission line within the pixel driving circuit. The top and bottom regions are located on opposite sides of the stacking direction of the panel display area and the bonding area, respectively. The bonding area includes a display driving chip.

[0007] The display driver chip is used to receive the top voltage signal collected by any two detection points in the top area, and the bottom voltage signal collected by any two detection points in the bottom area.

[0008] The display driver chip is used to output a target driving voltage corresponding to the display panel according to the top voltage signal and the bottom voltage signal; the target driving voltage indicates the critical voltage at which the driving transistors in the pixel driving circuits connected to all pixel units in the display area of ​​the panel enter the saturation region.

[0009] In some embodiments, the display driver chip includes:

[0010] The analog-to-digital conversion module is connected one-to-one with the detection points in the top region and the detection points in the bottom region. It is used to receive the top voltage signal and perform analog-to-digital conversion to output the corresponding top voltage detection value, and to receive the bottom voltage signal and perform analog-to-digital conversion to output the corresponding bottom voltage detection value.

[0011] The data processing module is used to receive the top voltage detection value and calculate the first sensing current, receive the bottom voltage detection value and calculate the second sensing current, and calculate the current difference by calculating the difference between the second sensing current and the first sensing current.

[0012] A voltage management module is used to output a control signal based on a preset current difference value and the current difference value, and to determine the target driving voltage;

[0013] A power management integrated circuit is used to adjust the driving voltage supplied to the display panel according to the control signal.

[0014] In some embodiments, the voltage management module includes:

[0015] A comparator is used to compare the current difference with the preset current difference value to obtain a comparison result;

[0016] The processing unit is configured to output the control signal based on the comparison result, and determine the target driving voltage based on the comparison result or the comparison result after adjusting the driving voltage.

[0017] In some embodiments, the processing unit is further configured to output a first control signal when the comparison result is that the current difference is less than the preset current difference value, output a second control signal when the comparison result is that the current difference is greater than the preset current difference value, and determine the driving voltage as the target driving voltage when the comparison result is that the current difference is approximately equal to the preset current difference value;

[0018] The power management integrated circuit is further configured to lower the driving voltage according to the first control signal and raise the driving voltage according to the second control signal.

[0019] In some embodiments, the processing unit includes:

[0020] A pulse signal output sub-voltage is used to reduce the number of pulse signals sent to the power management integrated circuit according to the first control signal when the comparison result is that the current difference is less than the preset current difference value, so as to trigger the power management integrated circuit to lower the driving voltage output to the pixel driving circuit.

[0021] The pulse signal output sub-voltage is also used to increase the number of pulse signals sent to the power management integrated circuit according to the second control signal when the comparison result is that the current difference is greater than the preset current difference value, so as to trigger the power management integrated circuit to increase the driving voltage output to the pixel driving circuit.

[0022] In some embodiments, the display driver chip further includes a temporary register connected to the processing unit for storing the target driving voltage.

[0023] In some embodiments, the potential transmission line includes a line between a first voltage input terminal and a second voltage input terminal; the first voltage input terminal is used to input a first power supply voltage, and the second voltage input terminal is used to input a second power supply voltage that is lower than the first power supply voltage.

[0024] In some implementations, the first spacing between the two detection points in the top region is equal to the second spacing between the two detection points in the bottom region.

[0025] In some implementations, the line connecting the two detection points in the top region and the two detection points in the bottom region is parallel to the stacking direction.

[0026] Secondly, embodiments of this application also provide a display driving method applied to a display device, the display device including a display panel; the display panel including a panel display area and a bonding area, the panel display area including pixel units arranged in an array and pixel driving circuits connected to the pixel units; each of the pixel driving circuits corresponding to a pixel unit in the top and bottom areas of the panel display area is provided with at least two detection points, the detection points being any node in the potential transmission line within the pixel driving circuit, the top area and the bottom area being located on opposite sides of the stacking direction of the panel display area and the bonding area; the bonding area including a display driving chip, the method including the following steps:

[0027] Acquire the top voltage signal collected by any two detection points in the top region, and the bottom voltage signal collected by any two detection points in the bottom region;

[0028] The target driving voltage corresponding to the display panel is output based on the top voltage signal and the bottom voltage signal; the target driving voltage indicates the critical voltage at which the driving transistors in the pixel driving circuits connected to all pixel units in the display area of ​​the panel enter the saturation region.

[0029] This application provides a display device and a display driving method. This application obtains a first sense current on the potential transmission line of the pixel driving circuit connected to the pixel unit in the top area of ​​the panel and a second sense current on the potential transmission line of the pixel driving circuit connected to the pixel unit in the bottom area of ​​the panel. Based on a preset current difference value, the first sense current and the second sense current, the target driving voltage of the driving transistors in the pixel driving circuits connected to all pixel units in the display area of ​​the panel is obtained to enter the saturation region. In this way, the target driving voltage of each driving transistor of each display panel operating in the saturation region can be accurately tested, thereby achieving the purpose of reducing power consumption and improving yield. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a schematic diagram illustrating the scenario for obtaining the driving voltage;

[0032] Figure 2 This is a schematic diagram of a display device provided in an embodiment of this application;

[0033] Figure 3 This is a schematic diagram of the selection scenario of the detection point on the potential transmission line provided in the embodiments of this application;

[0034] Figure 4 This is a schematic diagram of the structure of the DDIC provided in the embodiments of this application;

[0035] Figure 5 This is another schematic diagram of the display device provided in the embodiments of this application. Detailed Implementation

[0036] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0037] In the description of this application, it should be understood that the terms "one end," "the other end," etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, the meaning of "" is two or more, unless otherwise explicitly specified.

[0038] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, a link, or a connection that allows for communication; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0039] The following disclosure provides many different implementations or examples for carrying out different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various implementations and / or arrangements discussed. In the above embodiments, the descriptions of each embodiment have their own emphasis; parts not described in detail in a certain embodiment can be referred to in the relevant descriptions of other embodiments.

[0040] The display panel in this application embodiment can be used in mobile phones, tablets, desktop computers, laptops, e-readers, handheld computers, electronic display screens, laptops, ultra-mobile personal computers (UMPCs), netbooks, as well as cellular phones, personal digital assistants (PDAs), augmented reality (AR) / virtual reality (VR) devices, media players, wearable devices, digital cameras, car navigation systems, etc.

[0041] The display panel can be a liquid crystal display panel. This application does not limit the type of liquid crystal display panel. The liquid crystal display panel provided in this application can be a horizontal electric field type liquid crystal display panel, such as a fringe field switching (FFS) type liquid crystal display panel or an in-plane switching (IPS) type liquid crystal display panel, or a vertical electric field type liquid crystal display panel, such as a twisted nematic (TN) type liquid crystal display panel or a multi-domain vertical alignment (MVA) type liquid crystal display panel.

[0042] In some implementations, developers verify the DTFT (Driver Thin Film Transistor) of each panel by analyzing the electrical performance of small batches of panels. Figure 1 The critical point V0 between the saturation and linear regions is shown, and then a safer operating voltage for the saturation region is set, for example... Figure 1 The voltage range highlighted by the dashed line is used as the operating voltage for each batch, or even all panels in mass production. However, due to issues of process uniformity and stability, the threshold voltage for the DTFT to operate in the saturation region is different for each panel. Using the same ELVSS voltage for a batch of panels will inevitably lead to some panels having excessively large voltage ranges (ComMargin), resulting in unnecessary power consumption.

[0043] The following description, in conjunction with the accompanying drawings, describes the display device, display apparatus, and storage medium of this application in order to resolve the aforementioned problems.

[0044] Please see Figure 2 , Figure 3 and Figure 4 As shown, Figure 2 This is a schematic diagram of the structure of a display panel 101 provided in an embodiment of this application. Figure 3 This is a schematic diagram illustrating the selection scenario of detection points on the potential transmission line provided in an embodiment of this application. Figure 4 This is a schematic diagram of the structure of the display driver chip provided in an embodiment of this application. Figure 2 As shown, the display device 100 includes a display panel 101, which includes a panel display area AA and a bonding area FOP. The panel display area AA includes pixel units arranged in an array and pixel driving circuits connected to the pixel units.

[0045] The top and bottom regions of the panel display area AA each have at least two detection points in their corresponding pixel driving circuits. Each detection point is any node in the potential transmission line within the pixel driving circuit. The top and bottom regions are located on opposite sides of the stacking direction of the panel display area AA and the bonding area FOP. The bonding area FOP includes a display driver chip 10.

[0046] The display driver chip 10 is used to receive the top voltage signal collected by any two detection points in the top region and the bottom voltage signal collected by any two detection points in the bottom region.

[0047] The display driver chip 10 is used to output a target driving voltage corresponding to the display panel according to the top voltage signal and the bottom voltage signal; the target driving voltage indicates the critical voltage at which the driving transistors in the pixel driving circuits connected to all pixel units in the display area of ​​the panel enter the saturation region.

[0048] Specifically, such as Figure 2 As shown, the display panel 101 includes a panel display area AA (Active Area, AA) and a bonding area FOP. The panel display area AA includes pixel units arranged in an array, and the bonding area FOP may include a display driver IC (DDIC). The DDIC is an integrated circuit chip that controls the switching and display of the liquid crystal panel and the AMOLED display panel 101. Wherein, as... Figure 2 As shown, the top and bottom areas are located in the stacking direction of the panel display area AA and the binding area FOP, respectively. Figure 2 On both sides of the Y-axis, that is, the top area is away from DDIC along the stacking direction, and the bottom area is close to DDIC along the stacking direction.

[0049] The display panel 101 may also include, for example: Figure 2 The flexible printed circuit board (FPCA) shown is shown. The bonding area FOP, also known as the Flex-on-Panel (FOP), refers to the area where the FPCA is bonded to the flexible display panel 101, for example, by thermal bonding to the display panel 101 using ACF (Anisotropic Conductive Film) under various conditions (temperature, pressure, time).

[0050] In an exemplary embodiment, a pixel unit P may include multiple sub-pixels, including red (R) sub-pixels, green (G) sub-pixels, and blue (B) sub-pixels. In an exemplary embodiment, the shape of the sub-pixels in the pixel unit may be rectangular, rhomboid, pentagonal, or hexagonal, and three sub-pixels may be arranged horizontally side by side, vertically side by side, or in a triangular arrangement; this application does not impose any limitations on this arrangement.

[0051] Each pixel unit in the display panel 101 can be connected to a pixel driving circuit. For example... Figure 3 As shown, by selecting any pixel unit P1 in the top area of ​​the display area AA in the display panel 101, the display driver chip 10 can acquire the top voltage signals collected by the two detection points A0 and B0 in the pixel driving circuit connected to pixel unit P1. Similarly, by selecting any pixel unit P2 in the bottom area of ​​the display area AA in the display panel 101, the display driver chip 10 can acquire the top voltage signals collected by the two detection points C0 and D0 in the pixel driving circuit connected to pixel unit P2. Then, the display driver chip 10 outputs the target driving voltage corresponding to the display panel based on the top voltage signal and the bottom voltage signal.

[0052] This application can accurately test the target driving voltage of all driving transistors in the saturation region of each display panel by collecting the top voltage signal of the top area and the bottom voltage signal of the bottom area in the display area AA of the panel, thereby achieving the purpose of reducing power consumption and improving yield.

[0053] In some embodiments, the display driver chip 10 includes:

[0054] The analog-to-digital conversion module 11 is connected to the detection points in the top region and the detection points in the bottom region in a one-to-one correspondence. It is used to receive the top voltage signal and perform analog-to-digital conversion to output the corresponding top voltage detection value, and to receive the bottom voltage signal and perform analog-to-digital conversion to output the corresponding bottom voltage detection value.

[0055] Data processing module 12 is used to receive the top voltage detection value and calculate the first sensing current Iup, receive the bottom voltage detection value and calculate the second sensing current Idown, and calculate the difference between the second sensing current Idown and the first sensing current Iup to obtain the current difference.

[0056] Voltage management module 13 is used to obtain the target driving voltage based on a preset current difference value and the current difference value;

[0057] The power management integrated circuit 14 is used to adjust the driving voltage supplied to the display panel according to the control signal.

[0058] Specifically, such as Figure 4 As shown, the display panel 101 includes a display driver integrated circuit (DDIC), which includes an analog-to-digital converter (ADC) module 11, a data processing module 12, and a voltage management module 13. The DDIC also includes a power management integrated circuit (PMIC) connected to the display panel 101.

[0059] The analog-to-digital converter (ADC) 11 has its input terminal connected to a selected detection point in the top region to obtain a top voltage signal, and its input terminal connected to a selected detection point in the bottom region to obtain a bottom voltage signal. The output terminals of both ADCs are connected to the input terminals of the data processing module 12. The ADC converts the analog top voltage signal to obtain a top voltage detection value and transmits it to the data processing module 12, and also converts the analog bottom voltage signal to obtain a bottom voltage detection value and transmits it to the data processing module 12.

[0060] The data processing module 12 receives the top voltage detection values ​​from the two analog-to-digital conversion modules 11 and calculates the first sensing current Iup. The data processing module 12 also receives the bottom voltage detection values ​​from the two analog-to-digital conversion modules 11 and calculates the second sensing current Idown. It then calculates the difference between the second sensing current Idown and the first sensing current Iup to obtain the current difference value. The voltage management module 13 analyzes the preset current difference value and the current difference value to obtain a control signal, which is then sent to the power management integrated circuit 14. This causes the power management integrated circuit 14 to adjust the driving voltage supplied to the display panel in real time according to the control signal. Then, the analog-to-digital conversion module 11 and the data processing module 12 follow the above process to monitor the current difference value after adjusting the driving voltage in real time. The adjusted current difference value and the preset current difference value determine the target driving voltage that causes all driving transistors in the display area of ​​the panel to enter the saturation region.

[0061] Specifically, the data processing module 12 obtains the first sensing current Iup based on the impedance value between the two detection points in the top region and the top voltage detection value. The data processing module 12 obtains the second sensing current Idown based on the impedance value between the two detection points in the top region and the bottom voltage detection value.

[0062] For example, the data processing module 12 can obtain the impedance value R between two detection points A0 and B0. A0B0And the impedance value R between the two detection points C0 and D0 C0D0 Thus, according to Ohm's law, I = U / R, which states that the current flowing through a conductor in the same circuit is directly proportional to the voltage across that conductor and inversely proportional to its resistance, we can calculate the first sensing current Iup = (U / R). A0 -U B0 ) / R A0B0 And, the second sensing current Idown = (U C0 -U D0 ) / R A0B0 .

[0063] For example, such as Figure 2 and Figure 3 As shown, Figure 3 One pixel driving circuit S1 is located in the upper right corner of the panel display area AA of the display panel 101. Figure 3 The other pixel driving circuit shown is located at the lower right corner of the panel display area AA of the display panel 101 (not limited to a specific location; one at the top and one at the bottom are both acceptable). Figure 3 In the process, two detection points A0 and B0 in the top area are taken on the ELVDD-ELVSS line of a certain pixel unit P1 at the top of the panel display area AA of the display panel 101, and connected to the newly added input ports Pin A and Pin B of the DDIC. Similarly, Figure 3 In the display panel 101, on the ELVDD-ELVSS line of a pixel unit P2 at the bottom of the panel display area AA, two detection points C0 and D0 in the bottom area are taken and connected to the newly added input ports Pin C and Pin D of the DDIC. In this way, the data processing module 12 can obtain the voltage detection value of the corresponding detection point, and thus calculate the first sensing current Iup and the second sensing current Idown. Among them, the input ports Pin A, Pin B, Pin C, and Pin D are the input terminals of the analog-to-digital conversion modules 11a, 11b, 11c, and 11d as shown in Figure 4.

[0064] In some embodiments, the voltage management module 13 includes:

[0065] Comparator 131 is used to compare the current difference with the preset current difference value to obtain a comparison result;

[0066] The processing unit 132 is configured to output the control signal based on the comparison result, and determine the target driving voltage based on the comparison result or the comparison result after adjusting the driving voltage.

[0067] Specifically, such as Figure 4As shown, the voltage management module includes a comparator 131 and a processing unit 132. The input of the comparator 131 is connected to the output of the data processing module 12 to obtain the current difference value, and the output of the comparator is connected to the input of the processing unit. The comparator 131 compares the current difference value with a preset current difference value and sends the comparison result to the processing unit 132. The processing unit 132 determines whether voltage adjustment is needed based on the comparison result. If it determines that voltage adjustment is not needed, the current driving voltage is used as the target driving voltage. Of course, if it determines that voltage adjustment is needed, the processing unit 132 outputs a corresponding control signal to the power management integrated circuit 14 based on the received comparison result, so that the power management integrated circuit 14 adjusts the driving voltage according to the control signal, and the processing unit 132 determines the target driving voltage based on the comparison result after adjusting the driving voltage.

[0068] In some embodiments, the display driver chip further includes a temporary register 15 connected to the processing unit 132 for storing the target driving voltage.

[0069] Specifically, such as Figure 4 As shown, the display driver chip also includes a temporary register 15 connected to the output of the voltage management module 13, and an output port Output connected to the output of the power management integrated circuit 14. The PMIC can provide the power supply voltage required for the normal operation of the display panel 101. For example, the PMIC can provide ELVSS to Figure 3 The second voltage input terminal VSS is shown to enable the sub-pixel to emit light normally.

[0070] The output of the analog-to-digital conversion module 11 is connected to the input of the data processing module 12. The output of the data processing module 12 is connected to the input of the comparator 131. The output of the comparator 131 is connected to the input of the processing unit 132 and the input of the temporary register 15. The output of the processing unit 132 is connected to the input of the power management integrated circuit 14, the output of the temporary register 15, and the input of the power management integrated circuit 14. After the processing unit 132 determines the target driving voltage based on the comparison result or the comparison result after adjusting the driving voltage, it sends the target driving voltage to the temporary register 15 for storage. The output of the power management integrated circuit 14 is connected to the output port OutPut, so that the corresponding target driving voltage can be output to the display panel 101 through the output port OutPut.

[0071] For example, such as Figure 4 As shown, DDIC includes for such Figure 2The diagram shows four analog-to-digital converter modules 11 corresponding to the voltage detection values ​​of the four detection points. Since A0 and B0 are two detection points in the pixel driving circuit corresponding to a pixel unit in the top region, analog-to-digital converter modules 11a and 11b can respectively detect and acquire the voltage values. Figure 2 and Figure 3 The top voltage detection values ​​corresponding to the two detection points A0 and B0 shown are U, respectively. A0 U B0 Similarly, since C0 and D0 are two detection points in the pixel driving circuit corresponding to a pixel unit in the bottom region, the analog-to-digital conversion module 11c and the analog-to-digital conversion module 11d can respectively detect and acquire... Figure 2 and Figure 3 The bottom voltage detection values ​​corresponding to the two detection points C0 and D0 shown are U, respectively. C0 U D0 .

[0072] In some embodiments, the potential transmission line includes a line between a first voltage input terminal and a second voltage input terminal; the first voltage input terminal is used to input a first power supply voltage, and the second voltage input terminal is used to input a second power supply voltage that is lower than the first power supply voltage.

[0073] Specifically, potential transmission lines are used to transmit constant voltage signals, and potential transmission lines include, for example, Figure 3 The circuit shown is between the first voltage input terminal VDD and the second voltage input terminal VSS, wherein the first voltage input terminal is used to input the first power supply voltage ELVDD, the second voltage input terminal is used to input the second power supply voltage ELVSS, and the first power supply voltage ELVDD is greater than the second power supply voltage.

[0074] The pixel driving circuit of the display panel 101 includes an XT1C, where X is a positive integer greater than 2. For example, the pixel driving circuit can be 3T1C, 4T1C, 5T1C, 6T1C, 7T1C, etc. In one example, the 7T1C pixel driving circuit of the AMOLED panel mainly includes seven thin-film transistors T1 to T7 and a capacitor C1. The driving process of this pixel driving circuit is mainly controlled by the timing of the signal Scan. The driving transistors are used to drive the OLED device (i.e., pixel unit) to control the current through the OLED. To cooperate with the operation of this pixel driving circuit, a first power supply voltage VDD and a second power supply voltage VSS are required. The second power supply voltage VSS is input from the cathode side of the OLED device, and the first power supply voltage VDD is input from the anode side of the OLED device through the driving transistors.

[0075] In some implementations, the first spacing between the two detection points in the top region is equal to the second spacing between the two detection points in the bottom region.

[0076] Specifically, the currents in the ELVSS and ELVDD channels within the panel are the same; therefore, detecting the ELVDD current is equivalent to detecting the ELVSS current. Figure 3 and Figure 5 As shown, if the first distance between the two detection points in the top region is equal to the second distance between the two detection points in the bottom region, then, given the impedance, the first sensing current Iup and the second sensing current Idown can be calculated by detecting the voltage between the two detection points.

[0077] In some embodiments, the first spacing between the two detection points in the top region is equal to the second spacing between the two detection points in the bottom region, and the two detection points in the top region are located on the line between two adjacent components on the potential transmission line, while the two detection points in the bottom region are located on the line between two adjacent components on the potential transmission line. This ensures that influencing factors such as simulated voltage crosstalk or electromagnetic interference are essentially the same, making the identified target driving voltage more accurate.

[0078] In some implementations, the line connecting the two detection points in the top region and the two detection points in the bottom region is parallel to the stacking direction.

[0079] Specifically, such as Figure 5 As shown, multiple pixel units are arranged in an array within the display area AA of the display panel 101. Each pixel unit is connected to a pixel driving circuit. Two detection points A0 and B0 selected on the potential transmission line of the pixel driving circuit connected to a pixel unit in the top area, and two detection points C0 and D0 selected on the potential transmission line of the pixel driving circuit connected to a pixel unit in the bottom area, form a continuous parallel line. Figure 2 The stacking direction of the AA, FOP and FPCA display areas in the middle panel can reduce the wiring complexity in the display panel 101.

[0080] like Figure 4 As shown, the data processing module 12 is connected to four analog-to-digital conversion modules 11a to 11d, respectively. Therefore, the data processing module 12 can obtain the top voltage detection value U corresponding to the two detection points in the top region. A0 U B0 And the bottom voltage detection value U corresponding to the two detection points in the bottom region. C0 U D0 .

[0081] It should be noted that, such as Figures 2 to 4The number of 4 detection points and 4 analog-to-digital conversion modules 11 shown are examples. For example, you can select multiples of 4 such as 8, 16, 32, etc.

[0082] Specifically, such as Figure 4 As shown, since comparator 131 is connected to data processing module 12, data processing module 12 transmits the calculated current difference value ΔI0 to one input terminal of the connected comparator 131, and the other input terminal of comparator 131 receives a preset current difference value ΔI. In this way, comparator 131 can compare the current difference value ΔI0 with the preset current difference value ΔI, and output the corresponding comparison result through the output terminal of comparator 131. Figure 4 As shown, the output terminal of comparator 131 is connected to the input terminal of processing unit 132. Therefore, processing unit 132 can control power management integrated circuit 14 connected to processing unit 132 to adjust the output driving voltage in real time according to the comparison result. That is, after power management integrated circuit 14 adjusts the first driving voltage provided to display panel 101 to the second driving voltage, the voltage detection values ​​of the four detection points after switching to the second driving voltage are collected again by analog-to-digital conversion module 11, which is the adjusted voltage detection value. Data processing module 12 recalculates the adjusted current difference value according to the adjusted voltage detection value. Comparator 131 and processing unit 132 re-compare and judge the adjusted current difference value with the preset current difference value. This process is repeated until the current difference value is equal to (or approximately equal to, or about equal to) the preset current difference value according to the method in the following embodiment. At this time, it can be determined that all the driving transistors have entered the saturation region. Then, the driving voltage corresponding to the current difference value being equal to the preset current difference value can be determined as the target driving voltage.

[0083] In some embodiments, it also includes:

[0084] The processing unit 132 is further configured to output a first control signal when the comparison result is that the current difference is less than the preset current difference value, and to output a second control signal when the comparison result is that the current difference is greater than the preset current difference value;

[0085] The power management integrated circuit 14 is further configured to lower the driving voltage according to the first control signal and raise the driving voltage according to the second control signal;

[0086] The processing unit 132 is further configured to determine the driving voltage as the target driving voltage when the comparison result is that the current difference is approximately equal to the preset current difference value.

[0087] Specifically, the preset current difference value ΔI can be obtained from extensive experimental verification in the early stages. The preset current difference value ΔI represents the current difference between the top and bottom of the display area AA of the display panel 101 when ΔI is equal to the current difference between the first sensing current Iup and the second sensing current Idown. In other words, when the current difference is equal to ΔI, it indicates that the driving transistor in the pixel driving circuit connected to the pixel unit corresponding to the two selected detection points in the top area of ​​the display area AA is just operating in the saturation region. It should be noted that in this application, "equal to" means equal to, approximately equal to, or about equal to.

[0088] like Figure 2 As shown, since the data processing module 12 is connected to analog-to-digital conversion modules 11a to 11d respectively, the data processing module 12 can calculate the first sensing current Iup and the second sensing current Idown from the four voltage detection values ​​(i.e., the two top voltage signals and the two bottom voltage signals of this application) obtained from the analog-to-digital conversion modules 11a to 11d respectively. Then, the data processing module 12 calculates the difference between the second sensing current Idown and the first sensing current Iup, that is, the second sensing current Idown minus the first sensing current Iup can be used to calculate the corresponding current difference ΔI0 = Idown - Iup.

[0089] Therefore, after obtaining the first sensing current Iup and the second sensing current Idown through the above embodiments, this application can obtain the target driving voltage based on the difference value ΔI between the first sensing current Iup, the second sensing current Idown and the preset current. The target driving voltage refers to the voltage in the display panel 101 such that... Figure 2 The critical voltage at which the driving transistors in the pixel driving circuits connected to all pixel units in the display area AA of the panel enter the saturation region.

[0090] When the comparison result indicates that the current difference is less than the preset current difference value, the processing unit 132 lowers or decreases the driving voltage output by the power management integrated circuit 14 connected to the processing unit 132. When the comparison result indicates that the current difference is greater than the preset current difference value, the processing unit 132 increases or increases the driving voltage output by the power management integrated circuit 14 connected to the processing unit 132.

[0091] In some embodiments, the processing unit includes:

[0092] A pulse signal output sub-voltage is used to reduce the number of pulse signals sent to the power management integrated circuit 14 according to the first control signal when the comparison result is that the current difference is less than the preset current difference value, so as to trigger the power management integrated circuit 14 to lower the driving voltage output to the pixel driving circuit.

[0093] The pulse signal output sub-voltage is also used to increase the number of pulse signals sent to the power management integrated circuit 14 according to the second control signal when the comparison result is that the current difference is greater than the preset current difference value, so as to trigger the power management integrated circuit 14 to increase the driving voltage output to the pixel driving circuit.

[0094] Specifically, when the comparison result is that the current difference is less than the preset current difference value, i.e., Idown – Iup < ΔI, that is, when the difference between the current of a pixel unit in the top region of the display area AA of the display panel 101 and the current of another pixel unit in the bottom region is smaller, it indicates that the driving transistors in the pixel driving circuits connected to all pixel units in the top region of the display area AA have all entered the saturation region. At this time, the voltage management module 13 will appropriately lower the driving voltage output by the PMIC by reducing the number of pulse signals sent to the PMIC, thereby reducing power consumption while ensuring that the driving transistors in the pixel driving circuits connected to all pixel units in the display area AA of the display panel 101 have all entered the saturation region.

[0095] Specifically, when the comparison result is that the current difference is greater than the preset current difference value, i.e., Idown–Iup>△I, that is, when the current of a pixel unit in the top area of ​​the display area AA of the display panel 101 is significantly different from the current of another pixel unit in the bottom area, it indicates that the driving transistors in the pixel driving circuits connected to all pixel units in the top area of ​​the display area AA have not all entered the saturation region. In this case, the voltage management module 13 will appropriately increase the driving voltage output by the PMIC by increasing the number of pulse signals sent to the PMIC, so as to meet the requirement that the driving transistors in the pixel driving circuits connected to all pixel units in the display area AA of the display panel 101 all enter the saturation region.

[0096] Specifically, when the comparison result is that the current difference is equal to the preset current difference value, i.e., Idown–Iup≈△I, that is, when the current of a pixel unit in the top area of ​​the display area AA of the display panel 101 is less than and nearly equal to the current of another display unit in the bottom area, the driving transistors in the pixel driving circuits connected to all pixel units in the top area of ​​the display area AA have just entered or are beginning to enter the saturation region. This indicates that the driving transistors in the pixel driving circuits connected to all pixel units in the entire display area AA have just entered or are beginning to enter the saturation region. At this time, the voltage management module 13 can determine that the driving voltage output by the PMIC is the target driving voltage.

[0097] Specifically, such as Figure 4 As shown, comparator 131 sends the generated comparison result to the connected processing unit 132. Then, when the comparison result indicates that the current difference is not equal to the preset current difference value, processing unit 132 lowers or reduces the drive voltage output by power management integrated circuit 14 connected to processing unit 132. Thus, after power management integrated circuit 14 adjusts the output drive voltage in real time, comparator 131 re-compares the adjusted current difference with the preset current difference value. This process is repeated until the comparison result indicates that the current difference is not equal to the preset current difference value, at which point it can be determined that the drive voltage output by power management integrated circuit 14 is the target drive voltage. Then, processing unit 132 records the number of target pulse signals corresponding to this target drive voltage output in temporary storage 15 and records the target drive voltage.

[0098] It should be noted that the driving voltage of the display panel 101 is adjusted until the target driving voltage is obtained. In this implementation scenario, the ELVSS (ElectroLuminescence Source Supply Voltage) voltage is adjusted. In other implementation scenarios, the ELVDD voltage can also be adjusted.

[0099] This application adjusts the number of pulse signals sent by the voltage management module 13 to the power management integrated circuit 14 while adjusting the driving voltage of the display panel 101. In other words, the number of pulse signals can be progressively adjusted when the comparison result shows that the current difference is not equal to the preset current difference value. For example, if the current difference is greater than the preset current difference value, the number of pulse signals can be progressively decreased. If the current difference is less than the preset current difference value, the number of pulse signals can be progressively increased. In this way, the power management integrated circuit 14 can gradually adjust the corresponding current difference to be equal to the preset current difference value based on the number of pulse signals, thereby improving the accuracy of finding the target driving voltage. In some embodiments, the above progressive adjustment can be based on arithmetic progression according to a preset value.

[0100] This application detects the top EL current (i.e., the first sensing current Iup) and the bottom EL current (i.e., the second sensing current Idown) of the display panel 101, and adjusts the ELVSS voltage (i.e., a type of driving voltage provided to the pixel unit) in real time through the voltage management module 13 inside the DDIC, so as to find the optimal ELVSS critical voltage (i.e., the target driving voltage) that allows the display panel 101 to enter the saturation region exactly, thereby achieving the purpose of reducing power consumption and improving yield.

[0101] This application can actually test the optimal ELVSS critical voltage for each Panel DTFT operating in the saturation region. After detecting this optimal ELVSS critical voltage, the voltage management module 13 outputs the target driving voltage required by the display device 100 to power the pixel units of the display panel 101, thereby reducing the power consumption of the display device 100. In addition, this application can also adjust the ELVSS voltage in real time through the display panel 101 according to the different electrical characteristics of each display panel 101, reducing yield loss caused by insufficient high brightness.

[0102] This application also provides a display driving method, applied to, for example, a display driving method. Figures 2 to 5 The display device 100 shown includes a display panel 101; the display panel 101 includes a panel display area AA and a bonding area FOP domain, the panel display area AA includes an array of pixel units and a pixel driving circuit connected to the pixel units; each of the pixel driving circuits corresponding to a pixel unit in the top and bottom areas of the panel display area AA is provided with at least two detection points, the detection points being any node in the potential transmission line within the pixel driving circuit, the top area and the bottom area being located on opposite sides of the stacking direction of the panel display area AA and the bonding area FOP domain; the bonding area FOP domain includes a display driver chip 10, and the method includes the following steps:

[0103] Acquire the top voltage signal collected by any two detection points in the top region, and the bottom voltage signal collected by any two detection points in the bottom region;

[0104] The target driving voltage corresponding to the display panel 101 is output according to the top voltage signal and the bottom voltage signal; the target driving voltage indicates the critical voltage at which the driving transistors in the pixel driving circuits connected to all pixel units in the panel display area AA enter the saturation region.

[0105] The temporary register may include volatile memory, which may include random access memory (RAM), flash memory, or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), direct memory bus RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and direct memory bus dynamic RAM (RDRAM).

[0106] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0107] The above provides a detailed description of a display device 100 and a display driving method provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display device, characterized in that, The display device includes a display panel, which includes a panel display area and a bonding area. The panel display area includes pixel units arranged in an array and pixel driving circuits connected to the pixel units. In the top and bottom regions of the panel display area, each pixel driving circuit corresponding to a pixel unit is provided with at least two detection points. Each detection point is any node in the potential transmission line within the pixel driving circuit. The top and bottom regions are located on opposite sides of the stacking direction of the panel display area and the bonding area, respectively. The bonding area includes a display driving chip. The display driver chip is used to receive the top voltage signal collected by any two detection points in the top area, and the bottom voltage signal collected by any two detection points in the bottom area. The display driver chip is used to output a target driving voltage corresponding to the display panel according to the top voltage signal and the bottom voltage signal; the target driving voltage indicates the critical voltage at which the driving transistors in the pixel driving circuits connected to all pixel units in the display area of ​​the panel enter the saturation region; the display driver chip is used to obtain a first sensing current on the potential transmission line in the pixel driving circuit connected to the pixel units in the top area of ​​the display panel and a second sensing current on the potential transmission line in the pixel driving circuit connected to the pixel units in the bottom area of ​​the display panel according to the top voltage signal and the bottom voltage signal, and obtain the target driving voltage according to a preset current difference value, the first sensing current and the second sensing current.

2. The display device according to claim 1, characterized in that, The display driver chip includes: The analog-to-digital conversion module is connected one-to-one with the detection points in the top region and the detection points in the bottom region. It is used to receive the top voltage signal and perform analog-to-digital conversion to output the corresponding top voltage detection value, and to receive the bottom voltage signal and perform analog-to-digital conversion to output the corresponding bottom voltage detection value. The data processing module is used to receive the top voltage detection value and calculate the first sensing current, receive the bottom voltage detection value and calculate the second sensing current, and calculate the current difference by calculating the difference between the second sensing current and the first sensing current. A voltage management module is used to output a control signal based on a preset current difference value and the current difference value, and to determine the target driving voltage; A power management integrated circuit is used to adjust the driving voltage supplied to the display panel according to the control signal.

3. The display device according to claim 2, characterized in that, The voltage management module includes: A comparator is used to compare the current difference with the preset current difference value to obtain a comparison result; The processing unit is configured to output the control signal based on the comparison result, and determine the target driving voltage based on the comparison result or the comparison result after adjusting the driving voltage.

4. The display device according to claim 3, characterized in that, The processing unit is further configured to output a first control signal when the comparison result is that the current difference is less than the preset current difference value, and to output a second control signal when the comparison result is that the current difference is greater than the preset current difference value; The power management integrated circuit is further configured to lower the driving voltage according to the first control signal and raise the driving voltage according to the second control signal; The processing unit is further configured to determine the driving voltage as the target driving voltage when the comparison result is that the current difference is equal to the preset current difference value.

5. The display device according to claim 4, characterized in that, The processing unit includes: A pulse signal output sub-voltage is used to reduce the number of pulse signals sent to the power management integrated circuit according to the first control signal when the comparison result is that the current difference is less than the preset current difference value, so as to trigger the power management integrated circuit to lower the driving voltage output to the pixel driving circuit. The pulse signal output sub-voltage is also used to increase the number of pulse signals sent to the power management integrated circuit according to the second control signal when the comparison result is that the current difference is greater than the preset current difference value, so as to trigger the power management integrated circuit to increase the driving voltage output to the pixel driving circuit.

6. The display device according to claim 5, characterized in that, The display driver chip further includes a temporary register connected to the processing unit for storing the target driving voltage.

7. The display device according to claim 1, characterized in that, The potential transmission line includes a line between a first voltage input terminal and a second voltage input terminal; the first voltage input terminal is used to input a first power supply voltage, and the second voltage input terminal is used to input a second power supply voltage that is lower than the first power supply voltage.

8. The display device according to claim 1, characterized in that, The first spacing between the two detection points in the top region is equal to the second spacing between the two detection points in the bottom region.

9. The display device according to any one of claims 1 to 8, characterized in that, The line connecting the two detection points in the top region and the two detection points in the bottom region is parallel to the stacking direction.

10. A display driving method, characterized in that, The method is applied to a display device, the display device including a display panel; the display panel including a panel display area and a bonding area, the panel display area including an array of pixel units and a pixel driving circuit connected to the pixel units; each of the pixel driving circuits corresponding to a pixel unit in the top and bottom areas of the panel display area is provided with at least two detection points, the detection points being any node in the potential transmission line within the pixel driving circuit, the top area and the bottom area being located on opposite sides of the stacking direction of the panel display area and the bonding area; the bonding area including a display driver chip, the method including the steps of: Acquire the top voltage signal collected by any two detection points in the top region, and the bottom voltage signal collected by any two detection points in the bottom region; Based on the top voltage signal and the bottom voltage signal, a first sense current on the potential transmission line of the pixel driving circuit connected to the pixel unit in the top area of ​​the display panel and a second sense current on the potential transmission line of the pixel driving circuit connected to the pixel unit in the bottom area of ​​the display panel are obtained. Based on a preset current difference value, the first sense current and the second sense current, a target driving voltage is obtained. The target driving voltage indicates the critical voltage at which the driving transistors in the pixel driving circuits connected to all pixel units in the display area of ​​the panel enter the saturation region.

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