Optical computing chip with high-temperature-resistant vertical micro-mirror structure for on-chip integration

Abstract

The application discloses a light computing chip with high-temperature-resistant vertical micro-mirror structure for on-chip integration, comprising a wafer and a plurality of light computing basic units and light path control optical elements thereon, wherein the light computing basic unit comprises an N-type light logic switch and a P-type light logic switch, both of which comprise a light-transmitting structure, a movable structure and a fixed structure; a voltage is applied to the light-transmitting structure, the movable structure and the fixed structure according to logic requirements, so that the movable structure remains stationary, deflects or moves, and then the on-off of the light path is realized; the light computing basic unit is prepared by the following process: deep etching on the upper surface of the wafer or first depositing a structure layer and then performing photolithography and etching to form the vertical micro-mirror structure comprising the light-transmitting structure, the movable structure and the fixed structure; performing planarization polishing on the vertical sidewall of the vertical micro-mirror structure; depositing an insulating layer between the vertical micro-mirror structure and the wafer substrate to realize electrical insulation and isolation; and depositing a metal layer on the vertical micro-mirror structure to form a lead interconnection.

Description

Technical Field

[0001] This invention belongs to the field of optoelectronics technology, and particularly relates to an optical computing chip with a high-temperature resistant vertical micromirror structure for on-chip integration. Background Technology

[0002] As transistor sizes and integration densities in integrated circuits continue to shrink and increase, interconnect effects such as signal delay and interference caused by interconnects have become a bottleneck restricting the development of integrated circuits. Furthermore, the heat generation problem of high-density integrated circuit chips makes it difficult to simply improve system performance through three-dimensional stacking packaging processes. Compared to electrons, photons have no rest mass, and different wavelengths of light can be used for simultaneous multi-channel communication, resulting in greater bandwidth and higher speeds. The emergence of silicon-based photonics technology holds promise for solving the technical problems in the development of electronic integrated circuits. Silicon-based photonics technology typically involves fabricating or integrating transmitting, receiving, and optical modulators, optical switches, and optical amplifiers on silicon substrates. It uses laser beams to replace electronic signals for data transmission, offering compatibility with microelectronic CMOS processes and the advantages of multi-channel operation, high bandwidth, and high speed. However, conventional silicon-based photonics technology uses silicon-on-insulator (SOI) as the material to manufacture silicon waveguides and other device structures. Not only is SOI expensive, but it is also not directly compatible with the single-crystal silicon substrate of ICs. Waveguides and other devices inevitably have defects during the processing. These uneven areas will cause light transmission loss in the waveguide. In addition, the traditional silicon-based photonic chips have stringent process requirements, and the problems of high cost and low yield urgently need to be overcome.

[0003] Traditional photonics technology relying on silicon waveguides is a two-dimensional technology, which struggles to fully utilize the mechanical properties of silicon as a carrier, and also limits the propagation speed and loss of light due to waveguide manufacturing processes. Microelectromechanical systems (MEMS), on the other hand, are a three-dimensional technology that can fabricate three-dimensional micromirrors on single-crystal silicon wafers, enabling the alteration of the optical path of light propagating through air and fully utilizing the mechanical, electrical, and optical properties of silicon. However, traditional MEMS optical micromirror arrays are typically horizontal structures, generally used for adjusting the vertical propagation direction of light, and are difficult to implement for horizontal optical path transmission and control. Summary of the Invention

[0004] To address the challenges of complex fabrication processes in traditional silicon-based photonics technology and the limitations of horizontal micromirrors in MEMS for horizontal optical path transmission and control, this invention proposes a high-temperature-resistant vertical micromirror structure for on-chip integration. This technology utilizes a vertical deep etching process to fabricate vertically oriented MEMS driveable micromirrors, enabling horizontal optical path transmission and control. This process can be implemented using single-crystal silicon wafers and back-end processes fully compatible with ICs. It not only achieves wafer-level integration with ICs with low cost and high yield, but also allows for the fabrication of various optical chips such as optical computing chips, optical storage chips, spectrometers, filters, and optical switches, while exhibiting certain high-temperature resistance characteristics.

[0005] The technical solution is as follows:

[0006] A high-temperature resistant vertical micromirror structure optical computing chip for on-chip integration includes a wafer and several basic optical computing units and optical path control optical elements thereon. The basic optical computing units include N-type optical logic switches and P-type optical logic switches. Both the N-type and P-type optical logic switches include a light-transmitting structure, a movable structure, and a fixed structure. Voltage is applied to the light-transmitting structure, the movable structure, and the fixed structure according to logic requirements, so that the movable structure remains stationary, deflects, or moves, thereby realizing the on / off state of the optical path. If the power supply is disconnected, the state of the movable structure remains unchanged to maintain the logic state of the optical logic switch, thus having a logic storage function.

[0007] The optical computing basic unit is prepared through the following process:

[0008] Vertical micromirror structure manufacturing steps: Deep etching is performed on the upper surface of the wafer, or a structural layer is deposited first and then photolithographic etching is performed to form a vertical micromirror structure. The vertical micromirror structure includes a light-transmitting structure, a movable structure, and a fixed structure. The light-transmitting structure has a light-transmitting window in the middle.

[0009] Vertical sidewall planarization step: The vertical sidewalls of the vertical micromirror structure are planarized and polished.

[0010] Insulating layer deposition step: An insulating layer is deposited between the vertical micromirror structure and the wafer substrate to achieve electrical insulation isolation;

[0011] Lead interconnect fabrication steps: Deposit a metal layer on a vertical micromirror structure to form lead interconnects.

[0012] Furthermore, when the vertical micromirror structure is a cantilever beam, the light-transmitting structure is a light-transmitting layer, the movable structure is a cantilever beam layer, the fixed structure is a fixed layer, the light-transmitting layer has a window for light transmission in the middle and metallized electrodes on both sides, and the cantilever beam layer is disposed between the window of the light-transmitting layer and the fixed layer.

[0013] An N-type optical logic switch is formed by applying fixed static voltages 0 and +V to the cantilever beam layer and the fixed layer, respectively. A P-type optical logic switch is formed by applying fixed static voltages +V and 0 to the cantilever beam layer and the fixed layer, respectively. Applying a static voltage of 0 or +V to the light-transmitting layer keeps the cantilever beam layer stationary or causes it to deflect, thereby realizing the opening and closing of the optical path.

[0014] Furthermore, when the vertical micromirror structure is a comb-type structure, the light-transmitting structure is a front-driven comb, the movable structure includes a vertical micromirror and a micromirror comb, and the fixed structure includes a front-driven comb, a rear-driven comb, and a fixed light-transmitting layer. The fixed light-transmitting layer has a window for light transmission in the middle and metallized electrodes on both sides. The vertical micromirror is disposed on the rear side of the window, and the rear side of the vertical micromirror is arranged in sequence with the front-driven comb, the micromirror comb, and the rear-driven comb.

[0015] An N-type optical logic switch is formed by applying fixed static voltages 0 and +V to the micromirror comb teeth and the rear drive comb teeth, respectively. A P-type optical logic switch is formed by applying fixed static voltages +V and 0 to the micromirror comb teeth and the rear drive comb teeth, respectively. Applying a static voltage of 0 or +V to the front drive comb teeth causes the micromirror comb teeth to drive the vertical micromirror to maintain or move, thereby realizing the opening and closing of the optical path.

[0016] Furthermore, the manufacturing steps of the vertical micromirror structure are as follows:

[0017] When using the deep etching method, a vertical micromirror structure including a light-transmitting layer, a cantilever beam layer, and a fixing layer is etched on the upper surface of the wafer through a deep etching process.

[0018] When using deposition methods, a structural layer is grown on the upper surface of a wafer by epitaxial growth, chemical vapor deposition of polycrystalline silicon, silicon dioxide, or deposition of thick photoresist, and then photolithography and etching are used to form a vertical micromirror structure including a light-transmitting layer, a cantilever beam layer, and a fixing layer.

[0019] Furthermore, in the vertical sidewall planarization step, the vertical micromirror structure is immersed in a mixed solution of potassium hydroxide or tetramethylammonium hydroxide and isopropanol to form vertical sidewalls with nanoscale roughness.

[0020] Furthermore, in the insulating layer deposition step, a silicon dioxide insulating layer is deposited on the vertical micromirror structure and the wafer surface using inductively coupled plasma chemical vapor deposition or plasma-enhanced chemical vapor deposition.

[0021] Furthermore, the lead interconnect manufacturing step includes:

[0022] Photoresist is applied to the surface of the wafer by spraying, and then exposed and developed to form a pattern of interconnected leads.

[0023] Deposit a metal layer on the upper surface of the wafer;

[0024] The metal layer is stripped and the photoresist is removed in acetone, ethanol, or a photoresist remover to form lead interconnects.

[0025] Furthermore, the optical path control optical elements include lenses, mirrors, apertures, filters, interferometers, and optical switches.

[0026] Furthermore, if the vertical micromirror structure is a comb-type structure, then after the lead interconnect manufacturing step, the wafer is immersed in hydrofluoric acid to remove the buried oxide layer silicon dioxide in the silicon-on-insulator wafer or the sacrificial layer deposited on the single crystal silicon wafer, to obtain a suspended comb-type structure.

[0027] Furthermore, if the vertical micromirror structure is a comb-type structure, before the vertical micromirror structure manufacturing step, a suspension groove is etched on the back side of the wafer, and the back side of the wafer is anoly bonded to a glass wafer containing potassium and sodium ions, and the front side of the wafer is thinned and polished.

[0028] The technical solutions provided by the embodiments of this application may include the following beneficial effects:

[0029] First, this invention uses a microelectronic deep etching process to fabricate a vertically drivable micromirror structure on a silicon wafer, enabling the transmission and control of optical paths in the horizontal direction. Compared to traditional silicon waveguide transmission and control methods, using geometric optics to achieve optical path transmission and control results in low transmission loss in air, low requirements for light sources, and high transmission speed. It also has the advantages of multi-channel photons, large bandwidth, and high speed.

[0030] Second, the present invention uses a microelectronic deep etching process to manufacture vertically drivable micromirror structures on silicon wafers. It can be manufactured using silicon wafers and back-end processes that are fully compatible with ICs, resulting in low cost, high yield, good reliability, and direct on-chip integration.

[0031] Third, this invention manufactures a vertical light-transmitting layer, a cantilever beam layer, and a fixing layer. By adjusting the fixed static voltage applied to the cantilever beam layer and the fixing layer, the logic functions of N-type and P-type optical logic switches are cleverly realized. This allows for the implementation of photonic logic gates and the further construction of optical computing chips with complex functions, without the need for active doping and high-temperature annealing as required for CMOS circuits. The photonic logic gates and optical computing chips based on this structure possess high-temperature resistance characteristics.

[0032] Fourth, this invention can directly etch vertical optical devices such as cantilever beams, mirrors, plane lenses, cylindrical lenses, concave lenses, convex lenses, and prisms onto silicon wafers, realizing on-chip optical systems.

[0033] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this application. Attached Figure Description

[0034] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0035] Figure 1 The diagram shows the process flow of the optical computing basic unit of the cantilever beam vertical micromirror structure of the present invention, where (a)-(f) are wafer cross-sectional views in each process.

[0036] Figure 2 The diagram shows the process flow of the optical computing basic unit of the cantilever beam vertical micromirror structure of the present invention, where (a)-(f) are top views of the wafer in each process.

[0037] Figure 3 The diagram shows the three-dimensional working principle of an N-type optical logic switch with a cantilever beam vertical micromirror structure.

[0038] Figure 4 The diagram shows a top view of the working principle of an N-type optical logic switch and a P-type optical logic switch with a cantilever beam vertical micromirror structure. (a) is a schematic diagram of the N-type optical logic switch being turned on, (b) is a schematic diagram of the N-type optical logic switch being turned off, (c) is a schematic diagram of the P-type optical logic switch being turned off, and (d) is a schematic diagram of the P-type optical logic switch being turned on.

[0039] Figure 5 The diagram shows the basic logic gates of the optical computing unit with a vertical micromirror structure, where (a)-(g) are schematic diagrams of NOT gate, AND gate, OR gate, NAND gate, NOR gate, XNOR gate, and XOR gate, respectively.

[0040] Figure 6 The diagram shows a top view of the working principle of the N-type optical logic switch and the P-type optical logic switch of the optical computing basic unit of the comb-type vertical micromirror structure. (a) is a schematic diagram of the N-type optical logic switch being turned on, (b) is a schematic diagram of the N-type optical logic switch being turned off, (c) is a schematic diagram of the P-type optical logic switch being turned off, and (d) is a schematic diagram of the P-type optical logic switch being turned on.

[0041] Figure 7 The diagram shows a process flow profile of the basic optical computing unit based on the SOG comb-type vertical micromirror structure, where (a)-(f) are wafer cross-sections in each process.

[0042] Figure 8 The image shows an optical control element fabricated on a single-crystal silicon wafer by etching, where (a)-(f) are lenses, (g)-(i) are mirrors, (j)-(k) are apertures, and (l)-(m) are filters.

[0043] Reference numerals: 1. Single-crystal silicon wafer; 2. Deep trench; 3. Cantilever beam layer; 4. Fixing layer; 5. Transparent layer; 6. Transparent layer electrode; 7. Silicon dioxide insulating layer; 8. Photoresist; 9. First metal layer; 10. Lead interconnect; 11. Micromirror comb teeth; 12. Rear drive comb teeth; 13. Front drive comb teeth; 14. Vertical micromirror; 15. Fixing transparent layer; 16. Groove; 17. Glass wafer; 18. Silicon dioxide layer; 19. Second metal layer; 20. Connecting rod; 21. Anchor point; 22. Rear spring; 23. Front spring. Detailed Implementation

[0044] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application.

[0045] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0046] It should be understood that although the terms first, second, third, etc., may be used in this application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to determination."

[0047] This invention is illustrated using a vertically deeply etched micromirror optical computing chip for logic computing applications as an example. However, the method used in this invention is not limited to the three-layer structure of the light-transmitting layer, cantilever beam layer, and fixed layer, but is also applicable to combinations of multi-layer structures with multiple light-transmitting layers, cantilever beam layers, and fixed layers. The applicable functions are not limited to computing functions, but are also applicable to storage, sensing, spectrometer detection, and other uses.

[0048] This application provides an on-chip integrated optical computing chip with a high-temperature resistant vertical micromirror structure, comprising a wafer and several basic optical computing units and optical path control optical elements thereon. The basic optical computing units include N-type optical logic switches and P-type optical logic switches. Both the N-type and P-type optical logic switches include a light-transmitting structure, a movable structure, and a fixed structure. Voltage is applied to the light-transmitting structure, the movable structure, and the fixed structure according to logic requirements, so that the movable structure remains stationary, deflects, or moves, thereby realizing the on / off state of the optical path. If the power supply is disconnected, the state of the movable structure remains unchanged to maintain the logic state of the optical logic switch, thus having a logic storage function.

[0049] In one embodiment, when the vertical micromirror structure is a cantilever beam, the light-transmitting structure is a light-transmitting layer 5, the movable structure is a cantilever beam layer 3, and the fixed structure is a fixed layer 4. The light-transmitting layer 5 has a window for light transmission in the middle and metallized electrodes on both sides. The cantilever beam layer 3 is disposed between the window of the light-transmitting layer 5 and the fixed layer 4.

[0050] By applying fixed static voltages 0 and +V to the cantilever beam layer 3 and the fixed layer 4 respectively, an N-type optical logic switch is formed. By applying fixed static voltages +V and 0 to the cantilever beam layer 3 and the fixed layer 4 respectively, a P-type optical logic switch is formed. Applying static voltage 0 or +V to the light-transmitting layer 5 keeps the cantilever beam layer 3 stationary or causes it to deflect, thereby realizing the opening and closing of the optical path.

[0051] Using single-crystal silicon wafer 1 as the material ( Figure 1 (a) Figure 2 Taking (a) as an example, the basic optical computing unit of the cantilever beam vertical micromirror structure is prepared through the following process:

[0052] (1) First vertical structure manufacturing step: Deep etching on the upper surface of the wafer or first depositing a structural layer and then photolithographic etching to form a vertical micromirror structure;

[0053] When using the deep etching method, one or more sets of micromirror structures such as the light-transmitting layer 5, the cantilever beam layer 3, and the fixing layer 4 are etched on the surface of the single-crystal silicon wafer through the deep etching process.

[0054] When using deposition methods, structural layers are first grown on the surface of a single-crystal silicon wafer through epitaxial growth, chemical vapor deposition of polycrystalline silicon, silicon dioxide, or deposition of thick photoresist such as SU8, PI, BCB, etc. Then, one or more sets of micromirror structures such as light-transmitting layer 5, cantilever beam layer 3, and fixing layer 4 are formed using photolithography, etching and other processes.

[0055] It should be noted that during the fabrication of the optical computing chip, optical path control optical components such as vertical reflectors, vertical lenses, and apertures, which are necessary for the optical path, are simultaneously etched in this step.

[0056] In this embodiment, a deep groove 2 is photolithographically etched and deeply etched on the upper surface of the single-crystal silicon wafer 1, while a light-transmitting layer 5, a cantilever beam layer 3, and a fixing layer 4 are formed. The light-transmitting layer has a window in the middle for light transmission, and the two sides are used for subsequent metallization into light-transmitting layer electrodes 6.

[0057] It should be noted that this invention patent uses vertical deep etching technology as an example to introduce the manufacturing process of optical computing chips. Vertical deep etching can typically etch more than 100 micrometers into a single-crystal silicon wafer 1, thereby enabling the cantilever beam layer 3 to obtain higher sensitivity, which is a preferred solution. However, it should not be understood that the light-transmitting layer 5, the cantilever beam layer 3, and the fixing layer 4 can only be achieved by vertical deep etching of single-crystal silicon. The same structure and function achieved by first growing structural layers on a substrate such as single-crystal silicon using techniques commonly used in the art, such as epitaxial growth, chemical vapor deposition of polycrystalline silicon, silicon dioxide, or deposition of thick resists such as SU8, PI, BCB, etc., and then performing photolithography, etching, and other processes should also be understood to be within the scope of protection of this invention patent.

[0058] (2) First vertical sidewall planarization step: Planarize and polish the vertical sidewalls of the vertical micromirror structure;

[0059] Specifically, the vertical sidewalls after deep etching are preferably planarized by immersion in a mixed solution of potassium hydroxide (KOH) or tetramethylammonium hydroxide (TMAH) and isopropanol (IPA), eliminating sidewall defects during the etching process and forming vertical sidewalls with nanometer-level roughness. In one embodiment, the typical roughness value of the planarized vertical sidewalls is better than 3 nanometers. Figure 1 (b) Figure 2 (b) in the middle.

[0060] (3) First insulating layer deposition step: An insulating layer is deposited between the vertical micromirror structure and the wafer substrate to achieve electrical insulation isolation;

[0061] Specifically, inductively coupled plasma chemical vapor deposition (ICPCVD) or plasma-enhanced chemical vapor deposition (PECVD) is preferably used to deposit a silicon dioxide insulating layer 7 on the vertical micromirror structure and the surface of the single-crystal silicon wafer. Figure 1 (c) Figure 2 (c) in the middle.

[0062] (4) First lead interconnect fabrication step: depositing a metal layer on a vertical micromirror structure to form lead interconnects;

[0063] Photoresist 8 is applied using a spray coating method, and then exposed and developed to form the interconnect pattern of leads. Figure 1 (d) Figure 2 (d) in the middle.

[0064] A first metal layer 9 is deposited. The preferred material for the metal layer is titanium / gold, but it can also be aluminum, chromium / gold, titanium / platinum / gold, titanium / nickel / gold, titanium / copper, chromium / copper, titanium / nickel / copper, etc. Figure 1 (e) in Figure 2 (e) in the middle.

[0065] The photoresist 8 and excess metal layer are removed using a stripping method to form the lead interconnect 10. Figure 1 (f) in Figure 2 (f) in the middle.

[0066] The above steps (1)-(4) can be completed as follows. Figure 3 The optical computing basic unit of the cantilever beam vertical micromirror structure shown is fabricated. After fabrication, a static voltage is applied to the vertical micromirror structure. The deflection of the vertical micromirror structure is driven according to the logic requirements to realize the transmission and control of the optical path in the horizontal direction. The input static voltage and the output result of the optical path form a logical calculation or storage relationship.

[0067] Fixed static voltages 0 and +V are applied to the cantilever beam layer 3 and the fixed layer 4 respectively to form an N-type optical logic switch;

[0068] Fixed static voltages +V and 0 are applied to the cantilever beam layer 3 and the fixed layer 4 respectively to form a P-type optical logic switch;

[0069] Applying a static voltage of 0 or +V to the light-transmitting layer 5 achieves vertical or deflection of the cantilever beam layer 3, thereby enabling the light path to be opened or closed.

[0070] Multiple N-type and P-type optical logic switches are connected in series or in parallel, and together with necessary vertical reflectors and lenses, they form optical logic gates, which in turn form optical computing chips and optical storage chips.

[0071] It should be noted that the optical path control optical components in the optical computing chip may include lenses, mirrors, apertures, filters, interferometers, optical switches, etc.

[0072] Figure 3 The diagram shows the three-dimensional working principle of the N-type optical logic switch of the optical computing chip with a cantilever beam vertical micromirror structure. Figure 4 The diagram shows a top view illustrating the working principle of the N-type and P-type optical logic switches of an optical computing chip with a vertical micromirror structure.

[0073] The working principle of the N-type optical logic switch in the optical computing chip with a vertical micromirror structure is as follows: Fixed static voltages 0 and +V are applied to the cantilever beam layer 3 and the fixed layer 4, respectively (underlined in the diagram indicates constant, ununderlined indicates variable state, the same applies below). A beam of light enters the cantilever beam layer at a certain angle through the light-transmitting window of the light-transmitting layer and is reflected. When a static voltage V is applied to the light-transmitting layer 5, the cantilever beam layer 3 is simultaneously attracted by the electrostatic voltages of the fixed layer 4 and the light-transmitting layer 5, maintaining its verticality. The reflected light can exit through the light-transmitting window of the light-transmitting layer 5, and the N-type optical logic switch is turned on. Figure 4 (a) When a static voltage of 0 is applied to the light-transmitting layer 5, the cantilever beam layer 3 is only attracted by the static voltage of the fixed layer 4 and deflects backward (to the position of the dashed line). The reflected light is blocked by the inside of the light-transmitting layer 5 and cannot be emitted from the light-transmitting window of the light-transmitting layer 5. The N-type optical logic switch is turned off. Figure 4 (b) in the middle.

[0074] The working principle of the P-type optical logic switch in the optical computing chip with a vertical micromirror structure is as follows: Fixed static voltages +V and 0 are applied to the cantilever beam layer 3 and the fixed layer 4, respectively. A beam of light enters the cantilever beam layer 3 at a certain angle through the light-transmitting window of the light-transmitting layer 5 and is reflected. When the light-transmitting layer 5 applies a static voltage V, the cantilever beam layer 3 is repelled by the electrostatic voltage of the light-transmitting layer 5 and deflects backward (to the position indicated by the dotted line). The reflected light is blocked by the inside of the light-transmitting layer 5 and cannot exit through the light-transmitting window, thus turning off the P-type optical logic switch. Figure 4 (c) When a static voltage of 0 is applied to the light-transmitting layer 5, the cantilever beam layer 3 is only attracted by the electrostatic voltage of the fixed layer 4 and deflects backward (to the position of the dashed line). The reflected light is blocked by the inside of the light-transmitting layer and cannot be emitted from the light-transmitting window of the light-transmitting layer 5. The P-type optical logic switch is turned off. Figure 4 (d)). It can be seen that by applying fixed static voltages 0 and +V, and +V and 0 to the cantilever beam layer 3 and the fixed layer 4 respectively, a doping effect similar to that of N-type and P-type in CMOS circuits can be formed. The light-transmitting layer 5 is equivalent to the gate of the CMOS circuit, the incident light path is equivalent to the source of the CMOS circuit, and the outgoing light path is equivalent to the drain of the CMOS circuit.

[0075] Figure 5 The diagram shows the basic logic gate schematic of an optical computing chip with a vertical micromirror structure. As an embodiment of the invention, N-type and P-type optical logic switches can be connected in series or parallel to form logic gates similar to CMOS circuits, where (a)-(g) are NOT gates, AND gates, OR gates, NAND gates, NOR gates, XNOR gates, and XOR gates, respectively. Based on these basic logic gates, an optical computing chip with computing and storage functions can be further constructed. Here, we use... Figure 5The XOR gate shown in (g) is illustrated in the example: First, light shines at a certain angle onto a single-crystal silicon lens a, which is vertically etched. One path of light is refracted and transmitted, continuing to propagate in a direction parallel to the original light source, passing through an N-type optical logic switch e, a P-type optical logic switch f, and a metal-coated mirror c to reach the single-crystal silicon lens b. The other path of light is reflected and passes through an N-type optical logic switch g, a P-type optical logic switch h, and a metal-coated mirror d to reach the single-crystal silicon lens b. Finally, the two paths of light are reflected and refracted, and transmitted respectively, reaching the photodetector i. The same electrostatic voltage state A is applied to the light-transmitting layers of the N-type optical logic switch e and the P-type optical logic switch h, and the same electrostatic voltage state B is applied to the light-transmitting layers of the N-type optical logic switch g and the P-type optical logic switch f. If the photodetector i detects light, it is recorded as 1; if it does not detect light, it is recorded as 0. The output of the photodetector i is the result of the XOR operation of the applied electrostatic voltages A and B.

[0076] When the power is disconnected, the charge on the electrode substrate will not transfer or disappear because there is no path. The deflection state of the vertical micromirror remains unchanged. Therefore, its logic state can still be maintained after the power is turned off, and it has a logic storage function.

[0077] In specific implementation, the basic optical computing unit can also be a comb-type vertical micromirror structure. When the vertical micromirror structure is comb-type, the light-transmitting structure is a front-driven comb, the movable structure includes a vertical micromirror and a micromirror comb, and the fixed structure includes a front-driven comb, a rear-driven comb, and a fixed light-transmitting layer. The fixed light-transmitting layer has a window for light transmission in the middle and metallized electrodes on both sides. The vertical micromirror is disposed on the rear side of the window, and the rear side of the vertical micromirror is arranged in sequence with a front-driven comb, a micromirror comb, and a rear-driven comb.

[0078] An N-type optical logic switch is formed by applying fixed static voltages 0 and +V to the micromirror comb teeth and the rear drive comb teeth, respectively. A P-type optical logic switch is formed by applying fixed static voltages +V and 0 to the micromirror comb teeth and the rear drive comb teeth, respectively. Applying a static voltage of 0 or +V to the front drive comb teeth causes the micromirror comb teeth to drive the vertical micromirror to maintain or move, thereby realizing the opening and closing of the optical path.

[0079] like Figure 6 As shown, similar to the cantilever beam drive principle, its switching effect is achieved by applying fixed static voltages 0 and +V to the micromirror comb teeth 11 and the rear drive comb teeth 12, respectively. When a static voltage +V is applied to the front drive comb teeth 13, the micromirror comb teeth 11 are simultaneously attracted by the +V voltages of the rear drive comb teeth 12 and the front drive comb teeth 13, maintaining balance and preventing the vertical micromirror 14 from moving horizontally. The incident light just shines out from the fixed light-transmitting layer 15, thus turning on the circuit. Figure 6(a) When a static voltage of 0 is applied to the front drive comb tooth 13, the micromirror comb tooth 11 is only attracted by the rear drive comb tooth 12 and moves backward. Through the connecting rod 20, it drives the vertical micromirror 14 to move backward. The rear spring 22 connected to the anchor point 21 is stretched while the front spring 23 is compressed. Finally, the mechanical force and electrostatic force of the spring reach equilibrium. At this time, the incident light is blocked and cut off by the inner side of the fixed light-transmitting layer 15. Figure 6 (b) in the middle, forming an N-type optical logic switch.

[0080] Similarly, if fixed static voltages +V and 0 are applied to the micromirror comb teeth 11 and the rear drive comb teeth 12 respectively, when a static voltage of 0 is applied to the front drive comb teeth 13, the micromirror comb teeth 11 simultaneously attract the front drive comb teeth 13 and the rear drive comb teeth 12 to maintain balance without causing the vertical micromirror 14 to move horizontally, and the incident light just shines out from the fixed light-transmitting layer 15 and becomes conductive. Figure 6 (c) When a static voltage +V is applied to the front drive comb 13, the micromirror comb 11 is repelled by the front drive comb 13 and moves backward, driving the vertical micromirror 14 to move backward via the connecting rod 20. At this time, the incident light is blocked and cut off by the inner side of the fixed light-transmitting layer 15. Figure 6 (d) in the middle, forming a P-type optical logic switch.

[0081] For optical computing chips with comb-shaped vertical micromirror structures, silicon-on-insulator (SOI) wafers and sacrificial layer processes can be used to manufacture them. After manufacturing according to the above steps (1) to (4), the wafers after deep etching and metallization need to be immersed in hydrofluoric acid to remove the buried oxide layer silicon dioxide in the SOI wafers to obtain a suspended comb structure.

[0082] For optical computing chips with a comb-like vertical micromirror structure, a silicon-on-glass (SOG) deep etching and release process can also be used. Before the vertical micromirror structure fabrication step, a floating trench is etched on the back side of the wafer. The back side of the wafer is then anoly bonded to a glass wafer containing potassium and sodium ions. Thinning and polishing are then performed on the front side of the wafer. The basic optical computing unit of the comb-like vertical micromirror structure is fabricated using a single-crystal silicon wafer 1 as the material. Figure 7 In (a)), the specific preparation process is as follows:

[0083] (I) Wafer bonding steps: Grooves are photolithographically etched and formed on the lower surface of the wafer. The lower surface of the wafer is then anoly bonded to a glass wafer containing potassium and sodium ions. Following this, the upper surface of the wafer is thinned and polished. Specifically:

[0084] Grooves 16 are photolithographically etched and etched on the lower surface of the single-crystal silicon wafer 1. Figure 7 (b) in the middle;

[0085] Preferably, but not limited to, the lower surface of the monocrystalline silicon wafer 1 is anoly bonded to a glass wafer 17 containing potassium and sodium ions. The bonding method can also be direct silicon-silicon bonding or indirect silicon-silicon bonding based on an intermediate layer medium. The upper surface of the monocrystalline silicon wafer 1 is thinned and polished using wet chemical etching with potassium hydroxide solution or chemical mechanical polishing. Figure 7 (c) in the middle;

[0086] (II) Second vertical micromirror structure fabrication steps: Deep etching on the upper surface of the wafer or first depositing a structural layer and then photolithographic etching to form a vertical micromirror structure;

[0087] The upper surface of the single-crystal silicon wafer 1 is photolithographically etched and etched. A vertical micromirror 14, front drive comb teeth 13, rear drive comb teeth 12, micromirror comb teeth 11, connecting rod 20, front spring 22, rear spring 23, a fixed light-transmitting layer 15, and anchor points 21 are formed through a single etching process. The vertical micromirror 14, front drive comb teeth 13, rear drive comb teeth 12, micromirror comb teeth 11, connecting rod 20, front spring 23, and rear spring 22 are movable. Etching is performed within the groove 16. Figure 7 (d) in the middle;

[0088] (III) Second vertical sidewall planarization step: Planarize and polish the vertical sidewalls of the vertical micromirror structure;

[0089] (IV) Second insulating layer deposition step: An insulating layer is deposited between the vertical micromirror structure and the wafer substrate to achieve electrical insulation isolation;

[0090] Silicon dioxide layers were deposited using methods such as ICP-CVD and PECVD for insulation. Figure 7 (e) in the middle;

[0091] (V) Second lead interconnect fabrication step: Deposit a metal layer on the vertical micromirror structure to form lead interconnect;

[0092] Photolithography was performed on the vertical micromirror 14, the front drive comb teeth 13, the rear drive comb teeth 12, and the micromirror comb teeth 11 to deposit a second metal layer 19. Figure 7 (f) in the middle.

[0093] The specific implementation of steps (II) to (IV) is the same as that of steps (2) to (4), and will not be repeated here.

[0094] It should be noted that the vertical micromirror structure can be driven by either a cantilever beam or a comb-tooth mechanism. Regardless of whether it is a cantilever beam or comb-tooth mechanism, the core working principle is to achieve optical path cutoff or conduction through the movement or stillness of the vertical micromirror. This invention only illustrates the most common cantilever beam and comb-tooth driving methods in MEMS processes through examples; other driving methods not listed should also be understood as being within the scope of protection of this invention.

[0095] The optical computing chip includes several basic optical computing units and several necessary optical components such as lenses, mirrors, apertures, filters, interferometers, and optical switches that control the optical path. Figure 5 Taking (g) as an example, lenses a and b, which are perpendicular to each other, serve to split and combine light, while mirrors c and d serve to adjust the direction of the light path. Figure 8 The diagram illustrates examples of necessary optical components fabricated on a single-crystal silicon wafer by etching, where (a)-(f) are lenses, (g)-(i) are mirrors, (j)-(k) are apertures, and (l)-(m) are filters. Shallow etching is used for fabrication. Figure 5 The aperture shown in (j) has no aspect ratio limitation and a typical width of 1-10 micrometers; it is manufactured using deep etching. Figure 5 When using the aperture shown in (k), due to the aspect ratio limitation of the etching process, multiple apertures with larger diameters or larger slits can be arranged in an alternating pattern to achieve the limitation of the straight light spot. When a beam of multi-wavelength light shines into the aperture at a certain angle... Figure 5 When using planar or inclined single-crystal silicon lenses for filters as shown in (l)-(m), light of different wavelengths is deflected at different angles. By placing slits at appropriate positions, specific wavelengths of light can pass through while other wavelengths are blocked. Multiple stages of single-crystal silicon lenses can further narrow the wavelength range of the passing light, achieving a filtering effect. All of the above components can be incorporated into the optical computing chip and can be fabricated simultaneously during the fabrication of the basic optical computing unit; therefore, they will not be elaborated upon here.

[0096] The optical computing chip with a vertical micromirror structure for logic computing applications provided by the present invention has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A high-temperature resistant vertical micromirror structure optical computing chip for on-chip integration, characterized in that, The device includes a wafer and several basic optical computing units and optical path control optical elements on it. The basic optical computing units include N-type optical logic switches and P-type optical logic switches. Both the N-type and P-type optical logic switches include a light-transmitting structure, a movable structure, and a fixed structure. Voltage is applied to the light-transmitting structure, the movable structure, and the fixed structure according to logic requirements, so that the movable structure remains stationary, deflects, or moves, thereby realizing the on / off state of the optical path. If the power supply is disconnected, the state of the movable structure remains unchanged to maintain the logic state of the optical logic switch, thus having a logic storage function. The optical computing basic unit is prepared through the following process: Vertical micromirror structure manufacturing steps: Deep etching is performed on the upper surface of the wafer, or a structural layer is deposited first and then photolithographic etching is performed to form a vertical micromirror structure. The vertical micromirror structure includes a light-transmitting structure, a movable structure, and a fixed structure. The light-transmitting structure has a light-transmitting window in the middle. Vertical sidewall planarization step: The vertical sidewalls of the vertical micromirror structure are planarized and polished. Insulating layer deposition step: An insulating layer is deposited between the vertical micromirror structure and the wafer substrate to achieve electrical insulation isolation; Lead interconnect fabrication steps: Deposit a metal layer on a vertical micromirror structure to form lead interconnects; In the case where the vertical micromirror structure is a cantilever beam, the light-transmitting structure is a light-transmitting layer, the movable structure is a cantilever beam layer, and the fixed structure is a fixed layer. The light-transmitting layer has a window for light transmission in the middle and metallized electrodes on both sides. The cantilever beam layer is disposed between the window of the light-transmitting layer and the fixed layer. By applying fixed static voltages 0 and +V to the cantilever beam layer and the fixed layer respectively, an N-type optical logic switch is formed. By applying fixed static voltages +V and 0 to the cantilever beam layer and the fixed layer respectively, a P-type optical logic switch is formed. Applying a static voltage of 0 or +V to the light-transmitting layer keeps the cantilever beam layer stationary or causes it to deflect, thereby realizing the opening and closing of the optical path. When the vertical micromirror structure is a comb-type structure, the light-transmitting structure is a front-driven comb, the movable structure includes a vertical micromirror and micromirror comb teeth, and the fixed structure includes a front-driven comb tooth, a rear-driven comb tooth, and a fixed light-transmitting layer. The fixed light-transmitting layer has a window for light transmission in the middle and metallized electrodes on both sides. The vertical micromirror is disposed behind the window, and the front-driven comb tooth, micromirror comb tooth, and rear-driven comb tooth are arranged sequentially behind the vertical micromirror. By applying fixed static voltages 0 and +V to the micromirror comb tooth and the rear-driven comb tooth respectively, an N-type optical logic switch is formed. By applying fixed static voltages +V and 0 to the micromirror comb tooth and the rear-driven comb tooth respectively, a P-type optical logic switch is formed. Applying a static voltage of 0 or +V to the front-driven comb tooth causes the micromirror comb tooth to drive the vertical micromirror to remain stationary or move, thereby realizing the switching on and off of the optical path.

2. The optical computing chip according to claim 1, characterized in that, The specific steps for manufacturing the vertical micromirror structure are as follows: When using the deep etching method, a vertical micromirror structure including a light-transmitting layer, a cantilever beam layer, and a fixing layer is etched on the upper surface of the wafer through a deep etching process. When using deposition methods, a structural layer is grown on the upper surface of a wafer by epitaxial growth, chemical vapor deposition of polycrystalline silicon, silicon dioxide, or deposition of thick photoresist, and then photolithography and etching are used to form a vertical micromirror structure including a light-transmitting layer, a cantilever beam layer, and a fixing layer.

3. The optical computing chip according to claim 1, characterized in that, In the vertical sidewall planarization step, the vertical micromirror structure is immersed in a mixed solution of potassium hydroxide or tetramethylammonium hydroxide and isopropanol to form a vertical sidewall with a roughness at the nanoscale.

4. The optical computing chip according to claim 1, characterized in that, In the insulating layer deposition step, silicon dioxide insulating layers are deposited on the vertical micromirror structure and wafer surface using inductively coupled plasma chemical vapor deposition or plasma-enhanced chemical vapor deposition.

5. The optical computing chip according to claim 1, characterized in that, The lead interconnect manufacturing steps include: Photoresist is applied to the surface of the wafer by spraying, and then exposed and developed to form a pattern of interconnected leads. Deposit a metal layer on the upper surface of the wafer; The metal layer is stripped and the photoresist is removed in acetone, ethanol, or a photoresist remover to form lead interconnects.

6. The optical computing chip according to claim 1, characterized in that, The optical path control optical components include lenses, mirrors, apertures, filters, interferometers, and optical switches.

7. The optical computing chip according to claim 1, characterized in that, If the vertical micromirror structure is a comb-type structure, then after the lead interconnect manufacturing step, the wafer is immersed in hydrofluoric acid to remove the buried oxide layer silicon dioxide in the silicon-on-insulator wafer or the sacrificial layer deposited on the single crystal silicon wafer, to obtain a suspended comb-type structure.

8. The optical computing chip according to claim 1, characterized in that, If the vertical micromirror structure is a comb-type structure, then before the vertical micromirror structure manufacturing step, a suspension groove is etched on the back side of the wafer, and the back side of the wafer is anodicly bonded to a glass wafer containing potassium and sodium ions, and the front side of the wafer is thinned and polished.

Images