Estimation method of counter count value, chip, device, equipment and storage medium

Abstract

This application provides a method, apparatus, electronic device, and computer-readable storage medium for estimating a counter value. The method includes: when the chip is woken up, acquiring a first counter value Cset of the chip during the current deep sleep period. n The chip's second counter value Co before entering this deep sleep state, and the error compensation value K; K is a value determined based on the error present when the chip was last woken from deep sleep mode; according to Cset n The third count value Cwork is determined by the frequencies of the deep sleep clock (Fdeep) and the master clock (Fwork). n ; Determine Cwork n The sum of Co and the count of the second counter during this wake-up is obtained. This application introduces an error compensation mechanism to reduce or eliminate the accumulation rate of errors, thereby reducing the risk of inaccurate count calculations due to error accumulation and improving the accuracy of the estimated count.

Description

Technical Field

[0001] This application relates to the field of data processing technology, and more specifically, to a method for estimating the count value of a counter, a chip, a device, an equipment, and a storage medium. Background Technology

[0002] As the required functionalities become increasingly diverse, the data processing demands on CPUs are also constantly increasing, leading to a continuous rise in the energy consumption of chips. To reduce chip power consumption, the field of digital ICs (Integrated Circuits) has introduced low-power design. One strategy for achieving low-power chip design is to put the chip into a deep sleep mode when idle. In this mode, the chip loses power, the system master clock is no longer present, and the system only retains a low-power clock, namely the deep sleep clock. The frequency of the deep sleep clock is relatively low, typically on the order of a few MHz or tens of kHz. Operating at a low-frequency clock can significantly reduce system power consumption.

[0003] After the chip enters deep sleep mode, the counter in the PUB SYS (public system, the system that loses power in low-power mode) will also become an "x" state (an unknown state of a level signal) and will stop counting. After the chip wakes up and powers on, the counter value in the PUB SYS will become the initial value after power-on and start counting again. However, in some special scenarios, such as when it is necessary to continuously count a certain event that includes a sub-event of deep sleep, the counter value needs to be restored to the count value before deep sleep plus the count value at the time of deep sleep after waking up from deep sleep.

[0004] To address this, designers employ circuitry to compensate the counter value after waking from deep sleep. For verification personnel, this requires building a reference model to verify whether the compensated counter value matches the expected value. Current reference models typically simply round the counter value during deep sleep, ignoring the decimal part. However, as the chip repeatedly wakes up and enters deep sleep mode, the ignored decimal part accumulates, ultimately leading to inaccurate calculations by the reference model and consequently, inaccurate estimated counter values ​​upon chip wake-up. Summary of the Invention

[0005] The purpose of this application is to provide a method, apparatus, electronic device, and computer-readable storage medium for estimating counter count values, so as to improve the accuracy of the estimated count values ​​when the chip is woken up.

[0006] This application provides a method for estimating a counter value, including: when the chip is woken up, obtaining the first count value Cset of the first counter of the chip during the current deep sleep period.n The chip has a second counter value Co and an error compensation value K before entering this deep sleep state; wherein: the first counter is a counter that counts during deep sleep and is triggered by the deep sleep clock; the second counter is a counter that counts triggered by the chip's main clock when the chip is in the wake-up state; K is a value determined based on the error present when the chip was last woken up from deep sleep mode; according to Cset n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n The Cwork n To estimate the count value obtained if the second counter counted normally during this deep sleep period; to determine the Cwork n The sum of Co and the count of the second counter during this wake-up is obtained.

[0007] In the above implementation process, by introducing an error compensation value K determined based on the error present when the chip was last woken from deep sleep mode, the estimated count value Cwork that the second counter should obtain if it counts normally during the current deep sleep period is calculated. n By adding the error compensation value K, the error existing in the previous round of calculation is compensated in each round of calculation, so that the accumulation rate of error is reduced or eliminated, thereby reducing the risk of inaccurate count value calculation due to error accumulation and improving the accuracy of the count value estimated when the chip wakes up.

[0008] Further, obtaining the error compensation value K includes: obtaining the first count value Cset of the first counter during the chip's last deep sleep period. n-1 The estimated count value Cwork of the second counter during the last deep sleep of the chip. n-1 According to the Fdeep, the Fwork, and the Cset n-1 and the aforementioned Cwork n-1 Determine K.

[0009] In the above implementation, the first count value Cset of the first counter during the previous deep sleep period is used. n-1 Fdeep can obtain the duration of the last deep sleep, and Cwork can be obtained by estimating the count value of the second counter during the last deep sleep. n-1 And Fwork can be obtained according to the estimated count value Cwork n-1The calculation corresponds to the counting duration. The difference between the two durations reflects the error that existed when the chip was woken up from deep sleep mode last time. The error compensation value K determined in this way is more in line with reality, so as to achieve a better effect of eliminating errors and improve the accuracy of the count value estimated when the chip wakes up.

[0010] Furthermore, based on the Fdeep, the Fwork, and the Cset n-1 and the aforementioned Cwork n-1 Determining K includes: according to the formula K = (Cwork) n-1 / Fwork-Cset n-1 / Fdeep) / Fdeep determines the K.

[0011] In the above implementation, Cset n-1 / Fdeep represents the duration of the last deep sleep episode. Cwork n-1 / Fwork is represented according to the estimated count value Cwork n-1 The calculated counting duration, therefore Cwork n-1 / Fwork-Cset n-1 / Fdeep is the value calculated after the last deep sleep session ended. n-1 The duration error exists in the time, and dividing this duration error by Fdeep converts the duration error into an error in the count value. The error in the count value is then used as the error compensation value K to compensate for the estimated count value, which can effectively compensate for the estimated count value and improve the accuracy of the estimated count value when the chip wakes up.

[0012] Furthermore, according to the Cset n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n The process includes: determining the Cwork according to the following formula n : In this context, int represents the integer operation.

[0013] In the above implementation method, This means that, assuming the second counter continues counting normally during this deep sleep without considering errors, K represents the count value. Adding K to this value compensates for the error in the count, making the estimated count more accurate. Furthermore, the above implementation performs the rounding operation only in the final step, thus avoiding errors caused by rounding during the calculation process, further improving the accuracy of the estimated count value when the chip wakes up.

[0014] Further, the error compensation value K is obtained, and according to the Cset... n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n The process includes: determining the Cwork according to the following formula n : In this context, int represents the integer operation.

[0015] In the above implementation method, That is (Cwork) n-1 / Fwork-Cset n-1 / Fdeep) / Fdeep, that is, using the above formula, the error compensation value K is calculated simultaneously, and according to the Cset... n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n The process is streamlined, and since the rounding operation is only performed once at the end, errors caused by rounding during the calculation process can be avoided, thereby further improving the accuracy of the estimated count value when the chip wakes up.

[0016] Furthermore, based on the Fdeep, the Fwork, and the Cset n-1 and the aforementioned Cwork n-1 Determining K includes: according to the formula K = Cwork n-1 / Fwork-Cset n-1 / Fdeep determines the K.

[0017] In the above implementation, Cset n-1 / Fdeep represents the duration of the last deep sleep episode. Cwork n-1 / Fwork is represented according to the estimated count value Cwork n-1 The calculation corresponds to the counting duration, therefore Cwork n-1 / Fwork-Cset n-1 / Fdeep is the value calculated after the last deep sleep session ended. n-1 The duration error exists in the calculation. By introducing this duration error as an error compensation value K into the current calculation process, the duration error left over from the previous calculation can be compensated, thereby effectively compensating for the estimated count value and improving the accuracy of the estimated count value when the chip wakes up.

[0018] Furthermore, according to the Cset nThe frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n The process includes: determining the Cwork according to the following formula n : In this context, int represents the integer operation.

[0019] In the above implementation method, This refers to the duration of this deep sleep, while K is the value used to calculate Cwork. n-1 The compensation value for the duration error that exists in the time, then This compensates for time-related errors, resulting in more accurate estimated counts. Furthermore, the above implementation performs the rounding operation only in the final step, thus avoiding errors caused by rounding during the calculation process, further improving the accuracy of the estimated counts during chip wake-up.

[0020] Further, the error compensation value K is obtained, and according to the Cset... n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n The process includes: determining the Cwork according to the following formula n : In this context, int represents the integer operation.

[0021] In the above implementation method, That is and The sleep duration of this deep sleep device, That is, calculating Cwork after being awakened from the last deep sleep. n-1 The time error that exists in the duration, therefore This refers to the actual deep sleep duration used in the calculation after considering error compensation. Therefore, the above formula essentially simultaneously calculates the error compensation value K and the value based on the stated Cset. n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n The process is streamlined, and since the rounding operation is only performed once at the end, errors caused by rounding during the calculation process can be avoided, thereby further improving the accuracy of the estimated count value when the chip wakes up.

[0022] Furthermore, after obtaining the count value of the second counter at the time of this wake-up, the method further includes: reading the actual count value of the second counter from the chip; comparing the obtained count value of the second counter with the actual count value; and determining whether the circuit design of the chip is correct based on the comparison result.

[0023] In the above implementation, the count value estimated by the method provided in the embodiments of this application is compared with the actual count value actually written in the second counter in the chip. The actual count value actually written in the second counter is a numerical recovery implemented by the circuit in the chip. Therefore, based on the comparison result, the correctness of the chip circuit design can be verified. Since the count value estimated by the method provided in the embodiments of this application is more accurate than the calculation result output by the traditional reference model, the reliability of the verification can be improved to a certain extent.

[0024] Furthermore, all data in the method are fixed-point numbers; after obtaining the count value of the second counter at the time of this wake-up, the method further includes: writing the count value into the second counter of the chip.

[0025] In the above implementation, by setting all data to fixed-point numbers, the method provided in this application embodiment can be described using a hardware description language such as Verilog (a hardware description language) and implemented through hardware circuits, that is, it can be implemented inside the chip. By writing the estimated count value of the second counter at the time of this wake-up into the second counter of the chip, the chip can recover the count value of the second counter. Since the accuracy of the count value estimated by the chip at the time of wake-up is improved, the reliability of the chip's recovery of the count value of the second counter is also improved.

[0026] This application embodiment also provides a chip, including: a first counter, a second counter, and a control circuit, wherein the control circuit is electrically connected to the first counter and the second counter respectively; the first counter is a counter that counts during deep sleep, and the first counter is triggered by a deep sleep clock; the second counter is a counter that counts triggered by the chip's main clock when the chip is in a wake-up state; the control circuit is used to obtain the first count value Cset of the first counter of the chip during the current deep sleep period when the chip is woken up. n The chip, before entering this deep sleep state, uses the second counter's second count value Co and the error compensation value K, and according to the Cset... n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork.n and determine the Cwork n The sum of K and Co is used to obtain the count value of the second counter during this wake-up, and the obtained count value of the second counter during this wake-up is written into the second counter; wherein, K is a value determined based on the error present when the chip was woken up from deep sleep mode last time; Cwork n This is the estimated count value obtained if the second counter counts normally during this deep sleep period.

[0027] Furthermore, the control circuit includes an arithmetic circuit, which is used to perform calculations on the following formulas: In this context, int represents the integer operation.

[0028] In the above implementation method, by using the formula By implementing this through a computational circuit, the chip can recover the count value in the second counter based on this formula. This formula introduces an error compensation value, which is calculated after the last deep sleep session when Cwork is awakened. n-1 The error in the count value is addressed by rounding down only once at the end, thus avoiding errors caused by rounding during the calculation process. Therefore, the accuracy of the count value recovered in the second counter when the chip is woken up can be effectively improved by the above implementation method.

[0029] This application embodiment also provides a counter count value estimation device, including: an acquisition module, used to acquire a first count value Cset of a first counter of the chip during the current deep sleep when the chip is woken up. n The chip's second counter has a second count value Co before entering this deep sleep state; wherein: the first counter is a counter that counts during deep sleep, and the first counter is triggered by the deep sleep clock; the second counter is a counter that counts triggered by the chip's main clock when the chip is in the awake state; the calculation module is used to obtain the error compensation value K, and according to the Cset n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n The Cwork n The estimated count value is the value obtained if the second counter counts normally during this deep sleep period; K is a value determined based on the error present when the chip was last woken from deep sleep mode; the calculation module is also used to determine the Cwork. n The sum of Co and the count of the second counter during this wake-up is obtained.

[0030] This application also provides an electronic device, including a processor and a memory; the processor is used to execute one or more programs stored in the memory to implement any of the above-described methods for estimating the counter count value.

[0031] This application also provides a computer-readable storage medium storing one or more programs that can be executed by one or more processors to implement any of the above-described methods for estimating counter count values. Attached Figure Description

[0032] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 A flowchart illustrating a method for estimating the count value of a counter provided in an embodiment of this application;

[0034] Figure 2 A schematic diagram illustrating a duration error Δ provided in an embodiment of this application;

[0035] Figure 3 A schematic diagram of a chip structure provided in an embodiment of this application;

[0036] Figure 4 This is a schematic diagram of the structure of a counter value estimation device provided in an embodiment of this application;

[0037] Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0038] The technical solution of this application will now be described in conjunction with the embodiments and accompanying drawings.

[0039] To improve the accuracy of the estimated count value during chip wake-up, this application provides a method for estimating the counter count value. See also... Figure 1 As shown, Figure 1 This is a flowchart illustrating the method for estimating the counter count value provided in the embodiments of this application, including:

[0040] S101: When the chip is woken up, obtain the first count value Cset of the first counter during the current deep sleep period. nThe chip's second counter value Co and error compensation value K are the second count value Co of the second counter before entering this deep sleep.

[0041] In this embodiment, the chip includes a first counter and a second counter. The first counter is a counter that counts during deep sleep and is triggered by the deep sleep clock; the second counter is a counter that counts when the chip is in a wake-up state and is triggered by the chip's main clock.

[0042] In this embodiment of the application, the first count value Cset n This information can be read from the first counter when the chip is woken up. The counter in the first counter is reset to 0 before or when the chip enters deep sleep mode.

[0043] In this embodiment of the application, when the chip enters a deep sleep state, the count value in the second counter (i.e., the second count value Co) can be stored in the non-volatile memory in the chip so that the second count value Co can be obtained from the non-volatile memory when the chip wakes up.

[0044] It should be noted that the second count value Co can also be read from the second counter to an external device outside the chip when the chip enters a deep sleep state, and then obtained from the external device after the chip wakes up.

[0045] In this embodiment, the error compensation value K is a value determined based on the error present when the chip was last woken from deep sleep mode.

[0046] In one feasible embodiment of this application, the first count value Cset of the first counter during the chip's last deep sleep period can be obtained. n-1 And obtain the estimated count value of the second counter of the chip during the last deep sleep, Cwork. n-1 Then based on Fdeep, Fwork, and Cset n-1 and Cwork n-1 Determine the error compensation value K.

[0047] For example, it can be done according to the formula K = (Cwork) n-1 / Fwork-Cset n-1 / Fdeep) / Fdeep determines the error compensation value K.

[0048] Understandable, Cset n-1 This is the first count value of the first counter during the chip's last deep sleep period. The first counter is triggered based on the deep sleep clock, where Fdeep is the frequency of the deep sleep clock. Therefore, Cset...n-1 / Fdeep represents the duration of the last deep sleep episode. Correspondingly, Cwork... n-1 This is an estimated count value of the second counter during the chip's last deep sleep period. The second counter is triggered based on the chip's master clock, and Fwork is the frequency of the master clock; therefore, Cwork... n-1 / Fwork represents the number of cells in the previous deep sleep period, according to the estimated count value Cwork. n-1 The calculated counting duration, therefore Cwork n-1 / Fwork-Cset n-1 / Fdeep is the value calculated after the last deep sleep session ended. n-1 The duration error △ exists in the time. See also Figure 2 As shown, assuming that both the first and second counters are triggered by the rising edge of their respective clocks (i.e., counting occurs when the rising edge arrives), the different frequencies of the deep sleep clock and the main clock cause Cwork to... n-1 / Fwork and Cset n-1 There may be a difference between / Fdeep, which is the duration error △. △ / Fdeep can convert the duration error into an error in the count value. This error in the count value is used as the error compensation value K to compensate for the error, which can effectively compensate for the estimated count value and improve the accuracy of the estimated count value when the chip wakes up.

[0049] Alternatively, it can be calculated using the formula K = Cwork. n-1 / Fwork-Cset n-1 / Fdeep determines the error compensation value K.

[0050] As mentioned earlier, Cwork n-1 / Fwork-Cset n-1 / Fdeep is the value calculated after the last deep sleep session ended. n-1 The duration error exists in the calculation. By introducing this duration error as an error compensation value K into the current calculation process, the duration error left over from the previous calculation can be compensated, thereby effectively compensating for the estimated count value and improving the accuracy of the estimated count value when the chip wakes up.

[0051] In this embodiment of the application, the first count value Cset n-1 The data can be stored in the chip's on-chip non-volatile memory when the chip is woken up, and then retrieved from the non-volatile memory during the current computation. Similarly, Cwork... n-1The calculation can be performed on the chip once it is woken up and then stored in the chip's non-volatile memory, so that it can be retrieved from the non-volatile memory during the current calculation.

[0052] In addition, Cset n-1 and Cwork n-1 Alternatively, the Cset can be stored in an external device after the chip is woken up once, and then retrieved from that external device during the current calculation. n-1 and Cwork n-1 .

[0053] In another feasible embodiment of this application, the previous calculation of Cwork can also be obtained. n-1 During the rounding process, the decimal part discarded during the rounding operation is used as the error compensation value K for this calculation.

[0054] It should be noted that when the chip wakes up from deep sleep mode for the first time, since there is no record of the previous deep sleep period, Cset can be set at this time. n-1 and Cwork n-1 The value can be 0, or the value for K can be 0.

[0055] S102: According to the Cset n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n .

[0056] In this embodiment of the application, Cwork n This is the estimated count value if the second counter had functioned normally during this deep sleep period. It's understandable that, since the count value in the counter must be an integer, Cwork... n It is an integer. When Cwork is calculated... n When the number has a decimal, it needs to be rounded down.

[0057] In this embodiment of the application, it can be based on Cset n Fwork and Fdeep determine the count value of the second counter without error compensation, which can be achieved through Cset. n / Fdeep*Fwork obtains the count value of the second counter without error compensation.

[0058] Considering the error compensation value, if K = (Cwork) n-1 / Fwork-Cset n-1 / Fdeep) / Fdeep, where K equals the value of Cwork calculated after the last deep sleep awakening. n-1The error in the count value can be calculated using the formula Cwork. n =Cset n / Fdeep*Fwork+K yields the third count value Cwork n .

[0059] At this time Cwork n It should be an integer (the value in the counter can only be an integer), therefore we have In this context, int represents the integer operation.

[0060] In this embodiment, the error compensation value K is obtained, and according to Cset n The third count value Cwork is determined by the frequencies of the deep sleep clock (Fdeep) and the master clock (Fwork). n The process can be integrated into the formula This is implemented in the final step of the calculation. Since the rounding operation is performed only once at the end, errors caused by rounding during the calculation process can be avoided, thereby further improving the accuracy of the estimated count value when the chip wakes up.

[0061] Of course, in some embodiments of this application, it can also be implemented in multiple steps, for example, it can be implemented first according to formula (Cwork) n-1 / Fwork-Cset n-1 The error compensation value K is obtained by obtaining the error compensation value K from ( / Fdeep) / Fdeep, and then Cwork is calculated according to the formula. n =Cset n / Fdeep*Fwork+K calculates the unrounded Cwork. n Then perform a rounding operation to obtain the final Cwork. n .

[0062] If K = Cwork n-1 / Fwork-Cset n-1 / Fdeep, where K equals the value of Cwork calculated after the last deep sleep awakening. n-1 The duration error that exists can be addressed using the formula Cwork. n =(Cset) n / Fdeep+K)*Fwork yields the third count value Cwork n Among them, Cset n / Fdeep represents the duration of the current deep sleep cycle, while K represents the duration of Cwork calculated after the device was awakened from the previous deep sleep cycle. n-1 The duration error that exists in the time, therefore Cset n / Fdeep+K is the actual deep sleep duration used in the calculation after considering error compensation. Multiplying this duration by the frequency Fwork of the master clock yields the count value that the second counter of the deep sleep device should count, i.e., the third count value Cwork. n .

[0063] At this time

[0064] Cwork n It should be an integer, therefore we have In this context, int represents the integer operation.

[0065] In this embodiment, the error compensation value K is obtained, and according to Cset n The third count value Cwork is determined by the frequencies of the deep sleep clock (Fdeep) and the master clock (Fwork). n The process can be integrated into the formula This is implemented in the step of performing the calculation. Since the rounding operation is only performed once at the end, errors caused by rounding during the calculation process can be avoided, thereby further improving the accuracy of the estimated count value when the chip wakes up. Of course, in this embodiment, it can also be implemented in multiple steps; for example, it can be implemented first according to the formula Cwork. n-1 / Fwork-Cset n-1 / Fdeep obtains the error compensation value K, and then follows the formula Cset n / Fdeep+K yields the actual deep sleep duration M used in the calculation after considering error compensation. Then, M*Fwork is calculated to obtain the unrounded Cwork. n Then perform a rounding operation to obtain the final Cwork. n .

[0066] S103: Determine Cwork n The sum of Co and Co is used to obtain the count value of the second counter during this wake-up.

[0067] In this embodiment of the application, Cwork is referred to as n The sum of Co and Co is Cn.

[0068] In some scenarios, the methods described in this application embodiment can be applied to electronic devices outside the chip. For example, in a chip verification scenario, the verification device can use the above method to obtain Cn. After obtaining the count value of the second counter during this wake-up, the verification device can read the actual count value in the second counter from the chip, compare the obtained count value Cn of the second counter with the actual count value, and then determine whether the circuit design of the chip is correct based on the comparison result.

[0069] It is understandable that the chip incorporates relevant circuitry to restore the count value of the second counter after wake-up. By comparing Cn with the read-out actual count value, the correctness of the chip's circuit design can be verified. For example, if the deviation between Cn and the actual count value is within a preset acceptable range, a verification result indicating that the chip's circuit design is correct can be output; if the deviation exceeds the preset acceptable range, a verification result indicating that the chip's circuit design is incorrect can be output. The preset acceptable range can be set according to the chip's design requirements, for example, it can be set to 0. Since the count value estimated using the method provided in this application is more accurate than the count value estimated in traditional methods without considering error accumulation, the reliability of the verification can be improved to a certain extent.

[0070] In some implementations, the above method can also be directly applied to the chip to restore the count value of the second counter after the chip is woken up. For example, all data in this solution (including but not limited to Co, Cset) can be configured. n ,Cset n-1 Cwork n Cwork n-1 The format (e.g., Fdeep, Fwork, etc.) is a fixed-point number, allowing the method provided in this application embodiment to be described using hardware description languages ​​such as Verilog and implemented through hardware circuits. After obtaining Cn through hardware circuit implementation, Cn can be written into the second counter to restore the count value of the second counter. Furthermore, since the accuracy of the estimated count value during chip wake-up is improved, the reliability of the chip's restoration of the second counter's count value is also improved.

[0071] It is understood that, for the method provided in the embodiments of this application, the above formula can be implemented by a computational circuit. For example, formula... formula The multipliers, adders, and other arithmetic units can be connected sequentially according to their respective operational logic. The specific implementation method is not limited in the embodiments of this application.

[0072] Based on the same inventive concept, this application also provides a chip, such as... Figure 3 As shown, the chip includes a first counter, a second counter, and a control circuit. The control circuit is electrically connected to both the first counter and the second counter. The first counter is a counter that counts during deep sleep and is triggered by the deep sleep clock. The second counter is a counter that counts when the chip is in a wake-up state and is triggered by the chip's main clock. The control circuit is used to acquire the first count value Cset of the first counter during the current deep sleep period when the chip is woken up. n The chip, before entering this deep sleep state, uses the second counter's second count value Co and the error compensation value K, and according to the Cset... n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n and determine the Cwork n The sum of K and Co is used to obtain the count value of the second counter during this wake-up, and the obtained count value of the second counter during this wake-up is written into the second counter; wherein, K is a value determined based on the error present when the chip was woken up from deep sleep mode last time; Cwork n This is the estimated count value obtained if the second counter counts normally during this deep sleep period.

[0073] In this embodiment, the chip may further include non-volatile memory for storing data required for computation, such as Fdeep, Fwork, and Cset. n ,Cset n-1 Cwork n-1 Co, etc.

[0074] In this embodiment, the control circuit can be an in-chip circuit capable of executing relevant instructions and performing processing. The function of the control circuit can be executed by receiving instructions from the upper layer.

[0075] In this embodiment of the application, the control circuit may include an arithmetic circuit, which is used to perform calculations on the following formulas: Alternatively, the operational circuit is used to perform calculations on the following formulas:

[0076]

[0077] Based on the same inventive concept, this application also provides a counter value estimation device 400 in its embodiments. Please refer to... Figure 4 As shown, Figure 4 It shows the use of Figure 1 The method shown includes a counter value estimation device. It should be understood that the specific functions of device 400 are described above; to avoid repetition, detailed descriptions are omitted here. Device 400 includes at least one software function module that can be stored in memory or embedded in the operating system of device 400 in the form of software or firmware. Specifically:

[0078] See Figure 4 As shown, the device 400 includes:

[0079] The acquisition module 401 is used to acquire the first count value Cset of the first counter of the chip during the current deep sleep when the chip is woken up. n The second count value Co of the second counter before the chip enters this deep sleep state; wherein: the first counter is a counter that counts during deep sleep, and the first counter is triggered by the deep sleep clock; the second counter is a counter that is triggered by the main clock of the chip when the chip is in the awake state;

[0080] Calculation module 402 is used to obtain the error compensation value K, and according to the Cset n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n The Cwork n The value is the estimated count value obtained if the second counter counts normally during this deep sleep period; K is a value determined based on the error present when the chip was last woken from deep sleep mode.

[0081] The calculation module 402 is also used to determine the Cwork. n The sum of Co and the count of the second counter during this wake-up is obtained.

[0082] In one feasible embodiment of this application, the calculation module 402 is specifically used to obtain the first count value Cset of the first counter of the chip during the last deep sleep. n-1 The estimated count value Cwork of the second counter during the last deep sleep of the chip. n-1 And according to the Fdeep, the Fwork, and the Cset n-1 and the aforementioned Cwork n-1 Determine K.

[0083] In one example embodiment of this feasible implementation, the calculation module 402 is specifically used to calculate according to the formula K = (Cwork) n-1 / Fwork-Csetn-1 / Fdeep) / Fdeep determines the K.

[0084] In the above example implementation, the calculation module 402 is specifically used to determine the Cwork according to the following formula. n :

[0085]

[0086] In this context, int represents the integer operation.

[0087] In one example embodiment of this feasible implementation, the calculation module 402 is specifically used to calculate according to the formula K = Cwork. n-1 / Fwork-Cset n-1 / Fdeep determines the K.

[0088] In the above example implementation, the calculation module 402 is specifically used to determine the Cwork according to the following formula. n :

[0089]

[0090] In this context, int represents the integer operation.

[0091] In one feasible embodiment of this application, the device 400 further includes a verification module, which is used to read the actual count value of the second counter from the chip after the calculation module 402 obtains the count value of the second counter during the current wake-up, and compares the obtained count value of the second counter with the actual count value, and determines whether the circuit design of the chip is correct based on the comparison result.

[0092] It should be understood that, for the sake of brevity, some of the content described in Embodiment 1 will not be repeated in this embodiment.

[0093] Based on the same inventive concept, this application also provides an electronic device, see [link to relevant documentation]. Figure 5 As shown, it includes a processor 501 and a memory 502. Wherein:

[0094] The processor 501 is used to execute one or more programs stored in the memory 502 to implement the above-described method for estimating the counter count value.

[0095] It is understandable that processor 501 can be a processor core or processor chip (such as a CPU), or other circuits capable of program configuration and execution. Memory 502 can be RAM (Random Access Memory), ROM (Read-Only Memory), flash memory, etc., but this is not a limitation.

[0096] It's understandable. Figure 5 The structure shown is for illustrative purposes only; the electronic device may also include components that are more advanced than those shown. Figure 5 The more or fewer components shown, or having the same Figure 5 Different configurations are shown. For example, it may also have an internal communication bus for communication between the processor 501 and the memory 502; or it may have an external communication interface, such as a USB (Universal Serial Bus) interface, a CAN (Controller Area Network) bus interface, etc.; or it may have an information display component such as a display screen, but this is not a limitation.

[0097] Based on the same inventive concept, this embodiment also provides a computer-readable storage medium, such as a floppy disk, optical disk, hard disk, flash memory, USB flash drive, SD (Secure Digital Memory Card), MMC (Multimedia Card), etc., in which one or more programs implementing the above steps are stored. These one or more programs can be executed by one or more processors to implement the above-described method for estimating the counter value. Further details will not be elaborated here.

[0098] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some communication interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0099] Furthermore, the units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0100] Furthermore, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0101] In this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, without necessarily requiring or implying any such actual relationship or order between these entities or operations.

[0102] In this article, "multiple" refers to two or more.

[0103] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A method for estimating the count value of a counter, characterized in that, include: When the chip is awakened, the first count value Cset of the first counter of the chip during this deep sleep period is obtained. n The chip has a second counter value Co and an error compensation value K before entering this deep sleep state; wherein: the first counter is a counter that counts during deep sleep and is triggered by the deep sleep clock; the second counter is a counter that counts triggered by the chip's main clock when the chip is in the wake-up state; and K is a value determined based on the error present when the chip was last woken up from the deep sleep mode. According to the Cset n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n The Cwork n This is the estimated count value obtained if the second counter counts normally during this deep sleep period; Determine the Cwork n The sum of Co and the count value of the second counter during this wake-up is obtained. Obtaining the error compensation value K includes: obtaining the first count value Cset of the first counter during the chip's last deep sleep period. n-1 The estimated count value Cwork of the second counter during the last deep sleep of the chip. n-1 According to the formula K=(Cwork) n-1 / Fwork- Cset n-1 / Fdeep) / Fdeep determines K, or K is determined according to the formula K=Cwork n-1 / Fwork- Cset n-1 / Fdeep determines the K; According to the Cset n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n ,include: In the K=(Cwork n-1 / Fwork- Cset n-1 In the case of / Fdeep) / Fdeep, according to the formula , or formula Determine the Cwork n ; In the K=Cwork n-1 / Fwork- Cset n-1 In the case of / Fdeep, according to the formula , or formula Determine the Cwork n ; In this context, int represents the integer operation.

2. The method as described in claim 1, characterized in that, After obtaining the count value of the second counter at the time of this wake-up, the method further includes: Read the actual count value from the second counter from the chip; The obtained count value of the second counter is compared with the actual count value; The comparison results will determine whether the circuit design of the chip is correct.

3. The method as described in claim 1, characterized in that, All data in the method are fixed-point numbers; After obtaining the count value of the second counter at the time of this wake-up, the method further includes: The count value is written into the second counter of the chip.

4. A chip, characterized in that, include: The system comprises a first counter, a second counter, and a control circuit, wherein the control circuit is electrically connected to the first counter and the second counter, respectively. The first counter is a counter that counts during deep sleep, and the first counter is triggered to count by a deep sleep clock; The second counter is a counter that is triggered by the main clock of the chip when the chip is in a wake-up state; The control circuit is used to acquire the first count value Cset of the first counter of the chip during the current deep sleep when the chip is woken up. n The chip, before entering this deep sleep state, uses the second counter's second count value Co and the error compensation value K, and according to the Cset... n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n and determine the Cwork n The sum of Co and the count value of the second counter during this wake-up is obtained, and the obtained count value of the second counter during this wake-up is written into the second counter; Wherein, K is a value determined based on the error present when the chip was last woken from deep sleep mode; Cwork n This is the estimated count value obtained if the second counter counts normally during this deep sleep period; The method for obtaining the error compensation value K includes: obtaining the first count value Cset of the first counter during the last deep sleep of the chip. n-1 The estimated count value Cwork of the second counter during the last deep sleep of the chip. n-1 ; The control circuit includes an arithmetic circuit, which performs the following operations: In K=(Cwork) n-1 / Fwork- Cset n-1 In the case of / Fdeep) / Fdeep, according to the formula , or formula The calculation yields the Cwork. n ; In K=Cwork n-1 / Fwork- Cset n-1 In the case of / Fdeep, according to the formula , or formula The calculation yields the Cwork. n ; In this context, int represents the integer operation.

5. A device for estimating the count value of a counter, characterized in that, include: The acquisition module is used to acquire the first count value Cset of the first counter of the chip during the current deep sleep when the chip is woken up. n The second count value Co of the second counter before the chip enters this deep sleep state; wherein: the first counter is a counter that counts during deep sleep, and the first counter is triggered by the deep sleep clock; the second counter is a counter that is triggered by the main clock of the chip when the chip is in the awake state; The calculation module is used to obtain the error compensation value K, and to calculate the value based on the Cset. n The frequency of the deep sleep clock, Fdeep, and the frequency of the master clock, Fwork, determine the third count value Cwork. n The Cwork n The value is the estimated count value obtained if the second counter counts normally during this deep sleep period; K is a value determined based on the error present when the chip was last woken from deep sleep mode. The calculation module is also used to determine the Cwork. n The sum of Co and the count value of the second counter during this wake-up is obtained. The calculation module is specifically used to: obtain the first count value Cset of the first counter during the last deep sleep of the chip. n-1 The estimated count value Cwork of the second counter during the last deep sleep of the chip. n-1 According to the formula K=(Cwork) n-1 / Fwork- Cset n-1 / Fdeep) / Fdeep determines K, or K is determined according to the formula K=Cwork n-1 / Fwork- Cset n-1 / Fdeep determines the K; and, in the case where K = (Cwork) n-1 / Fwork- Cset n-1 In the case of / Fdeep) / Fdeep, according to the formula , or formula Determine the Cwork n ; in the K=Cwork n-1 / Fwork- Cset n-1 In the case of / Fdeep, according to the formula , or formula Determine the Cwork n ; where int represents the integer operation.

6. An electronic device, characterized in that, include: Processor and memory; The processor is used to execute one or more programs stored in the memory to implement the method as described in any one of claims 1-3.

7. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores one or more programs, which can be executed by one or more processors to implement the method as described in any one of claims 1-3.

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