A solid state disk inspection method, device, electronic equipment and storage medium

Abstract

The application discloses a solid state disk checking method and device, electronic equipment and a storage medium. The method comprises the following steps: performing full-disk write operation and full-disk read operation on a solid state disk; wherein the solid state disk comprises a plurality of channels, each channel comprises a plurality of chip enable signals; obtaining a plurality of bit error rates returned by the full-disk read operation, and counting the distribution of the bit error rates corresponding to different chip enable signals of different channels; and checking the storage medium chip in the solid state disk according to the distribution of the bit error rates corresponding to different chip enable signals of different channels. The solid state disk checking method provided by the application checks the bit error rates returned by the read state in the full-disk write operation and full-disk read operation test process of the solid state disk, checks the storage medium chip in the solid state disk through the distribution of the bit error rates, judges whether the read error is related to the storage medium chip itself, and realizes the checking of the read error cause in the firmware hard disk.

Description

Technical Field

[0001] This application relates to the field of computer technology, and more specifically, to a method, apparatus, electronic device, and storage medium for checking solid-state drives. Background Technology

[0002] With the rapid development of China's internet-related industries, industries such as artificial intelligence, cloud storage, and distributed storage are also growing rapidly, leading to an explosive increase in demand for storage devices. Solid State Drives (SSDs), as high-efficiency storage devices, offer advantages such as high speed, shock resistance, and low power consumption, and are considered a replacement for traditional hard drives. Enterprise customers also have stringent requirements for product performance in various aspects, including lifespan, stability and reliability, power consumption control, system compatibility, data error correction, and data retention capabilities.

[0003] To improve performance, SSD products are adapted to the latest generation of storage media as quickly as possible during the research and development process. However, the latest generation is often still in the research and development stage and can only provide factory samples (Engineering Samples, ES). Factory samples are often unstable in performance, and it is necessary to determine during the development of solid-state drives whether the read error is caused by the code firmware or by the storage media chip itself.

[0004] Therefore, how to detect read errors in firmware hard drives is a technical problem that needs to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of this application is to provide a solid-state drive (SSD) inspection method, apparatus, electronic device, and storage medium, which enables the inspection of read error causes in firmware SSDs.

[0006] To achieve the above objectives, this application provides a solid-state drive (SSD) inspection method, comprising:

[0007] Perform full disk write and full disk read operations on the solid-state drive; wherein the solid-state drive includes multiple channels, and each channel contains multiple chip enable signals;

[0008] Obtain the multiple bit error rates returned by the full disk read operation, and statistically analyze the distribution of bit error rates corresponding to different chip enable signals in different channels;

[0009] The storage media chips in the solid-state drive are checked based on the distribution of bit error rates corresponding to different chip enable signals in different channels.

[0010] Prior to obtaining the multiple bit error rates returned by the full disk read operation, the method further includes:

[0011] Initialize a three-dimensional array variable; wherein, the first dimension of the three-dimensional array variable corresponds to the channel of the solid-state drive, the second dimension corresponds to the chip enable signal of the channel, and the third dimension corresponds to the numerical range of the bit error rate, wherein the bit error rate is divided into multiple non-overlapping numerical ranges;

[0012] Accordingly, obtaining the multiple bit error rates returned by the full disk read operation includes:

[0013] Upon receiving a read operation completion message, the channel, chip enable signal, and bit error rate of the read operation are obtained; wherein, the full disk read operation includes multiple read operations;

[0014] The three-dimensional array variable is updated based on the channel corresponding to the read operation, the chip enable signal, and the numerical range of the bit error rate of the read operation.

[0015] The distribution of bit error rates corresponding to different chip enable signals in different channels includes:

[0016] Iterate through the three-dimensional array variables and count the number of times the bit error rate corresponding to the different chip enable signals of different channels is in different numerical ranges.

[0017] The step of checking the storage medium chips in the solid-state drive based on the distribution of bit error rates corresponding to different chip enable signals in different channels includes:

[0018] If the number of times the bit error rate corresponding to the channel and the chip enable signal is within a first numerical range is less than the total number of bit error rates corresponding to the channel and the chip enable signal, then it is determined that there is a problem with the storage medium chip in the solid-state drive; wherein, the average value of the values ​​included in the first numerical range is the smallest among all the numerical ranges.

[0019] The step of checking the storage medium chips in the solid-state drive based on the distribution of bit error rates corresponding to different chip enable signals in different channels includes:

[0020] If the number of times the bit error rate corresponding to the channel and the chip enable signal occurs in the second numerical range is greater than the total number of bit error rates corresponding to the channel and the chip enable signal, then it is determined that there is a problem with the storage medium chip in the solid-state drive; wherein, the second numerical range is a numerical range other than the first numerical range, and the average value of the values ​​included in the first numerical range is the smallest among all the numerical ranges.

[0021] The process of performing full disk write and full disk read operations on the solid-state drive includes:

[0022] Perform full disk write and full disk read operations on the solid-state drives during the factory sample stage;

[0023] Accordingly, obtaining the multiple bit error rates returned by the full disk read operation and statistically analyzing the distribution of bit error rates corresponding to different chip enable signals in different channels includes:

[0024] The system obtains multiple bit error rates returned by a full disk read operation of the solid-state drive in the factory sample stage, and statistically analyzes the distribution of bit error rates corresponding to different chip enable signals of different channels in the solid-state drive in the factory sample stage.

[0025] Accordingly, before checking the storage medium chips in the solid-state drive based on the distribution of bit error rates corresponding to different chip enable signals of different channels, the method further includes:

[0026] Perform full disk write and full disk read operations on a standard solid-state drive, obtain multiple bit error rates returned by the full disk read operation of the standard solid-state drive, and statistically analyze the distribution of bit error rates corresponding to different chip enable signals of different channels of the standard solid-state drive.

[0027] Accordingly, the step of checking the storage medium chips in the solid-state drive based on the distribution of bit error rates corresponding to different chip enable signals in different channels includes:

[0028] The storage media chips in the solid-state drives (SSDs) at the factory sample stage are inspected by comparing the bit error rate distribution of the same chip enable signals in the same channel of the SSDs at the factory sample stage with those of the standard SSDs.

[0029] The statistical analysis of the bit error rate distribution corresponding to different chip enable signals in different channels of the solid-state drive during the factory sample stage includes:

[0030] The number of times the bit error rate corresponding to the different chip enable signals of different channels of the solid-state drive in the factory sample stage is in different numerical ranges is counted to fit the first distribution curve.

[0031] Accordingly, the statistical analysis of the bit error rate distribution corresponding to different chip enable signals of different channels in the standard solid-state drive includes:

[0032] The number of times the bit error rate corresponding to the different chip enable signals of different channels of the standard solid-state drive is in different numerical ranges is counted to fit the second distribution curve;

[0033] Accordingly, the step of inspecting the storage medium chip in the solid-state drive at the factory sample stage by comparing the distribution of bit error rates corresponding to the same chip enable signals in the same channel of the solid-state drive at the factory sample stage and the standard solid-state drive includes:

[0034] If the similarity between the first distribution curve and the second distribution curve is greater than a preset similarity, it is determined that there is a problem with the storage medium chip in the solid-state drive in the factory sample stage.

[0035] To achieve the above objectives, this application provides a solid-state drive (SSD) inspection device, comprising:

[0036] An execution module is used to perform full-disk write and full-disk read operations on a solid-state drive; wherein, the solid-state drive includes multiple channels, and each channel contains multiple chip enable signals;

[0037] The first statistics module is used to obtain multiple bit error rates returned by the full disk read operation and to statistically analyze the distribution of bit error rates corresponding to different chip enable signals in different channels.

[0038] The inspection module is used to inspect the storage medium chips in the solid-state drive based on the distribution of bit error rates corresponding to different chip enable signals in different channels.

[0039] This also includes:

[0040] An initialization module is used to initialize a three-dimensional array variable; wherein, the first dimension of the three-dimensional array variable corresponds to the channel of the solid-state drive, the second dimension corresponds to the chip enable signal of the channel, and the third dimension corresponds to the numerical range of the bit error rate, wherein the bit error rate is divided into multiple non-overlapping numerical ranges.

[0041] Accordingly, the first statistics module is specifically used for: after receiving a read operation completion message, obtaining the channel, chip enable signal, and bit error rate of the read operation corresponding to the read operation; wherein, the full disk read operation includes multiple read operations; updating the three-dimensional array variable according to the numerical range of the channel, chip enable signal, and bit error rate of the read operation corresponding to the read operation; traversing the three-dimensional array variable and counting the number of times the bit error rate corresponding to different chip enable signals of different channels is in different numerical ranges.

[0042] Specifically, the inspection module is used to: determine that there is a problem with the storage medium chip in the solid-state drive if the number of times the bit error rate corresponding to the channel and the chip enable signal is within a first numerical range relative to the total number of bit error rates corresponding to the channel and the chip enable signal is less than a first preset value; wherein the average value of the values ​​included in the first numerical range is the smallest among all the numerical ranges.

[0043] Specifically, the inspection module is used to: determine that there is a problem with the storage medium chip in the solid-state drive if the number of times the bit error rate corresponding to the channel and the chip enable signal is in the second numerical range is greater than the total number of bit error rates corresponding to the channel and the chip enable signal. The second numerical range is a numerical range other than the first numerical range, and the average value of the values ​​included in the first numerical range is the smallest among all the numerical ranges.

[0044] Specifically, the execution module is used to perform full disk write and full disk read operations on the solid-state drive during the factory sample stage;

[0045] Accordingly, the first statistics module is specifically used to: obtain multiple bit error rates returned by the full disk read operation of the solid-state drive in the factory sample stage, and to statistically analyze the distribution of bit error rates corresponding to different chip enable signals of different channels of the solid-state drive in the factory sample stage.

[0046] Correspondingly, it also includes:

[0047] The second statistics module is used to perform full disk write and full disk read operations on the standard solid-state drive, obtain multiple bit error rates returned by the full disk read operation of the standard solid-state drive, and statistically analyze the distribution of bit error rates corresponding to different chip enable signals of different channels of the standard solid-state drive.

[0048] Accordingly, the inspection module is specifically used to inspect the storage medium chip in the solid-state drive in the factory sample stage by comparing the distribution of bit error rates corresponding to the same chip enable signals of the same channel in the solid-state drive in the factory sample stage and the standard solid-state drive.

[0049] Specifically, the first statistical module is used to: count the number of times the bit error rate corresponding to the different chip enable signals of different channels of the solid-state drive in the factory sample stage is in different numerical ranges, so as to fit the first distribution curve.

[0050] Accordingly, the second statistics module is specifically used to: count the number of times the bit error rate corresponding to the different chip enable signals of different channels of the standard solid-state drive is in different numerical ranges, so as to fit the second distribution curve;

[0051] Accordingly, the inspection module is specifically used to: compare the first distribution curve with the second distribution curve, and if the similarity between the first distribution curve and the second distribution curve is greater than a preset similarity, then it is determined that there is a problem with the storage medium chip in the solid-state drive in the factory sample stage.

[0052] To achieve the above objectives, this application provides an electronic device, comprising:

[0053] Memory, used to store computer programs;

[0054] A processor is used to implement the steps of the solid-state drive inspection method described above when executing the computer program.

[0055] To achieve the above objectives, this application provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the solid-state drive inspection method described above.

[0056] As can be seen from the above scheme, the solid-state drive (SSD) inspection method provided in this application includes: performing a full disk write operation and a full disk read operation on the SSD; wherein, the SSD includes multiple channels, and each channel contains multiple chip enable signals; acquiring multiple bit error rates returned by the full disk read operation, and statistically analyzing the distribution of bit error rates corresponding to different chip enable signals in different channels; and inspecting the storage medium chips in the SSD based on the distribution of bit error rates corresponding to different chip enable signals in different channels.

[0057] The solid-state drive (SSD) inspection method provided in this application checks the bit error rate returned during full-disk write and read operations. By analyzing the distribution of the bit error rate, it examines the storage media chips within the SSD to determine whether read errors are related to the storage media chips themselves. Therefore, the SSD inspection method provided in this application effectively detects the causes of read errors in firmware-based hard drives. This application also discloses an SSD inspection device, an electronic device, and a computer-readable storage medium, which achieve the same technical effects.

[0058] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this application. Attached Figure Description

[0059] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. The drawings are used to provide a further understanding of this disclosure and constitute a part of the specification. They are used together with the following detailed description to explain this disclosure, but do not constitute a limitation of this disclosure. In the drawings:

[0060] Figure 1 This is a flowchart illustrating a solid-state drive (SSD) inspection method according to an exemplary embodiment;

[0061] Figure 2 This is a flowchart illustrating a statistical BER value according to an exemplary embodiment;

[0062] Figure 3 This is a flowchart illustrating another solid-state drive inspection method according to an exemplary embodiment;

[0063] Figure 4 This is an example illustrating the distribution of bit error rate for a solid-state drive at the factory sample stage, according to an exemplary embodiment.

[0064] Figure 5 This is an example illustrating the distribution of bit error rate for a standard solid-state drive according to an exemplary embodiment;

[0065] Figure 6 This is a structural diagram illustrating a solid-state drive inspection device according to an exemplary embodiment;

[0066] Figure 7 This is a structural diagram of an electronic device according to an exemplary embodiment. Detailed Implementation

[0067] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. Furthermore, in the embodiments of this application, "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0068] This application discloses a solid-state drive (SSD) inspection method, which enables the inspection of read error causes in firmware SSDs.

[0069] See Figure 1 A flowchart illustrating a solid-state drive (SSD) inspection method according to an exemplary embodiment is shown below. Figure 1 As shown, it includes:

[0070] S101: Perform full disk write and full disk read operations on the solid-state drive; wherein, the solid-state drive includes multiple channels, and each channel contains multiple chip enable signals;

[0071] The purpose of this embodiment is to determine whether read errors in a solid-state drive (SSD) are related to the storage medium chip itself. The storage medium chip here may include a NAND flash memory chip, but this embodiment does not specifically limit it. The SSD includes multiple channels, and each channel contains multiple chip enable signals.

[0072] In this step, test cases for performing full-disk write and full-disk read operations on the solid-state drive can be sequential full-disk write and sequential full-disk read operations. The test cases are shown below:

[0073] fio-randrepeat=0-filename= / dev / nvme0n1-direct=1-iodepth=128-thread-rw=write-ioengine=libaio-bs=128k-size=100%-numjobs=1-loops=2-offset=0-group_reporting-name=mytest;

[0074] fio-randrepeat=0-filename= / dev / nvme0n1-direct=1-iodepth=128-thread-rw=read-ioengine=libaio-bs=128k-size=100% -numjobs=1-offset=0-group_reporting-name=mytest.

[0075] S102: Obtain the multiple bit error rates returned by the full disk read operation, and statistically analyze the distribution of bit error rates corresponding to different chip enable signals in different channels;

[0076] In practice, after each read completion message is received, the data management module (DM) obtains the bit error rate (BER) returned by the read operation, determines the channel and chip enable signal corresponding to the read operation, and then statistically analyzes the distribution of bit error rates corresponding to different chip enable signals of different channels in multiple read operations.

[0077] In a preferred embodiment, before obtaining the multiple bit error rates returned by the full disk read operation, the method further includes: initializing a three-dimensional array variable; wherein, the first dimension of the three-dimensional array variable corresponds to the channel of the solid-state drive, the second dimension corresponds to the chip enable signal of the channel, and the third dimension corresponds to the numerical range of the bit error rate, and the bit error rate is divided into multiple non-overlapping numerical ranges; correspondingly, obtaining the multiple bit error rates returned by the full disk read operation includes: after receiving the read operation completion message, obtaining the channel, chip enable signal, and bit error rate of the read operation corresponding to the read operation; wherein, the full disk read operation includes multiple read operations; updating the three-dimensional array variable according to the channel, chip enable signal, and numerical range of the bit error rate of the read operation corresponding to the read operation.

[0078] In practical implementation, the bit error rate (BER) can be divided into multiple numerical ranges. For example, it can be divided into eight ranges: 0-50, 50-100, 100-150, 150-200, 200-250, 250-300, 300-350, and above 350. Each range can be represented by a 32-bit unsigned integer, with the range of unsigned integers being 0-4294967296. The data type is named uint32_t. An array containing eight elements is defined to store the BER values ​​within these eight ranges, with the initial value set to 0, as follows: {0,0,0,0,0,0,0,0}.

[0079] Furthermore, the system is further divided according to channels and chip enable signals. A typical solid-state drive (SSD) contains multiple channels, each with several CE (Chip Enable) signals connected to the storage medium chip. A three-dimensional array is defined: the first dimension corresponds to the SSD channels, the second dimension to the chip enable signals for each channel, and the third dimension to the bit error rate range.

[0080] For example, a solid-state drive has sixteen channels, each with two CEs. The two CEs are connected to the two CE signal lines of the NAND flash chip. Define a three-dimensional array g_ecc_error

[16] [2][8], initialized to 0, as follows:

[0081] uint32_t g_ecc_error

[16] [2][8]={

[0082] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0}}, / / Channels 0, CE0 and CE1

[0083] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0,0}}, / / Channel 1, CE0 and CE1

[0084] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0}}, / / Channel 2, CE0 and CE1

[0085] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0}}, / / Channel 3, CE0 and CE1

[0086] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0,0}}, / / Channel 4, CE0 and CE1

[0087] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0,0}}, / / Channel 5, CE0 and CE1

[0088] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0,0}}, / / Channel 6, CE0 and CE1

[0089] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0,0}}, / / Channels 7, CE0 and CE1

[0090] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0,0}}, / / Channel 8, CE0 and CE1

[0091] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0,0}}, / / Channels 9, CE0 and CE1

[0092] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0}}, / / Channels 10, CE0 and CE1

[0093] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0}}, / / Channels 11, CE0 and CE1

[0094] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0}}, / / Channels 12, CE0 and CE1

[0095] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0}}, / / Channels 13, CE0 and CE1

[0096] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0}}, / / Channel 14, CE0 and CE1

[0097] {{0,0,0,0,0,0,0,0},{0,0,0,0,0,0,0}} / / Channels 15, CE0 and CE1

[0098] }

[0099] After receiving the read completion message, the data management module retrieves the BER value returned by this read operation and assigns it to the temporary variable maxEccErrors. It then retrieves the channel number and CE number where the read completion message occurred, assigning the channel number to eccCh and the CE number to eccCE. Based on the BER value, channel number, and CE number, the three-dimensional array is updated.

[0100] The flowchart for calculating BER values ​​is as follows: Figure 2 As shown, if the BER value (maxEccErrors) is less than 50, the first element g_ecc_error[eccCh][eccCE][0] of the channel number eccCh and CE number eccCE is incremented by 1, indicating a read operation with a BER value less than 50. If the BER value is greater than 50 and less than 100, the second element g_ecc_error[eccCh][eccCE][1] of the channel number eccCh and CE number eccCE is incremented by 1, indicating a read operation with a BER value between 50 and 100. If the BER value is greater than 100 and less than 150, the third element g_ecc_error[eccCh][eccCE][2] of the channel number eccCh and CE number eccCE is incremented by 1, indicating a read operation with a BER value between 100 and 150, and so on.

[0101] As a feasible implementation method, the distribution of bit error rates corresponding to different chip enable signals of different channels includes: traversing the three-dimensional array variable and counting the number of times the bit error rates corresponding to different chip enable signals of different channels are in different numerical ranges.

[0102] In the implementation, a function `dm_show_ecc_error` is defined to print the BER distribution using a two-level loop. Taking the aforementioned three-dimensional array as an example, the first loop iterates through the channels 16 times, and the second loop iterates through the CE (Category E) groups twice. Then, it prints the number of times the BER value for each channel and CE group was counted in different groups. Furthermore, the BER distribution is obtained by inputting the `dm_show_ecc_error` command via the serial port.

[0103] S103: Check the storage medium chips in the solid-state drive according to the distribution of bit error rates corresponding to different chip enable signals in different channels.

[0104] In this step, the distribution of bit error rates corresponding to different chip enable signals in different channels is used to determine whether read errors in the solid-state drive are related to the storage medium chip itself.

[0105] As a feasible implementation, the step of checking the storage medium chip in the solid-state drive based on the distribution of bit error rates corresponding to different chip enable signals in different channels includes: if the proportion of the number of times the bit error rate corresponding to the channel and the chip enable signal is within a first numerical range to the total number of bit error rates corresponding to the channel and the chip enable signal is less than a first preset value, then it is determined that the storage medium chip in the solid-state drive has a problem; wherein, the average value of the values ​​included in the first numerical range is the smallest among all numerical ranges. For example, if the proportion of the number of times the bit error rate is within the 0-50 numerical range to the total number of bit error rates is less than the first preset value, then it is determined that the storage medium chip in the solid-state drive has a problem.

[0106] As another feasible implementation, the step of checking the storage medium chip in the solid-state drive based on the distribution of bit error rates corresponding to different chip enable signals of different channels includes: if the proportion of the number of times the bit error rate corresponding to the channel and the chip enable signal is in a second numerical range to the total number of bit error rates corresponding to the channel and the chip enable signal is greater than a second preset value, then it is determined that the storage medium chip in the solid-state drive has a problem; wherein, the second numerical range is a numerical range other than the first numerical range, and the average value of the values ​​included in the first numerical range is the smallest among all the numerical ranges. For example, if the proportion of the number of times the bit error rate is in the numerical ranges of 50-100, 100-150, 150-200, 200-250, 250-300, 300-350, and above 350 to the total number of bit error rates is greater than the second preset value, then it is determined that the storage medium chip in the solid-state drive has a problem.

[0107] The solid-state drive (SSD) inspection method provided in this application checks the bit error rate returned during full-disk write and read operations. By analyzing the distribution of the bit error rate, it examines the storage media chips within the SSD to determine whether read errors are related to the storage media chips themselves. Therefore, the SSD inspection method provided in this application effectively detects the causes of read errors in firmware-based hard drives.

[0108] This application discloses a method for checking solid-state drives (SSDs). Compared to the previous embodiment, this embodiment further explains and optimizes the technical solution. Specifically:

[0109] See Figure 3 A flowchart illustrating another solid-state drive inspection method according to an exemplary embodiment, such as... Figure 3 As shown, it includes:

[0110] S201: Perform full disk write and full disk read operations on the solid-state drive in the factory sample stage, obtain multiple bit error rates returned by the full disk read operation of the solid-state drive in the factory sample stage, and statistically analyze the distribution of bit error rates corresponding to different chip enable signals of different channels of the solid-state drive in the factory sample stage.

[0111] In practical implementation, the distribution of bit error rates corresponding to different chip enable signals of different channels in the solid-state drive (SSD) during the factory sample stage is statistically analyzed. This can include the number of times the bit error rates corresponding to different chip enable signals of different channels in the SSD during the factory sample stage are within different numerical ranges. Figure 4 As shown.

[0112] S202: Perform full disk write and full disk read operations on the standard solid-state drive, obtain multiple bit error rates returned by the full disk read operation of the standard solid-state drive, and statistically analyze the distribution of bit error rates corresponding to different chip enable signals of different channels of the standard solid-state drive.

[0113] In practical implementation, statistically analyzing the distribution of bit error rates corresponding to different chip enable signals across different channels of a standard solid-state drive (SSD) can include counting the number of times the bit error rates corresponding to different chip enable signals across different channels of the standard SSD are within different numerical ranges. Figure 5 As shown. The standard firmware hard drive here can be a solid-state drive at the CS (Commercial Sample) stage.

[0114] S203: By comparing the bit error rate distribution of the same chip enable signal in the same channel of the solid-state drive in the factory sample stage with that of the standard solid-state drive, the storage medium chip in the solid-state drive in the factory sample stage is inspected.

[0115] In practice, by comparing the distribution of bit error rates of solid-state drives (SSDs) in the factory sample stage with that of standard SSDs, it can be determined whether read errors in the SSDs in the factory sample stage are related to the storage medium chip itself.

[0116] By comparison Figure 4 and Figure 5 It is evident that the proportion of samples with BER in the [50, 100] range in the CS stage is significantly lower than that in the ES stage. Therefore, if ES stage samples are used during product development, the main reason for read errors is the immaturity of the storage medium chip itself, and software development does not need to invest more effort in it.

[0117] In a preferred embodiment, the step of statistically analyzing the distribution of bit error rates corresponding to different chip enable signals in different channels of the solid-state drive (SSD) in the factory sample stage includes: counting the number of times the bit error rates corresponding to different chip enable signals in different channels of the SSD in the factory sample stage are within different numerical ranges to fit a first distribution curve; correspondingly, the step of statistically analyzing the distribution of bit error rates corresponding to different chip enable signals in different channels of the standard SSD includes: counting the number of times the bit error rates corresponding to different chip enable signals in different channels of the standard SSD are within different numerical ranges to fit a second distribution curve; correspondingly, the step of checking the storage medium chip in the SSD in the factory sample stage by comparing the distribution of bit error rates corresponding to the same chip enable signals in the same channel of the SSD in the factory sample stage and the standard SSD includes: comparing the first distribution curve and the second distribution curve; if the similarity between the first distribution curve and the second distribution curve is greater than a preset similarity, then it is determined that there is a problem with the storage medium chip in the SSD in the factory sample stage.

[0118] In practice, a first distribution curve can be fitted based on the number of times the bit error rate corresponding to the enable signals of different chips in different channels of the solid-state drive in the factory sample stage is measured in different numerical ranges. A second distribution curve can be fitted based on the number of times the bit error rate corresponding to the enable signals of different chips in different channels of the standard solid-state drive is measured in different numerical ranges. The first distribution curve and the second distribution curve are compared to determine the similarity between the first distribution curve and the second distribution curve. If the similarity is greater than the preset similarity, it is determined that there is a problem with the storage medium chip in the solid-state drive in the factory sample stage.

[0119] The following describes a solid-state drive (SSD) inspection device provided in an embodiment of this application. The SSD inspection device described below and the SSD inspection method described above can be referred to each other.

[0120] See Figure 6 A structural diagram of a solid-state drive inspection device according to an exemplary embodiment is shown, as follows: Figure 6 As shown, it includes:

[0121] The execution module 601 is used to perform full disk write operations and full disk read operations on the solid-state drive; wherein, the solid-state drive includes multiple channels, and each channel contains multiple chip enable signals;

[0122] The first statistics module 602 is used to obtain multiple bit error rates returned by the full disk read operation and to statistically analyze the distribution of bit error rates corresponding to different chip enable signals in different channels.

[0123] The inspection module 603 is used to inspect the storage medium chips in the solid-state drive according to the distribution of bit error rates corresponding to different chip enable signals in different channels.

[0124] The solid-state drive (SSD) inspection device provided in this application checks the bit error rate returned during full-disk write and read operations of the SSD. By analyzing the distribution of the bit error rate, it examines the storage medium chips in the SSD to determine whether read errors are related to the storage medium chips themselves. Therefore, the SSD inspection device provided in this application effectively checks the causes of read errors in firmware-based hard drives.

[0125] Based on the above embodiments, as a preferred embodiment, it further includes:

[0126] An initialization module is used to initialize a three-dimensional array variable; wherein, the first dimension of the three-dimensional array variable corresponds to the channel of the solid-state drive, the second dimension corresponds to the chip enable signal of the channel, and the third dimension corresponds to the numerical range of the bit error rate, wherein the bit error rate is divided into multiple non-overlapping numerical ranges.

[0127] Accordingly, the first statistics module 602 is specifically used for: after receiving a read operation completion message, acquiring the channel, chip enable signal, and bit error rate of the read operation corresponding to the read operation; wherein, the full disk read operation includes multiple read operations; updating the three-dimensional array variable according to the numerical range of the channel, chip enable signal, and bit error rate of the read operation corresponding to the read operation; traversing the three-dimensional array variable and counting the number of times the bit error rate corresponding to different chip enable signals of different channels is in different numerical ranges.

[0128] Based on the above embodiments, as a preferred implementation, the inspection module 603 is specifically used to: if the number of times the bit error rate corresponding to the channel and the chip enable signal is in a first numerical range is less than the total number of bit error rates corresponding to the channel and the chip enable signal, then it is determined that there is a problem with the storage medium chip in the solid-state drive; wherein, the average value of the values ​​included in the first numerical range is the smallest among all the numerical ranges.

[0129] Based on the above embodiments, as a preferred implementation, the inspection module 603 is specifically used to: if the number of times the bit error rate corresponding to the channel and the chip enable signal is in the second numerical range is greater than the total number of bit error rates corresponding to the channel and the chip enable signal, then it is determined that there is a problem with the storage medium chip in the solid-state drive; wherein, the second numerical range is a numerical range other than the first numerical range, and the average value of the values ​​included in the first numerical range is the smallest among all the numerical ranges.

[0130] Based on the above embodiments, as a preferred embodiment, the execution module 601 is specifically used to: perform full disk write operations and full disk read operations on the solid-state drive in the factory sample stage;

[0131] Accordingly, the first statistics module 602 is specifically used to: obtain multiple bit error rates returned by the full disk read operation of the solid-state drive in the factory sample stage, and to statistically analyze the distribution of bit error rates corresponding to different chip enable signals of different channels of the solid-state drive in the factory sample stage.

[0132] Correspondingly, it also includes:

[0133] The second statistics module is used to perform full disk write and full disk read operations on the standard solid-state drive, obtain multiple bit error rates returned by the full disk read operation of the standard solid-state drive, and statistically analyze the distribution of bit error rates corresponding to different chip enable signals of different channels of the standard solid-state drive.

[0134] Accordingly, the inspection module 603 is specifically used to: inspect the storage medium chip in the solid-state drive in the factory sample stage by comparing the distribution of bit error rates corresponding to the same chip enable signals of the same channel in the solid-state drive in the factory sample stage and the standard solid-state drive.

[0135] Based on the above embodiments, as a preferred implementation, the first statistics module 602 is specifically used to: count the number of times the bit error rate corresponding to the different chip enable signals of different channels of the solid-state drive in the factory sample stage is in different numerical ranges, so as to fit the first distribution curve;

[0136] Accordingly, the second statistics module is specifically used to: count the number of times the bit error rate corresponding to the different chip enable signals of different channels of the standard solid-state drive is in different numerical ranges, so as to fit the second distribution curve;

[0137] Accordingly, the inspection module 603 is specifically used to: compare the first distribution curve with the second distribution curve, and if the similarity between the first distribution curve and the second distribution curve is greater than a preset similarity, then determine that there is a problem with the storage medium chip in the solid-state drive in the factory sample stage.

[0138] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0139] Based on the hardware implementation of the above program modules, and in order to implement the method of the embodiments of this application, the embodiments of this application also provide an electronic device. Figure 7 This is a structural diagram of an electronic device according to an exemplary embodiment, such as... Figure 7 As shown, the electronic device includes:

[0140] Communication interface 1 enables information exchange with other devices, such as network devices;

[0141] Processor 2 is connected to communication interface 1 to enable information exchange with other devices and, when running a computer program, executes the solid-state drive checking method provided by one or more of the above-mentioned technical solutions. The computer program is stored on memory 3.

[0142] Of course, in practical applications, the various components in an electronic device are coupled together through bus system 4. It can be understood that bus system 4 is used to achieve communication and connection between these components. In addition to the data bus, bus system 4 also includes a power bus, a control bus, and a status signal bus. However, for clarity, in... Figure 7 The general will label all buses as Bus System 4.

[0143] The memory 3 in this embodiment is used to store various types of data to support the operation of the electronic device. Examples of such data include any computer program used to operate on the electronic device.

[0144] It is understood that memory 3 can be volatile memory or non-volatile memory, or both. Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), ferromagnetic random access memory (FRAM), flash memory, magnetic surface memory, optical disc, or compact disc read-only memory (CD-ROM); magnetic surface memory can be disk storage or magnetic tape storage. Volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Synchronous Static Random Access Memory (SSRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), Double Data Rate Synchronous Dynamic Random Access Memory (DDRSDRAM), Enhanced Synchronous Dynamic Random Access Memory (ESDRAM), SyncLink Dynamic Random Access Memory (SLDRAM), and Direct Rambus Random Access Memory (DRRAM).The memory 3 described in the embodiments of this application is intended to include, but is not limited to, these and any other suitable types of memory.

[0145] The methods disclosed in the embodiments of this application can be applied to processor 2, or implemented by processor 2. Processor 2 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the integrated logic circuit of the hardware in processor 2 or by instructions in the form of software. The processor 2 may be a general-purpose processor, DSP, or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Processor 2 can implement or execute the methods, steps and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the methods disclosed in the embodiments of this application can be directly manifested as being executed by a hardware decoding processor, or being executed by a combination of hardware and software modules in the decoding processor. The software modules may be located in a storage medium, which is located in memory 3. Processor 2 reads the program in memory 3 and completes the steps of the aforementioned method in combination with its hardware.

[0146] When processor 2 executes the program, it implements the corresponding processes in the various methods of the embodiments of this application. For the sake of brevity, these will not be described in detail here.

[0147] In an exemplary embodiment, this application also provides a storage medium, namely a computer storage medium, specifically a computer-readable storage medium, such as a memory 3 that stores a computer program, which can be executed by a processor 2 to complete the steps described in the aforementioned method. The computer-readable storage medium may be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, Flash Memory, magnetic surface memory, optical disc, or CD-ROM.

[0148] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as mobile storage devices, ROM, RAM, magnetic disks, or optical disks.

[0149] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the parts that contribute to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause an electronic device (which may be a personal computer, server, network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, RAM, magnetic disks, or optical disks.

[0150] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for checking a solid-state drive, characterized in that, include: Perform full disk write and full disk read operations on the solid-state drive; wherein the solid-state drive includes multiple channels, and each channel contains multiple chip enable signals; Obtain the multiple bit error rates returned by the full disk read operation, and statistically analyze the distribution of bit error rates corresponding to different chip enable signals in different channels; The storage medium chips in the solid-state drive are checked based on the distribution of bit error rates corresponding to different chip enable signals in different channels. The step of checking the storage medium chips in the solid-state drive based on the distribution of bit error rates corresponding to different chip enable signals in different channels includes: If the number of times the bit error rate corresponding to the channel and the chip enable signal is within a first numerical range is less than the total number of bit error rates corresponding to the channel and the chip enable signal, then it is determined that there is a problem with the storage medium chip in the solid-state drive; wherein, the average value of the values ​​included in the first numerical range is the smallest among all the numerical ranges. If the number of times the bit error rate corresponding to the channel and the chip enable signal occurs in the second numerical range is greater than the total number of bit error rates corresponding to the channel and the chip enable signal, then it is determined that there is a problem with the storage medium chip in the solid-state drive; wherein, the second numerical range is a numerical range other than the first numerical range, and the average value of the values ​​included in the first numerical range is the smallest among all the numerical ranges.

2. The solid-state drive inspection method according to claim 1, characterized in that, Before obtaining the multiple bit error rates returned by the full disk read operation, the method further includes: Initialize a three-dimensional array variable; wherein, the first dimension of the three-dimensional array variable corresponds to the channel of the solid-state drive, the second dimension corresponds to the chip enable signal of the channel, and the third dimension corresponds to the numerical range of the bit error rate, wherein the bit error rate is divided into multiple non-overlapping numerical ranges; Accordingly, obtaining the multiple bit error rates returned by the full disk read operation includes: Upon receiving a read operation completion message, the channel, chip enable signal, and bit error rate of the read operation are obtained; wherein, the full disk read operation includes multiple read operations; The three-dimensional array variable is updated based on the channel corresponding to the read operation, the chip enable signal, and the numerical range of the bit error rate of the read operation.

3. The solid-state drive inspection method according to claim 2, characterized in that, The distribution of bit error rates corresponding to different chip enable signals in different channels includes: Iterate through the three-dimensional array variables and count the number of times the bit error rate corresponding to the different chip enable signals of different channels is in different numerical ranges.

4. A method for checking a solid-state drive, characterized in that, include: Perform full disk write and full disk read operations on the solid-state drive; wherein the solid-state drive includes multiple channels, and each channel contains multiple chip enable signals; Obtain the multiple bit error rates returned by the full disk read operation, and statistically analyze the distribution of bit error rates corresponding to different chip enable signals in different channels; The storage medium chips in the solid-state drive are checked based on the distribution of bit error rates corresponding to different chip enable signals in different channels. The process of performing full disk write and full disk read operations on the solid-state drive includes: Perform full disk write and full disk read operations on the solid-state drives during the factory sample stage; Accordingly, obtaining the multiple bit error rates returned by the full disk read operation and statistically analyzing the distribution of bit error rates corresponding to different chip enable signals in different channels includes: The system obtains multiple bit error rates returned by a full disk read operation of the solid-state drive in the factory sample stage, and statistically analyzes the distribution of bit error rates corresponding to different chip enable signals of different channels in the solid-state drive in the factory sample stage. Accordingly, before checking the storage medium chips in the solid-state drive based on the distribution of bit error rates corresponding to different chip enable signals of different channels, the method further includes: Perform full disk write and full disk read operations on a standard solid-state drive, obtain multiple bit error rates returned by the full disk read operation of the standard solid-state drive, and statistically analyze the distribution of bit error rates corresponding to different chip enable signals of different channels of the standard solid-state drive. Accordingly, the step of checking the storage medium chips in the solid-state drive based on the distribution of bit error rates corresponding to different chip enable signals in different channels includes: The storage medium chip in the solid-state drive at the factory sample stage is inspected by comparing the bit error rate distribution of the same chip enable signal in the same channel of the solid-state drive in the factory sample stage and the standard solid-state drive. The statistical analysis of the bit error rate distribution corresponding to different chip enable signals in different channels of the solid-state drive during the factory sample stage includes: The number of times the bit error rate corresponding to the different chip enable signals of different channels of the solid-state drive in the factory sample stage is in different numerical ranges is counted to fit the first distribution curve. Accordingly, the statistical analysis of the bit error rate distribution corresponding to different chip enable signals of different channels in the standard solid-state drive includes: The number of times the bit error rate corresponding to the different chip enable signals of different channels of the standard solid-state drive is in different numerical ranges is counted to fit the second distribution curve; Accordingly, the step of inspecting the storage medium chip in the solid-state drive at the factory sample stage by comparing the distribution of bit error rates corresponding to the same chip enable signals in the same channel of the solid-state drive at the factory sample stage and the standard solid-state drive includes: If the similarity between the first distribution curve and the second distribution curve is greater than a preset similarity, it is determined that there is a problem with the storage medium chip in the solid-state drive in the factory sample stage.

5. A solid-state drive (SSD) inspection device, characterized in that, include: An execution module is used to perform full-disk write and full-disk read operations on a solid-state drive; wherein, the solid-state drive includes multiple channels, and each channel contains multiple chip enable signals; The first statistics module is used to obtain multiple bit error rates returned by the full disk read operation and to statistically analyze the distribution of bit error rates corresponding to different chip enable signals in different channels. The inspection module is used to inspect the storage medium chips in the solid-state drive based on the distribution of bit error rates corresponding to different chip enable signals in different channels. Specifically, the inspection module is used to: determine that the storage medium chip in the solid-state drive has a problem if the proportion of the number of times the bit error rate corresponding to the channel and the chip enable signal occurs in a first numerical range to the total number of bit error rates corresponding to the channel and the chip enable signal is less than a first preset value; wherein the average value of the values ​​included in the first numerical range is the smallest among all numerical ranges; and determine that the storage medium chip in the solid-state drive has a problem if the proportion of the number of times the bit error rate corresponding to the channel and the chip enable signal occurs in a second numerical range to the total number of bit error rates corresponding to the channel and the chip enable signal is greater than a second preset value; wherein the second numerical range is a numerical range other than the first numerical range, and the average value of the values ​​included in the first numerical range is the smallest among all numerical ranges.

6. A solid-state drive (SSD) inspection device, characterized in that, include: An execution module is used to perform full-disk write and full-disk read operations on a solid-state drive; wherein, the solid-state drive includes multiple channels, and each channel contains multiple chip enable signals; The first statistics module is used to obtain multiple bit error rates returned by the full disk read operation and to statistically analyze the distribution of bit error rates corresponding to different chip enable signals in different channels. The inspection module is used to inspect the storage medium chips in the solid-state drive based on the distribution of bit error rates corresponding to different chip enable signals in different channels. Specifically, the execution module is used to perform full disk write and full disk read operations on the solid-state drive during the factory sample stage; Accordingly, the first statistics module is specifically used to: obtain multiple bit error rates returned by the full disk read operation of the solid-state drive in the factory sample stage, and to statistically analyze the distribution of bit error rates corresponding to different chip enable signals of different channels of the solid-state drive in the factory sample stage. Correspondingly, it also includes: The second statistics module is used to perform full disk write and full disk read operations on the standard solid-state drive, obtain multiple bit error rates returned by the full disk read operation of the standard solid-state drive, and statistically analyze the distribution of bit error rates corresponding to different chip enable signals of different channels of the standard solid-state drive. Accordingly, the inspection module is specifically used to: inspect the storage medium chip in the solid-state drive in the factory sample stage by comparing the distribution of bit error rates corresponding to the same chip enable signals of the same channel in the solid-state drive in the factory sample stage and the standard solid-state drive respectively. Specifically, the first statistical module is used to: count the number of times the bit error rate corresponding to the different chip enable signals of different channels of the solid-state drive in the factory sample stage is in different numerical ranges, so as to fit the first distribution curve. Accordingly, the second statistics module is specifically used to: count the number of times the bit error rate corresponding to the different chip enable signals of different channels of the standard solid-state drive is in different numerical ranges, so as to fit the second distribution curve; Accordingly, the inspection module is specifically used to: compare the first distribution curve with the second distribution curve, and if the similarity between the first distribution curve and the second distribution curve is greater than a preset similarity, then it is determined that there is a problem with the storage medium chip in the solid-state drive in the factory sample stage.

7. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the solid-state drive inspection method as described in any one of claims 1 to 4 when executing the computer program.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the solid-state drive inspection method as described in any one of claims 1 to 4.

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